4 This file is the start of a wish list of features/improvements in no particular
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8 - The ability to create more complex pad shapes. For example, a pad which
9 has a square end on one end and a round end on the other. Or, for example,
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14 - Support in both the layout editor and in components for additional non-mask
16 - A layer with some alignment marks. Uses are for connectors which must
17 be mounted a specified distance from the board edge. You could
18 align the alignment layer with the board outline. I've used the
19 assembly layer for this in the past.
21 - A keepout area for copper. One use is if you create a microstrip
22 filter and want to prevent traces from being accidentally placed
23 too close or you want to keep the autorouter away from that area.
25 - A keepout area for drills. This is useful in some applications where
26 you need to put vias on top of a pad, but need to keep other areas
27 of a pad via-free. The application here is, for example, a Johnstech
28 socket for a QFN package. See johnstech.inc.
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31 - Support for an arbitrary number of copper layers or at least lots more than
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35 - Support for including soldermask relief in a component. Useful for some
36 engineering sockets used with advanced high frequency packages such as QFN
37 which require a certain area to be clear of soldermask and silk.
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41 - The ability to create components that include copper polygons and pads where
42 the user should connect up to. This would enable creating elements like
43 a microstrip filter, a spiral inductor, patch antenna, etc which could easily
44 be handled by the layout. You'd want some sort of keepout region around to
45 at a minimum cause a DRC violation if you got traces too close to part of your
46 microstrip stuff. Another application is a solder bridgable gap. This is
47 typically made by taking a square or round pad and making a diagonal cut
48 across it. Currently, you can make such a thing with a polygon, but it can't
49 become part of a component which is verified for connectivity.
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53 - some support for hierarchy. I don't have a completely clear vision of how this
54 should work. The things I'd like to accomplish are the following:
55 - When layout out a fully differential circuit, its nice to be able to
56 layout a 1/2 circuit and instantiate two copies of it. This helps ensure
57 that the layout is absolutely symmetric.
59 - When laying out multiple channels of some circuit, its nice to not have
60 to replicate the work.
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64 - Some link back to the library for components. That way if I update a broken
65 footprint in my library I don't have to manually fix every instance of it.
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69 - A way to store the active/inactive list of nets so when you exit pcb and
70 load it again, the set of nets is saved. Also, when reloading the netlist
71 this saved set should be compared and merged as best as possible. This
72 way, you can keep ground and power rats off while the design is still changing.
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76 - A 'distribute components' feature. This would let you select a group of
77 components and automatically place them, but with no attention paid to
78 connectivity. It would simply move them apart. Useful if you've used
79 a tool such as gsch2pcb that created a new board from a schematic, but all
80 devices are on top of each other.
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88 - a database of which elements (and which version of that element) have been
89 verified through fabrication.
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92 - Port to GTK for a more modern look and feel along with providing an easy
93 path to a native windows port.
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