2 P 1300 500 1006 500 1 0 0
4 T 1100 550 5 8 1 1 0 0 1
6 T 1100 450 5 8 0 1 0 2 1
8 T 950 500 5 8 0 1 0 8 1
10 T 950 500 9 8 0 1 0 6 1
15 T 200 150 5 8 1 1 0 6 1
17 T 200 50 5 8 0 1 0 8 1
19 T 350 100 5 8 0 1 0 2 1
21 T 350 100 9 8 0 1 0 0 1
26 T 200 550 5 8 1 1 0 6 1
28 T 200 450 5 8 0 1 0 8 1
30 T 350 500 5 8 0 1 0 2 1
32 T 350 500 9 8 0 1 0 0 1
37 T 200 950 5 8 1 1 0 6 1
39 T 200 850 5 8 0 1 0 8 1
41 T 350 900 5 8 0 1 0 2 1
43 T 350 900 9 8 0 1 0 0 1
46 T 400 1150 5 10 0 0 0 0 1
48 T 400 1350 5 10 0 0 0 0 1
50 T 400 900 8 10 1 1 0 0 1
52 T 400 1550 5 10 0 0 0 0 1
54 T 400 1750 5 10 0 0 0 0 1
56 T 400 1950 5 10 0 0 0 0 1
58 T 400 2150 5 10 0 0 0 0 1
60 T 400 2350 5 10 0 0 0 0 1
62 T 400 2550 5 10 0 0 0 0 1
64 T 400 2750 5 10 0 0 0 0 1
66 T 400 2950 5 10 0 0 0 0 1
67 description=3 OR gates with 3 inputs
68 T 400 3150 5 10 0 0 0 0 1
69 documentation=http://www.semiconductors.philips.com/acrobat/datasheets/HEF4075B_CNV_3.pdf
70 T 400 0 9 10 1 0 0 0 1
72 A 36 500 400 312 97 3 0 0 0 -1 -1
73 L 300 200 600 200 3 0 0 0 -1 -1
74 L 300 800 600 800 3 0 0 0 -1 -1
75 A 600 600 400 270 76 3 0 0 0 -1 -1
76 A 600 400 400 14 76 3 0 0 0 -1 -1
77 L 300 0 300 200 3 0 0 0 -1 -1
78 L 300 1000 300 800 3 0 0 0 -1 -1