2 C 17400 25700 1 0 0 7400-1.sym
4 T 17700 26700 5 10 1 1 0 0
6 T 17400 25700 5 10 0 0 0 0
9 N 18700 26200 21300 26200 4
10 N 21300 26200 21300 24400 4
11 N 21300 24400 22600 24400 4
12 N 22600 24000 20300 24000 4
13 N 20300 24000 20300 26200 4
14 N 21300 25300 24100 25300 4
16 T 22700 25400 5 10 1 1 0 0
19 N 24100 25300 24100 24200 4
20 N 24100 24200 23900 24200 4
21 N 17400 26000 17000 26000 4
22 N 17000 26000 17000 25300 4
23 N 17000 25300 18800 25300 4
24 N 18800 25300 18800 26200 4
25 N 17400 26400 17200 26400 4
26 N 17200 26400 17200 27200 4
27 N 17200 27200 19800 27200 4
28 N 19800 27200 19800 26200 4
29 T 17900 35200 3 30 1 0 0 0
30 Test schematic for gnetlist
31 T 17100 27600 3 20 1 0 0 0
32 There is really only *one* net in this circuit
33 N 19000 33100 21800 33100 4
35 T 20400 33200 5 10 1 1 0 0
38 N 21800 33100 21800 32000 4
39 N 21800 32000 21600 32000 4
40 N 19000 33100 19000 32200 4
41 N 19000 32200 20300 32200 4
42 T 17200 30200 3 20 1 0 0 0
43 This is a single net with one unconnected pin
44 C 20300 31500 1 0 0 7400-1.sym
46 T 20600 32500 5 10 1 1 0 0
48 T 20300 31500 5 10 0 0 0 0
51 C 22600 23700 1 0 0 7400-1.sym
53 T 22900 24700 5 10 1 1 0 0
55 T 22600 23700 5 10 0 0 0 0