2 P 0 1500 300 1500 1 0 0
4 T 200 1550 5 8 1 1 0 6 1
6 T 200 1450 5 8 0 1 0 8 1
8 T 350 1500 9 8 1 1 0 0 1
10 T 350 1500 5 8 0 1 0 2 1
13 P 0 1100 300 1100 1 0 0
15 T 200 1150 5 8 1 1 0 6 1
17 T 200 1050 5 8 0 1 0 8 1
19 T 375 1100 9 8 1 1 0 0 1
21 T 375 1100 5 8 0 1 0 2 1
26 T 200 350 5 8 1 1 0 6 1
28 T 200 250 5 8 0 1 0 8 1
30 T 350 300 9 8 1 1 0 0 1
32 T 350 300 5 8 0 1 0 2 1
35 P 1800 1500 2100 1500 1 0 1
37 T 1900 1550 5 8 1 1 0 0 1
39 T 1900 1450 5 8 0 1 0 2 1
41 T 1750 1500 9 8 1 1 0 6 1
43 T 1750 1500 5 8 0 1 0 8 1
46 P 1800 1100 2100 1100 1 0 1
48 T 1900 1150 5 8 1 1 0 0 1
50 T 1900 1050 5 8 0 1 0 2 1
52 T 1750 1100 9 8 1 1 0 6 1
54 T 1750 1100 5 8 0 1 0 8 1
57 P 1800 700 2100 700 1 0 1
59 T 1900 750 5 8 1 1 0 0 1
61 T 1900 650 5 8 0 1 0 2 1
63 T 1750 700 9 8 1 1 0 6 1
65 T 1750 700 5 8 0 1 0 8 1
68 P 1800 300 2100 300 1 0 1
70 T 1900 350 5 8 1 1 0 0 1
72 T 1900 250 5 8 0 1 0 2 1
74 T 1750 300 9 8 1 1 0 6 1
76 T 1750 300 5 8 0 1 0 8 1
79 B 300 0 1500 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
80 T 300 2050 5 10 0 0 0 0 1
82 T 300 2250 5 10 0 0 0 0 1
84 T 300 2450 5 10 0 0 0 0 1
86 T 300 3050 5 10 0 0 0 0 1
88 T 300 2850 5 10 0 0 0 0 1
89 slotdef=1:7,9,6,5,4,3,10
90 T 300 2650 5 10 0 0 0 0 1
91 slotdef=2:15,1,14,13,12,11,2
92 T 1800 1900 8 10 1 1 0 6 1
94 T 300 3250 5 10 0 0 0 0 1
95 description=2 4-bit static shift register
96 T 300 3450 5 10 0 0 0 0 1
98 T 300 3650 5 10 0 0 0 0 1
100 T 300 1850 3 10 1 1 0 0 1
102 L 375 1100 300 1150 3 0 0 0 -1 -1
103 L 375 1100 300 1050 3 0 0 0 -1 -1