2 T 600 700 5 10 0 0 0 0 1
4 T 600 900 5 10 0 0 0 0 1
6 T 600 1100 5 10 0 0 0 0 1
8 T 600 1300 5 10 0 0 0 0 1
10 T 600 1500 5 10 0 0 0 0 1
12 T 600 1700 5 10 0 0 0 0 1
14 T 600 1900 5 10 0 0 0 0 1
16 L 265 0 600 0 3 0 0 0 -1 -1
17 L 265 600 600 600 3 0 0 0 -1 -1
18 A 0 300 400 312 96 3 0 0 0 -1 -1
19 A 600 400 400 270 76 3 0 0 0 -1 -1
20 A 600 200 400 14 76 3 0 0 0 -1 -1
23 T 200 550 5 8 1 1 0 6 1
25 T 200 450 5 8 0 1 0 8 1
27 T 350 500 5 8 0 1 0 2 1
29 T 350 500 9 8 0 1 0 0 1
34 T 200 150 5 8 1 1 0 6 1
36 T 200 50 5 8 0 1 0 8 1
38 T 350 100 5 8 0 1 0 2 1
40 T 350 100 9 8 0 1 0 0 1
43 P 1200 300 988 300 1 0 0
45 T 1000 350 5 8 1 1 0 0 1
47 T 1000 250 5 8 0 1 0 2 1
49 T 850 300 5 8 0 1 0 8 1
51 T 850 300 9 8 0 1 0 6 1
54 T 250 700 8 10 1 1 0 0 1
56 T 600 2100 5 10 0 0 0 0 1
58 T 600 2300 5 10 0 0 0 0 1
59 description=4 OR gates with 2 inputs
60 T 600 2500 5 10 0 0 0 0 1
62 T 600 2700 5 10 0 0 0 0 1
64 T 600 2900 5 10 0 0 0 0 1
65 documentation=http://www.semiconductors.philips.com/acrobat/datasheets/HEF4071B_CNV_3.pdf
66 T 800 650 9 10 1 0 0 0 1