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  28 <h1><a name="hierarchical_spice_model" id="hierarchical_spice_model">Hierarchical SPICE model</a></h1>
  29 <div class="level1">
  30
  31 <p>
  32 If you installed the gEDA Tool Suite from the distribution CD-ROM, then you should have this example of a hierarchical analog RF SPICE model in the:<br/>
  33  <strong><code>{source_install_path}geda-sources/gedagaf/geda-examples-20060123/RF_Amp</code></strong> <br/>
  34  directory.
  35 </p>
  36 <pre class="code">This README created 3.31.2003
  37
  38 ---------------------  Contents of directories  -----------------------
  39
  40 This directory holds the schematics and associated materials for a
  41 SPICE model of Agilent&#039;s MSA-2643 bipolar amp.  The model was obtained
  42 from Agilent&#039;s datasheet 5980-2396E.  The directory structure is as
  43 follows:
  44
  45 RF_Amp (base directory)
  46
  47 MSA-2643.sch -- schematic of stuff inside device package (as shown in
  48 p. 7 of datasheet.  Note that I have not included the transmission
  49 lines in this schematic because no value of Z was included in the data
  50 sheet.   (Yes, it&#039;s probably 50 ohms, but including them was a
  51 sideshow compared to my main intent: build a hierarchical model of an
  52 RF circuit.)
  53 MSA-2643.cir -- netlisted circuit ready for SPICE simulation.
  54
  55 Q1.sch -- schematic model of Q1 MSA-26 transistor shown on p. 8 of datasheet.
  56 Q1.cir -- netlisted circuit holding .SUBCKT model of Q1.
  57
  58 Q2.sch -- schematic model of Q2 MSA-26 transistor shown on p. 8 of datasheet.
  59 Q2.cir -- netlisted circuit holding .SUBCKT model of Q2.
  60
  61 README -- this file.
  62
  63 Simulation.cmd -- a file holding SPICE analysis commands which is read
  64 at simulation time by the SPICE simulator.
  65
  66 5980-2396E.pdf -- Agilent datasheet about the MSA-2643.
  67
  68
  69 ./model/
  70
  71 BJTM1_Q1.mod -- text-based SPICE model of BJT1 used in Q1 .SUBCKT
  72 DiodeM1_Q1.mod -- text-based SPICE model of diode M1 used in Q1 .SUBCKT
  73 DiodeM2_Q1.mod -- SPICE model of diode M2 used in Q1 .SUBCKT
  74 DiodeM3_Q1.mod -- SPICE model of diode M3 used in Q1 .SUBCKT
  75 (similar files for Q2 models. . . .)
  76 These models were obtained from parameters give in p. 8 of the datasheet.
  77
  78 ./sym/
  79
  80 BJT_Model.sym
  81 spice-subcircuit-IO-1.sym
  82 spice-subcircuit-LL-1.sym
  83 Q_Model.sym -- symbol pointing to lower level models placed on upper
  84 level schematic.
  85
  86 ------------  Usage of hierarchical spice models ---------------------
  87 This project exemplifies construction of a hierarchical SPICE
  88 simulation using gEDA.  The project is built in the following way:
  89
  90 1.  Use a text editor to create .mod files containing SPICE models of
  91 the transistors and diodes on p. 8 of the datasheet.
  92
  93 2.  Create Q1 and Q2 transistor model schematics using gschem.  Place
  94 the .SUBCKT SPICE block on the schematic to alert the netlister that
  95 the schematic is a lower level .SUBCKT for incorporation into other
  96 schematics.  Place spice-IO pads on the schematic to instantiate the
  97 IOs.  Make sure to number the spice-IO pads in the same order as you
  98 wish them to appear in the .SUBCKT line in the .cir.
  99
 100 3.  Generate the .SUBCKT netlist by saying:
 101
 102 gnetlist -g spice-sdb -o Q1.cir Q1.sch
 103 gnetlist -g spice-sdb -o Q2.cir Q2.sch
 104
 105 4.  Create a symbol for Q1.cir and Q2.cir which will be dropped onto
 106 the higher lever schematic.  Name the symbol Q_Model.sym.  Set the
 107 symbol &quot;DEVICE&quot; attribute = NPN_TRANSISTOR_subcircuit.  This causes
 108 the netlister to use &quot;write-default-component&quot; to write out the SPICE
 109 line for the component.  Make sure that the &quot;REFDES&quot; attribute is X?
 110 and not Q? -- this enables the .SUBCKT file to be attached to the
 111 device.
 112
 113 5.  Create the higher layer schematic MSA-2643.sch.  Place
 114 two copies of Q_Model.sym onto the schematic, corresponding to Q1 and
 115 Q2.  Make Q1 point to its model by setting the following attributes:
 116
 117 model-name: Q1_MSA26F
 118 file: Q1.cir
 119
 120 Do the same for Q2.
 121
 122 6.  Create the rest of the higher layer schematic the usual way.  Make
 123 sure to place a spice-include block on the schematic and point it to
 124 &quot;Simulation.cmd&quot;.  Place any analysis commands (e.g. .DC, .AC, .TRAN,
 125 etc.) into the file &quot;Simulation.cmd&quot;.
 126
 127 7.  Netlist the higher layer design:
 128
 129 gnetlist -g spice-sdb -o MSA-2643.cir MSA-2643.sch
 130
 131 8.  The circuit may be simulated by any desired SPICE simulation
 132 and analysis package, e.g. LTSpice.
 133
 134 --------------------  Contact  ----------------------------
 135 Documentation and other materials relevant to SPICE simulation under
 136 gEDA lives at http://www.brorson.com/gEDA/SPICE
 137
 138 For inquiries or bug reports, please contact me:
 139
 140 Stuart Brorson
 141 mailto:sdb@cloud9.net
 142 </pre>
 143
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