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  17 <h1><a name="hierarchical_spice_model" id="hierarchical_spice_model">Hierarchical SPICE model</a></h1>
  18 <div class="level1">
  19
  20 <p>
  21 If you installed the gEDA Tool Suite from the distribution CD-ROM, then you should have this example of a hierarchical analog RF SPICE model in the:<br/>
  22  <strong><code>{source_install_path}geda-sources/gedagaf/geda-examples-20060123/RF_Amp</code></strong> <br/>
  23  directory.
  24 </p>
  25 <pre class="code">This README created 3.31.2003
  26
  27 ---------------------  Contents of directories  -----------------------
  28
  29 This directory holds the schematics and associated materials for a
  30 SPICE model of Agilent&#039;s MSA-2643 bipolar amp.  The model was obtained
  31 from Agilent&#039;s datasheet 5980-2396E.  The directory structure is as
  32 follows:
  33
  34 RF_Amp (base directory)
  35
  36 MSA-2643.sch -- schematic of stuff inside device package (as shown in
  37 p. 7 of datasheet.  Note that I have not included the transmission
  38 lines in this schematic because no value of Z was included in the data
  39 sheet.   (Yes, it&#039;s probably 50 ohms, but including them was a
  40 sideshow compared to my main intent: build a hierarchical model of an
  41 RF circuit.)
  42 MSA-2643.cir -- netlisted circuit ready for SPICE simulation.
  43
  44 Q1.sch -- schematic model of Q1 MSA-26 transistor shown on p. 8 of datasheet.
  45 Q1.cir -- netlisted circuit holding .SUBCKT model of Q1.
  46
  47 Q2.sch -- schematic model of Q2 MSA-26 transistor shown on p. 8 of datasheet.
  48 Q2.cir -- netlisted circuit holding .SUBCKT model of Q2.
  49
  50 README -- this file.
  51
  52 Simulation.cmd -- a file holding SPICE analysis commands which is read
  53 at simulation time by the SPICE simulator.
  54
  55 5980-2396E.pdf -- Agilent datasheet about the MSA-2643.
  56
  57
  58 ./model/
  59
  60 BJTM1_Q1.mod -- text-based SPICE model of BJT1 used in Q1 .SUBCKT
  61 DiodeM1_Q1.mod -- text-based SPICE model of diode M1 used in Q1 .SUBCKT
  62 DiodeM2_Q1.mod -- SPICE model of diode M2 used in Q1 .SUBCKT
  63 DiodeM3_Q1.mod -- SPICE model of diode M3 used in Q1 .SUBCKT
  64 (similar files for Q2 models. . . .)
  65 These models were obtained from parameters give in p. 8 of the datasheet.
  66
  67 ./sym/
  68
  69 BJT_Model.sym
  70 spice-subcircuit-IO-1.sym
  71 spice-subcircuit-LL-1.sym
  72 Q_Model.sym -- symbol pointing to lower level models placed on upper
  73 level schematic.
  74
  75 ------------  Usage of hierarchical spice models ---------------------
  76 This project exemplifies construction of a hierarchical SPICE
  77 simulation using gEDA.  The project is built in the following way:
  78
  79 1.  Use a text editor to create .mod files containing SPICE models of
  80 the transistors and diodes on p. 8 of the datasheet.
  81
  82 2.  Create Q1 and Q2 transistor model schematics using gschem.  Place
  83 the .SUBCKT SPICE block on the schematic to alert the netlister that
  84 the schematic is a lower level .SUBCKT for incorporation into other
  85 schematics.  Place spice-IO pads on the schematic to instantiate the
  86 IOs.  Make sure to number the spice-IO pads in the same order as you
  87 wish them to appear in the .SUBCKT line in the .cir.
  88
  89 3.  Generate the .SUBCKT netlist by saying:
  90
  91 gnetlist -g spice-sdb -o Q1.cir Q1.sch
  92 gnetlist -g spice-sdb -o Q2.cir Q2.sch
  93
  94 4.  Create a symbol for Q1.cir and Q2.cir which will be dropped onto
  95 the higher lever schematic.  Name the symbol Q_Model.sym.  Set the
  96 symbol &quot;DEVICE&quot; attribute = NPN_TRANSISTOR_subcircuit.  This causes
  97 the netlister to use &quot;write-default-component&quot; to write out the SPICE
  98 line for the component.  Make sure that the &quot;REFDES&quot; attribute is X?
  99 and not Q? -- this enables the .SUBCKT file to be attached to the
 100 device.
 101
 102 5.  Create the higher layer schematic MSA-2643.sch.  Place
 103 two copies of Q_Model.sym onto the schematic, corresponding to Q1 and
 104 Q2.  Make Q1 point to its model by setting the following attributes:
 105
 106 model-name: Q1_MSA26F
 107 file: Q1.cir
 108
 109 Do the same for Q2.
 110
 111 6.  Create the rest of the higher layer schematic the usual way.  Make
 112 sure to place a spice-include block on the schematic and point it to
 113 &quot;Simulation.cmd&quot;.  Place any analysis commands (e.g. .DC, .AC, .TRAN,
 114 etc.) into the file &quot;Simulation.cmd&quot;.
 115
 116 7.  Netlist the higher layer design:
 117
 118 gnetlist -g spice-sdb -o MSA-2643.cir MSA-2643.sch
 119
 120 8.  The circuit may be simulated by any desired SPICE simulation
 121 and analysis package, e.g. LTSpice.
 122
 123 --------------------  Contact  ----------------------------
 124 Documentation and other materials relevant to SPICE simulation under
 125 gEDA lives at http://www.brorson.com/gEDA/SPICE
 126
 127 For inquiries or bug reports, please contact me:
 128
 129 Stuart Brorson
 130 mailto:sdb@cloud9.net
 131 </pre>
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