docs/wiki/geda-gnetlist_ug-hierarchy.html

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  14 <div class="table sectionedit2157"><table class="inline">
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  16                 <td class="col0 leftalign"> « <a href="geda-gnetlist_ug-basic_netlisting.html" class="wikilink1" title="geda-gnetlist_ug-basic_netlisting.html">Basic netlisting</a>  </td><td class="col1 centeralign">  <strong><a href="geda-gnetlist_ug.html" class="wikilink1" title="geda-gnetlist_ug.html">gEDA gnetlist User Guide</a></strong>     </td><td class="col2 rightalign">  <a href="geda-gnetlist_ug-slotting.html" class="wikilink1" title="geda-gnetlist_ug-slotting.html">Slots and slotting</a> » </td>
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  19 <!-- EDIT2157 TABLE [1-175] -->
  20 <h2 class="sectionedit2158"><a name="hierarchy" id="hierarchy">Hierarchy</a></h2>
  21 <div class="level2">
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  23 <p>
  24 gnetlist has support for <em>hierarchical schematics</em>.  These are schematic diagrams that include other schematic diagrams as <em>subcircuits</em>.  This can be very useful for designs that use the same circuit multiple times, or for re-using a circuit in multiple designs.  Subcircuits can in turn contain other subcircuits!
  25 </p>
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  27 <p>
  28 Each subcircuit schematic diagram needs to have a subcircuit symbol associated with it.  The ”<code>device=</code>” attribute on a subcircuit symbol is ignored.  The ”<code>source=</code>” attribute should be used to specify the name of the subcircuit&#039;s schematic file.
  29 </p>
  30
  31 <p>
  32 Subcircuit symbols are loaded from the symbol library as normal.  Subcircuit schematics are loaded from the <em>source library</em>.
  33 </p>
  34
  35 <p>
  36 <p><div class="notetip">See <a href="geda-gnetlist_ug-config.html" class="wikilink1" title="geda-gnetlist_ug-config.html">Configuring gnetlist</a> for details of how to control where gnetlist looks for subcircuit schematic files.
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  41 <!-- EDIT2158 SECTION "Hierarchy" [177-1039] -->
  42 <h3 class="sectionedit2159"><a name="hierarchical_ports" id="hierarchical_ports">Hierarchical ports</a></h3>
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  45 <p>
  46 The pins on a subcircuit symbol define the <em>ports</em> where designs that include the circuit can connect to it.  Each port should be named using a ”<code>pinlabel=</code>” attribute.  To define the points where a port attaches to the subcircuit&#039;s nets, gnetlist will look for the first pin on a component which has a ”<code>refdes=</code>” attribute that matches the port&#039;s name.  You can normally use the “in-1.sym” and “out-1.sym” symbols from the generic “Input/Output” symbol library for this.
  47 </p>
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  49 </div>
  50 <!-- EDIT2159 SECTION "Hierarchical ports" [1040-1549] -->
  51 <h3 class="sectionedit2160"><a name="renaming_components_and_nets" id="renaming_components_and_nets">Renaming components and nets</a></h3>
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  54 <p>
  55 Each subcircuit symbol placed into a schematic must have a ”<code>refdes=</code>” attribute attached to it.  This is the name of the <em>subcircuit instance</em>.  In order to uniquely identify components and nets in each instance of a hierarchical subcircuit, gnetlist will rename them using the subcircuit&#039;s name as a prefix.
  56 </p>
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  58 <p>
  59 For example, consider a subcircuit that contains a component with ”<code>refdes=U1</code>” and a net with ”<code>netname=FEEDBACK</code>”.  Now, suppose the subcircuit symbol is placed in a schematic and an attribute ”<code>refdes=A1</code>” is attached to it.  When the schematic is processed using gnetlist, gnetlist will rename the component to “A1/U1” and rename the net to “A1/FEEDBACK”.
  60 </p>
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