2 L 300 200 300 800 3 0 0 0 -1 -1
5 L 300 800 700 800 3 0 0 0 -1 -1
6 T 600 900 5 10 0 0 0 0 1
8 T 600 1100 5 10 0 0 0 0 1
10 T 600 1300 5 10 0 0 0 0 1
12 T 600 1500 5 10 0 0 0 0 1
14 T 600 1700 5 10 0 0 0 0 1
16 T 600 1900 5 10 0 0 0 0 1
18 T 600 2100 5 10 0 0 0 0 1
20 L 300 200 700 200 3 0 0 0 -1 -1
21 A 700 500 300 270 180 3 0 0 0 -1 -1
22 P 1100 500 1300 500 1 0 1
24 T 1100 550 5 8 1 1 0 0 1
26 T 1100 450 5 8 0 1 0 2 1
28 T 950 500 9 8 0 1 0 6 1
30 T 950 500 5 8 0 1 0 8 1
33 V 250 700 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
34 V 250 300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
37 T 200 350 5 8 1 1 0 6 1
39 T 200 250 5 8 0 1 0 8 1
41 T 350 300 9 8 0 1 0 0 1
43 T 350 300 5 8 0 1 0 2 1
48 T 200 750 5 8 1 1 0 6 1
50 T 200 650 5 8 0 1 0 8 1
52 T 350 700 9 8 0 1 0 0 1
54 T 350 700 5 8 0 1 0 2 1
57 T 300 900 8 10 1 1 0 0 1
59 T 600 2300 5 10 0 0 0 0 1
61 T 600 2500 5 10 0 0 0 0 1
62 description=4 OR gates with 2 inputs
63 T 600 2700 5 10 0 0 0 0 1
65 T 600 2900 5 10 0 0 0 0 1
67 T 600 3100 5 10 0 0 0 0 1
68 documentation=http://www-s.ti.com/sc/ds/sn74hc32.pdf
69 V 1050 500 51 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1