mozglue/misc/SSE.cpp

   1 /* vim: set shiftwidth=4 tabstop=8 autoindent cindent expandtab: */
   2 /* This Source Code Form is subject to the terms of the Mozilla Public
   3  * License, v. 2.0. If a copy of the MPL was not distributed with this
   4  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
   5
   6 /* compile-time and runtime tests for whether to use SSE instructions */
   7
   8 #include "SSE.h"
   9
  10 #ifdef HAVE_CPUID_H
  11 // cpuid.h is available on gcc 4.3 and higher on i386 and x86_64
  12 #  include <cpuid.h>
  13 #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_AMD64))
  14 // MSVC 2005 or newer on x86-32 or x86-64
  15 #  include <intrin.h>
  16 #endif
  17
  18 namespace {
  19
  20 // SSE.h has parallel #ifs which declare MOZILLA_SSE_HAVE_CPUID_DETECTION.
  21 // We can't declare these functions in the header file, however, because
  22 // <intrin.h> conflicts with <windows.h> on MSVC 2005, and some files want to
  23 // include both SSE.h and <windows.h>.
  24
  25 #ifdef HAVE_CPUID_H
  26
  27 enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
  28
  29 static bool has_cpuid_bits(unsigned int level, CPUIDRegister reg,
  30                            unsigned int bits) {
  31   unsigned int regs[4];
  32   unsigned int eax, ebx, ecx, edx;
  33   unsigned max = __get_cpuid_max(level & 0x80000000u, nullptr);
  34   if (level > max) return false;
  35   __cpuid_count(level, 0, eax, ebx, ecx, edx);
  36   regs[0] = eax;
  37   regs[1] = ebx;
  38   regs[2] = ecx;
  39   regs[3] = edx;
  40   return (regs[reg] & bits) == bits;
  41 }
  42
  43 static bool has_cpuid_bits_ex(unsigned int level, CPUIDRegister reg,
  44                               unsigned int bits) {
  45   unsigned int regs[4];
  46   unsigned int eax, ebx, ecx, edx;
  47   unsigned max = __get_cpuid_max(level & 0x80000000u, nullptr);
  48   if (level > max) return false;
  49   __cpuid_count(level, 1, eax, ebx, ecx, edx);
  50   regs[0] = eax;
  51   regs[1] = ebx;
  52   regs[2] = ecx;
  53   regs[3] = edx;
  54   return (regs[reg] & bits) == bits;
  55 }
  56
  57 #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_AMD64))
  58
  59 enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
  60
  61 static bool has_cpuid_bits(unsigned int level, CPUIDRegister reg,
  62                            unsigned int bits) {
  63   // Check that the level in question is supported.
  64   int regs[4];
  65   __cpuid_ex(regs, level & 0x80000000u, 1);
  66   if (unsigned(regs[0]) < level) return false;
  67
  68   // "The __cpuid intrinsic clears the ECX register before calling the cpuid
  69   // instruction."
  70   __cpuid_ex(regs, level, 1);
  71   return (unsigned(regs[reg]) & bits) == bits;
  72 }
  73
  74 #elif (defined(__GNUC__) || defined(__SUNPRO_CC)) && \
  75     (defined(__i386) || defined(__x86_64__))
  76
  77 enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };
  78
  79 #  ifdef __i386
  80 static void moz_cpuid(int CPUInfo[4], int InfoType) {
  81   asm("xchg %esi, %ebx\n"
  82       "xor %ecx, %ecx\n"  // ecx is the sub-leaf (we only ever need 0)
  83       "cpuid\n"
  84       "movl %eax, (%edi)\n"
  85       "movl %ebx, 4(%edi)\n"
  86       "movl %ecx, 8(%edi)\n"
  87       "movl %edx, 12(%edi)\n"
  88       "xchg %esi, %ebx\n"
  89       :
  90       : "a"(InfoType),  // %eax
  91         "D"(CPUInfo)    // %edi
  92       : "%ecx", "%edx", "%esi");
  93 }
  94 static void moz_cpuid_ex(int CPUInfo[4], int InfoType) {
  95   asm("xchg %esi, %ebx\n"
  96       "movl 1, %ecx\n"
  97       "cpuid\n"
  98       "movl %eax, (%edi)\n"
  99       "movl %ebx, 4(%edi)\n"
 100       "movl %ecx, 8(%edi)\n"
 101       "movl %edx, 12(%edi)\n"
 102       "xchg %esi, %ebx\n"
 103       :
 104       : "a"(InfoType),  // %eax
 105         "D"(CPUInfo)    // %edi
 106       : "%ecx", "%edx", "%esi");
 107 }
 108 #  else
 109 static void moz_cpuid(int CPUInfo[4], int InfoType) {
 110   asm("xchg %rsi, %rbx\n"
 111       "xor %ecx, %ecx\n"  // ecx is the sub-leaf (we only ever need 0)
 112       "cpuid\n"
 113       "movl %eax, (%rdi)\n"
 114       "movl %ebx, 4(%rdi)\n"
 115       "movl %ecx, 8(%rdi)\n"
 116       "movl %edx, 12(%rdi)\n"
 117       "xchg %rsi, %rbx\n"
 118       :
 119       : "a"(InfoType),  // %eax
 120         "D"(CPUInfo)    // %rdi
 121       : "%ecx", "%edx", "%rsi");
 122 }
 123 static void moz_cpuid_ex(int CPUInfo[4], int InfoType) {
 124   asm("xchg %rsi, %rbx\n"
 125       "movl 1, %ecx\n"
 126       "cpuid\n"
 127       "movl %eax, (%rdi)\n"
 128       "movl %ebx, 4(%rdi)\n"
 129       "movl %ecx, 8(%rdi)\n"
 130       "movl %edx, 12(%rdi)\n"
 131       "xchg %rsi, %rbx\n"
 132       :
 133       : "a"(InfoType),  // %eax
 134         "D"(CPUInfo)    // %rdi
 135       : "%ecx", "%edx", "%rsi");
 136 }
 137 #  endif
 138
 139 static bool has_cpuid_bits(unsigned int level, CPUIDRegister reg,
 140                            unsigned int bits) {
 141   // Check that the level in question is supported.
 142   volatile int regs[4];
 143   moz_cpuid((int*)regs, level & 0x80000000u);
 144   if (unsigned(regs[0]) < level) return false;
 145
 146   moz_cpuid((int*)regs, level);
 147   return (unsigned(regs[reg]) & bits) == bits;
 148 }
 149
 150 static bool has_cpuid_bits_ex(unsigned int level, CPUIDRegister reg,
 151                               unsigned int bits) {
 152   // Check that the level in question is supported.
 153   volatile int regs[4];
 154   moz_cpuid_ex((int*)regs, level & 0x80000000u);
 155   if (unsigned(regs[0]) < level) return false;
 156
 157   moz_cpuid_ex((int*)regs, level);
 158   return (unsigned(regs[reg]) & bits) == bits;
 159 }
 160
 161 #endif  // end CPUID declarations
 162
 163 }  // namespace
 164
 165 namespace mozilla {
 166
 167 namespace sse_private {
 168
 169 #if defined(MOZILLA_SSE_HAVE_CPUID_DETECTION)
 170
 171 #  if !defined(MOZILLA_PRESUME_MMX)
 172 bool mmx_enabled = has_cpuid_bits(1u, edx, (1u << 23));
 173 #  endif
 174
 175 #  if !defined(MOZILLA_PRESUME_SSE)
 176 bool sse_enabled = has_cpuid_bits(1u, edx, (1u << 25));
 177 #  endif
 178
 179 #  if !defined(MOZILLA_PRESUME_SSE2)
 180 bool sse2_enabled = has_cpuid_bits(1u, edx, (1u << 26));
 181 #  endif
 182
 183 #  if !defined(MOZILLA_PRESUME_SSE3)
 184 bool sse3_enabled = has_cpuid_bits(1u, ecx, (1u << 0));
 185 #  endif
 186
 187 #  if !defined(MOZILLA_PRESUME_SSSE3)
 188 bool ssse3_enabled = has_cpuid_bits(1u, ecx, (1u << 9));
 189 #  endif
 190
 191 #  if !defined(MOZILLA_PRESUME_SSE4A)
 192 bool sse4a_enabled = has_cpuid_bits(0x80000001u, ecx, (1u << 6));
 193 #  endif
 194
 195 #  if !defined(MOZILLA_PRESUME_SSE4_1)
 196 bool sse4_1_enabled = has_cpuid_bits(1u, ecx, (1u << 19));
 197 #  endif
 198
 199 #  if !defined(MOZILLA_PRESUME_SSE4_2)
 200 bool sse4_2_enabled = has_cpuid_bits(1u, ecx, (1u << 20));
 201 #  endif
 202
 203 #  if !defined(MOZILLA_PRESUME_FMA3)
 204 bool fma3_enabled = has_cpuid_bits(1u, ecx, (1u << 12));
 205 #  endif
 206
 207 #  if !defined(MOZILLA_PRESUME_AVX) || !defined(MOZILLA_PRESUME_AVX2)
 208 static bool has_avx() {
 209 #    if defined(MOZILLA_PRESUME_AVX)
 210   return true;
 211 #    else
 212   const unsigned AVX = 1u << 28;
 213   const unsigned OSXSAVE = 1u << 27;
 214   const unsigned XSAVE = 1u << 26;
 215
 216   const unsigned XMM_STATE = 1u << 1;
 217   const unsigned YMM_STATE = 1u << 2;
 218   const unsigned AVX_STATE = XMM_STATE | YMM_STATE;
 219
 220   return has_cpuid_bits(1u, ecx, AVX | OSXSAVE | XSAVE) &&
 221          // ensure the OS supports XSAVE of YMM registers
 222          (xgetbv(0) & AVX_STATE) == AVX_STATE;
 223 #    endif  // MOZILLA_PRESUME_AVX
 224 }
 225 #  endif  // !MOZILLA_PRESUME_AVX || !MOZILLA_PRESUME_AVX2
 226
 227 #  if !defined(MOZILLA_PRESUME_AVX)
 228 bool avx_enabled = has_avx();
 229 #  endif
 230
 231 #  if !defined(MOZILLA_PRESUME_AVX2)
 232 bool avx2_enabled = has_avx() && has_cpuid_bits(7u, ebx, (1u << 5));
 233 #  endif
 234
 235 #  if !defined(MOZILLA_PRESUME_AVXVNNI)
 236 bool avxvnni_enabled = has_cpuid_bits_ex(7u, eax, (1u << 4));
 237 #  endif
 238
 239 #  if !defined(MOZILLA_PRESUME_AES)
 240 bool aes_enabled = has_cpuid_bits(1u, ecx, (1u << 25));
 241 #  endif
 242
 243 bool has_constant_tsc = has_cpuid_bits(0x80000007u, edx, (1u << 8));
 244
 245 #endif
 246
 247 }  // namespace sse_private
 248
 249 #ifdef HAVE_CPUID_H
 250
 251 uint64_t xgetbv(uint32_t xcr) {
 252   uint32_t eax, edx;
 253   __asm__(".byte 0x0f, 0x01, 0xd0" : "=a"(eax), "=d"(edx) : "c"(xcr));
 254   return (uint64_t)(edx) << 32 | eax;
 255 }
 256
 257 #endif
 258
 259 }  // namespace mozilla