1 /* Copyright (c) 2007-2008 CSIRO
2 Copyright (c) 2007-2010 Xiph.Org Foundation
3 Copyright (c) 2008 Gregory Maxwell
4 Written by Jean-Marc Valin and Gregory Maxwell */
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions
10 - Redistributions of source code must retain the above copyright
11 notice, this list of conditions and the following disclaimer.
13 - Redistributions in binary form must reproduce the above copyright
14 notice, this list of conditions and the following disclaimer in the
15 documentation and/or other materials provided with the distribution.
17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
21 OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
24 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
25 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
26 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
27 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #ifndef CELT_MIPSR1_H__
31 #define CELT_MIPSR1_H__
39 #include "os_support.h"
47 #include "quant_bands.h"
49 #include "stack_alloc.h"
51 #include "float_cast.h"
56 #define OVERRIDE_COMB_FILTER_CONST
57 #define OVERRIDE_comb_filter
58 void comb_filter(opus_val32
*y
, opus_val32
*x
, int T0
, int T1
, int N
,
59 opus_val16 g0
, opus_val16 g1
, int tapset0
, int tapset1
,
60 const opus_val16
*window
, int overlap
, int arch
)
63 opus_val32 x0
, x1
, x2
, x3
, x4
;
67 /* printf ("%d %d %f %f\n", T0, T1, g0, g1); */
68 opus_val16 g00
, g01
, g02
, g10
, g11
, g12
;
69 static const opus_val16 gains
[3][3] = {
70 {QCONST16(0.3066406250f
, 15), QCONST16(0.2170410156f
, 15), QCONST16(0.1296386719f
, 15)},
71 {QCONST16(0.4638671875f
, 15), QCONST16(0.2680664062f
, 15), QCONST16(0.f
, 15)},
72 {QCONST16(0.7998046875f
, 15), QCONST16(0.1000976562f
, 15), QCONST16(0.f
, 15)}};
76 /* OPT: Happens to work without the OPUS_MOVE(), but only because the current encoder already copies x to y */
82 g00
= MULT16_16_P15(g0
, gains
[tapset0
][0]);
83 g01
= MULT16_16_P15(g0
, gains
[tapset0
][1]);
84 g02
= MULT16_16_P15(g0
, gains
[tapset0
][2]);
85 g10
= MULT16_16_P15(g1
, gains
[tapset1
][0]);
86 g11
= MULT16_16_P15(g1
, gains
[tapset1
][1]);
87 g12
= MULT16_16_P15(g1
, gains
[tapset1
][2]);
92 /* If the filter didn't change, we don't need the overlap */
93 if (g0
==g1
&& T0
==T1
&& tapset0
==tapset1
)
96 for (i
=0;i
<overlap
;i
++)
100 f
= MULT16_16_Q15(window
[i
],window
[i
]);
103 asm volatile("MULT $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15((Q15ONE
-f
),g00
)), "r" ((int)x
[i
-T0
]));
105 asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15((Q15ONE
-f
),g01
)), "r" ((int)ADD32(x
[i
-T0
-1],x
[i
-T0
+1])));
106 asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15((Q15ONE
-f
),g02
)), "r" ((int)ADD32(x
[i
-T0
-2],x
[i
-T0
+2])));
107 asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15(f
,g10
)), "r" ((int)x2
));
108 asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15(f
,g11
)), "r" ((int)ADD32(x3
,x1
)));
109 asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15(f
,g12
)), "r" ((int)ADD32(x4
,x0
)));
111 asm volatile("EXTR.W %0,$ac1, %1" : "=r" (res
): "i" (15));
128 /* OPT: Happens to work without the OPUS_MOVE(), but only because the current encoder already copies x to y */
130 OPUS_MOVE(y
+overlap
, x
+overlap
, N
-overlap
);
134 for (i
=overlap
;i
<N
;i
++)
139 asm volatile("MULT $ac1, %0, %1" : : "r" ((int)g10
), "r" ((int)x2
));
141 asm volatile("MADD $ac1, %0, %1" : : "r" ((int)g11
), "r" ((int)ADD32(x3
,x1
)));
142 asm volatile("MADD $ac1, %0, %1" : : "r" ((int)g12
), "r" ((int)ADD32(x4
,x0
)));
143 asm volatile("EXTR.W %0,$ac1, %1" : "=r" (res
): "i" (15));
152 #endif /* CELT_MIPSR1_H__ */