Bug 1852740: add tests for the `fetchpriority` attribute in Link headers. r=necko...
[gecko.git] / media / libtheora / clang-arm.patch
blob0fd97ebb1be7d137ab5a4ba41ea6da925b256a78
1 diff --git a/lib/arm/arm2gnu.pl b/lib/arm/arm2gnu.pl
2 index 8cb68e4..d6fe09c 100755
3 --- a/lib/arm/arm2gnu.pl
4 +++ b/lib/arm/arm2gnu.pl
5 @@ -25,6 +25,8 @@ $n=0;
6 $thumb = 0; # ARM mode by default, not Thumb.
7 @proc_stack = ();
9 +printf (" .syntax unified\n");
11 LINE:
12 while (<>) {
14 diff --git a/lib/arm/armbits.s b/lib/arm/armbits.s
15 index 9400722..fd6e444 100644
16 --- a/lib/arm/armbits.s
17 +++ b/lib/arm/armbits.s
18 @@ -67,28 +67,28 @@ oc_pack_read_refill
19 ; negative.
20 CMP r10,r11 ; ptr<stop => HI
21 CMPHI r3,#7 ; available<=24 => HI
22 - LDRHIB r14,[r11],#1 ; r14 = *ptr++
23 + LDRBHI r14,[r11],#1 ; r14 = *ptr++
24 SUBHI r3,#8 ; available += 8
25 ; (HI) Stall...
26 - ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
27 + ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
28 CMPHI r10,r11 ; ptr<stop => HI
29 CMPHI r3,#7 ; available<=24 => HI
30 - LDRHIB r14,[r11],#1 ; r14 = *ptr++
31 + LDRBHI r14,[r11],#1 ; r14 = *ptr++
32 SUBHI r3,#8 ; available += 8
33 ; (HI) Stall...
34 - ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
35 + ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
36 CMPHI r10,r11 ; ptr<stop => HI
37 CMPHI r3,#7 ; available<=24 => HI
38 - LDRHIB r14,[r11],#1 ; r14 = *ptr++
39 + LDRBHI r14,[r11],#1 ; r14 = *ptr++
40 SUBHI r3,#8 ; available += 8
41 ; (HI) Stall...
42 - ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
43 + ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
44 CMPHI r10,r11 ; ptr<stop => HI
45 CMPHI r3,#7 ; available<=24 => HI
46 - LDRHIB r14,[r11],#1 ; r14 = *ptr++
47 + LDRBHI r14,[r11],#1 ; r14 = *ptr++
48 SUBHI r3,#8 ; available += 8
49 ; (HI) Stall...
50 - ORRHI r2,r14,LSL r3 ; r2 = window|=r14<<32-available
51 + ORRHI r2,r2,r14,LSL r3 ; r2 = window|=r14<<32-available
52 SUBS r3,r0,r3 ; r3 = available-=_bits, available<bits => GT
53 BLT oc_pack_read_refill_last
54 MOV r0,r2,LSR r0 ; r0 = window>>32-_bits
55 @@ -104,14 +104,14 @@ oc_pack_read_refill_last
56 CMP r11,r10 ; ptr<stop => LO
57 ; If we didn't hit the end of the packet, then pull enough of the next byte to
58 ; to fill up the window.
59 - LDRLOB r14,[r11] ; (LO) r14 = *ptr
60 + LDRBLO r14,[r11] ; (LO) r14 = *ptr
61 ; Otherwise, set the EOF flag and pretend we have lots of available bits.
62 MOVHS r14,#1 ; (HS) r14 = 1
63 ADDLO r10,r3,r1 ; (LO) r10 = available
64 STRHS r14,[r12,#8] ; (HS) eof = 1
65 ANDLO r10,r10,#7 ; (LO) r10 = available&7
66 MOVHS r3,#1<<30 ; (HS) available = OC_LOTS_OF_BITS
67 - ORRLO r2,r14,LSL r10 ; (LO) r2 = window|=*ptr>>(available&7)
68 + ORRLO r2,r2,r14,LSL r10 ; (LO) r2 = window|=*ptr>>(available&7)
69 MOV r0,r2,LSR r0 ; r0 = window>>32-_bits
70 MOV r2,r2,LSL r1 ; r2 = window<<=_bits
71 STR r11,[r12,#-4] ; ptr = r11
72 @@ -183,32 +183,32 @@ oc_huff_token_decode_refill
73 ; We can't possibly need more than 15 bits, so available must be <= 15.
74 ; Therefore we can load at least two bytes without checking it.
75 CMP r2,r3 ; ptr<stop => HI
76 - LDRHIB r14,[r3],#1 ; r14 = *ptr++
77 + LDRBHI r14,[r3],#1 ; r14 = *ptr++
78 RSBHI r5,r5,#24 ; (HI) available = 32-(available+=8)
79 RSBLS r5,r5,#32 ; (LS) r5 = 32-available
80 - ORRHI r4,r14,LSL r5 ; r4 = window|=r14<<32-available
81 + ORRHI r4,r4,r14,LSL r5 ; r4 = window|=r14<<32-available
82 CMPHI r2,r3 ; ptr<stop => HI
83 - LDRHIB r14,[r3],#1 ; r14 = *ptr++
84 + LDRBHI r14,[r3],#1 ; r14 = *ptr++
85 SUBHI r5,#8 ; available += 8
86 ; (HI) Stall...
87 - ORRHI r4,r14,LSL r5 ; r4 = window|=r14<<32-available
88 + ORRHI r4,r4,r14,LSL r5 ; r4 = window|=r14<<32-available
89 ; We can use unsigned compares for both the pointers and for available
90 ; (allowing us to chain condition codes) because available will never be
91 ; larger than 32 (or we wouldn't be here), and thus 32-available will never be
92 ; negative.
93 CMPHI r2,r3 ; ptr<stop => HI
94 CMPHI r5,#7 ; available<=24 => HI
95 - LDRHIB r14,[r3],#1 ; r14 = *ptr++
96 + LDRBHI r14,[r3],#1 ; r14 = *ptr++
97 SUBHI r5,#8 ; available += 8
98 ; (HI) Stall...
99 - ORRHI r4,r14,LSL r5 ; r4 = window|=r14<<32-available
100 + ORRHI r4,r4,r14,LSL r5 ; r4 = window|=r14<<32-available
101 CMP r2,r3 ; ptr<stop => HI
102 MOVLS r5,#-1<<30 ; (LS) available = OC_LOTS_OF_BITS+32
103 CMPHI r5,#7 ; (HI) available<=24 => HI
104 - LDRHIB r14,[r3],#1 ; (HI) r14 = *ptr++
105 + LDRBHI r14,[r3],#1 ; (HI) r14 = *ptr++
106 SUBHI r5,#8 ; (HI) available += 8
107 ; (HI) Stall...
108 - ORRHI r4,r14,LSL r5 ; (HI) r4 = window|=r14<<32-available
109 + ORRHI r4,r4,r14,LSL r5 ; (HI) r4 = window|=r14<<32-available
110 RSB r14,r10,#32 ; r14 = 32-n
111 MOV r14,r4,LSR r14 ; r14 = bits=window>>32-n
112 ADD r12,r12,r14 ;
113 diff --git a/lib/arm/armfrag.s b/lib/arm/armfrag.s
114 index 38627ed..38ee775 100644
115 --- a/lib/arm/armfrag.s
116 +++ b/lib/arm/armfrag.s
117 @@ -357,7 +357,7 @@ ofrintra_v6_lp
118 ORR r5, r5, r5, LSR #8 ; r5 = __777766
119 PKHBT r2, r2, r3, LSL #16 ; r2 = 33221100
120 PKHBT r3, r4, r5, LSL #16 ; r3 = 77665544
121 - STRD r2, [r0], r1
122 + STRD r2, r3, [r0], r1
123 BGT ofrintra_v6_lp
124 LDMFD r13!,{r4-r6,PC}
125 ENDP
126 @@ -397,7 +397,7 @@ ofrinter_v6_lp
127 USAT16 r12,#8, r12 ; r12= __66__44
128 USAT16 r5, #8, r5 ; r4 = __77__55
129 ORR r5, r12,r5, LSL #8 ; r5 = 33221100
130 - STRD r4, [r0], r2
131 + STRD r4, r5, [r0], r2
132 BGT ofrinter_v6_lp
133 LDMFD r13!,{r4-r7,PC}
134 ENDP
135 @@ -439,7 +439,7 @@ ofrinter2_v6_lp
136 USAT16 r8, #8, r8 ; r8 = __22__00
137 USAT16 r7, #8, r7 ; r7 = __33__11
138 ORR r8, r8, r7, LSL #8 ; r8 = 33221100
139 - STRD r8, [r0], r3
140 + STRD r8, r9, [r0], r3
141 BGT ofrinter2_v6_lp
142 LDMFD r13!,{r4-r9,PC}
143 ENDP
144 diff --git a/lib/arm/armidct.s b/lib/arm/armidct.s
145 index 68530c7..269f74b 100644
146 --- a/lib/arm/armidct.s
147 +++ b/lib/arm/armidct.s
148 @@ -875,7 +875,7 @@ idct2_1core_v6 PROC
149 LDR r3, OC_C4S4
150 LDRSH r6, [r1], #16 ; r6 = x[1,0]
151 SMULWB r12,r3, r2 ; r12= t[0,0]=OC_C4S4*x[0,0]>>16
152 - LDRD r4, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
153 + LDRD r4, r5, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
154 SMULWB r6, r3, r6 ; r6 = t[1,0]=OC_C4S4*x[1,0]>>16
155 SMULWT r4, r4, r2 ; r4 = t[0,4]=OC_C7S1*x[0,1]>>16
156 SMULWT r7, r5, r2 ; r7 = t[0,7]=OC_C1S7*x[0,1]>>16
157 @@ -937,7 +937,7 @@ idct2_2core_down_v6 PROC
158 MOV r7 ,#8 ; r7 = 8
159 LDR r6, [r1], #16 ; r6 = <x[1,1]|x[1,0]>
160 SMLAWB r12,r3, r2, r7 ; r12= (t[0,0]=OC_C4S4*x[0,0]>>16)+8
161 - LDRD r4, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
162 + LDRD r4, r5, OC_C7S1 ; r4 = OC_C7S1; r5 = OC_C1S7
163 SMLAWB r7, r3, r6, r7 ; r7 = (t[1,0]=OC_C4S4*x[1,0]>>16)+8
164 SMULWT r5, r5, r2 ; r2 = t[0,7]=OC_C1S7*x[0,1]>>16
165 PKHBT r12,r12,r7, LSL #16 ; r12= <t[1,0]+8|t[0,0]+8>
166 @@ -1053,7 +1053,7 @@ idct3_2core_v6 PROC
167 ; r1 = const ogg_int16_t *_x (source)
168 ; Stage 1:
169 LDRD r4, [r1], #16 ; r4 = <x[0,1]|x[0,0]>; r5 = <*|x[0,2]>
170 - LDRD r10,OC_C6S2_3_v6 ; r10= OC_C6S2; r11= OC_C2S6
171 + LDRD r10, r11, OC_C6S2_3_v6 ; r10= OC_C6S2; r11= OC_C2S6
172 ; Stall
173 SMULWB r3, r11,r5 ; r3 = t[0,3]=OC_C2S6*x[0,2]>>16
174 LDR r11,OC_C4S4
175 @@ -1132,12 +1132,12 @@ idct4_3core_v6 PROC
176 ; r1 = const ogg_int16_t *_x (source)
177 ; Stage 1:
178 LDRD r10,[r1], #16 ; r10= <x[0,1]|x[0,0]>; r11= <x[0,3]|x[0,2]>
179 - LDRD r2, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
180 + LDRD r2, r3, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
181 LDRD r4, [r1], #16 ; r4 = <x[1,1]|x[1,0]>; r5 = <??|x[1,2]>
182 SMULWT r9, r3, r11 ; r9 = t[0,6]=OC_C3S5*x[0,3]>>16
183 SMULWT r8, r2, r11 ; r8 = -t[0,5]=OC_C5S3*x[0,3]>>16
184 PKHBT r9, r9, r2 ; r9 = <0|t[0,6]>
185 - LDRD r6, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
186 + LDRD r6, r7, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
187 PKHBT r8, r8, r2 ; r9 = <0|-t[0,5]>
188 SMULWB r3, r7, r11 ; r3 = t[0,3]=OC_C2S6*x[0,2]>>16
189 SMULWB r2, r6, r11 ; r2 = t[0,2]=OC_C6S2*x[0,2]>>16
190 @@ -1148,7 +1148,7 @@ idct4_3core_v6 PROC
191 SMULWB r12,r11,r10 ; r12= t[0,0]=OC_C4S4*x[0,0]>>16
192 PKHBT r2, r2, r5, LSL #16 ; r2 = <t[1,2]|t[0,2]>
193 SMULWB r5, r11,r4 ; r5 = t[1,0]=OC_C4S4*x[1,0]>>16
194 - LDRD r6, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
195 + LDRD r6, r7, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
196 PKHBT r12,r12,r5, LSL #16 ; r12= <t[1,0]|t[0,0]>
197 SMULWT r5, r7, r4 ; r5 = t[1,7]=OC_C1S7*x[1,1]>>16
198 SMULWT r7, r7, r10 ; r7 = t[0,7]=OC_C1S7*x[0,1]>>16
199 @@ -1216,10 +1216,10 @@ idct4_4core_down_v6 PROC
200 ; r1 = const ogg_int16_t *_x (source)
201 ; Stage 1:
202 LDRD r10,[r1], #16 ; r10= <x[0,1]|x[0,0]>; r11= <x[0,3]|x[0,2]>
203 - LDRD r2, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
204 + LDRD r2, r3, OC_C5S3_4_v6 ; r2 = OC_C5S3; r3 = OC_C3S5
205 LDRD r4, [r1], #16 ; r4 = <x[1,1]|x[1,0]>; r5 = <x[1,3]|x[1,2]>
206 SMULWT r9, r3, r11 ; r9 = t[0,6]=OC_C3S5*x[0,3]>>16
207 - LDRD r6, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
208 + LDRD r6, r7, OC_C6S2_4_v6 ; r6 = OC_C6S2; r7 = OC_C2S6
209 SMULWT r8, r2, r11 ; r8 = -t[0,5]=OC_C5S3*x[0,3]>>16
210 ; Here we cheat: row 3 had just a DC, so x[0,3]==x[1,3] by definition.
211 PKHBT r9, r9, r9, LSL #16 ; r9 = <t[0,6]|t[0,6]>
212 @@ -1234,7 +1234,7 @@ idct4_4core_down_v6 PROC
213 SMLAWB r12,r11,r10,r7 ; r12= t[0,0]+8=(OC_C4S4*x[0,0]>>16)+8
214 PKHBT r2, r2, r5, LSL #16 ; r2 = <t[1,2]|t[0,2]>
215 SMLAWB r5, r11,r4 ,r7 ; r5 = t[1,0]+8=(OC_C4S4*x[1,0]>>16)+8
216 - LDRD r6, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
217 + LDRD r6, r7, OC_C7S1_4_v6 ; r6 = OC_C7S1; r7 = OC_C1S7
218 PKHBT r12,r12,r5, LSL #16 ; r12= <t[1,0]+8|t[0,0]+8>
219 SMULWT r5, r7, r4 ; r5 = t[1,7]=OC_C1S7*x[1,1]>>16
220 SMULWT r7, r7, r10 ; r7 = t[0,7]=OC_C1S7*x[0,1]>>16
221 @@ -1264,7 +1264,7 @@ idct8_8core_v6 PROC
222 STMFD r13!,{r0,r14}
223 ; Stage 1:
224 ;5-6 rotation by 3pi/16
225 - LDRD r10,OC_C5S3_4_v6 ; r10= OC_C5S3, r11= OC_C3S5
226 + LDRD r10, r11, OC_C5S3_4_v6 ; r10= OC_C5S3, r11= OC_C3S5
227 LDR r4, [r1,#8] ; r4 = <x[0,5]|x[0,4]>
228 LDR r7, [r1,#24] ; r7 = <x[1,5]|x[1,4]>
229 SMULWT r5, r11,r4 ; r5 = OC_C3S5*x[0,5]>>16
230 @@ -1281,7 +1281,7 @@ idct8_8core_v6 PROC
231 PKHBT r6, r6, r11,LSL #16 ; r6 = <t[1,6]|t[0,6]>
232 SMULWT r8, r10,r12 ; r8 = OC_C5S3*x[1,3]>>16
233 ;2-3 rotation by 6pi/16
234 - LDRD r10,OC_C6S2_4_v6 ; r10= OC_C6S2, r11= OC_C2S6
235 + LDRD r10, r11, OC_C6S2_4_v6 ; r10= OC_C6S2, r11= OC_C2S6
236 PKHBT r3, r3, r8, LSL #16 ; r3 = <r8|r3>
237 LDR r8, [r1,#12] ; r8 = <x[0,7]|x[0,6]>
238 SMULWB r2, r10,r0 ; r2 = OC_C6S2*x[0,2]>>16
239 @@ -1297,7 +1297,7 @@ idct8_8core_v6 PROC
240 PKHBT r3, r3, r10,LSL #16 ; r3 = <t[1,6]|t[0,6]>
241 SMULWB r12,r11,r7 ; r12= OC_C2S6*x[1,6]>>16
242 ;4-7 rotation by 7pi/16
243 - LDRD r10,OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
244 + LDRD r10, r11, OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
245 PKHBT r9, r9, r12,LSL #16 ; r9 = <r9|r12>
246 LDR r0, [r1],#16 ; r0 = <x[0,1]|x[0,0]>
247 PKHTB r7, r7, r8, ASR #16 ; r7 = <x[1,7]|x[0,7]>
248 @@ -1363,7 +1363,7 @@ idct8_8core_down_v6 PROC
249 STMFD r13!,{r0,r14}
250 ; Stage 1:
251 ;5-6 rotation by 3pi/16
252 - LDRD r10,OC_C5S3_8_v6 ; r10= OC_C5S3, r11= OC_C3S5
253 + LDRD r10, r11, OC_C5S3_8_v6 ; r10= OC_C5S3, r11= OC_C3S5
254 LDR r4, [r1,#8] ; r4 = <x[0,5]|x[0,4]>
255 LDR r7, [r1,#24] ; r7 = <x[1,5]|x[1,4]>
256 SMULWT r5, r11,r4 ; r5 = OC_C3S5*x[0,5]>>16
257 @@ -1380,7 +1380,7 @@ idct8_8core_down_v6 PROC
258 PKHBT r6, r6, r11,LSL #16 ; r6 = <t[1,6]|t[0,6]>
259 SMULWT r8, r10,r12 ; r8 = OC_C5S3*x[1,3]>>16
260 ;2-3 rotation by 6pi/16
261 - LDRD r10,OC_C6S2_8_v6 ; r10= OC_C6S2, r11= OC_C2S6
262 + LDRD r10, r11, OC_C6S2_8_v6 ; r10= OC_C6S2, r11= OC_C2S6
263 PKHBT r3, r3, r8, LSL #16 ; r3 = <r8|r3>
264 LDR r8, [r1,#12] ; r8 = <x[0,7]|x[0,6]>
265 SMULWB r2, r10,r0 ; r2 = OC_C6S2*x[0,2]>>16
266 @@ -1396,7 +1396,7 @@ idct8_8core_down_v6 PROC
267 PKHBT r3, r3, r10,LSL #16 ; r3 = <t[1,6]|t[0,6]>
268 SMULWB r12,r11,r7 ; r12= OC_C2S6*x[1,6]>>16
269 ;4-7 rotation by 7pi/16
270 - LDRD r10,OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
271 + LDRD r10, r11, OC_C7S1_8_v6 ; r10= OC_C7S1, r11= OC_C1S7
272 PKHBT r9, r9, r12,LSL #16 ; r9 = <r9|r12>
273 LDR r0, [r1],#16 ; r0 = <x[0,1]|x[0,0]>
274 PKHTB r7, r7, r8, ASR #16 ; r7 = <x[1,7]|x[0,7]>
276 2.39.1