js/src/jit/mips64/Assembler-mips64.h

   1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
   2  * vim: set ts=8 sts=2 et sw=2 tw=80:
   3  * This Source Code Form is subject to the terms of the Mozilla Public
   4  * License, v. 2.0. If a copy of the MPL was not distributed with this
   5  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
   6
   7 #ifndef jit_mips64_Assembler_mips64_h
   8 #define jit_mips64_Assembler_mips64_h
   9
  10 #include <iterator>
  11
  12 #include "jit/mips-shared/Assembler-mips-shared.h"
  13
  14 #include "jit/mips64/Architecture-mips64.h"
  15
  16 namespace js {
  17 namespace jit {
  18
  19 static constexpr Register CallTempReg4 = a4;
  20 static constexpr Register CallTempReg5 = a5;
  21
  22 static constexpr Register CallTempNonArgRegs[] = {t0, t1, t2, t3};
  23 static const uint32_t NumCallTempNonArgRegs = std::size(CallTempNonArgRegs);
  24
  25 class ABIArgGenerator {
  26   unsigned regIndex_;
  27   uint32_t stackOffset_;
  28   ABIArg current_;
  29
  30  public:
  31   ABIArgGenerator();
  32   ABIArg next(MIRType argType);
  33   ABIArg& current() { return current_; }
  34
  35   uint32_t stackBytesConsumedSoFar() const { return stackOffset_; }
  36   void increaseStackOffset(uint32_t bytes) { stackOffset_ += bytes; }
  37 };
  38
  39 // These registers may be volatile or nonvolatile.
  40 static constexpr Register ABINonArgReg0 = t0;
  41 static constexpr Register ABINonArgReg1 = t1;
  42 static constexpr Register ABINonArgReg2 = t2;
  43 static constexpr Register ABINonArgReg3 = t3;
  44
  45 // This register may be volatile or nonvolatile. Avoid f23 which is the
  46 // ScratchDoubleReg.
  47 static constexpr FloatRegister ABINonArgDoubleReg{FloatRegisters::f21,
  48                                                   FloatRegisters::Double};
  49
  50 // These registers may be volatile or nonvolatile.
  51 // Note: these three registers are all guaranteed to be different
  52 static constexpr Register ABINonArgReturnReg0 = t0;
  53 static constexpr Register ABINonArgReturnReg1 = t1;
  54 static constexpr Register ABINonVolatileReg = s0;
  55
  56 // This register is guaranteed to be clobberable during the prologue and
  57 // epilogue of an ABI call which must preserve both ABI argument, return
  58 // and non-volatile registers.
  59 static constexpr Register ABINonArgReturnVolatileReg = t0;
  60
  61 // TLS pointer argument register for WebAssembly functions. This must not alias
  62 // any other register used for passing function arguments or return values.
  63 // Preserved by WebAssembly functions.
  64 static constexpr Register InstanceReg = s5;
  65
  66 // Registers used for wasm table calls. These registers must be disjoint
  67 // from the ABI argument registers, InstanceReg and each other.
  68 static constexpr Register WasmTableCallScratchReg0 = ABINonArgReg0;
  69 static constexpr Register WasmTableCallScratchReg1 = ABINonArgReg1;
  70 static constexpr Register WasmTableCallSigReg = ABINonArgReg2;
  71 static constexpr Register WasmTableCallIndexReg = ABINonArgReg3;
  72
  73 // Registers used for ref calls.
  74 static constexpr Register WasmCallRefCallScratchReg0 = ABINonArgReg0;
  75 static constexpr Register WasmCallRefCallScratchReg1 = ABINonArgReg1;
  76 static constexpr Register WasmCallRefReg = ABINonArgReg3;
  77
  78 // Registers used for wasm tail calls operations.
  79 static constexpr Register WasmTailCallInstanceScratchReg = ABINonArgReg1;
  80 static constexpr Register WasmTailCallRAScratchReg = ra;
  81 static constexpr Register WasmTailCallFPScratchReg = ABINonArgReg3;
  82
  83 // Register used as a scratch along the return path in the fast js -> wasm stub
  84 // code. This must not overlap ReturnReg, JSReturnOperand, or InstanceReg.
  85 // It must be a volatile register.
  86 static constexpr Register WasmJitEntryReturnScratch = t1;
  87
  88 static constexpr Register InterpreterPCReg = t5;
  89
  90 static constexpr Register JSReturnReg = v1;
  91 static constexpr Register JSReturnReg_Type = JSReturnReg;
  92 static constexpr Register JSReturnReg_Data = JSReturnReg;
  93 static constexpr Register64 ReturnReg64(ReturnReg);
  94 static constexpr FloatRegister ReturnFloat32Reg = {FloatRegisters::f0,
  95                                                    FloatRegisters::Single};
  96 static constexpr FloatRegister ReturnDoubleReg = {FloatRegisters::f0,
  97                                                   FloatRegisters::Double};
  98 static constexpr FloatRegister ScratchFloat32Reg = {FloatRegisters::f23,
  99                                                     FloatRegisters::Single};
 100 static constexpr FloatRegister ScratchDoubleReg = {FloatRegisters::f23,
 101                                                    FloatRegisters::Double};
 102
 103 struct ScratchFloat32Scope : public AutoFloatRegisterScope {
 104   explicit ScratchFloat32Scope(MacroAssembler& masm)
 105       : AutoFloatRegisterScope(masm, ScratchFloat32Reg) {}
 106 };
 107
 108 struct ScratchDoubleScope : public AutoFloatRegisterScope {
 109   explicit ScratchDoubleScope(MacroAssembler& masm)
 110       : AutoFloatRegisterScope(masm, ScratchDoubleReg) {}
 111 };
 112
 113 static constexpr FloatRegister f0 = {FloatRegisters::f0,
 114                                      FloatRegisters::Double};
 115 static constexpr FloatRegister f1 = {FloatRegisters::f1,
 116                                      FloatRegisters::Double};
 117 static constexpr FloatRegister f2 = {FloatRegisters::f2,
 118                                      FloatRegisters::Double};
 119 static constexpr FloatRegister f3 = {FloatRegisters::f3,
 120                                      FloatRegisters::Double};
 121 static constexpr FloatRegister f4 = {FloatRegisters::f4,
 122                                      FloatRegisters::Double};
 123 static constexpr FloatRegister f5 = {FloatRegisters::f5,
 124                                      FloatRegisters::Double};
 125 static constexpr FloatRegister f6 = {FloatRegisters::f6,
 126                                      FloatRegisters::Double};
 127 static constexpr FloatRegister f7 = {FloatRegisters::f7,
 128                                      FloatRegisters::Double};
 129 static constexpr FloatRegister f8 = {FloatRegisters::f8,
 130                                      FloatRegisters::Double};
 131 static constexpr FloatRegister f9 = {FloatRegisters::f9,
 132                                      FloatRegisters::Double};
 133 static constexpr FloatRegister f10 = {FloatRegisters::f10,
 134                                       FloatRegisters::Double};
 135 static constexpr FloatRegister f11 = {FloatRegisters::f11,
 136                                       FloatRegisters::Double};
 137 static constexpr FloatRegister f12 = {FloatRegisters::f12,
 138                                       FloatRegisters::Double};
 139 static constexpr FloatRegister f13 = {FloatRegisters::f13,
 140                                       FloatRegisters::Double};
 141 static constexpr FloatRegister f14 = {FloatRegisters::f14,
 142                                       FloatRegisters::Double};
 143 static constexpr FloatRegister f15 = {FloatRegisters::f15,
 144                                       FloatRegisters::Double};
 145 static constexpr FloatRegister f16 = {FloatRegisters::f16,
 146                                       FloatRegisters::Double};
 147 static constexpr FloatRegister f17 = {FloatRegisters::f17,
 148                                       FloatRegisters::Double};
 149 static constexpr FloatRegister f18 = {FloatRegisters::f18,
 150                                       FloatRegisters::Double};
 151 static constexpr FloatRegister f19 = {FloatRegisters::f19,
 152                                       FloatRegisters::Double};
 153 static constexpr FloatRegister f20 = {FloatRegisters::f20,
 154                                       FloatRegisters::Double};
 155 static constexpr FloatRegister f21 = {FloatRegisters::f21,
 156                                       FloatRegisters::Double};
 157 static constexpr FloatRegister f22 = {FloatRegisters::f22,
 158                                       FloatRegisters::Double};
 159 static constexpr FloatRegister f23 = {FloatRegisters::f23,
 160                                       FloatRegisters::Double};
 161 static constexpr FloatRegister f24 = {FloatRegisters::f24,
 162                                       FloatRegisters::Double};
 163 static constexpr FloatRegister f25 = {FloatRegisters::f25,
 164                                       FloatRegisters::Double};
 165 static constexpr FloatRegister f26 = {FloatRegisters::f26,
 166                                       FloatRegisters::Double};
 167 static constexpr FloatRegister f27 = {FloatRegisters::f27,
 168                                       FloatRegisters::Double};
 169 static constexpr FloatRegister f28 = {FloatRegisters::f28,
 170                                       FloatRegisters::Double};
 171 static constexpr FloatRegister f29 = {FloatRegisters::f29,
 172                                       FloatRegisters::Double};
 173 static constexpr FloatRegister f30 = {FloatRegisters::f30,
 174                                       FloatRegisters::Double};
 175 static constexpr FloatRegister f31 = {FloatRegisters::f31,
 176                                       FloatRegisters::Double};
 177
 178 // MIPS64 CPUs can only load multibyte data that is "naturally"
 179 // eight-byte-aligned, sp register should be sixteen-byte-aligned.
 180 static constexpr uint32_t ABIStackAlignment = 16;
 181 static constexpr uint32_t JitStackAlignment = 16;
 182
 183 static constexpr uint32_t JitStackValueAlignment =
 184     JitStackAlignment / sizeof(Value);
 185 static_assert(JitStackAlignment % sizeof(Value) == 0 &&
 186                   JitStackValueAlignment >= 1,
 187               "Stack alignment should be a non-zero multiple of sizeof(Value)");
 188
 189 // TODO this is just a filler to prevent a build failure. The MIPS SIMD
 190 // alignment requirements still need to be explored.
 191 // TODO Copy the static_asserts from x64/x86 assembler files.
 192 static constexpr uint32_t SimdMemoryAlignment = 16;
 193
 194 static constexpr uint32_t WasmStackAlignment = SimdMemoryAlignment;
 195 static const uint32_t WasmTrapInstructionLength = 4;
 196
 197 // See comments in wasm::GenerateFunctionPrologue.  The difference between these
 198 // is the size of the largest callable prologue on the platform.
 199 static constexpr uint32_t WasmCheckedCallEntryOffset = 0u;
 200
 201 static constexpr Scale ScalePointer = TimesEight;
 202
 203 class Assembler : public AssemblerMIPSShared {
 204  public:
 205   Assembler() : AssemblerMIPSShared() {}
 206
 207   static uintptr_t GetPointer(uint8_t*);
 208
 209   using AssemblerMIPSShared::bind;
 210
 211   static void Bind(uint8_t* rawCode, const CodeLabel& label);
 212
 213   void processCodeLabels(uint8_t* rawCode);
 214
 215   static void TraceJumpRelocations(JSTracer* trc, JitCode* code,
 216                                    CompactBufferReader& reader);
 217   static void TraceDataRelocations(JSTracer* trc, JitCode* code,
 218                                    CompactBufferReader& reader);
 219
 220   void bind(InstImm* inst, uintptr_t branch, uintptr_t target);
 221
 222   // Copy the assembly code to the given buffer, and perform any pending
 223   // relocations relying on the target address.
 224   void executableCopy(uint8_t* buffer);
 225
 226   static uint32_t PatchWrite_NearCallSize();
 227
 228   static uint64_t ExtractLoad64Value(Instruction* inst0);
 229   static void UpdateLoad64Value(Instruction* inst0, uint64_t value);
 230   static void WriteLoad64Instructions(Instruction* inst0, Register reg,
 231                                       uint64_t value);
 232
 233   static void PatchWrite_NearCall(CodeLocationLabel start,
 234                                   CodeLocationLabel toCall);
 235   static void PatchDataWithValueCheck(CodeLocationLabel label, ImmPtr newValue,
 236                                       ImmPtr expectedValue);
 237   static void PatchDataWithValueCheck(CodeLocationLabel label,
 238                                       PatchedImmPtr newValue,
 239                                       PatchedImmPtr expectedValue);
 240
 241   static uint64_t ExtractInstructionImmediate(uint8_t* code);
 242
 243   static void ToggleCall(CodeLocationLabel inst_, bool enabled);
 244 };  // Assembler
 245
 246 static const uint32_t NumIntArgRegs = 8;
 247 static const uint32_t NumFloatArgRegs = NumIntArgRegs;
 248
 249 static inline bool GetIntArgReg(uint32_t usedArgSlots, Register* out) {
 250   if (usedArgSlots < NumIntArgRegs) {
 251     *out = Register::FromCode(a0.code() + usedArgSlots);
 252     return true;
 253   }
 254   return false;
 255 }
 256
 257 static inline bool GetFloatArgReg(uint32_t usedArgSlots, FloatRegister* out) {
 258   if (usedArgSlots < NumFloatArgRegs) {
 259     *out = FloatRegister::FromCode(f12.code() + usedArgSlots);
 260     return true;
 261   }
 262   return false;
 263 }
 264
 265 // Get a register in which we plan to put a quantity that will be used as an
 266 // integer argument. This differs from GetIntArgReg in that if we have no more
 267 // actual argument registers to use we will fall back on using whatever
 268 // CallTempReg* don't overlap the argument registers, and only fail once those
 269 // run out too.
 270 static inline bool GetTempRegForIntArg(uint32_t usedIntArgs,
 271                                        uint32_t usedFloatArgs, Register* out) {
 272   // NOTE: We can't properly determine which regs are used if there are
 273   // float arguments. If this is needed, we will have to guess.
 274   MOZ_ASSERT(usedFloatArgs == 0);
 275
 276   if (GetIntArgReg(usedIntArgs, out)) {
 277     return true;
 278   }
 279   // Unfortunately, we have to assume things about the point at which
 280   // GetIntArgReg returns false, because we need to know how many registers it
 281   // can allocate.
 282   usedIntArgs -= NumIntArgRegs;
 283   if (usedIntArgs >= NumCallTempNonArgRegs) {
 284     return false;
 285   }
 286   *out = CallTempNonArgRegs[usedIntArgs];
 287   return true;
 288 }
 289
 290 }  // namespace jit
 291 }  // namespace js
 292
 293 #endif /* jit_mips64_Assembler_mips64_h */