1 // Scintilla source code edit control
4 ** Written by Phil Reid,
6 ** - The Verilog Lexer by Avi Yegudin
7 ** - The Fortran Lexer by Chuan-jian Shen
8 ** - The C++ lexer by Neil Hodgson
10 // Copyright 1998-2002 by Neil Hodgson <neilh@scintilla.org>
11 // The License.txt file describes the conditions under which this software may be distributed.
21 #include "Scintilla.h"
25 #include "LexAccessor.h"
27 #include "StyleContext.h"
28 #include "CharacterSet.h"
29 #include "LexerModule.h"
32 using namespace Scintilla
;
35 static void ColouriseVHDLDoc(
36 unsigned int startPos
,
39 WordList
*keywordlists
[],
43 /***************************************/
44 static inline bool IsAWordChar(const int ch
) {
45 return (ch
< 0x80) && (isalnum(ch
) || ch
== '.' || ch
== '_' );
48 /***************************************/
49 static inline bool IsAWordStart(const int ch
) {
50 return (ch
< 0x80) && (isalnum(ch
) || ch
== '_');
53 /***************************************/
54 static inline bool IsABlank(unsigned int ch
) {
55 return (ch
== ' ') || (ch
== 0x09) || (ch
== 0x0b) ;
58 /***************************************/
59 static void ColouriseVHDLDoc(
60 unsigned int startPos
,
63 WordList
*keywordlists
[],
66 WordList
&Keywords
= *keywordlists
[0];
67 WordList
&Operators
= *keywordlists
[1];
68 WordList
&Attributes
= *keywordlists
[2];
69 WordList
&Functions
= *keywordlists
[3];
70 WordList
&Packages
= *keywordlists
[4];
71 WordList
&Types
= *keywordlists
[5];
72 WordList
&User
= *keywordlists
[6];
74 StyleContext
sc(startPos
, length
, initStyle
, styler
);
76 for (; sc
.More(); sc
.Forward())
79 // Determine if the current state should terminate.
80 if (sc
.state
== SCE_VHDL_OPERATOR
) {
81 sc
.SetState(SCE_VHDL_DEFAULT
);
82 } else if (sc
.state
== SCE_VHDL_NUMBER
) {
83 if (!IsAWordChar(sc
.ch
) && (sc
.ch
!= '#')) {
84 sc
.SetState(SCE_VHDL_DEFAULT
);
86 } else if (sc
.state
== SCE_VHDL_IDENTIFIER
) {
87 if (!IsAWordChar(sc
.ch
) || (sc
.ch
== '.')) {
89 sc
.GetCurrentLowered(s
, sizeof(s
));
90 if (Keywords
.InList(s
)) {
91 sc
.ChangeState(SCE_VHDL_KEYWORD
);
92 } else if (Operators
.InList(s
)) {
93 sc
.ChangeState(SCE_VHDL_STDOPERATOR
);
94 } else if (Attributes
.InList(s
)) {
95 sc
.ChangeState(SCE_VHDL_ATTRIBUTE
);
96 } else if (Functions
.InList(s
)) {
97 sc
.ChangeState(SCE_VHDL_STDFUNCTION
);
98 } else if (Packages
.InList(s
)) {
99 sc
.ChangeState(SCE_VHDL_STDPACKAGE
);
100 } else if (Types
.InList(s
)) {
101 sc
.ChangeState(SCE_VHDL_STDTYPE
);
102 } else if (User
.InList(s
)) {
103 sc
.ChangeState(SCE_VHDL_USERWORD
);
105 sc
.SetState(SCE_VHDL_DEFAULT
);
107 } else if (sc
.state
== SCE_VHDL_COMMENT
|| sc
.state
== SCE_VHDL_COMMENTLINEBANG
) {
109 sc
.SetState(SCE_VHDL_DEFAULT
);
111 } else if (sc
.state
== SCE_VHDL_STRING
) {
113 if (sc
.chNext
== '\"' || sc
.chNext
== '\'' || sc
.chNext
== '\\') {
116 } else if (sc
.ch
== '\"') {
117 sc
.ForwardSetState(SCE_VHDL_DEFAULT
);
118 } else if (sc
.atLineEnd
) {
119 sc
.ChangeState(SCE_VHDL_STRINGEOL
);
120 sc
.ForwardSetState(SCE_VHDL_DEFAULT
);
124 // Determine if a new state should be entered.
125 if (sc
.state
== SCE_VHDL_DEFAULT
) {
126 if (IsADigit(sc
.ch
) || (sc
.ch
== '.' && IsADigit(sc
.chNext
))) {
127 sc
.SetState(SCE_VHDL_NUMBER
);
128 } else if (IsAWordStart(sc
.ch
)) {
129 sc
.SetState(SCE_VHDL_IDENTIFIER
);
130 } else if (sc
.Match('-', '-')) {
131 if (sc
.Match("--!")) // Nice to have a different comment style
132 sc
.SetState(SCE_VHDL_COMMENTLINEBANG
);
134 sc
.SetState(SCE_VHDL_COMMENT
);
135 } else if (sc
.ch
== '\"') {
136 sc
.SetState(SCE_VHDL_STRING
);
137 } else if (isoperator(static_cast<char>(sc
.ch
))) {
138 sc
.SetState(SCE_VHDL_OPERATOR
);
144 //=============================================================================
145 static bool IsCommentLine(int line
, Accessor
&styler
) {
146 int pos
= styler
.LineStart(line
);
147 int eol_pos
= styler
.LineStart(line
+ 1) - 1;
148 for (int i
= pos
; i
< eol_pos
; i
++) {
150 char chNext
= styler
[i
+1];
151 if ((ch
== '-') && (chNext
== '-'))
153 else if (ch
!= ' ' && ch
!= '\t')
159 //=============================================================================
161 static void FoldNoBoxVHDLDoc(
162 unsigned int startPos
,
167 // Decided it would be smarter to have the lexer have all keywords included. Therefore I
168 // don't check if the style for the keywords that I use to adjust the levels.
170 "architecture begin case component else elsif end entity generate loop package process record then "
171 "procedure function when";
175 bool foldComment
= styler
.GetPropertyInt("fold.comment", 1) != 0;
176 bool foldCompact
= styler
.GetPropertyInt("fold.compact", 1) != 0;
177 bool foldAtElse
= styler
.GetPropertyInt("fold.at.else", 1) != 0;
178 bool foldAtBegin
= styler
.GetPropertyInt("fold.at.Begin", 1) != 0;
179 bool foldAtParenthese
= styler
.GetPropertyInt("fold.at.Parenthese", 1) != 0;
180 //bool foldAtWhen = styler.GetPropertyInt("fold.at.When", 1) != 0; //< fold at when in case statements
182 int visibleChars
= 0;
183 unsigned int endPos
= startPos
+ length
;
185 int lineCurrent
= styler
.GetLine(startPos
);
186 int levelCurrent
= SC_FOLDLEVELBASE
;
188 levelCurrent
= styler
.LevelAt(lineCurrent
-1) >> 16;
189 //int levelMinCurrent = levelCurrent;
190 int levelMinCurrentElse
= levelCurrent
; //< Used for folding at 'else'
191 int levelMinCurrentBegin
= levelCurrent
; //< Used for folding at 'begin'
192 int levelNext
= levelCurrent
;
194 /***************************************/
196 char prevWord
[32] = "";
198 /***************************************/
200 // The logic for going up or down a level depends on a the previous keyword
201 // This code could be cleaned up.
204 for(j
= startPos
; j
>0; j
--)
206 char ch
= styler
.SafeGetCharAt(j
);
207 char chPrev
= styler
.SafeGetCharAt(j
-1);
208 int style
= styler
.StyleAt(j
);
209 int stylePrev
= styler
.StyleAt(j
-1);
210 if ((stylePrev
!= SCE_VHDL_COMMENT
) && (stylePrev
!= SCE_VHDL_STRING
))
212 if(IsAWordChar(chPrev
) && !IsAWordChar(ch
))
217 if ((style
!= SCE_VHDL_COMMENT
) && (style
!= SCE_VHDL_STRING
))
219 if(!IsAWordChar(chPrev
) && IsAWordStart(ch
) && (end
!= 0))
223 for(k
=0; (k
<31 ) && (k
<end
-j
+1 ); k
++) {
224 s
[k
] = static_cast<char>(tolower(styler
[j
+k
]));
228 if(keywords
.InList(s
)) {
235 for(j
=j
+static_cast<unsigned int>(strlen(prevWord
)); j
<endPos
; j
++)
237 char ch
= styler
.SafeGetCharAt(j
);
238 int style
= styler
.StyleAt(j
);
239 if ((style
!= SCE_VHDL_COMMENT
) && (style
!= SCE_VHDL_STRING
))
241 if((ch
== ';') && (strcmp(prevWord
, "end") == 0))
243 strcpy(prevWord
, ";");
248 char chNext
= styler
[startPos
];
251 int styleNext
= styler
.StyleAt(startPos
);
252 //Platform::DebugPrintf("Line[%04d] Prev[%20s] ************************* Level[%x]\n", lineCurrent+1, prevWord, levelCurrent);
254 /***************************************/
255 for (unsigned int i
= startPos
; i
< endPos
; i
++)
258 chNext
= styler
.SafeGetCharAt(i
+ 1);
259 chPrev
= styler
.SafeGetCharAt(i
- 1);
260 chNextNonBlank
= chNext
;
261 unsigned int j
= i
+1;
262 while(IsABlank(chNextNonBlank
) && j
<endPos
)
265 chNextNonBlank
= styler
.SafeGetCharAt(j
);
267 int style
= styleNext
;
268 styleNext
= styler
.StyleAt(i
+ 1);
269 bool atEOL
= (ch
== '\r' && chNext
!= '\n') || (ch
== '\n');
271 if (foldComment
&& atEOL
&& IsCommentLine(lineCurrent
, styler
))
273 if(!IsCommentLine(lineCurrent
-1, styler
) && IsCommentLine(lineCurrent
+1, styler
))
277 else if(IsCommentLine(lineCurrent
-1, styler
) && !IsCommentLine(lineCurrent
+1, styler
))
283 if ((style
== SCE_VHDL_OPERATOR
) && foldAtParenthese
)
287 } else if (ch
== ')') {
292 if ((style
!= SCE_VHDL_COMMENT
) && (style
!= SCE_VHDL_STRING
))
294 if((ch
== ';') && (strcmp(prevWord
, "end") == 0))
296 strcpy(prevWord
, ";");
299 if(!IsAWordChar(chPrev
) && IsAWordStart(ch
))
304 if(iswordchar(ch
) && !iswordchar(chNext
)) {
307 for(k
=0; (k
<31 ) && (k
<i
-lastStart
+1 ); k
++) {
308 s
[k
] = static_cast<char>(tolower(styler
[lastStart
+k
]));
312 if(keywords
.InList(s
))
315 strcmp(s
, "architecture") == 0 ||
316 strcmp(s
, "case") == 0 ||
317 strcmp(s
, "component") == 0 ||
318 strcmp(s
, "entity") == 0 ||
319 strcmp(s
, "generate") == 0 ||
320 strcmp(s
, "loop") == 0 ||
321 strcmp(s
, "package") ==0 ||
322 strcmp(s
, "process") == 0 ||
323 strcmp(s
, "record") == 0 ||
324 strcmp(s
, "then") == 0)
326 if (strcmp(prevWord
, "end") != 0)
328 if (levelMinCurrentElse
> levelNext
) {
329 levelMinCurrentElse
= levelNext
;
334 strcmp(s
, "procedure") == 0 ||
335 strcmp(s
, "function") == 0)
337 if (strcmp(prevWord
, "end") != 0) // check for "end procedure" etc.
338 { // This code checks to see if the procedure / function is a definition within a "package"
339 // rather than the actual code in the body.
340 int BracketLevel
= 0;
341 for(int j
=i
+1; j
<styler
.Length(); j
++)
343 int LocalStyle
= styler
.StyleAt(j
);
344 char LocalCh
= styler
.SafeGetCharAt(j
);
345 if(LocalCh
== '(') BracketLevel
++;
346 if(LocalCh
== ')') BracketLevel
--;
348 (BracketLevel
== 0) &&
349 (LocalStyle
!= SCE_VHDL_COMMENT
) &&
350 (LocalStyle
!= SCE_VHDL_STRING
) &&
351 !iswordchar(styler
.SafeGetCharAt(j
-1)) &&
352 styler
.Match(j
, "is") &&
353 !iswordchar(styler
.SafeGetCharAt(j
+2)))
355 if (levelMinCurrentElse
> levelNext
) {
356 levelMinCurrentElse
= levelNext
;
361 if((BracketLevel
== 0) && (LocalCh
== ';'))
368 } else if (strcmp(s
, "end") == 0) {
370 } else if(strcmp(s
, "elsif") == 0) { // elsif is followed by then so folding occurs correctly
372 } else if (strcmp(s
, "else") == 0) {
373 if(strcmp(prevWord
, "when") != 0) // ignore a <= x when y else z;
375 levelMinCurrentElse
= levelNext
- 1; // VHDL else is all on its own so just dec. the min level
378 ((strcmp(s
, "begin") == 0) && (strcmp(prevWord
, "architecture") == 0)) ||
379 ((strcmp(s
, "begin") == 0) && (strcmp(prevWord
, "function") == 0)) ||
380 ((strcmp(s
, "begin") == 0) && (strcmp(prevWord
, "procedure") == 0)))
382 levelMinCurrentBegin
= levelNext
- 1;
384 //Platform::DebugPrintf("Line[%04d] Prev[%20s] Cur[%20s] Level[%x]\n", lineCurrent+1, prevWord, s, levelCurrent);
390 int levelUse
= levelCurrent
;
392 if (foldAtElse
&& (levelMinCurrentElse
< levelUse
)) {
393 levelUse
= levelMinCurrentElse
;
395 if (foldAtBegin
&& (levelMinCurrentBegin
< levelUse
)) {
396 levelUse
= levelMinCurrentBegin
;
398 int lev
= levelUse
| levelNext
<< 16;
399 if (visibleChars
== 0 && foldCompact
)
400 lev
|= SC_FOLDLEVELWHITEFLAG
;
402 if (levelUse
< levelNext
)
403 lev
|= SC_FOLDLEVELHEADERFLAG
;
404 if (lev
!= styler
.LevelAt(lineCurrent
)) {
405 styler
.SetLevel(lineCurrent
, lev
);
407 //Platform::DebugPrintf("Line[%04d] ---------------------------------------------------- Level[%x]\n", lineCurrent+1, levelCurrent);
409 levelCurrent
= levelNext
;
410 //levelMinCurrent = levelCurrent;
411 levelMinCurrentElse
= levelCurrent
;
412 levelMinCurrentBegin
= levelCurrent
;
415 /***************************************/
416 if (!isspacechar(ch
)) visibleChars
++;
419 /***************************************/
420 // Platform::DebugPrintf("Line[%04d] ---------------------------------------------------- Level[%x]\n", lineCurrent+1, levelCurrent);
423 //=============================================================================
424 static void FoldVHDLDoc(unsigned int startPos
, int length
, int initStyle
, WordList
*[],
426 FoldNoBoxVHDLDoc(startPos
, length
, initStyle
, styler
);
429 //=============================================================================
430 static const char * const VHDLWordLists
[] = {
434 "Standard Functions",
442 LexerModule
lmVHDL(SCLEX_VHDL
, ColouriseVHDLDoc
, "vhdl", FoldVHDLDoc
, VHDLWordLists
);
446 // access after alias all architecture array assert attribute begin block body buffer bus case component
447 // configuration constant disconnect downto else elsif end entity exit file for function generate generic
448 // group guarded if impure in inertial inout is label library linkage literal loop map new next null of
449 // on open others out package port postponed procedure process pure range record register reject report
450 // return select severity shared signal subtype then to transport type unaffected units until use variable
451 // wait when while with
454 // abs and mod nand nor not or rem rol ror sla sll sra srl xnor xor
457 // left right low high ascending image value pos val succ pred leftof rightof base range reverse_range
458 // length delayed stable quiet transaction event active last_event last_active last_value driving
459 // driving_value simple_name path_name instance_name
462 // now readline read writeline write endfile resolved to_bit to_bitvector to_stdulogic to_stdlogicvector
463 // to_stdulogicvector to_x01 to_x01z to_UX01 rising_edge falling_edge is_x shift_left shift_right rotate_left
464 // rotate_right resize to_integer to_unsigned to_signed std_match to_01
467 // std ieee work standard textio std_logic_1164 std_logic_arith std_logic_misc std_logic_signed
468 // std_logic_textio std_logic_unsigned numeric_bit numeric_std math_complex math_real vital_primitives
472 // boolean bit character severity_level integer real time delay_length natural positive string bit_vector
473 // file_open_kind file_open_status line text side width std_ulogic std_ulogic_vector std_logic
474 // std_logic_vector X01 X01Z UX01 UX01Z unsigned signed