| blob | 1a64e5606c8d812ebe61143f14eb36bbfabfaab8 |
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
22 #include <limits.h>
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
40 ((HTAB)->use_rel \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
47 ((HTAB)->use_rel \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
54 ((HTAB)->use_rel \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
58 #define elf_info_to_howto 0
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
71 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
72 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
73 in that slot. */
76 {
77 /* No relocation. */
106 /* 32 bit absolute */
121 /* standard 32bit pc-relative reloc */
136 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
151 /* 16 bit absolute */
166 /* 12 bit absolute */
195 /* 8 bit absolute */
294 /* BLX instruction for the ARM. */
309 /* BLX instruction for the Thumb. */
324 /* Dynamic TLS relocations. */
368 /* Relocs used in ARM Linux */
832 /* These are declared as 13-bit signed relocations because we can
833 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
834 versa. */
891 /* Group relocations. */
1271 /* End of group relocations. */
1434 /* GNU extension to record C++ vtable member usage */
1449 /* GNU extension to record C++ vtable hierarchy */
1492 /* TLS relocations */
1604 };
1606 /* 112-127 private relocations
1607 128 R_ARM_ME_TOO, obsolete
1608 129-255 unallocated in AAELF.
1610 249-255 extended, currently unused, relocations: */
1613 {
1669 };
1673 {
1682 }
1684 static void
1687 {
1692 }
1694 struct elf32_arm_reloc_map
1695 {
1696 bfd_reloc_code_real_type bfd_reloc_val;
1698 };
1700 /* All entries in this list must also be present in elf32_arm_howto_table. */
1702 {
1781 };
1785 bfd_reloc_code_real_type code)
1786 {
1794 }
1799 {
1813 }
1815 /* Support for core dump NOTE sections. */
1817 static bfd_boolean
1819 {
1824 {
1829 /* pr_cursig */
1832 /* pr_pid */
1835 /* pr_reg */
1840 }
1842 /* Make a ".reg/999" section. */
1845 }
1847 static bfd_boolean
1849 {
1851 {
1860 }
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
1865 {
1871 }
1874 }
1876 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1878 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1881 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1882 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1887 /* In lieu of proper flags, assume all EABIv4 or later objects are
1888 interworkable. */
1889 #define INTERWORK_FLAG(abfd) \
1890 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
1891 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
1892 || ((abfd)->flags & BFD_LINKER_CREATED))
1894 /* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
1897 name can be changed. The only requirement is the %s be present. */
1912 /* The name of the dynamic interpreter. This is put in the .interp
1913 section. */
1916 #ifdef FOUR_WORD_PLT
1918 /* The first entry in a procedure linkage table looks like
1919 this. It is set up so that any shared library function that is
1920 called before the relocation has been set up calls the dynamic
1921 linker first. */
1923 {
1928 };
1930 /* Subsequent entries in a procedure linkage table look like
1931 this. */
1933 {
1938 };
1940 #else
1942 /* The first entry in a procedure linkage table looks like
1943 this. It is set up so that any shared library function that is
1944 called before the relocation has been set up calls the dynamic
1945 linker first. */
1947 {
1953 };
1955 /* Subsequent entries in a procedure linkage table look like
1956 this. */
1958 {
1962 };
1964 #endif
1966 /* The format of the first entry in the procedure linkage table
1967 for a VxWorks executable. */
1969 {
1974 };
1976 /* The format of subsequent entries in a VxWorks executable. */
1978 {
1985 };
1987 /* The format of entries in a VxWorks shared library. */
1989 {
1996 };
1998 /* An initial stub used if the PLT entry is referenced from Thumb code. */
1999 #define PLT_THUMB_STUB_SIZE 4
2001 {
2004 };
2006 /* The entries in a PLT when using a DLL-based target with multiple
2007 address spaces. */
2009 {
2012 };
2014 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2015 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2016 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2017 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2018 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2019 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2021 enum stub_insn_type
2022 {
2024 THUMB32_TYPE,
2025 ARM_TYPE,
2026 DATA_TYPE
2027 };
2029 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2030 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2031 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2032 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2033 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2036 {
2037 bfd_vma data;
2043 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2044 to reach the stub if necessary. */
2046 {
2049 };
2051 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2052 available. */
2054 {
2058 };
2060 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2062 {
2070 };
2072 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2073 allowed. */
2075 {
2081 };
2083 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2084 available. */
2086 {
2091 };
2093 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2094 one, when the destination is close enough. */
2096 {
2100 };
2102 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2103 blx to reach the stub if necessary. */
2105 {
2109 };
2111 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2112 blx to reach the stub if necessary. We can not add into pc;
2113 it is not guaranteed to mode switch (different in ARMv6 and
2114 ARMv7). */
2116 {
2121 };
2123 /* V4T ARM -> ARM long branch stub, PIC. */
2125 {
2130 };
2132 /* V4T Thumb -> ARM long branch stub, PIC. */
2134 {
2140 };
2142 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2143 architectures. */
2145 {
2153 };
2155 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2156 allowed. */
2158 {
2165 };
2167 /* Section name for stubs is the associated section name plus this
2168 string. */
2171 /* One entry per long/short branch stub defined above. */
2172 #define DEF_STUBS \
2173 DEF_STUB(long_branch_any_any) \
2174 DEF_STUB(long_branch_v4t_arm_thumb) \
2175 DEF_STUB(long_branch_thumb_only) \
2176 DEF_STUB(long_branch_v4t_thumb_thumb) \
2177 DEF_STUB(long_branch_v4t_thumb_arm) \
2178 DEF_STUB(short_branch_v4t_thumb_arm) \
2179 DEF_STUB(long_branch_any_arm_pic) \
2180 DEF_STUB(long_branch_any_thumb_pic) \
2181 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2182 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2183 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2184 DEF_STUB(long_branch_thumb_only_pic)
2186 #define DEF_STUB(x) arm_stub_##x,
2188 arm_stub_none,
2189 DEF_STUBS
2190 };
2191 #undef DEF_STUB
2194 {
2199 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2202 DEF_STUBS
2203 };
2205 struct elf32_arm_stub_hash_entry
2206 {
2207 /* Base hash table entry structure. */
2210 /* The stub section. */
2213 /* Offset within stub_sec of the beginning of this stub. */
2214 bfd_vma stub_offset;
2216 /* Given the symbol's value and its section we can determine its final
2217 value when building the stubs (so the stub knows where to jump). */
2218 bfd_vma target_value;
2221 /* The stub type. */
2223 /* Its encoding size in bytes. */
2225 /* Its template. */
2227 /* The size of the template (number of entries). */
2230 /* The symbol table entry, if any, that this was derived from. */
2233 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2236 /* Where this stub is being called from, or, in the case of combined
2237 stub sections, the first input section in the group. */
2240 /* The name for the local symbol at the start of this stub. The
2241 stub name in the hash table has to be unique; this does not, so
2242 it can be friendlier. */
2244 };
2246 /* Used to build a map of a section. This is required for mixed-endian
2247 code/data. */
2250 {
2251 bfd_vma vma;
2253 }
2254 elf32_arm_section_map;
2256 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2259 {
2260 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2261 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2262 VFP11_ERRATUM_ARM_VENEER,
2263 VFP11_ERRATUM_THUMB_VENEER
2264 }
2265 elf32_vfp11_erratum_type;
2268 {
2270 bfd_vma vma;
2271 union
2272 {
2273 struct
2274 {
2278 struct
2279 {
2284 elf32_vfp11_erratum_type type;
2285 }
2286 elf32_vfp11_erratum_list;
2289 {
2290 DELETE_EXIDX_ENTRY,
2291 INSERT_EXIDX_CANTUNWIND_AT_END
2292 }
2293 arm_unwind_edit_type;
2295 /* A (sorted) list of edits to apply to an unwind table. */
2297 {
2298 arm_unwind_edit_type type;
2299 /* Note: we sometimes want to insert an unwind entry corresponding to a
2300 section different from the one we're currently writing out, so record the
2301 (text) section this edit relates to here. */
2305 }
2306 arm_unwind_table_edit;
2309 {
2310 /* Information about mapping symbols. */
2315 /* Information about CPU errata. */
2318 /* Information about unwind tables. */
2319 union
2320 {
2321 /* Unwind info attached to a text section. */
2322 struct
2323 {
2327 /* Unwind info attached to an .ARM.exidx section. */
2328 struct
2329 {
2334 }
2335 _arm_elf_section_data;
2337 #define elf32_arm_section_data(sec) \
2338 ((_arm_elf_section_data *) elf_section_data (sec))
2340 /* The size of the thread control block. */
2341 #define TCB_SIZE 8
2343 struct elf_arm_obj_tdata
2344 {
2347 /* tls_type for each local got entry. */
2350 /* Zero to warn when linking objects with incompatible enum sizes. */
2353 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2355 };
2357 #define elf_arm_tdata(bfd) \
2358 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2360 #define elf32_arm_local_got_tls_type(bfd) \
2361 (elf_arm_tdata (bfd)->local_got_tls_type)
2363 #define is_arm_elf(bfd) \
2364 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2365 && elf_tdata (bfd) != NULL \
2366 && elf_object_id (bfd) == ARM_ELF_TDATA)
2368 static bfd_boolean
2370 {
2372 ARM_ELF_TDATA);
2373 }
2375 /* The ARM linker needs to keep track of the number of relocs that it
2376 decides to copy in check_relocs for each symbol. This is so that
2377 it can discard PC relative relocs if it doesn't need them when
2378 linking with -Bsymbolic. We store the information in a field
2379 extending the regular ELF linker hash table. */
2381 /* This structure keeps track of the number of relocs we have copied
2382 for a given symbol. */
2383 struct elf32_arm_relocs_copied
2384 {
2385 /* Next section. */
2387 /* A section in dynobj. */
2389 /* Number of relocs copied in this section. */
2390 bfd_size_type count;
2391 /* Number of PC-relative relocs copied in this section. */
2392 bfd_size_type pc_count;
2393 };
2395 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2397 /* Arm ELF linker hash entry. */
2398 struct elf32_arm_link_hash_entry
2399 {
2402 /* Number of PC relative relocs copied for this symbol. */
2405 /* We reference count Thumb references to a PLT entry separately,
2406 so that we can emit the Thumb trampoline only if needed. */
2407 bfd_signed_vma plt_thumb_refcount;
2409 /* Some references from Thumb code may be eliminated by BL->BLX
2410 conversion, so record them separately. */
2411 bfd_signed_vma plt_maybe_thumb_refcount;
2413 /* Since PLT entries have variable size if the Thumb prologue is
2414 used, we need to record the index into .got.plt instead of
2415 recomputing it from the PLT offset. */
2416 bfd_signed_vma plt_got_offset;
2418 #define GOT_UNKNOWN 0
2419 #define GOT_NORMAL 1
2420 #define GOT_TLS_GD 2
2421 #define GOT_TLS_IE 4
2424 /* The symbol marking the real symbol location for exported thumb
2425 symbols with Arm stubs. */
2428 /* A pointer to the most recently used stub hash entry against this
2429 symbol. */
2431 };
2433 /* Traverse an arm ELF linker hash table. */
2434 #define elf32_arm_link_hash_traverse(table, func, info) \
2435 (elf_link_hash_traverse \
2436 (&(table)->root, \
2437 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2438 (info)))
2440 /* Get the ARM elf linker hash table from a link_info structure. */
2441 #define elf32_arm_hash_table(info) \
2442 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2444 #define arm_stub_hash_lookup(table, string, create, copy) \
2445 ((struct elf32_arm_stub_hash_entry *) \
2446 bfd_hash_lookup ((table), (string), (create), (copy)))
2448 /* ARM ELF linker hash table. */
2449 struct elf32_arm_link_hash_table
2450 {
2451 /* The main hash table. */
2454 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2455 bfd_size_type thumb_glue_size;
2457 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2458 bfd_size_type arm_glue_size;
2460 /* The size in bytes of section containing the ARMv4 BX veneers. */
2461 bfd_size_type bx_glue_size;
2463 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2464 veneer has been populated. */
2467 /* The size in bytes of the section containing glue for VFP11 erratum
2468 veneers. */
2469 bfd_size_type vfp11_erratum_glue_size;
2471 /* An arbitrary input BFD chosen to hold the glue sections. */
2474 /* Nonzero to output a BE8 image. */
2477 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2478 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2481 /* The relocation to use for R_ARM_TARGET2 relocations. */
2484 /* 0 = Ignore R_ARM_V4BX.
2485 1 = Convert BX to MOV PC.
2486 2 = Generate v4 interworing stubs. */
2489 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2492 /* What sort of code sequences we should look for which may trigger the
2493 VFP11 denorm erratum. */
2494 bfd_arm_vfp11_fix vfp11_fix;
2496 /* Global counter for the number of fixes we have emitted. */
2499 /* Nonzero to force PIC branch veneers. */
2502 /* The number of bytes in the initial entry in the PLT. */
2503 bfd_size_type plt_header_size;
2505 /* The number of bytes in the subsequent PLT etries. */
2506 bfd_size_type plt_entry_size;
2508 /* True if the target system is VxWorks. */
2511 /* True if the target system is Symbian OS. */
2514 /* True if the target uses REL relocations. */
2517 /* Short-cuts to get to dynamic linker sections. */
2526 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2529 /* Data for R_ARM_TLS_LDM32 relocations. */
2530 union
2531 {
2532 bfd_signed_vma refcount;
2533 bfd_vma offset;
2536 /* Small local sym to section mapping cache. */
2539 /* For convenience in allocate_dynrelocs. */
2542 /* The stub hash table. */
2545 /* Linker stub bfd. */
2548 /* Linker call-backs. */
2552 /* Array to keep track of which stub sections have been created, and
2553 information on stub grouping. */
2554 struct map_stub
2555 {
2556 /* This is the section to which stubs in the group will be
2557 attached. */
2559 /* The stub section. */
2563 /* Assorted information used by elf32_arm_size_stubs. */
2567 };
2569 /* Create an entry in an ARM ELF linker hash table. */
2575 {
2579 /* Allocate the structure if it has not already been allocated by a
2580 subclass. */
2586 /* Call the allocation method of the superclass. */
2591 {
2600 }
2603 }
2605 /* Initialize an entry in the stub hash table. */
2611 {
2612 /* Allocate the structure if it has not already been allocated by a
2613 subclass. */
2615 {
2620 }
2622 /* Call the allocation method of the superclass. */
2625 {
2628 /* Initialize the local fields. */
2640 }
2643 }
2645 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
2646 shortcuts to them in our hash table. */
2648 static bfd_boolean
2650 {
2654 /* BPABI objects never have a GOT, or associated sections. */
2669 | SEC_HAS_CONTENTS
2670 | SEC_IN_MEMORY
2671 | SEC_LINKER_CREATED
2677 }
2679 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2680 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
2681 hash table. */
2683 static bfd_boolean
2685 {
2704 {
2709 {
2711 htab->plt_entry_size
2713 }
2714 else
2715 {
2716 htab->plt_header_size
2718 htab->plt_entry_size
2720 }
2721 }
2730 }
2732 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2734 static void
2738 {
2745 {
2747 {
2751 /* Add reloc counts against the indirect sym to the direct sym
2752 list. Merge any entries against the same section. */
2754 {
2759 {
2764 }
2767 }
2769 }
2773 }
2776 {
2777 /* Copy over PLT info. */
2784 {
2787 }
2788 }
2791 }
2793 /* Create an ARM elf linker hash table. */
2797 {
2806 elf32_arm_link_hash_newfunc,
2808 {
2811 }
2832 #ifdef FOUR_WORD_PLT
2835 #else
2838 #endif
2857 {
2860 }
2863 }
2865 /* Free the derived linker hash table. */
2867 static void
2869 {
2875 }
2877 /* Determine if we're dealing with a Thumb only architecture. */
2879 static bfd_boolean
2881 {
2883 Tag_CPU_arch);
2890 Tag_CPU_arch_profile);
2893 }
2895 /* Determine if we're dealing with a Thumb-2 object. */
2897 static bfd_boolean
2899 {
2901 Tag_CPU_arch);
2903 }
2905 static bfd_boolean
2907 {
2909 {
2922 }
2923 }
2925 /* Determine the type of stub needed, if any, for a call. */
2927 static enum elf32_arm_stub_type
2933 bfd_vma destination,
2937 {
2938 bfd_vma location;
2939 bfd_signed_vma branch_offset;
2947 /* We don't know the actual type of destination in case it is of
2948 type STT_SECTION: give up. */
2958 /* Determine where the call point is. */
2967 /* Keep a simpler condition, for the sake of clarity. */
2969 {
2971 /* Note when dealing with PLT entries: the main PLT stub is in
2972 ARM mode, so if the branch is in Thumb mode, another
2973 Thumb->ARM stub will be inserted later just before the ARM
2974 PLT stub. We don't take this extra distance into account
2975 here, because if a long branch stub is needed, we'll add a
2976 Thumb->Arm one and branch directly to the ARM PLT entry
2977 because it avoids spreading offset corrections in several
2978 places. */
2979 }
2982 {
2983 /* Handle cases where:
2984 - this call goes too far (different Thumb/Thumb2 max
2985 distance)
2986 - it's a Thumb->Arm call and blx is not available, or it's a
2987 Thumb->Arm branch (not bl). A stub is needed in this case,
2988 but only if this call is not through a PLT entry. Indeed,
2989 PLT stubs handle mode switching already.
2990 */
2994 || (thumb2
3001 {
3003 {
3004 /* Thumb to thumb. */
3006 {
3008 /* PIC stubs. */
3011 /* V5T and above. Stub starts with ARM code, so
3012 we must be able to switch mode before
3013 reaching it, which is only possible for 'bl'
3014 (ie R_ARM_THM_CALL relocation). */
3015 ? arm_stub_long_branch_any_thumb_pic
3016 /* On V4T, use Thumb code only. */
3019 /* non-PIC stubs. */
3022 /* V5T and above. */
3023 ? arm_stub_long_branch_any_any
3024 /* V4T. */
3026 }
3027 else
3028 {
3030 /* PIC stub. */
3031 ? arm_stub_long_branch_thumb_only_pic
3032 /* non-PIC stub. */
3034 }
3035 }
3036 else
3037 {
3038 /* Thumb to arm. */
3042 {
3047 }
3050 /* PIC stubs. */
3053 /* V5T and above. */
3054 ? arm_stub_long_branch_any_arm_pic
3055 /* V4T PIC stub. */
3058 /* non-PIC stubs. */
3061 /* V5T and above. */
3062 ? arm_stub_long_branch_any_any
3063 /* V4T. */
3066 /* Handle v4t short branches. */
3071 }
3072 }
3073 }
3075 {
3077 {
3078 /* Arm to thumb. */
3083 {
3088 }
3090 /* We have an extra 2-bytes reach because of
3091 the mode change (bit 24 (H) of BLX encoding). */
3097 {
3099 /* PIC stubs. */
3101 /* V5T and above. */
3102 ? arm_stub_long_branch_any_thumb_pic
3103 /* V4T stub. */
3106 /* non-PIC stubs. */
3108 /* V5T and above. */
3109 ? arm_stub_long_branch_any_any
3110 /* V4T. */
3112 }
3113 }
3114 else
3115 {
3116 /* Arm to arm. */
3119 {
3121 /* PIC stubs. */
3122 ? arm_stub_long_branch_any_arm_pic
3123 /* non-PIC stubs. */
3125 }
3126 }
3127 }
3130 }
3132 /* Build a name for an entry in the stub hash table. */
3139 {
3141 bfd_size_type len;
3144 {
3152 }
3153 else
3154 {
3163 }
3166 }
3168 /* Look up an entry in the stub hash. Stub entries are cached because
3169 creating the stub name takes a bit of time. */
3177 {
3185 /* If this input section is part of a group of sections sharing one
3186 stub section, then use the id of the first section in the group.
3187 Stub names need to include a section id, as there may well be
3188 more than one stub used to reach say, printf, and we need to
3189 distinguish between them. */
3195 {
3197 }
3198 else
3199 {
3212 }
3215 }
3217 /* Add a new stub entry to the stub hash. Not all fields of the new
3218 stub entry are initialised. */
3224 {
3232 {
3235 {
3237 bfd_size_type len;
3252 }
3254 }
3256 /* Enter this entry into the linker stub hash table. */
3260 {
3263 stub_name);
3265 }
3272 }
3274 /* Store an Arm insn into an output section not processed by
3275 elf32_arm_write_section. */
3277 static void
3280 {
3283 else
3285 }
3287 /* Store a 16-bit Thumb insn into an output section not processed by
3288 elf32_arm_write_section. */
3290 static void
3293 {
3296 else
3298 }
3300 static bfd_boolean
3303 {
3309 bfd_vma stub_addr;
3311 bfd_vma sym_value;
3320 /* Massage our args to the form they really have. */
3329 /* Make a note of the offset within the stubs for this entry. */
3335 /* This is the address of the start of the stub. */
3339 /* This is the address of the stub destination. */
3349 {
3351 {
3359 /* Handle cases where the target is encoded within the
3360 instruction. */
3362 {
3365 }
3379 }
3380 }
3384 /* Stub size has already been computed in arm_size_one_stub. Check
3385 consistency. */
3388 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3392 /* Assume there is one and only one entry to relocate in each stub. */
3401 }
3403 /* As above, but don't actually build the stub. Just bump offset so
3404 we know stub section sizes. */
3406 static bfd_boolean
3409 {
3417 /* Massage our args to the form they really have. */
3429 {
3431 {
3447 }
3448 }
3458 }
3460 /* External entry points for sizing and building linker stubs. */
3462 /* Set up various things so that we can make a list of input sections
3463 for each output section included in the link. Returns -1 on error,
3464 0 when no stubs will be needed, and 1 on success. */
3466 int
3469 {
3475 bfd_size_type amt;
3481 /* Count the number of input BFDs and find the top input section id. */
3485 {
3490 {
3493 }
3494 }
3502 /* We can't use output_bfd->section_count here to find the top output
3503 section index as some sections may have been removed, and
3504 _bfd_strip_section_from_output doesn't renumber the indices. */
3508 {
3511 }
3520 /* For sections we aren't interested in, mark their entries with a
3521 value we can check later. */
3523 do
3530 {
3533 }
3536 }
3538 /* The linker repeatedly calls this function for each input section,
3539 in the order that input sections are linked into output sections.
3540 Build lists of input sections to determine groupings between which
3541 we may insert linker stubs. */
3543 void
3546 {
3550 {
3554 {
3555 /* Steal the link_sec pointer for our list. */
3556 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3557 /* This happens to make the list in reverse order,
3558 which we reverse later. */
3561 }
3562 }
3563 }
3565 /* See whether we can group stub sections together. Grouping stub
3566 sections may result in fewer stubs. More importantly, we need to
3567 put all .init* and .fini* stubs at the end of the .init or
3568 .fini output sections respectively, because glibc splits the
3569 _init and _fini functions into multiple parts. Putting a stub in
3570 the middle of a function is not a good idea. */
3572 static void
3574 bfd_size_type stub_group_size,
3575 bfd_boolean stubs_always_after_branch)
3576 {
3579 do
3580 {
3587 /* Reverse the list: we must avoid placing stubs at the
3588 beginning of the section because the beginning of the text
3589 section may be required for an interrupt vector in bare metal
3590 code. */
3591 #define NEXT_SEC PREV_SEC
3594 {
3595 /* Pop from tail. */
3599 /* Push on head. */
3602 }
3605 {
3609 bfd_vma end_of_next;
3613 {
3617 /* End of NEXT is too far from start, so stop. */
3619 /* Add NEXT to the group. */
3621 }
3623 /* OK, the size from the start to the start of CURR is less
3624 than stub_group_size and thus can be handled by one stub
3625 section. (Or the head section is itself larger than
3626 stub_group_size, in which case we may be toast.)
3627 We should really be keeping track of the total size of
3628 stubs added here, as stubs contribute to the final output
3629 section size. */
3630 do
3631 {
3633 /* Set up this stub group. */
3635 }
3638 /* But wait, there's more! Input sections up to stub_group_size
3639 bytes after the stub section can be handled by it too. */
3641 {
3645 {
3648 /* End of NEXT is too far from stubs, so stop. */
3650 /* Add NEXT to the stub group. */
3654 }
3655 }
3657 }
3658 }
3662 #undef PREV_SEC
3663 #undef NEXT_SEC
3664 }
3666 /* Determine and set the size of the stub section for a final link.
3668 The basic idea here is to examine all the relocations looking for
3669 PC-relative calls to a target that is unreachable with a "bl"
3670 instruction. */
3672 bfd_boolean
3676 bfd_signed_vma group_size,
3679 {
3680 bfd_size_type stub_group_size;
3681 bfd_boolean stubs_always_after_branch;
3685 /* Propagate mach to stub bfd, because it may not have been
3686 finalized when we created stub_bfd. */
3690 /* Stash our params away. */
3697 else
3701 {
3702 /* Default values. */
3703 /* Thumb branch range is +-4MB has to be used as the default
3704 maximum size (a given section can contain both ARM and Thumb
3705 code, so the worst case has to be taken into account).
3707 This value is 24K less than that, which allows for 2025
3708 12-byte stubs. If we exceed that, then we will fail to link.
3709 The user will have to relink with an explicit group size
3710 option. */
3712 }
3717 {
3725 {
3730 /* We'll need the symbol table in a second. */
3735 /* Walk over each section attached to the input bfd. */
3739 {
3742 /* If there aren't any relocs, then there's nothing more
3743 to do. */
3749 /* If this section is a link-once section that will be
3750 discarded, then don't create any stubs. */
3755 /* Get the relocs. */
3756 internal_relocs
3762 /* Now examine each relocation. */
3766 {
3771 bfd_vma sym_value;
3772 bfd_vma destination;
3783 {
3785 error_ret_free_internal:
3789 }
3791 /* Only look for stubs on branch instructions. */
3799 /* Now determine the call target, its name, value,
3800 section. */
3807 {
3808 /* It's a local symbol. */
3813 {
3814 local_syms
3817 local_syms
3823 }
3834 sym_name
3838 }
3839 else
3840 {
3841 /* It's an external symbol. */
3855 {
3862 }
3865 {
3866 /* For a shared library, use the PLT stub as
3867 target address to decide whether a long
3868 branch stub is needed.
3869 For absolute code, they cannot be handled. */
3875 {
3879 destination = (sym_value
3882 }
3883 else
3885 }
3886 else
3887 {
3890 }
3893 }
3895 /* Determine what (if any) linker stub is needed. */
3902 /* Support for grouping stub sections. */
3905 /* Get the name of this stub. */
3911 stub_name,
3914 {
3915 /* The proper stub has already been created. */
3918 }
3922 {
3925 }
3935 stub_entry->output_name
3940 {
3943 }
3945 /* For historical reasons, use the existing names for
3946 ARM-to-Thumb and Thumb-to-ARM stubs. */
3951 sym_name);
3956 sym_name);
3957 else
3959 sym_name);
3962 }
3964 /* We're done with the internal relocs, free them. */
3967 }
3968 }
3973 /* OK, we've added some stubs. Find out the new size of the
3974 stub sections. */
3978 {
3979 /* Ignore non-stub sections. */
3984 }
3988 /* Ask the linker to do its stuff. */
3991 }
3995 error_ret_free_local:
3997 }
3999 /* Build all the stubs associated with the current output file. The
4000 stubs are kept in a hash table attached to the main linker hash
4001 table. We also set up the .plt entries for statically linked PIC
4002 functions here. This function is called via arm_elf_finish in the
4003 linker. */
4005 bfd_boolean
4007 {
4017 {
4018 bfd_size_type size;
4020 /* Ignore non-stub sections. */
4024 /* Allocate memory to hold the linker stubs. */
4030 }
4032 /* Build the stubs as directed by the stub hash table. */
4037 }
4039 /* Locate the Thumb encoded calling stub for NAME. */
4045 {
4050 /* We need a pointer to the armelf specific hash table. */
4060 hash = elf_link_hash_lookup
4071 }
4073 /* Locate the ARM encoded calling stub for NAME. */
4079 {
4084 /* We need a pointer to the elfarm specific hash table. */
4094 myh = elf_link_hash_lookup
4105 }
4107 /* ARM->Thumb glue (static images):
4109 .arm
4110 __func_from_arm:
4111 ldr r12, __func_addr
4112 bx r12
4113 __func_addr:
4114 .word func @ behave as if you saw a ARM_32 reloc.
4116 (v5t static images)
4117 .arm
4118 __func_from_arm:
4119 ldr pc, __func_addr
4120 __func_addr:
4121 .word func @ behave as if you saw a ARM_32 reloc.
4123 (relocatable images)
4124 .arm
4125 __func_from_arm:
4126 ldr r12, __func_offset
4127 add r12, r12, pc
4128 bx r12
4129 __func_offset:
4130 .word func - . */
4132 #define ARM2THUMB_STATIC_GLUE_SIZE 12
4137 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4141 #define ARM2THUMB_PIC_GLUE_SIZE 16
4146 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
4148 .thumb .thumb
4149 .align 2 .align 2
4150 __func_from_thumb: __func_from_thumb:
4151 bx pc push {r6, lr}
4152 nop ldr r6, __func_addr
4153 .arm mov lr, pc
4154 b func bx r6
4155 .arm
4156 ;; back_to_thumb
4157 ldmia r13! {r6, lr}
4158 bx lr
4159 __func_addr:
4160 .word func */
4162 #define THUMB2ARM_GLUE_SIZE 8
4167 #define VFP11_ERRATUM_VENEER_SIZE 8
4169 #define ARM_BX_VENEER_SIZE 12
4174 #ifndef ELFARM_NABI_C_INCLUDED
4175 static void
4177 {
4182 {
4183 /* Do not include empty glue sections in the output. */
4185 {
4189 }
4191 }
4202 }
4204 bfd_boolean
4206 {
4214 ARM2THUMB_GLUE_SECTION_NAME);
4218 THUMB2ARM_GLUE_SECTION_NAME);
4222 VFP11_ERRATUM_VENEER_SECTION_NAME);
4226 ARM_BX_GLUE_SECTION_NAME);
4229 }
4231 /* Allocate space and symbols for calling a Thumb function from Arm mode.
4232 returns the symbol identifying the stub. */
4237 {
4244 bfd_vma val;
4245 bfd_size_type size;
4252 s = bfd_get_section_by_name
4257 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
4263 myh = elf_link_hash_lookup
4267 {
4268 /* We've already seen this guy. */
4271 }
4273 /* The only trick here is using hash_table->arm_glue_size as the value.
4274 Even though the section isn't allocated yet, this is where we will be
4275 putting it. The +1 on the value marks that the stub has not been
4276 output yet - not that it is a Thumb function. */
4294 else
4301 }
4303 /* Allocate space for ARMv4 BX veneers. */
4305 static void
4307 {
4313 bfd_vma val;
4315 /* BX PC does not need a veneer. */
4324 /* Check if this veneer has already been allocated. */
4328 s = bfd_get_section_by_name
4333 /* Add symbol for veneer. */
4340 myh = elf_link_hash_lookup
4358 }
4361 /* Add an entry to the code/data map for section SEC. */
4363 static void
4365 {
4370 {
4374 }
4379 {
4383 }
4386 {
4389 }
4390 }
4393 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
4394 veneers are handled for now. */
4396 static bfd_vma
4402 {
4408 bfd_vma val;
4418 s = bfd_get_section_by_name
4433 myh = elf_link_hash_lookup
4448 /* Link veneer back to calling location. */
4461 /* A symbol for the return from the veneer. */
4465 myh = elf_link_hash_lookup
4482 /* Generate a mapping symbol for the veneer section, and explicitly add an
4483 entry for that symbol to the code/data map for the section. */
4485 {
4487 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
4488 ever requires this erratum fix. */
4498 /* The elf32_arm_init_maps function only cares about symbols from input
4499 BFDs. We must make a note of this generated mapping symbol
4500 ourselves so that code byteswapping works properly in
4501 elf32_arm_write_section. */
4503 }
4509 /* The offset of the veneer. */
4511 }
4513 #define ARM_GLUE_SECTION_FLAGS \
4514 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
4515 | SEC_READONLY | SEC_LINKER_CREATED)
4517 /* Create a fake section for use by the ARM backend of the linker. */
4519 static bfd_boolean
4521 {
4526 /* Already made. */
4535 /* Set the gc mark to prevent the section from being removed by garbage
4536 collection, despite the fact that no relocs refer to this section. */
4540 }
4542 /* Add the glue sections to ABFD. This function is called from the
4543 linker scripts in ld/emultempl/{armelf}.em. */
4545 bfd_boolean
4548 {
4549 /* If we are only performing a partial
4550 link do not bother adding the glue. */
4558 }
4560 /* Select a BFD to be used to hold the sections used by the glue code.
4561 This function is called from the linker scripts in ld/emultempl/
4562 {armelf/pe}.em. */
4564 bfd_boolean
4566 {
4569 /* If we are only performing a partial link
4570 do not bother getting a bfd to hold the glue. */
4574 /* Make sure we don't attach the glue sections to a dynamic object. */
4584 /* Save the bfd for later use. */
4588 }
4590 static void
4592 {
4596 }
4598 bfd_boolean
4601 {
4610 /* If we are only performing a partial link do not bother
4611 to construct any glue. */
4615 /* Here we have a bfd that is to be included on the link. We have a
4616 hook to do reloc rummaging, before section sizes are nailed down. */
4624 {
4626 abfd);
4628 }
4630 /* PR 5398: If we have not decided to include any loadable sections in
4631 the output then we will not have a glue owner bfd. This is OK, it
4632 just means that there is nothing else for us to do here. */
4636 /* Rummage around all the relocs and map the glue vectors. */
4643 {
4652 /* Load the relocs. */
4653 internal_relocs
4661 {
4670 /* These are the only relocation types we care about. */
4675 /* Get the section contents if we haven't done so already. */
4677 {
4678 /* Get cached copy if it exists. */
4681 else
4682 {
4683 /* Go get them off disk. */
4686 }
4687 }
4690 {
4696 }
4698 /* If the relocation is not against a symbol it cannot concern us. */
4701 /* We don't care about local symbols. */
4705 /* This is an external symbol. */
4710 /* If the relocation is against a static symbol it must be within
4711 the current section and so cannot be a cross ARM/Thumb relocation. */
4715 /* If the call will go through a PLT entry then we do not need
4716 glue. */
4721 {
4723 /* This one is a call from arm code. We need to look up
4724 the target of the call. If it is a thumb target, we
4725 insert glue. */
4732 }
4733 }
4744 }
4748 error_return:
4757 }
4758 #endif
4761 /* Initialise maps of ARM/Thumb/data for input BFDs. */
4763 void
4765 {
4770 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
4780 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
4781 should contain the number of local symbols, which should come before any
4782 global symbols. Mapping symbols are always local. */
4784 NULL);
4786 /* No internal symbols read? Skip this BFD. */
4791 {
4798 {
4803 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
4805 }
4806 }
4807 }
4810 void
4812 {
4816 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
4818 {
4820 {
4827 /* Give a warning, but do as the user requests anyway. */
4830 }
4831 }
4833 /* For earlier architectures, we might need the workaround, but do not
4834 enable it by default. If users is running with broken hardware, they
4835 must enable the erratum fix explicitly. */
4837 }
4840 enum bfd_arm_vfp11_pipe
4841 {
4842 VFP11_FMAC,
4843 VFP11_LS,
4844 VFP11_DS,
4845 VFP11_BAD
4846 };
4848 /* Return a VFP register number. This is encoded as RX:X for single-precision
4849 registers, or X:RX for double-precision registers, where RX is the group of
4850 four bits in the instruction encoding and X is the single extension bit.
4851 RX and X fields are specified using their lowest (starting) bit. The return
4852 value is:
4854 0...31: single-precision registers s0...s31
4855 32...63: double-precision registers d0...d31.
4857 Although X should be zero for VFP11 (encoding d0...d15 only), we might
4858 encounter VFP3 instructions, so we allow the full range for DP registers. */
4860 static unsigned int
4863 {
4866 else
4868 }
4870 /* Set bits in *WMASK according to a register number REG as encoded by
4871 bfd_arm_vfp11_regno(). Ignore d16-d31. */
4873 static void
4875 {
4880 }
4882 /* Return TRUE if WMASK overwrites anything in REGS. */
4884 static bfd_boolean
4886 {
4890 {
4903 }
4906 }
4908 /* In this function, we're interested in two things: finding input registers
4909 for VFP data-processing instructions, and finding the set of registers which
4910 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
4911 hold the written set, so FLDM etc. are easy to deal with (we're only
4912 interested in 32 SP registers or 16 dp registers, due to the VFP version
4913 implemented by the chip in question). DP registers are marked by setting
4914 both SP registers in the write mask). */
4916 static enum bfd_arm_vfp11_pipe
4919 {
4924 {
4934 {
4956 vfp_binop:
4964 {
4969 {
4983 /* These instructions will not bounce due to underflow. */
4989 /* fsqrt cannot underflow, but it can (perhaps) overwrite
4990 registers to cause the erratum in previous instructions. */
4996 {
5001 /* Only FCVTSD can underflow. */
5008 }
5013 }
5014 }
5019 }
5020 }
5021 /* Two-register transfer. */
5023 {
5027 {
5030 else
5031 {
5034 }
5035 }
5038 }
5040 {
5045 {
5052 {
5060 }
5070 }
5073 }
5074 /* Single-register transfer. Note L==0. */
5076 {
5081 {
5084 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5085 destination register. I don't know if this is exactly right,
5086 but it is the conservative choice. */
5092 }
5095 }
5098 }
5104 /* Look for potentially-troublesome code sequences which might trigger the
5105 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5106 (available from ARM) for details of the erratum. A short version is
5107 described in ld.texinfo. */
5109 bfd_boolean
5111 {
5119 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5120 The states transition as follows:
5122 0 -> 1 (vector) or 0 -> 2 (scalar)
5123 A VFP FMAC-pipeline instruction has been seen. Fill
5124 regs[0]..regs[numregs-1] with its input operands. Remember this
5125 instruction in 'first_fmac'.
5127 1 -> 2
5128 Any instruction, except for a VFP instruction which overwrites
5129 regs[*].
5131 1 -> 3 [ -> 0 ] or
5132 2 -> 3 [ -> 0 ]
5133 A VFP instruction has been seen which overwrites any of regs[*].
5134 We must make a veneer! Reset state to 0 before examining next
5135 instruction.
5137 2 -> 0
5138 If we fail to match anything in state 2, reset to state 0 and reset
5139 the instruction pointer to the instruction after 'first_fmac'.
5141 If the VFP11 vector mode is in use, there must be at least two unrelated
5142 instructions between anti-dependent VFP11 instructions to properly avoid
5143 triggering the erratum, hence the use of the extra state 1. */
5145 /* If we are only performing a partial link do not bother
5146 to construct any glue. */
5150 /* Skip if this bfd does not correspond to an ELF image. */
5154 /* We should have chosen a fix type by the time we get here. */
5160 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5165 {
5169 /* If we don't have executable progbits, we're not interested in this
5170 section. Also skip if section is to be excluded. */
5190 elf32_arm_compare_mapping);
5193 {
5199 /* FIXME: Only ARM mode is supported at present. We may need to
5200 support Thumb-2 mode also at some point. */
5205 {
5220 {
5224 /* I'm assuming the VFP11 erratum can trigger with denorm
5225 operands on either the FMAC or the DS pipeline. This might
5226 lead to slightly overenthusiastic veneer insertion. */
5228 {
5232 }
5236 {
5239 other_regs,
5243 numregs))
5245 else
5247 }
5251 {
5254 other_regs,
5258 numregs))
5260 else
5261 {
5264 }
5265 }
5270 }
5273 {
5274 elf32_vfp11_erratum_list *newerr
5283 {
5290 }
5293 first_fmac);
5301 }
5304 }
5305 }
5311 }
5315 error_return:
5321 }
5323 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
5324 after sections have been laid out, using specially-named symbols. */
5326 void
5329 {
5337 /* Skip if this bfd does not correspond to an ELF image. */
5347 {
5352 {
5354 bfd_vma vma;
5357 {
5360 /* Find veneer symbol. */
5364 myh = elf_link_hash_lookup
5380 /* Find return location. */
5384 myh = elf_link_hash_lookup
5400 }
5401 }
5402 }
5405 }
5408 /* Set target relocation values needed during linking. */
5410 void
5417 bfd_arm_vfp11_fix vfp11_fix,
5420 {
5432 else
5433 {
5435 target2_type);
5436 }
5445 }
5447 /* Replace the target offset of a Thumb bl or b.w instruction. */
5449 static void
5451 {
5452 bfd_vma upper;
5453 bfd_vma lower;
5470 }
5472 /* Thumb code calling an ARM function. */
5474 static int
5482 bfd_vma offset,
5483 bfd_signed_vma addend,
5484 bfd_vma val,
5486 {
5488 bfd_vma my_offset;
5505 THUMB2ARM_GLUE_SECTION_NAME);
5512 {
5516 {
5523 }
5534 ret_offset =
5535 /* Address of destination of the stub. */
5538 /* Offset from the start of the current section
5539 to the start of the stubs. */
5541 /* Offset of the start of this stub from the start of the stubs. */
5542 + my_offset
5543 /* Address of the start of the current section. */
5545 /* The branch instruction is 4 bytes into the stub. */
5547 /* ARM branches work from the pc of the instruction + 8. */
5553 }
5557 /* Now go back and fix up the original BL insn to point to here. */
5558 ret_offset =
5559 /* Address of where the stub is located. */
5561 /* Address of where the BL is located. */
5564 /* Addend in the relocation. */
5565 - addend
5566 /* Biassing for PC-relative addressing. */
5572 }
5574 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
5582 bfd_vma val,
5585 {
5586 bfd_vma my_offset;
5603 {
5607 {
5612 }
5619 {
5620 /* For relocatable objects we can't use absolute addresses,
5621 so construct the address from a relative offset. */
5622 /* TODO: If the offset is small it's probably worth
5623 constructing the address with adds. */
5630 /* Adjust the offset by 4 for the position of the add,
5631 and 8 for the pipeline offset. */
5638 }
5640 {
5644 /* It's a thumb address. Add the low order bit. */
5647 }
5648 else
5649 {
5656 /* It's a thumb address. Add the low order bit. */
5661 }
5662 }
5667 }
5669 /* Arm code calling a Thumb function. */
5671 static int
5679 bfd_vma offset,
5680 bfd_signed_vma addend,
5681 bfd_vma val,
5683 {
5685 bfd_vma my_offset;
5697 ARM2THUMB_GLUE_SECTION_NAME);
5711 /* Somehow these are both 4 too far, so subtract 8. */
5713 + my_offset
5725 }
5727 /* Populate Arm stub for an exported Thumb function. */
5729 static bfd_boolean
5731 {
5738 bfd_vma val;
5742 /* Allocate stubs for exported Thumb functions on v4t. */
5752 ARM2THUMB_GLUE_SECTION_NAME);
5770 }
5772 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
5774 static bfd_vma
5776 {
5778 bfd_vma glue_addr;
5788 ARM_BX_GLUE_SECTION_NAME);
5798 {
5804 }
5807 }
5809 /* Generate Arm stubs for exported Thumb symbols. */
5810 static void
5813 {
5817 /* Ignore this if we are not called by the ELF backend linker. */
5821 /* If blx is available then exported Thumb symbols are OK and there is
5822 nothing to do. */
5827 link_info);
5828 }
5830 /* Some relocations map to different relocations depending on the
5831 target. Return the real relocation. */
5833 static int
5836 {
5838 {
5842 else
5850 }
5851 }
5853 /* Return the base VMA address which should be subtracted from real addresses
5854 when resolving @dtpoff relocation.
5855 This is PT_TLS segment p_vaddr. */
5857 static bfd_vma
5859 {
5860 /* If tls_sec is NULL, we should have signalled an error already. */
5864 }
5866 /* Return the relocation value for @tpoff relocation
5867 if STT_TLS virtual address is ADDRESS. */
5869 static bfd_vma
5871 {
5873 bfd_vma base;
5875 /* If tls_sec is NULL, we should have signalled an error already. */
5880 }
5882 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
5883 VALUE is the relocation value. */
5885 static bfd_reloc_status_type
5887 {
5894 }
5896 /* For a given value of n, calculate the value of G_n as required to
5897 deal with group relocations. We return it in the form of an
5898 encoded constant-and-rotation, together with the final residual. If n is
5899 specified as less than zero, then final_residual is filled with the
5900 input value and no further action is performed. */
5902 static bfd_vma
5904 {
5906 bfd_vma g_n;
5911 {
5914 /* Calculate which part of the value to mask. */
5917 else
5918 {
5921 /* Determine the most significant bit in the residual and
5922 align the resulting value to a 2-bit boundary. */
5927 /* The desired shift is now (msb - 6), or zero, whichever
5928 is the greater. */
5932 }
5934 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
5939 /* Calculate the residual for the next time around. */
5941 }
5946 }
5948 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
5949 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
5951 static int
5953 {
5963 }
5965 /* Perform a relocation as part of a final link. */
5967 static bfd_reloc_status_type
5974 bfd_vma value,
5982 {
5993 bfd_vma addend;
5994 bfd_signed_vma signed_addend;
6001 /* Some relocation types map to different relocations depending on the
6002 target. We pick the right one here. */
6007 /* If the start address has been set, then set the EF_ARM_HASENTRY
6008 flag. Setting this more than once is redundant, but the cost is
6009 not too high, and it keeps the code simple.
6011 The test is done here, rather than somewhere else, because the
6012 start address is only set just before the final link commences.
6014 Note - if the user deliberately sets a start address of 0, the
6015 flag will not be set. */
6021 {
6024 }
6031 {
6035 {
6039 }
6040 else
6042 }
6043 else
6047 {
6049 /* We don't need to find a value for this symbol. It's just a
6050 marker. */
6068 /* Handle relocations which should use the PLT entry. ABS32/REL32
6069 will use the symbol's value, which may point to a PLT entry, but we
6070 don't need to handle that here. If we created a PLT entry, all
6071 branches in this object should go to it, except if the PLT is too
6072 far away, in which case a long branch stub should be inserted. */
6081 {
6082 /* If we've created a .plt section, and assigned a PLT entry to
6083 this function, it should not be known to bind locally. If
6084 it were, we would have cleared the PLT entry. */
6094 }
6096 /* When generating a shared object or relocatable executable, these
6097 relocations are copied into the output file to be resolved at
6098 run time. */
6114 {
6115 Elf_Internal_Rela outrel;
6122 {
6128 }
6152 else
6153 {
6156 /* This symbol is local, or marked to become local. */
6160 {
6163 /* On Symbian OS, the data segment and text segement
6164 can be relocated independently. Therefore, we
6165 must indicate the segment to which this
6166 relocation is relative. The BPABI allows us to
6167 use any symbol in the right segment; we just use
6168 the section symbol as it is convenient. (We
6169 cannot use the symbol given by "h" directly as it
6170 will not appear in the dynamic symbol table.)
6172 Note that the dynamic linker ignores the section
6173 symbol value, so we don't subtract osec->vma
6174 from the emitted reloc addend. */
6177 else
6181 {
6187 else
6190 }
6192 }
6193 else
6194 /* On SVR4-ish systems, the dynamic loader cannot
6195 relocate the text and data segments independently,
6196 so the symbol does not matter. */
6201 else
6203 }
6209 /* If this reloc is against an external symbol, we do not want to
6210 fiddle with the addend. Otherwise, we need to include the symbol
6211 value so that it becomes an addend for the dynamic reloc. */
6218 }
6220 {
6229 {
6230 bfd_vma from;
6231 bfd_signed_vma branch_offset;
6235 {
6236 /* Check for Arm calling Arm function. */
6237 /* FIXME: Should we translate the instruction into a BL
6238 instruction instead ? */
6242 input_bfd,
6244 }
6246 {
6247 /* Check for Arm calling Thumb function. */
6249 {
6254 error_message))
6256 else
6258 }
6259 }
6261 /* Check if a stub has to be inserted because the
6262 destination is too far or we are changing mode. */
6266 {
6267 /* If the call goes through a PLT entry, make sure to
6268 check distance to the right destination address. */
6270 {
6275 }
6288 )
6289 {
6290 /* The target is out of reach, so redirect the
6291 branch to the local stub for this function. */
6300 }
6301 }
6303 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6304 where:
6305 S is the address of the symbol in the relocation.
6306 P is address of the instruction being relocated.
6307 A is the addend (extracted from the instruction) in bytes.
6309 S is held in 'value'.
6310 P is the base address of the section containing the
6311 instruction plus the offset of the reloc into that
6312 section, ie:
6313 (input_section->output_section->vma +
6314 input_section->output_offset +
6315 rel->r_offset).
6316 A is the addend, converted into bytes, ie:
6317 (signed_addend * 4)
6319 Note: None of these operations have knowledge of the pipeline
6320 size of the processor, thus it is up to the assembler to
6321 encode this information into the addend. */
6327 else
6328 /* RELA addends do not have to be adjusted by howto->size. */
6334 /* A branch to an undefined weak symbol is turned into a jump to
6335 the next instruction unless a PLT entry will be created. */
6338 {
6341 }
6342 else
6343 {
6344 /* Perform a signed range check. */
6355 {
6356 /* Set the H bit in the BLX instruction. */
6358 {
6361 else
6363 }
6365 /* Select the correct instruction (BL or BLX). */
6366 /* Only if we are not handling a BL to a stub. In this
6367 case, mode switching is performed by the stub. */
6370 else
6371 {
6374 }
6375 }
6376 }
6377 }
6409 {
6410 /* Check for overflow. */
6413 }
6419 }
6442 /* Support ldr and str instructions for the thumb. */
6444 {
6445 /* Need to refetch addend. */
6447 /* ??? Need to determine shift amount from operand size. */
6449 }
6452 /* ??? Isn't value unsigned? */
6456 /* ??? Value needs to be properly shifted into place first. */
6462 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
6463 {
6464 bfd_vma insn;
6465 bfd_signed_vma relocation;
6471 {
6476 }
6498 }
6501 /* Corresponds to: ldr.w reg, [pc, #offset]. */
6502 {
6503 bfd_vma insn;
6504 bfd_signed_vma relocation;
6510 {
6514 }
6534 }
6539 /* Thumb BL (branch long instruction). */
6540 {
6541 bfd_vma relocation;
6542 bfd_vma reloc_sign;
6546 bfd_signed_vma reloc_signed_max;
6547 bfd_signed_vma reloc_signed_min;
6548 bfd_vma check;
6549 bfd_signed_vma signed_check;
6553 /* A branch to an undefined weak symbol is turned into a jump to
6554 the next instruction unless a PLT entry will be created. */
6557 {
6561 }
6563 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
6564 with Thumb-1) involving the J1 and J2 bits. */
6566 {
6576 /* Sign extend. */
6580 }
6583 {
6584 /* Check for Thumb to Thumb call. */
6585 /* FIXME: Should we translate the instruction into a BL
6586 instruction instead ? */
6590 input_bfd,
6592 }
6593 else
6594 {
6595 /* If it is not a call to Thumb, assume call to Arm.
6596 If it is a call relative to a section name, then it is not a
6597 function call at all, but rather a long jump. Calls through
6598 the PLT do not require stubs. */
6602 {
6604 {
6605 /* Convert BL to BLX. */
6607 }
6610 {
6614 error_message))
6616 else
6618 }
6619 }
6622 {
6623 /* Make sure this is a BL. */
6625 }
6626 }
6628 /* Handle calls via the PLT. */
6630 {
6635 {
6636 /* If the Thumb BLX instruction is available, convert the
6637 BL to a BLX instruction to call the ARM-mode PLT entry. */
6639 }
6640 else
6641 /* Target the Thumb stub before the ARM PLT entry. */
6644 }
6647 {
6648 /* Check if a stub has to be inserted because the destination
6649 is too far. */
6650 bfd_vma from;
6651 bfd_signed_vma branch_offset;
6662 ||
6663 (thumb2
6669 {
6670 /* The target is out of reach or we are changing modes, so
6671 redirect the branch to the local stub for this
6672 function. */
6681 /* If this call becomes a call to Arm, force BLX. */
6683 {
6688 }
6689 }
6690 }
6700 /* If this is a signed value, the rightshift just dropped
6701 leading 1 bits (assuming twos complement). */
6704 else
6707 /* Calculate the permissable maximum and minimum values for
6708 this relocation according to whether we're relocating for
6709 Thumb-2 or not. */
6716 /* Assumes two's complement. */
6721 /* For a BLX instruction, make sure that the relocation is rounded up
6722 to a word boundary. This follows the semantics of the instruction
6723 which specifies that bit 1 of the target address will come from bit
6724 1 of the base address. */
6727 /* Put RELOCATION back into the insn. Assumes two's complement.
6728 We use the Thumb-2 encoding, which is safe even if dealing with
6729 a Thumb-1 instruction by virtue of our overflow check above. */
6739 /* Put the relocated value back in the object file: */
6744 }
6748 /* Thumb32 conditional branch instruction. */
6749 {
6750 bfd_vma relocation;
6756 bfd_signed_vma signed_check;
6758 /* Need to refetch the addend, reconstruct the top three bits,
6759 and squish the two 11 bit pieces together. */
6761 {
6775 }
6777 /* Handle calls via the PLT. */
6779 {
6783 /* Target the Thumb stub before the ARM PLT entry. */
6786 }
6788 /* ??? Should handle interworking? GCC might someday try to
6789 use this for tail calls. */
6800 /* Put RELOCATION back into the insn. */
6801 {
6810 }
6812 /* Put the relocated value back in the object file: */
6817 }
6822 /* Thumb B (branch) instruction). */
6823 {
6824 bfd_signed_vma relocation;
6827 bfd_signed_vma signed_check;
6829 /* CZB cannot jump backward. */
6834 {
6835 /* Need to refetch addend. */
6838 {
6842 }
6843 else
6845 /* The value in the insn has been right shifted. We need to
6846 undo this, so that we can perform the address calculation
6847 in terms of bytes. */
6849 }
6861 else
6867 /* Assumes two's complement. */
6872 }
6877 {
6878 bfd_vma insn;
6879 bfd_vma relocation;
6883 {
6884 /* Extract the addend. */
6887 }
6897 }
6905 /* Relocation is relative to the start of the
6906 global offset table. */
6912 /* If we are addressing a Thumb function, we need to adjust the
6913 address by one, so that attempts to call the function pointer will
6914 correctly interpret it as Thumb code. */
6918 /* Note that sgot->output_offset is not involved in this
6919 calculation. We always want the start of .got. If we
6920 define _GLOBAL_OFFSET_TABLE in a different way, as is
6921 permitted by the ABI, we might have to change this
6922 calculation. */
6929 /* Use global offset table as symbol value. */
6943 /* Relocation is to the entry for this symbol in the
6944 global offset table. */
6949 {
6950 bfd_vma off;
6951 bfd_boolean dyn;
6962 {
6963 /* This is actually a static link, or it is a -Bsymbolic link
6964 and the symbol is defined locally. We must initialize this
6965 entry in the global offset table. Since the offset must
6966 always be a multiple of 4, we use the least significant bit
6967 to record whether we have initialized it already.
6969 When doing a dynamic link, we create a .rel(a).got relocation
6970 entry to initialize the value. This is done in the
6971 finish_dynamic_symbol routine. */
6974 else
6975 {
6976 /* If we are addressing a Thumb function, we need to
6977 adjust the address by one, so that attempts to
6978 call the function pointer will correctly
6979 interpret it as Thumb code. */
6985 }
6986 }
6987 else
6991 }
6992 else
6993 {
6994 bfd_vma off;
7001 /* The offset must always be a multiple of 4. We use the
7002 least significant bit to record whether we have already
7003 generated the necessary reloc. */
7006 else
7007 {
7008 /* If we are addressing a Thumb function, we need to
7009 adjust the address by one, so that attempts to
7010 call the function pointer will correctly
7011 interpret it as Thumb code. */
7019 {
7021 Elf_Internal_Rela outrel;
7024 srelgot = (bfd_get_section_by_name
7036 }
7039 }
7042 }
7058 {
7059 bfd_vma off;
7068 else
7069 {
7070 /* If we don't know the module number, create a relocation
7071 for it. */
7073 {
7074 Elf_Internal_Rela outrel;
7092 }
7093 else
7097 }
7105 }
7109 {
7110 bfd_vma off;
7119 {
7120 bfd_boolean dyn;
7125 {
7128 }
7131 }
7132 else
7133 {
7138 }
7145 else
7146 {
7148 Elf_Internal_Rela outrel;
7152 /* The GOT entries have not been initialized yet. Do it
7153 now, and emit any relocations. If both an IE GOT and a
7154 GD GOT are necessary, we emit the GD first. */
7160 {
7166 }
7169 {
7171 {
7189 else
7190 {
7193 R_ARM_TLS_DTPOFF32);
7204 }
7205 }
7206 else
7207 {
7208 /* If we are not emitting relocations for a
7209 general dynamic reference, then we must be in a
7210 static link or an executable link with the
7211 symbol binding locally. Mark it as belonging
7212 to module 1, the executable. */
7217 }
7220 }
7223 {
7225 {
7228 else
7242 }
7243 else
7247 }
7251 else
7253 }
7263 }
7267 {
7273 }
7274 else
7283 {
7286 /* Ensure that we have a BX instruction. */
7290 {
7291 /* Branch to veneer. */
7292 bfd_vma glue_addr;
7299 }
7300 else
7301 {
7302 /* Preserve Rm (lowest four bits) and the condition code
7303 (highest four bits). Other bits encode MOV PC,Rm. */
7305 }
7308 }
7315 /* Until we properly support segment-base-relative addressing then
7316 we assume the segment base to be zero, as for the group relocations.
7317 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
7318 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
7322 {
7326 {
7329 }
7351 }
7358 /* Until we properly support segment-base-relative addressing then
7359 we assume the segment base to be zero, as for the above relocations.
7360 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
7361 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
7362 as R_ARM_THM_MOVT_ABS. */
7366 {
7367 bfd_vma insn;
7373 {
7379 }
7405 }
7418 {
7422 /* sb should be the origin of the *segment* containing the symbol.
7423 It is not clear how to obtain this OS-dependent value, so we
7424 make an arbitrary choice of zero. */
7426 bfd_vma residual;
7427 bfd_vma g_n;
7428 bfd_signed_vma signed_value;
7431 /* Determine which group of bits to select. */
7433 {
7455 }
7457 /* If REL, extract the addend from the insn. If RELA, it will
7458 have already been fetched for us. */
7460 {
7467 else
7468 {
7469 /* Compensate for the fact that in the instruction, the
7470 rotation is stored in multiples of 2 bits. */
7473 /* Rotate "constant" right by "rotation" bits. */
7476 }
7478 /* Determine if the instruction is an ADD or a SUB.
7479 (For REL, this determines the sign of the addend.) */
7482 {
7488 }
7491 }
7493 /* Compute the value (X) to go in the place. */
7499 /* PC relative. */
7501 else
7502 /* Section base relative. */
7505 /* If the target symbol is a Thumb function, then set the
7506 Thumb bit in the address. */
7510 /* Calculate the value of the relevant G_n, in encoded
7511 constant-with-rotation format. */
7515 /* Check for overflow if required. */
7522 {
7528 }
7530 /* Mask out the value and the ADD/SUB part of the opcode; take care
7531 not to destroy the S bit. */
7534 /* Set the opcode according to whether the value to go in the
7535 place is negative. */
7538 else
7541 /* Encode the offset. */
7545 }
7554 {
7559 bfd_vma residual;
7560 bfd_signed_vma signed_value;
7563 /* Determine which groups of bits to calculate. */
7565 {
7583 }
7585 /* If REL, extract the addend from the insn. If RELA, it will
7586 have already been fetched for us. */
7588 {
7591 }
7593 /* Compute the value (X) to go in the place. */
7597 /* PC relative. */
7599 else
7600 /* Section base relative. */
7603 /* Calculate the value of the relevant G_{n-1} to obtain
7604 the residual at that stage. */
7607 /* Check for overflow. */
7609 {
7615 }
7617 /* Mask out the value and U bit. */
7620 /* Set the U bit if the value to go in the place is non-negative. */
7624 /* Encode the offset. */
7628 }
7637 {
7642 bfd_vma residual;
7643 bfd_signed_vma signed_value;
7646 /* Determine which groups of bits to calculate. */
7648 {
7666 }
7668 /* If REL, extract the addend from the insn. If RELA, it will
7669 have already been fetched for us. */
7671 {
7674 }
7676 /* Compute the value (X) to go in the place. */
7680 /* PC relative. */
7682 else
7683 /* Section base relative. */
7686 /* Calculate the value of the relevant G_{n-1} to obtain
7687 the residual at that stage. */
7690 /* Check for overflow. */
7692 {
7698 }
7700 /* Mask out the value and U bit. */
7703 /* Set the U bit if the value to go in the place is non-negative. */
7707 /* Encode the offset. */
7711 }
7720 {
7725 bfd_vma residual;
7726 bfd_signed_vma signed_value;
7729 /* Determine which groups of bits to calculate. */
7731 {
7749 }
7751 /* If REL, extract the addend from the insn. If RELA, it will
7752 have already been fetched for us. */
7754 {
7757 }
7759 /* Compute the value (X) to go in the place. */
7763 /* PC relative. */
7765 else
7766 /* Section base relative. */
7769 /* Calculate the value of the relevant G_{n-1} to obtain
7770 the residual at that stage. */
7773 /* Check for overflow. (The absolute value to go in the place must be
7774 divisible by four and, after having been divided by four, must
7775 fit in eight bits.) */
7777 {
7783 }
7785 /* Mask out the value and U bit. */
7788 /* Set the U bit if the value to go in the place is non-negative. */
7792 /* Encode the offset. */
7796 }
7801 }
7802 }
7804 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
7805 static void
7809 bfd_signed_vma increment)
7810 {
7811 bfd_signed_vma addend;
7815 {
7833 }
7834 else
7835 {
7836 bfd_vma contents;
7840 /* Get the (signed) value from the instruction. */
7843 {
7844 bfd_signed_vma mask;
7849 }
7851 /* Add in the increment, (which is a byte value). */
7853 {
7865 /* Should we check for overflow here ? */
7867 /* Drop any undesired bits. */
7870 }
7875 }
7876 }
7878 #define IS_ARM_TLS_RELOC(R_TYPE) \
7879 ((R_TYPE) == R_ARM_TLS_GD32 \
7880 || (R_TYPE) == R_ARM_TLS_LDO32 \
7881 || (R_TYPE) == R_ARM_TLS_LDM32 \
7882 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
7883 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
7884 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
7885 || (R_TYPE) == R_ARM_TLS_LE32 \
7886 || (R_TYPE) == R_ARM_TLS_IE32)
7888 /* Relocate an ARM ELF section. */
7890 static bfd_boolean
7899 {
7915 {
7922 bfd_vma relocation;
7923 bfd_reloc_status_type r;
7924 arelent bfd_reloc;
7945 {
7950 {
7957 {
7962 {
7984 {
7990 }
7994 /* Get the (signed) value from the instruction. */
7997 {
7998 bfd_signed_vma mask;
8003 }
8005 }
8008 addend =
8013 /* Cases here must match those in the preceeding
8014 switch statement. */
8016 {
8039 }
8040 }
8041 }
8042 else
8044 }
8045 else
8046 {
8047 bfd_boolean warned;
8055 }
8058 {
8059 /* For relocs against symbols from removed linkonce sections,
8060 or sections discarded by a linker script, we just want the
8061 section contents zeroed. Avoid any special processing. */
8066 }
8069 {
8070 /* This is a relocatable link. We don't have to change
8071 anything, unless the reloc is against a section symbol,
8072 in which case we have to adjust according to where the
8073 section symbol winds up in the output section. */
8075 {
8079 else
8081 }
8083 }
8087 else
8088 {
8089 name = (bfd_elf_string_from_elf_section
8093 }
8101 {
8106 input_bfd,
8107 input_section,
8110 name);
8111 }
8120 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8121 because such sections are not SEC_ALLOC and thus ld.so will
8122 not process them. */
8126 {
8129 input_bfd,
8130 input_section,
8135 }
8138 {
8140 {
8142 /* If the overflowing reloc was to an undefined symbol,
8143 we have already printed one error message and there
8144 is no point complaining again. */
8170 /* error_message should already be set. */
8175 /* Fall through. */
8177 common_error:
8184 }
8185 }
8186 }
8189 }
8191 /* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
8192 adds the edit to the start of the list. (The list must be built in order of
8193 ascending INDEX: the function's callers are primarily responsible for
8194 maintaining that condition). */
8196 static void
8199 arm_unwind_edit_type type,
8202 {
8210 {
8220 }
8221 else
8222 {
8229 }
8230 }
8234 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
8235 static void
8237 {
8245 /* Adjust size of output section. */
8247 }
8249 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
8250 static void
8252 {
8262 }
8264 /* Scan .ARM.exidx tables, and create a list describing edits which should be
8265 made to those tables, such that:
8267 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
8268 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
8269 codes which have been inlined into the index).
8271 The edits are applied when the tables are written
8272 (in elf32_arm_write_section).
8273 */
8275 bfd_boolean
8279 {
8286 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
8287 text sections. */
8289 {
8293 {
8301 {
8302 Elf_Internal_Shdr *linked_hdr
8310 /* Link this .ARM.exidx section back from the text section it
8311 describes. */
8313 }
8314 }
8315 }
8317 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
8318 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
8319 and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
8320 */
8323 {
8330 bfd_vma j;
8341 {
8342 /* Section has no unwind data. */
8346 /* Ignore zero sized sections. */
8353 }
8368 /* An error? */
8372 {
8377 /* An EXIDX_CANTUNWIND entry. */
8379 {
8383 }
8384 /* Inlined unwinding data. Merge if equal to previous. */
8386 {
8391 }
8392 /* Normal table entry. In theory we could merge these too,
8393 but duplicate entries are likely to be much less common. */
8394 else
8398 {
8403 }
8406 }
8408 /* Free contents if we allocated it ourselves. */
8412 /* Record edits to be applied later (in elf32_arm_write_section). */
8421 }
8423 /* Add terminating CANTUNWIND entry. */
8428 }
8430 static bfd_boolean
8433 {
8449 }
8451 static bfd_boolean
8453 {
8456 /* Invoke the regular ELF backend linker to do all the work. */
8460 /* Write out any glue sections now that we have created all the
8461 stubs. */
8463 {
8466 ARM2THUMB_GLUE_SECTION_NAME))
8471 THUMB2ARM_GLUE_SECTION_NAME))
8476 VFP11_ERRATUM_VENEER_SECTION_NAME))
8481 ARM_BX_GLUE_SECTION_NAME))
8483 }
8486 }
8488 /* Set the right machine number. */
8490 static bfd_boolean
8492 {
8503 else
8507 }
8509 /* Function to keep ARM specific flags in the ELF header. */
8511 static bfd_boolean
8513 {
8516 {
8518 {
8521 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
8522 abfd);
8523 else
8524 _bfd_error_handler
8526 abfd);
8527 }
8528 }
8529 else
8530 {
8533 }
8536 }
8538 /* Copy backend specific data from one object module to another. */
8540 static bfd_boolean
8542 {
8543 flagword in_flags;
8544 flagword out_flags;
8555 {
8556 /* Cannot mix APCS26 and APCS32 code. */
8560 /* Cannot mix float APCS and non-float APCS code. */
8564 /* If the src and dest have different interworking flags
8565 then turn off the interworking bit. */
8567 {
8569 _bfd_error_handler
8570 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
8574 }
8576 /* Likewise for PIC, though don't warn for this case. */
8579 }
8584 /* Also copy the EI_OSABI field. */
8588 /* Copy object attributes. */
8592 }
8594 /* Values for Tag_ABI_PCS_R9_use. */
8595 enum
8596 {
8597 AEABI_R9_V6,
8598 AEABI_R9_SB,
8599 AEABI_R9_TLS,
8600 AEABI_R9_unused
8601 };
8603 /* Values for Tag_ABI_PCS_RW_data. */
8604 enum
8605 {
8606 AEABI_PCS_RW_data_absolute,
8607 AEABI_PCS_RW_data_PCrel,
8608 AEABI_PCS_RW_data_SBrel,
8609 AEABI_PCS_RW_data_unused
8610 };
8612 /* Values for Tag_ABI_enum_size. */
8613 enum
8614 {
8615 AEABI_enum_unused,
8616 AEABI_enum_short,
8617 AEABI_enum_wide,
8618 AEABI_enum_forced_wide
8619 };
8621 /* Determine whether an object attribute tag takes an integer, a
8622 string or both. */
8624 static int
8626 {
8635 else
8637 }
8639 /* The ABI defines that Tag_conformance should be emitted first, and that
8640 Tag_nodefaults should be second (if either is defined). This sets those
8641 two positions, and bumps up the position of all the remaining tags to
8642 compensate. */
8643 static int
8645 {
8655 }
8657 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
8658 Returns -1 if no architecture could be read. */
8660 static int
8662 {
8666 /* Note: the tag and its argument below are uleb128 values, though
8667 currently-defined values fit in one byte for each. */
8674 /* This tag is "safely ignorable", so don't complain if it looks funny. */
8676 }
8678 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8679 The tag is removed if ARCH is -1. */
8681 static void
8683 {
8688 {
8691 }
8693 /* Note: the tag and its argument below are uleb128 values, though
8694 currently-defined values fit in one byte for each. */
8700 }
8702 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8703 into account. */
8705 static int
8708 {
8709 #define T(X) TAG_CPU_ARCH_##X
8712 {
8722 };
8724 {
8735 };
8737 {
8749 };
8751 {
8764 };
8766 {
8780 };
8782 {
8797 };
8799 {
8800 v6t2,
8801 v6k,
8802 v7,
8803 v6_m,
8804 v6s_m,
8805 /* Pseudo-architecture. */
8806 v4t_plus_v6_m
8807 };
8809 /* Check we've not got a higher architecture than we know about. */
8812 {
8815 }
8817 /* Override old tag if we have a Tag_also_compatible_with on the output. */
8823 /* And override the new tag if we have a Tag_also_compatible_with on the
8824 input. */
8833 /* Architectures before V6KZ add features monotonically. */
8839 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8840 as the canonical version. */
8842 {
8845 }
8846 else
8850 {
8854 }
8857 #undef T
8858 }
8860 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
8861 are conflicting attributes. */
8863 static bfd_boolean
8865 {
8871 /* Some tags have 0 = don't care, 1 = strong requirement,
8872 2 = weak requirement. */
8874 /* For use with Tag_VFP_arch. */
8879 /* Skip the linker stubs file. This preserves previous behavior
8880 of accepting unknown attributes in the first input file - but
8881 is that a bug? */
8886 {
8887 /* This is the first object. Copy the attributes. */
8890 /* Use the Tag_null value to indicate the attributes have been
8891 initialized. */
8895 }
8899 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
8901 {
8902 /* Ignore mismatches if the object doesn't use floating point. */
8906 {
8907 _bfd_error_handler
8911 }
8912 }
8915 {
8916 /* Merge this attribute with existing attributes. */
8918 {
8921 /* These are merged after Tag_CPU_arch. */
8926 /* Use the first value seen. */
8930 {
8934 /* These aren't real CPU names, but we can't guess
8935 that from the architecture version alone. */
8948 "ARM v6S-M"
8949 };
8951 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
8957 secondary_compat);
8960 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
8964 {
8965 /* The output architecture has been changed to match the
8966 input architecture. Use the input names. */
8973 }
8974 else
8975 {
8978 }
8980 /* If we still don't have a value for Tag_CPU_name,
8981 make one up now. Tag_CPU_raw_name remains blank. */
8986 }
8993 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
9003 /* Use the largest value specified. */
9010 /* Use the smallest value specified. */
9019 {
9020 /* This error message should be enabled once all non-conformant
9021 binaries in the toolchain have had the attributes set
9022 properly.
9023 _bfd_error_handler
9024 (_("error: %B: 8-byte data alignment conflicts with %B"),
9025 obfd, ibfd);
9026 result = FALSE; */
9027 }
9028 /* Fall through. */
9031 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
9032 value if greater than 2 (for future-proofing). */
9042 {
9043 /* 0 will merge with anything.
9044 'A' and 'S' merge to 'A'.
9045 'R' and 'S' merge to 'R'.
9046 'M' and 'A|R|S' is an error. */
9055 else
9056 {
9057 _bfd_error_handler
9059 ibfd,
9063 }
9064 }
9067 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
9068 largest value if greater than 4 (for future-proofing). */
9078 {
9079 /* It's sometimes ok to mix different configs, so this is only
9080 a warning. */
9081 _bfd_error_handler
9083 }
9089 {
9090 _bfd_error_handler
9093 }
9101 {
9102 _bfd_error_handler
9104 ibfd);
9106 }
9107 /* Use the smallest value specified. */
9114 {
9115 _bfd_error_handler
9116 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
9118 }
9124 {
9127 {
9128 /* The existing object is compatible with anything.
9129 Use whatever requirements the new object has. */
9131 }
9135 {
9146 _bfd_error_handler
9147 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
9149 }
9150 }
9153 /* Aready done. */
9157 {
9158 _bfd_error_handler
9162 }
9165 /* Merged in target-independent code. */
9168 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
9177 {
9179 {
9180 _bfd_error_handler
9184 }
9185 }
9191 /* This tag is set if it exists, but the value is unused (and is
9192 typically zero). We don't actually need to do anything here -
9193 the merge happens automatically when the type flags are merged
9194 below. */
9197 /* Already done in Tag_CPU_arch. */
9200 /* Keep the attribute if it matches. Throw it away otherwise.
9201 No attribute means no claim to conform. */
9208 {
9211 /* The "known_obj_attributes" table does contain some undefined
9212 attributes. Ensure that there are unused. */
9219 {
9220 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9222 {
9223 _bfd_error_handler
9228 }
9229 else
9230 {
9231 _bfd_error_handler
9234 }
9235 }
9237 /* Only pass on attributes that match in both inputs. */
9242 {
9245 }
9246 }
9247 }
9249 /* If out_attr was copied from in_attr then it won't have a type yet. */
9252 }
9254 /* Merge Tag_compatibility attributes and any common GNU ones. */
9257 /* Check for any attributes not known on ARM. */
9263 {
9267 /* The tags for each list are in numerical order. */
9268 /* If the tags are equal, then merge. */
9270 {
9271 /* This attribute only exists in obfd. We can't merge, and we don't
9272 know what the tag means, so delete it. */
9277 }
9279 {
9280 /* This attribute only exists in ibfd. We can't merge, and we don't
9281 know what the tag means, so ignore it. */
9285 }
9287 {
9288 /* As present, all attributes in the list are unknown, and
9289 therefore can't be merged meaningfully. */
9293 /* Only pass on attributes that match in both inputs. */
9298 {
9299 /* No match. Delete the attribute. */
9302 }
9303 else
9304 {
9305 /* Matched. Keep the attribute and move to the next. */
9308 }
9309 }
9312 {
9313 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9315 {
9316 _bfd_error_handler
9321 }
9322 else
9323 {
9324 _bfd_error_handler
9327 }
9328 }
9329 }
9331 }
9334 /* Return TRUE if the two EABI versions are incompatible. */
9336 static bfd_boolean
9338 {
9339 /* v4 and v5 are the same spec before and after it was released,
9340 so allow mixing them. */
9346 }
9348 /* Merge backend specific data from an object file to the output
9349 object file when linking. */
9351 static bfd_boolean
9353 {
9354 flagword out_flags;
9355 flagword in_flags;
9359 /* Check if we have the same endianess. */
9369 /* The input BFD must have had its flags initialised. */
9370 /* The following seems bogus to me -- The flags are initialized in
9371 the assembler but I don't think an elf_flags_init field is
9372 written into the object. */
9373 /* BFD_ASSERT (elf_flags_init (ibfd)); */
9378 /* In theory there is no reason why we couldn't handle this. However
9379 in practice it isn't even close to working and there is no real
9380 reason to want it. */
9384 {
9386 ibfd);
9388 }
9391 {
9392 /* If the input is the default architecture and had the default
9393 flags then do not bother setting the flags for the output
9394 architecture, instead allow future merges to do this. If no
9395 future merges ever set these flags then they will retain their
9396 uninitialised values, which surprise surprise, correspond
9397 to the default values. */
9410 }
9412 /* Determine what should happen if the input ARM architecture
9413 does not match the output ARM architecture. */
9417 /* Identical flags must be compatible. */
9421 /* Check to see if the input BFD actually contains any sections. If
9422 not, its flags may not have been initialised either, but it
9423 cannot actually cause any incompatiblity. Do not short-circuit
9424 dynamic objects; their section list may be emptied by
9425 elf_link_add_object_symbols.
9427 Also check to see if there are no code sections in the input.
9428 In this case there is no need to check for code specific flags.
9429 XXX - do we need to worry about floating-point format compatability
9430 in data sections ? */
9432 {
9437 {
9438 /* Ignore synthetic glue sections. */
9441 {
9449 }
9450 }
9454 }
9456 /* Complain about various flag mismatches. */
9459 {
9460 _bfd_error_handler
9466 }
9468 /* Not sure what needs to be checked for EABI versions >= 1. */
9469 /* VxWorks libraries do not use these flags. */
9473 {
9475 {
9476 _bfd_error_handler
9482 }
9485 {
9487 _bfd_error_handler
9490 else
9491 _bfd_error_handler
9496 }
9499 {
9501 _bfd_error_handler
9504 else
9505 _bfd_error_handler
9510 }
9513 {
9515 _bfd_error_handler
9518 else
9519 _bfd_error_handler
9524 }
9526 #ifdef EF_ARM_SOFT_FLOAT
9528 {
9529 /* We can allow interworking between code that is VFP format
9530 layout, and uses either soft float or integer regs for
9531 passing floating point arguments and results. We already
9532 know that the APCS_FLOAT flags match; similarly for VFP
9533 flags. */
9536 {
9538 _bfd_error_handler
9541 else
9542 _bfd_error_handler
9547 }
9548 }
9549 #endif
9551 /* Interworking mismatch is only a warning. */
9553 {
9555 {
9556 _bfd_error_handler
9559 }
9560 else
9561 {
9562 _bfd_error_handler
9565 }
9566 }
9567 }
9570 }
9572 /* Display the flags field. */
9574 static bfd_boolean
9576 {
9582 /* Print normal ELF private data. */
9586 /* Ignore init flag - it may not be set, despite the flags field
9587 containing valid data. */
9589 /* xgettext:c-format */
9593 {
9595 /* The following flag bits are GNU extensions and not part of the
9596 official ARM ELF extended ABI. Hence they are only decoded if
9597 the EABI version is not set. */
9603 else
9610 else
9639 else
9650 else
9673 eabi:
9686 }
9704 }
9706 static int
9708 {
9710 {
9715 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
9716 This allows us to distinguish between data used by Thumb instructions
9717 and non-data (which is probably code) inside Thumb regions of an
9718 executable. */
9725 }
9728 }
9736 {
9739 {
9743 }
9746 }
9748 /* Update the got entry reference counts for the section being removed. */
9750 static bfd_boolean
9755 {
9777 {
9784 {
9789 }
9794 {
9800 {
9803 }
9805 {
9808 }
9835 /* Should the interworking branches be here also? */
9838 {
9846 {
9854 }
9860 {
9864 {
9872 }
9873 }
9874 }
9879 }
9880 }
9883 }
9885 /* Look through the relocs for a section during the first phase. */
9887 static bfd_boolean
9890 {
9899 bfd_boolean needs_plt;
9910 /* Create dynamic sections for relocatable executables so that we can
9911 copy relocations. */
9914 {
9917 }
9928 {
9939 /* PR 9934: It is possible to have relocations that do not
9940 refer to symbols, thus it is also possible to have an
9941 object file containing relocations but no symbol table. */
9943 {
9945 r_symndx);
9947 }
9951 else
9952 {
9957 }
9962 {
9967 /* This symbol requires a global offset table entry. */
9968 {
9972 {
9976 }
9979 {
9982 }
9983 else
9984 {
9987 /* This is a global offset table entry for a local symbol. */
9990 {
9991 bfd_size_type size;
10001 }
10004 }
10006 /* We will already have issued an error message if there is a
10007 TLS / non-TLS mismatch, based on the symbol type. We don't
10008 support any linker relaxations. So just combine any TLS
10009 types needed. */
10015 {
10018 else
10020 }
10021 }
10022 /* Fall through. */
10027 /* Fall through. */
10032 {
10037 }
10041 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
10042 ldr __GOTT_INDEX__ offsets. */
10045 /* Fall through. */
10063 {
10065 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
10070 }
10072 /* Fall through. */
10082 normal_reloc:
10084 /* Should the interworking branches be listed here? */
10086 {
10087 /* If this reloc is in a read-only section, we might
10088 need a copy reloc. We can't check reliably at this
10089 stage whether the section is read-only, as input
10090 sections have not yet been mapped to output sections.
10091 Tentatively set the flag for now, and correct in
10092 adjust_dynamic_symbol. */
10096 /* We may need a .plt entry if the function this reloc
10097 refers to is in a different object. We can't tell for
10098 sure yet, because something later might force the
10099 symbol local. */
10103 /* If we create a PLT entry, this relocation will reference
10104 it, even if it's an ABS32 relocation. */
10107 /* It's too early to use htab->use_blx here, so we have to
10108 record possible blx references separately from
10109 relocs that definitely need a thumb stub. */
10117 }
10119 /* If we are creating a shared library or relocatable executable,
10120 and this is a reloc against a global symbol, or a non PC
10121 relative reloc against a local symbol, then we need to copy
10122 the reloc into the shared library. However, if we are linking
10123 with -Bsymbolic, we do not need to copy a reloc against a
10124 global symbol which is defined in an object we are
10125 including in the link (i.e., DEF_REGULAR is set). At
10126 this point we have not seen all the input files, so it is
10127 possible that DEF_REGULAR is not set now but will be set
10128 later (it is never cleared). We account for that
10129 possibility below by storing information in the
10130 relocs_copied field of the hash table entry. */
10136 {
10139 /* When creating a shared object, we must copy these
10140 reloc types into the output file. We create a reloc
10141 section in dynobj and make room for this reloc. */
10143 {
10144 sreloc = _bfd_elf_make_dynamic_reloc_section
10150 /* BPABI objects never have dynamic relocations mapped. */
10152 {
10153 flagword flags;
10158 }
10159 }
10161 /* If this is a global symbol, we count the number of
10162 relocations we need for this symbol. */
10164 {
10166 }
10167 else
10168 {
10169 /* Track dynamic relocs needed for local syms too.
10170 We really need local syms available to do this
10171 easily. Oh well. */
10183 }
10187 {
10198 }
10203 }
10206 /* This relocation describes the C++ object vtable hierarchy.
10207 Reconstruct it for later use during GC. */
10213 /* This relocation describes which C++ vtable entries are actually
10214 used. Record for later use during GC. */
10221 }
10222 }
10225 }
10227 /* Unwinding tables are not referenced directly. This pass marks them as
10228 required if the corresponding code section is marked. */
10230 static bfd_boolean
10232 elf_gc_mark_hook_fn gc_mark_hook)
10233 {
10236 bfd_boolean again;
10238 /* Marking EH data may cause additional code sections to be marked,
10239 requiring multiple passes. */
10242 {
10245 {
10253 {
10262 {
10266 }
10267 }
10268 }
10269 }
10272 }
10274 /* Treat mapping symbols as special target symbols. */
10276 static bfd_boolean
10278 {
10280 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
10281 }
10283 /* This is a copy of elf_find_function() from elf.c except that
10284 ARM mapping symbols are ignored when looking for function names
10285 and STT_ARM_TFUNC is considered to a function type. */
10287 static bfd_boolean
10291 bfd_vma offset,
10294 {
10301 {
10307 {
10316 /* Skip mapping symbols. */
10319 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
10321 /* Fall through. */
10325 {
10328 }
10330 }
10331 }
10342 }
10345 /* Find the nearest line to a particular section and offset, for error
10346 reporting. This code is a duplicate of the code in elf.c, except
10347 that it uses arm_elf_find_function. */
10349 static bfd_boolean
10353 bfd_vma offset,
10357 {
10360 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
10366 {
10370 functionname_ptr);
10373 }
10393 }
10395 static bfd_boolean
10400 {
10401 bfd_boolean found;
10406 }
10408 /* Adjust a symbol defined by a dynamic object and referenced by a
10409 regular object. The current definition is in some section of the
10410 dynamic object, but we're not including those sections. We have to
10411 change the definition to something the rest of the link can
10412 understand. */
10414 static bfd_boolean
10417 {
10426 /* Make sure we know what is going on here. */
10436 /* If this is a function, put it in the procedure linkage table. We
10437 will fill in the contents of the procedure linkage table later,
10438 when we know the address of the .got section. */
10441 {
10446 {
10447 /* This case can occur if we saw a PLT32 reloc in an input
10448 file, but the symbol was never referred to by a dynamic
10449 object, or if all references were garbage collected. In
10450 such a case, we don't actually need to build a procedure
10451 linkage table, and we can just do a PC24 reloc instead. */
10456 }
10459 }
10460 else
10461 {
10462 /* It's possible that we incorrectly decided a .plt reloc was
10463 needed for an R_ARM_PC24 or similar reloc to a non-function sym
10464 in check_relocs. We can't decide accurately between function
10465 and non-function syms in check-relocs; Objects loaded later in
10466 the link may change h->type. So fix it now. */
10470 }
10472 /* If this is a weak symbol, and there is a real definition, the
10473 processor independent code will have arranged for us to see the
10474 real definition first, and we can just use the same value. */
10476 {
10482 }
10484 /* If there are no non-GOT references, we do not need a copy
10485 relocation. */
10489 /* This is a reference to a symbol defined by a dynamic object which
10490 is not a function. */
10492 /* If we are creating a shared library, we must presume that the
10493 only references to the symbol are via the global offset table.
10494 For such cases we need not do anything here; the relocations will
10495 be handled correctly by relocate_section. Relocatable executables
10496 can reference data in shared objects directly, so we don't need to
10497 do anything here. */
10502 {
10506 }
10508 /* We must allocate the symbol in our .dynbss section, which will
10509 become part of the .bss section of the executable. There will be
10510 an entry for this symbol in the .dynsym section. The dynamic
10511 object will contain position independent code, so all references
10512 from the dynamic object to this symbol will go through the global
10513 offset table. The dynamic linker will use the .dynsym entry to
10514 determine the address it must put in the global offset table, so
10515 both the dynamic object and the regular object will refer to the
10516 same memory location for the variable. */
10520 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
10521 copy the initial value out of the dynamic object and into the
10522 runtime process image. We need to remember the offset into the
10523 .rel(a).bss section we are going to use. */
10525 {
10532 }
10535 }
10537 /* Allocate space in .plt, .got and associated reloc sections for
10538 dynamic relocs. */
10540 static bfd_boolean
10542 {
10547 bfd_signed_vma thumb_refs;
10555 /* When warning symbols are created, they **replace** the "real"
10556 entry in the hash table, thus we never get to see the real
10557 symbol in a hash traversal. So look at it now. */
10565 {
10566 /* Make sure this symbol is output as a dynamic symbol.
10567 Undefined weak syms won't yet be marked as dynamic. */
10570 {
10573 }
10577 {
10580 /* If this is the first .plt entry, make room for the special
10581 first entry. */
10587 /* If we will insert a Thumb trampoline before this PLT, leave room
10588 for it. */
10594 {
10597 }
10599 /* If this symbol is not defined in a regular file, and we are
10600 not generating a shared library, then set the symbol to this
10601 location in the .plt. This is required to make function
10602 pointers compare as equal between the normal executable and
10603 the shared library. */
10606 {
10610 /* Make sure the function is not marked as Thumb, in case
10611 it is the target of an ABS32 relocation, which will
10612 point to the PLT entry. */
10615 }
10617 /* Make room for this entry. */
10621 {
10622 /* We also need to make an entry in the .got.plt section, which
10623 will be placed in the .got section by the linker script. */
10626 }
10628 /* We also need to make an entry in the .rel(a).plt section. */
10631 /* VxWorks executables have a second set of relocations for
10632 each PLT entry. They go in a separate relocation section,
10633 which is processed by the kernel loader. */
10635 {
10636 /* There is a relocation for the initial PLT entry:
10637 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
10641 /* There are two extra relocations for each subsequent
10642 PLT entry: an R_ARM_32 relocation for the GOT entry,
10643 and an R_ARM_32 relocation for the PLT entry. */
10645 }
10646 }
10647 else
10648 {
10651 }
10652 }
10653 else
10654 {
10657 }
10660 {
10662 bfd_boolean dyn;
10666 /* Make sure this symbol is output as a dynamic symbol.
10667 Undefined weak syms won't yet be marked as dynamic. */
10670 {
10673 }
10676 {
10684 /* Non-TLS symbols need one GOT slot. */
10686 else
10687 {
10689 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
10692 /* R_ARM_TLS_IE32 needs one GOT slot. */
10694 }
10708 {
10717 }
10723 }
10724 }
10725 else
10728 /* Allocate stubs for exported Thumb functions on v4t. */
10733 {
10740 /* Create a new symbol to regist the real location of the function. */
10753 /* Point the symbol at the stub. */
10757 }
10762 /* In the shared -Bsymbolic case, discard space allocated for
10763 dynamic pc-relative relocs against symbols which turn out to be
10764 defined in regular objects. For the normal shared case, discard
10765 space for pc-relative relocs that have become local due to symbol
10766 visibility changes. */
10769 {
10770 /* The only relocs that use pc_count are R_ARM_REL32 and
10771 R_ARM_REL32_NOI, which will appear on something like
10772 ".long foo - .". We want calls to protected symbols to resolve
10773 directly to the function rather than going via the plt. If people
10774 want function pointer comparisons to work as expected then they
10775 should avoid writing assembly like ".long foo - .". */
10777 {
10781 {
10786 else
10788 }
10789 }
10792 {
10796 {
10799 else
10801 }
10802 }
10804 /* Also discard relocs on undefined weak syms with non-default
10805 visibility. */
10808 {
10812 /* Make sure undefined weak symbols are output as a dynamic
10813 symbol in PIEs. */
10816 {
10819 }
10820 }
10824 {
10825 /* Output absolute symbols so that we can create relocations
10826 against them. For normal symbols we output a relocation
10827 against the section that contains them. */
10830 }
10832 }
10833 else
10834 {
10835 /* For the non-shared case, discard space for relocs against
10836 symbols which turn out to need copy relocs or are not
10837 dynamic. */
10845 {
10846 /* Make sure this symbol is output as a dynamic symbol.
10847 Undefined weak syms won't yet be marked as dynamic. */
10850 {
10853 }
10855 /* If that succeeded, we know we'll be keeping all the
10856 relocs. */
10859 }
10863 keep: ;
10864 }
10866 /* Finally, allocate space. */
10868 {
10871 }
10874 }
10876 /* Find any dynamic relocs that apply to read-only sections. */
10878 static bfd_boolean
10880 {
10889 {
10893 {
10898 /* Not an error, just cut short the traversal. */
10900 }
10901 }
10903 }
10905 void
10908 {
10913 }
10915 /* Set the sizes of the dynamic sections. */
10917 static bfd_boolean
10920 {
10923 bfd_boolean plt;
10924 bfd_boolean relocs;
10934 {
10935 /* Set the contents of the .interp section to the interpreter. */
10937 {
10942 }
10943 }
10945 /* Set up .got offsets for local syms, and space for local dynamic
10946 relocs. */
10948 {
10952 bfd_size_type locsymcount;
10961 {
10965 {
10968 {
10969 /* Input section has been discarded, either because
10970 it is a copy of a linkonce section or due to
10971 linker script /DISCARD/, so we'll be discarding
10972 the relocs too. */
10973 }
10977 {
10978 /* Relocations in vxworks .tls_vars sections are
10979 handled specially by the loader. */
10980 }
10982 {
10987 }
10988 }
10989 }
11002 {
11004 {
11007 /* TLS_GD relocs need an 8-byte structure in the GOT. */
11016 }
11017 else
11019 }
11020 }
11023 {
11024 /* Allocate two GOT entries and one dynamic relocation (if necessary)
11025 for R_ARM_TLS_LDM32 relocations. */
11030 }
11031 else
11034 /* Allocate global sym .plt and .got entries, and space for global
11035 sym dynamic relocs. */
11038 /* Here we rummage through the found bfds to collect glue information. */
11040 {
11044 /* Initialise mapping tables for code/data. */
11049 /* xgettext:c-format */
11052 }
11054 /* Allocate space for the glue sections now that we've sized them. */
11057 /* The check_relocs and adjust_dynamic_symbol entry points have
11058 determined the sizes of the various dynamic sections. Allocate
11059 memory for them. */
11063 {
11069 /* It's OK to base decisions on the section name, because none
11070 of the dynobj section names depend upon the input files. */
11074 {
11075 /* Remember whether there is a PLT. */
11077 }
11079 {
11081 {
11082 /* Remember whether there are any reloc sections other
11083 than .rel(a).plt and .rela.plt.unloaded. */
11087 /* We use the reloc_count field as a counter if we need
11088 to copy relocs into the output file. */
11090 }
11091 }
11094 {
11095 /* It's not one of our sections, so don't allocate space. */
11097 }
11100 {
11101 /* If we don't need this section, strip it from the
11102 output file. This is mostly to handle .rel(a).bss and
11103 .rel(a).plt. We must create both sections in
11104 create_dynamic_sections, because they must be created
11105 before the linker maps input sections to output
11106 sections. The linker does that before
11107 adjust_dynamic_symbol is called, and it is that
11108 function which decides whether anything needs to go
11109 into these sections. */
11112 }
11117 /* Allocate memory for the section contents. */
11121 }
11124 {
11125 /* Add some entries to the .dynamic section. We fill in the
11126 values later, in elf32_arm_finish_dynamic_sections, but we
11127 must add the entries now so that we get the correct size for
11128 the .dynamic section. The DT_DEBUG entry is filled in by the
11129 dynamic linker and used by the debugger. */
11130 #define add_dynamic_entry(TAG, VAL) \
11131 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
11134 {
11137 }
11140 {
11147 }
11150 {
11152 {
11157 }
11158 else
11159 {
11164 }
11165 }
11167 /* If any dynamic relocs apply to a read-only section,
11168 then we need a DT_TEXTREL entry. */
11171 info);
11174 {
11177 }
11181 }
11182 #undef add_dynamic_entry
11185 }
11187 /* Finish up dynamic symbol handling. We set the contents of various
11188 dynamic sections here. */
11190 static bfd_boolean
11195 {
11205 {
11209 bfd_vma plt_index;
11210 Elf_Internal_Rela rel;
11212 /* This symbol has an entry in the procedure linkage table. Set
11213 it up. */
11221 /* Fill in the entry in the procedure linkage table. */
11223 {
11231 /* Fill in the entry in the .rel.plt section. */
11237 /* Get the index in the procedure linkage table which
11238 corresponds to this symbol. This is the index of this symbol
11239 in all the symbols for which we are making plt entries. The
11240 first entry in the procedure linkage table is reserved. */
11243 }
11244 else
11245 {
11247 bfd_vma got_displacement;
11254 /* Get the offset into the .got.plt table of the entry that
11255 corresponds to this function. */
11258 /* Get the index in the procedure linkage table which
11259 corresponds to this symbol. This is the index of this symbol
11260 in all the symbols for which we are making plt entries. The
11261 first three entries in .got.plt are reserved; after that
11262 symbols appear in the same order as in .plt. */
11265 /* Calculate the address of the GOT entry. */
11270 /* ...and the address of the PLT entry. */
11277 {
11279 bfd_vma val;
11282 {
11290 else
11292 }
11293 }
11295 {
11297 bfd_vma val;
11300 {
11310 else
11312 }
11317 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
11318 referencing the GOT for this PLT entry. */
11325 /* Create the R_ARM_ABS32 relocation referencing the
11326 beginning of the PLT for this GOT entry. */
11331 }
11332 else
11333 {
11334 bfd_signed_vma thumb_refs;
11335 /* Calculate the displacement between the PLT slot and the
11336 entry in the GOT. The eight-byte offset accounts for the
11337 value produced by adding to pc in the first instruction
11338 of the PLT stub. */
11348 {
11353 }
11367 #ifdef FOUR_WORD_PLT
11369 #endif
11370 }
11372 /* Fill in the entry in the global offset table. */
11378 /* Fill in the entry in the .rel(a).plt section. */
11382 }
11388 {
11389 /* Mark the symbol as undefined, rather than as defined in
11390 the .plt section. Leave the value alone. */
11392 /* If the symbol is weak, we do need to clear the value.
11393 Otherwise, the PLT entry would provide a definition for
11394 the symbol even if the symbol wasn't defined anywhere,
11395 and so the symbol would never be NULL. */
11398 }
11399 }
11404 {
11407 Elf_Internal_Rela rel;
11409 bfd_vma offset;
11411 /* This symbol has an entry in the global offset table. Set it
11412 up. */
11423 /* If this is a static link, or it is a -Bsymbolic link and the
11424 symbol is defined locally or was forced to be local because
11425 of a version file, we just want to emit a RELATIVE reloc.
11426 The entry in the global offset table will already have been
11427 initialized in the relocate_section function. */
11430 {
11434 {
11437 }
11438 }
11439 else
11440 {
11444 }
11448 }
11451 {
11453 Elf_Internal_Rela rel;
11456 /* This symbol needs a copy reloc. Set it up. */
11472 }
11474 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
11475 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
11476 to the ".got" section. */
11482 }
11484 /* Finish up the dynamic sections. */
11486 static bfd_boolean
11488 {
11500 {
11513 {
11514 Elf_Internal_Dyn dyn;
11521 {
11554 get_vma:
11559 else
11560 /* In the BPABI, tags in the PT_DYNAMIC section point
11561 at the file offset, not the memory address, for the
11562 convenience of the post linker. */
11567 get_vma_if_bpabi:
11583 {
11584 /* My reading of the SVR4 ABI indicates that the
11585 procedure linkage table relocs (DT_JMPREL) should be
11586 included in the overall relocs (DT_REL). This is
11587 what Solaris does. However, UnixWare can not handle
11588 that case. Therefore, we override the DT_RELSZ entry
11589 here to make it not include the JMPREL relocs. Since
11590 the linker script arranges for .rel(a).plt to follow all
11591 other relocation sections, we don't have to worry
11592 about changing the DT_REL entry. */
11599 }
11600 /* Fall through. */
11604 /* In the BPABI, the DT_REL tag must point at the file
11605 offset, not the VMA, of the first relocation
11606 section. So, we use code similar to that in
11607 elflink.c, but do not check for SHF_ALLOC on the
11608 relcoation section, since relocations sections are
11609 never allocated under the BPABI. The comments above
11610 about Unixware notwithstanding, we include all of the
11611 relocations here. */
11613 {
11619 {
11620 Elf_Internal_Shdr *hdr
11623 {
11630 }
11631 }
11633 }
11636 /* Set the bottom bit of DT_INIT/FINI if the
11637 corresponding function is Thumb. */
11643 get_sym:
11644 /* If it wasn't set by elf_bfd_final_link
11645 then there is nothing to adjust. */
11647 {
11654 {
11657 }
11658 }
11660 }
11661 }
11663 /* Fill in the first entry in the procedure linkage table. */
11665 {
11669 /* Calculate the addresses of the GOT and PLT. */
11674 {
11675 /* The VxWorks GOT is relocated by the dynamic linker.
11676 Therefore, we must emit relocations rather than simply
11677 computing the values now. */
11678 Elf_Internal_Rela rel;
11689 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
11695 }
11696 else
11697 {
11710 #ifdef FOUR_WORD_PLT
11711 /* The displacement value goes in the otherwise-unused
11712 last word of the second entry. */
11714 #else
11716 #endif
11717 }
11718 }
11720 /* UnixWare sets the entsize of .plt to 4, although that doesn't
11721 really seem like the right value. */
11726 {
11727 /* Correct the .rel(a).plt.unloaded relocations. They will have
11728 incorrect symbol indexes. */
11737 {
11738 Elf_Internal_Rela rel;
11749 }
11750 }
11751 }
11753 /* Fill in the first three entries in the global offset table. */
11755 {
11757 {
11760 else
11766 }
11769 }
11772 }
11774 static void
11775 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
11776 {
11784 else
11789 {
11793 }
11794 }
11796 static enum elf_reloc_type_class
11798 {
11800 {
11809 }
11810 }
11812 /* Set the right machine number for an Arm ELF file. */
11814 static bfd_boolean
11816 {
11821 }
11823 static void
11825 {
11827 }
11829 /* Return TRUE if this is an unwinding table entry. */
11831 static bfd_boolean
11833 {
11836 }
11839 /* Set the type and flags for an ARM section. We do this by
11840 the section name, which is a hack, but ought to work. */
11842 static bfd_boolean
11844 {
11850 {
11853 }
11855 }
11857 /* Handle an ARM specific section when reading an object file. This is
11858 called when bfd_section_from_shdr finds a section with an unknown
11859 type. */
11861 static bfd_boolean
11866 {
11867 /* There ought to be a place to keep ELF backend specific flags, but
11868 at the moment there isn't one. We just keep track of the
11869 sections by their name, instead. Fortunately, the ABI gives
11870 names for all the ARM specific sections, so we will probably get
11871 away with this. */
11873 {
11881 }
11887 }
11889 /* A structure used to record a list of sections, independently
11890 of the next and prev fields in the asection structure. */
11892 {
11896 }
11897 section_list;
11899 /* Unfortunately we need to keep a list of sections for which
11900 an _arm_elf_section_data structure has been allocated. This
11901 is because it is possible for functions like elf32_arm_write_section
11902 to be called on a section which has had an elf_data_structure
11903 allocated for it (and so the used_by_bfd field is valid) but
11904 for which the ARM extended version of this structure - the
11905 _arm_elf_section_data structure - has not been allocated. */
11908 static void
11910 {
11922 }
11926 {
11930 /* This is a short cut for the typical case where the sections are added
11931 to the sections_with_arm_elf_section_data list in forward order and
11932 then looked up here in backwards order. This makes a real difference
11933 to the ld-srec/sec64k.exp linker test. */
11936 {
11942 }
11949 /* Record the entry prior to this one - it is the entry we are most
11950 likely to want to locate next time. Also this way if we have been
11951 called from unrecord_section_with_arm_elf_section_data() we will not
11952 be caching a pointer that is about to be freed. */
11956 }
11960 {
11967 else
11969 }
11971 static void
11973 {
11979 {
11987 }
11988 }
11992 {
12001 enum map_symbol_type
12002 {
12003 ARM_MAP_ARM,
12004 ARM_MAP_THUMB,
12005 ARM_MAP_DATA
12006 };
12009 /* Output a single mapping symbol. */
12011 static bfd_boolean
12014 bfd_vma offset)
12015 {
12018 Elf_Internal_Sym sym;
12031 }
12034 /* Output mapping symbols for PLT entries associated with H. */
12036 static bfd_boolean
12038 {
12042 bfd_vma addr;
12050 /* When warning symbols are created, they **replace** the "real"
12051 entry in the hash table, thus we never get to see the real
12052 symbol in a hash traversal. So look at it now. */
12061 {
12066 }
12068 {
12077 }
12078 else
12079 {
12080 bfd_signed_vma thumb_refs;
12087 {
12090 }
12091 #ifdef FOUR_WORD_PLT
12096 #else
12097 /* A three-word PLT with no Thumb thunk contains only Arm code,
12098 so only need to output a mapping symbol for the first PLT entry and
12099 entries with thumb thunks. */
12101 {
12104 }
12105 #endif
12106 }
12109 }
12111 /* Output a single local symbol for a generated stub. */
12113 static bfd_boolean
12116 {
12118 Elf_Internal_Sym sym;
12131 }
12133 static bfd_boolean
12136 {
12141 bfd_vma addr;
12150 /* Massage our args to the form they really have. */
12159 /* Ensure this stub is attached to the current section being
12160 processed. */
12169 {
12182 }
12187 {
12189 {
12205 }
12208 {
12212 }
12215 {
12231 }
12232 }
12235 }
12237 /* Output mapping symbols for linker generated sections. */
12239 static bfd_boolean
12244 Elf_Internal_Sym *,
12245 asection *,
12247 {
12248 output_arch_syminfo osi;
12250 bfd_vma offset;
12251 bfd_size_type size;
12260 /* ARM->Thumb glue. */
12262 {
12264 ARM2THUMB_GLUE_SECTION_NAME);
12273 else
12277 {
12280 }
12281 }
12283 /* Thumb->ARM glue. */
12285 {
12287 THUMB2ARM_GLUE_SECTION_NAME);
12294 {
12297 }
12298 }
12300 /* ARMv4 BX veneers. */
12302 {
12304 ARM_BX_GLUE_SECTION_NAME);
12310 }
12312 /* Long calls stubs. */
12314 {
12320 {
12321 /* Ignore non-stub sections. */
12331 }
12332 }
12334 /* Finally, output mapping symbols for the PLT. */
12341 /* Output mapping symbols for the plt header. SymbianOS does not have a
12342 plt header. */
12344 {
12345 /* VxWorks shared libraries have no PLT header. */
12347 {
12352 }
12353 }
12355 {
12358 #ifndef FOUR_WORD_PLT
12361 #endif
12362 }
12366 }
12368 /* Allocate target specific section data. */
12370 static bfd_boolean
12372 {
12374 {
12382 }
12387 }
12390 /* Used to order a list of mapping symbols by address. */
12392 static int
12394 {
12403 /* Ensure results do not depend on the host qsort for objects with
12404 multiple mapping symbols at the same address by sorting on type
12405 after vma. */
12409 else
12411 }
12413 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
12415 static unsigned long
12417 {
12419 }
12421 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
12422 relocations. */
12424 static void
12426 {
12430 /* High bit of first word is supposed to be zero. */
12434 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
12435 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
12441 }
12443 /* Do code byteswapping. Return FALSE afterwards so that the section is
12444 written out as normal. */
12446 static bfd_boolean
12451 {
12457 bfd_vma ptr;
12458 bfd_vma end;
12460 bfd_byte tmp;
12463 /* If this section has not been allocated an _arm_elf_section_data
12464 structure then we cannot record anything. */
12474 {
12479 {
12483 {
12485 {
12486 bfd_vma branch_to_veneer;
12487 /* Original condition code of instruction, plus bit mask for
12488 ARM B instruction. */
12492 /* The instruction is before the label. */
12495 /* Above offset included in -4 below. */
12509 }
12513 {
12514 bfd_vma branch_from_veneer;
12517 /* Take size of veneer into account. */
12526 /* Original instruction. */
12533 /* Branch back to insn after original insn. */
12539 }
12544 }
12545 }
12546 }
12549 {
12550 arm_unwind_table_edit *edit_node
12552 /* Now, sec->size is the size of the section we will write. The original
12553 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
12554 markers) was sec->rawsize. (This isn't the case if we perform no
12555 edits, then rawsize will be zero and we should use size). */
12562 {
12564 {
12568 {
12571 out_index++;
12572 in_index++;
12573 }
12577 {
12579 {
12581 in_index++;
12586 {
12594 /* Note: this is meant to be equivalent to an
12595 R_ARM_PREL31 relocation. These synthetic
12596 EXIDX_CANTUNWIND markers are not relocated by the
12597 usual BFD method. */
12601 /* First address we can't unwind. */
12605 /* Code for EXIDX_CANTUNWIND. */
12609 out_index++;
12611 }
12613 }
12616 }
12617 }
12618 else
12619 {
12620 /* No more edits, copy remaining entries verbatim. */
12623 out_index++;
12624 in_index++;
12625 }
12626 }
12630 edited_contents,
12634 }
12640 {
12645 {
12648 else
12652 {
12654 /* Byte swap code words. */
12656 {
12664 }
12668 /* Byte swap code halfwords. */
12670 {
12675 }
12679 /* Leave data alone. */
12681 }
12683 }
12684 }
12693 }
12695 static void
12699 {
12701 }
12703 static bfd_boolean
12705 {
12708 unrecord_section_via_map_over_sections,
12709 NULL);
12712 }
12714 static bfd_boolean
12716 {
12719 unrecord_section_via_map_over_sections,
12720 NULL);
12723 }
12725 /* Display STT_ARM_TFUNC symbols as functions. */
12727 static void
12730 {
12735 }
12738 /* Mangle thumb function symbols as we read them in. */
12740 static bfd_boolean
12745 {
12749 /* New EABI objects mark thumb function symbols by setting the low bit of
12750 the address. Turn these into STT_ARM_TFUNC. */
12753 {
12756 }
12758 }
12761 /* Mangle thumb function symbols as we write them out. */
12763 static void
12768 {
12769 Elf_Internal_Sym newsym;
12771 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
12772 of the address set, as per the new EABI. We do this unconditionally
12773 because objcopy does not set the elf header flags until after
12774 it writes out the symbol table. */
12776 {
12780 {
12781 /* Do this only for defined symbols. At link type, the static
12782 linker will simulate the work of dynamic linker of resolving
12783 symbols and will carry over the thumbness of found symbols to
12784 the output symbol table. It's not clear how it happens, but
12785 the thumbness of undefined symbols can well be different at
12786 runtime, and writing '1' for them will be confusing for users
12787 and possibly for dynamic linker itself.
12788 */
12790 }
12793 }
12795 }
12797 /* Add the PT_ARM_EXIDX program header. */
12799 static bfd_boolean
12802 {
12808 {
12809 /* If there is already a PT_ARM_EXIDX header, then we do not
12810 want to add another one. This situation arises when running
12811 "strip"; the input binary already has the header. */
12816 {
12826 }
12827 }
12830 }
12832 /* We may add a PT_ARM_EXIDX program header. */
12834 static int
12837 {
12843 else
12845 }
12847 /* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
12849 static bfd_boolean
12851 {
12853 }
12855 /* We use this to override swap_symbol_in and swap_symbol_out. */
12857 {
12870 bfd_elf32_write_out_phdrs,
12871 bfd_elf32_write_shdrs_and_ehdr,
12872 bfd_elf32_checksum_contents,
12873 bfd_elf32_write_relocs,
12874 elf32_arm_swap_symbol_in,
12875 elf32_arm_swap_symbol_out,
12876 bfd_elf32_slurp_reloc_table,
12877 bfd_elf32_slurp_symbol_table,
12878 bfd_elf32_swap_dyn_in,
12879 bfd_elf32_swap_dyn_out,
12880 bfd_elf32_swap_reloc_in,
12881 bfd_elf32_swap_reloc_out,
12882 bfd_elf32_swap_reloca_in,
12883 bfd_elf32_swap_reloca_out
12884 };
12886 #define ELF_ARCH bfd_arch_arm
12887 #define ELF_MACHINE_CODE EM_ARM
12888 #ifdef __QNXTARGET__
12889 #define ELF_MAXPAGESIZE 0x1000
12890 #else
12891 #define ELF_MAXPAGESIZE 0x8000
12892 #endif
12893 #define ELF_MINPAGESIZE 0x1000
12894 #define ELF_COMMONPAGESIZE 0x1000
12896 #define bfd_elf32_mkobject elf32_arm_mkobject
12898 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
12899 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
12900 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
12901 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
12902 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
12903 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
12904 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
12905 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
12906 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
12907 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
12908 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
12909 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
12910 #define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
12911 #define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
12912 #define bfd_elf32_bfd_final_link elf32_arm_final_link
12914 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
12915 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
12916 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
12917 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
12918 #define elf_backend_check_relocs elf32_arm_check_relocs
12919 #define elf_backend_relocate_section elf32_arm_relocate_section
12920 #define elf_backend_write_section elf32_arm_write_section
12921 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
12922 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
12923 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
12924 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
12925 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
12926 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
12927 #define elf_backend_post_process_headers elf32_arm_post_process_headers
12928 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
12929 #define elf_backend_object_p elf32_arm_object_p
12930 #define elf_backend_section_flags elf32_arm_section_flags
12931 #define elf_backend_fake_sections elf32_arm_fake_sections
12932 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
12933 #define elf_backend_final_write_processing elf32_arm_final_write_processing
12934 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
12935 #define elf_backend_symbol_processing elf32_arm_symbol_processing
12936 #define elf_backend_size_info elf32_arm_size_info
12937 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
12938 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
12939 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
12940 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
12941 #define elf_backend_is_function_type elf32_arm_is_function_type
12943 #define elf_backend_can_refcount 1
12944 #define elf_backend_can_gc_sections 1
12945 #define elf_backend_plt_readonly 1
12946 #define elf_backend_want_got_plt 1
12947 #define elf_backend_want_plt_sym 0
12948 #define elf_backend_may_use_rel_p 1
12949 #define elf_backend_may_use_rela_p 0
12950 #define elf_backend_default_use_rela_p 0
12952 #define elf_backend_got_header_size 12
12954 #undef elf_backend_obj_attrs_vendor
12956 #undef elf_backend_obj_attrs_section
12958 #undef elf_backend_obj_attrs_arg_type
12959 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
12960 #undef elf_backend_obj_attrs_section_type
12961 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
12962 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
12966 /* VxWorks Targets. */
12968 #undef TARGET_LITTLE_SYM
12969 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
12970 #undef TARGET_LITTLE_NAME
12972 #undef TARGET_BIG_SYM
12973 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
12974 #undef TARGET_BIG_NAME
12977 /* Like elf32_arm_link_hash_table_create -- but overrides
12978 appropriately for VxWorks. */
12982 {
12987 {
12992 }
12994 }
12996 static void
12998 {
13001 }
13003 #undef elf32_bed
13004 #define elf32_bed elf32_arm_vxworks_bed
13006 #undef bfd_elf32_bfd_link_hash_table_create
13007 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
13008 #undef elf_backend_add_symbol_hook
13009 #define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
13010 #undef elf_backend_final_write_processing
13011 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
13012 #undef elf_backend_emit_relocs
13013 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
13015 #undef elf_backend_may_use_rel_p
13016 #define elf_backend_may_use_rel_p 0
13017 #undef elf_backend_may_use_rela_p
13018 #define elf_backend_may_use_rela_p 1
13019 #undef elf_backend_default_use_rela_p
13020 #define elf_backend_default_use_rela_p 1
13021 #undef elf_backend_want_plt_sym
13022 #define elf_backend_want_plt_sym 1
13023 #undef ELF_MAXPAGESIZE
13024 #define ELF_MAXPAGESIZE 0x1000
13029 /* Symbian OS Targets. */
13031 #undef TARGET_LITTLE_SYM
13032 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
13033 #undef TARGET_LITTLE_NAME
13035 #undef TARGET_BIG_SYM
13036 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
13037 #undef TARGET_BIG_NAME
13040 /* Like elf32_arm_link_hash_table_create -- but overrides
13041 appropriately for Symbian OS. */
13045 {
13050 {
13053 /* There is no PLT header for Symbian OS. */
13055 /* The PLT entries are each one instruction and one word. */
13058 /* Symbian uses armv5t or above, so use_blx is always true. */
13061 }
13063 }
13065 static const struct bfd_elf_special_section
13066 elf32_arm_symbian_special_sections[] =
13067 {
13068 /* In a BPABI executable, the dynamic linking sections do not go in
13069 the loadable read-only segment. The post-linker may wish to
13070 refer to these sections, but they are not part of the final
13071 program image. */
13077 /* These sections do not need to be writable as the SymbianOS
13078 postlinker will arrange things so that no dynamic relocation is
13079 required. */
13084 };
13086 static void
13089 {
13090 /* BPABI objects are never loaded directly by an OS kernel; they are
13091 processed by a postlinker first, into an OS-specific format. If
13092 the D_PAGED bit is set on the file, BFD will align segments on
13093 page boundaries, so that an OS can directly map the file. With
13094 BPABI objects, that just results in wasted space. In addition,
13095 because we clear the D_PAGED bit, map_sections_to_segments will
13096 recognize that the program headers should not be mapped into any
13097 loadable segment. */
13100 }
13102 static bfd_boolean
13105 {
13109 /* BPABI shared libraries and executables should have a PT_DYNAMIC
13110 segment. However, because the .dynamic section is not marked
13111 with SEC_LOAD, the generic ELF code will not create such a
13112 segment. */
13115 {
13121 {
13125 }
13126 }
13128 /* Also call the generic arm routine. */
13130 }
13132 /* Return address for Ith PLT stub in section PLT, for relocation REL
13133 or (bfd_vma) -1 if it should not be included. */
13135 static bfd_vma
13138 {
13140 }
13143 #undef elf32_bed
13144 #define elf32_bed elf32_arm_symbian_bed
13146 /* The dynamic sections are not allocated on SymbianOS; the postlinker
13147 will process them and then discard them. */
13148 #undef ELF_DYNAMIC_SEC_FLAGS
13149 #define ELF_DYNAMIC_SEC_FLAGS \
13150 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
13152 #undef elf_backend_add_symbol_hook
13153 #undef elf_backend_emit_relocs
13155 #undef bfd_elf32_bfd_link_hash_table_create
13156 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
13157 #undef elf_backend_special_sections
13158 #define elf_backend_special_sections elf32_arm_symbian_special_sections
13159 #undef elf_backend_begin_write_processing
13160 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
13161 #undef elf_backend_final_write_processing
13162 #define elf_backend_final_write_processing elf32_arm_final_write_processing
13164 #undef elf_backend_modify_segment_map
13165 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
13167 /* There is no .got section for BPABI objects, and hence no header. */
13168 #undef elf_backend_got_header_size
13169 #define elf_backend_got_header_size 0
13171 /* Similarly, there is no .got.plt section. */
13172 #undef elf_backend_want_got_plt
13173 #define elf_backend_want_got_plt 0
13175 #undef elf_backend_plt_sym_val
13176 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
13178 #undef elf_backend_may_use_rel_p
13179 #define elf_backend_may_use_rel_p 1
13180 #undef elf_backend_may_use_rela_p
13181 #define elf_backend_may_use_rela_p 0
13182 #undef elf_backend_default_use_rela_p
13183 #define elf_backend_default_use_rela_p 0
13184 #undef elf_backend_want_plt_sym
13185 #define elf_backend_want_plt_sym 0
13186 #undef ELF_MAXPAGESIZE
13187 #define ELF_MAXPAGESIZE 0x8000