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[gdb.git] / gdb / mn10300-linux-tdep.c
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1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
3 Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "defs.h"
22 #include "gdbcore.h"
23 #include "gdb_string.h"
24 #include "regcache.h"
25 #include "mn10300-tdep.h"
26 #include "gdb_assert.h"
27 #include "bfd.h"
28 #include "elf-bfd.h"
29 #include "osabi.h"
30 #include "regset.h"
31 #include "solib-svr4.h"
32 #include "frame.h"
33 #include "trad-frame.h"
34 #include "tramp-frame.h"
36 #include <stdlib.h>
38 /* Transliterated from <asm-mn10300/elf.h>... */
39 #define MN10300_ELF_NGREG 28
40 #define MN10300_ELF_NFPREG 32
42 typedef gdb_byte mn10300_elf_greg_t[4];
43 typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
45 typedef gdb_byte mn10300_elf_fpreg_t[4];
46 typedef struct
48 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
49 gdb_byte fpcr[4];
50 } mn10300_elf_fpregset_t;
52 /* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
53 #define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
54 #define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
55 #define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
56 #define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
57 #define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
58 #define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
59 #define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
60 #define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
61 #define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
62 #define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
63 #define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
64 #define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
65 #define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
66 #define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
67 #define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
68 #define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
69 #define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
70 #define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
71 #define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
72 #define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
73 #define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
74 #define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
75 #define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
76 #define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
77 #define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
78 #define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
79 #define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
81 /* New gdbarch API for corefile registers.
82 Given a section name and size, create a struct reg object
83 with a supply_register and a collect_register method. */
85 /* Copy register value of REGNUM from regset to regcache.
86 If REGNUM is -1, do this for all gp registers in regset. */
88 static void
89 am33_supply_gregset_method (const struct regset *regset,
90 struct regcache *regcache,
91 int regnum, const void *gregs, size_t len)
93 char zerobuf[MAX_REGISTER_SIZE];
94 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
95 int i;
97 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
99 switch (regnum) {
100 case E_D0_REGNUM:
101 regcache_raw_supply (regcache, E_D0_REGNUM,
102 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
103 break;
104 case E_D1_REGNUM:
105 regcache_raw_supply (regcache, E_D1_REGNUM,
106 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
107 break;
108 case E_D2_REGNUM:
109 regcache_raw_supply (regcache, E_D2_REGNUM,
110 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
111 break;
112 case E_D3_REGNUM:
113 regcache_raw_supply (regcache, E_D3_REGNUM,
114 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
115 break;
116 case E_A0_REGNUM:
117 regcache_raw_supply (regcache, E_A0_REGNUM,
118 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
119 break;
120 case E_A1_REGNUM:
121 regcache_raw_supply (regcache, E_A1_REGNUM,
122 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
123 break;
124 case E_A2_REGNUM:
125 regcache_raw_supply (regcache, E_A2_REGNUM,
126 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
127 break;
128 case E_A3_REGNUM:
129 regcache_raw_supply (regcache, E_A3_REGNUM,
130 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
131 break;
132 case E_SP_REGNUM:
133 regcache_raw_supply (regcache, E_SP_REGNUM,
134 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
135 break;
136 case E_PC_REGNUM:
137 regcache_raw_supply (regcache, E_PC_REGNUM,
138 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
139 break;
140 case E_MDR_REGNUM:
141 regcache_raw_supply (regcache, E_MDR_REGNUM,
142 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
143 break;
144 case E_PSW_REGNUM:
145 regcache_raw_supply (regcache, E_PSW_REGNUM,
146 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
147 break;
148 case E_LIR_REGNUM:
149 regcache_raw_supply (regcache, E_LIR_REGNUM,
150 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
151 break;
152 case E_LAR_REGNUM:
153 regcache_raw_supply (regcache, E_LAR_REGNUM,
154 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
155 break;
156 case E_MDRQ_REGNUM:
157 regcache_raw_supply (regcache, E_MDRQ_REGNUM,
158 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
159 break;
160 case E_E0_REGNUM:
161 regcache_raw_supply (regcache, E_E0_REGNUM,
162 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
163 break;
164 case E_E1_REGNUM:
165 regcache_raw_supply (regcache, E_E1_REGNUM,
166 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
167 break;
168 case E_E2_REGNUM:
169 regcache_raw_supply (regcache, E_E2_REGNUM,
170 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
171 break;
172 case E_E3_REGNUM:
173 regcache_raw_supply (regcache, E_E3_REGNUM,
174 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
175 break;
176 case E_E4_REGNUM:
177 regcache_raw_supply (regcache, E_E4_REGNUM,
178 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
179 break;
180 case E_E5_REGNUM:
181 regcache_raw_supply (regcache, E_E5_REGNUM,
182 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
183 break;
184 case E_E6_REGNUM:
185 regcache_raw_supply (regcache, E_E6_REGNUM,
186 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
187 break;
188 case E_E7_REGNUM:
189 regcache_raw_supply (regcache, E_E7_REGNUM,
190 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
191 break;
193 /* ssp, msp, and usp are inaccessible. */
194 case E_E8_REGNUM:
195 memset (zerobuf, 0, MAX_REGISTER_SIZE);
196 regcache_raw_supply (regcache, E_E8_REGNUM, zerobuf);
197 break;
198 case E_E9_REGNUM:
199 memset (zerobuf, 0, MAX_REGISTER_SIZE);
200 regcache_raw_supply (regcache, E_E9_REGNUM, zerobuf);
201 break;
202 case E_E10_REGNUM:
203 memset (zerobuf, 0, MAX_REGISTER_SIZE);
204 regcache_raw_supply (regcache, E_E10_REGNUM, zerobuf);
206 break;
207 case E_MCRH_REGNUM:
208 regcache_raw_supply (regcache, E_MCRH_REGNUM,
209 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
210 break;
211 case E_MCRL_REGNUM:
212 regcache_raw_supply (regcache, E_MCRL_REGNUM,
213 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
214 break;
215 case E_MCVF_REGNUM:
216 regcache_raw_supply (regcache, E_MCVF_REGNUM,
217 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
218 break;
219 case E_FPCR_REGNUM:
220 /* FPCR is numbered among the GP regs, but handled as an FP reg.
221 Do nothing. */
222 break;
223 case E_FPCR_REGNUM + 1:
224 /* The two unused registers beyond fpcr are inaccessible. */
225 memset (zerobuf, 0, MAX_REGISTER_SIZE);
226 regcache_raw_supply (regcache, E_FPCR_REGNUM + 1, zerobuf);
227 break;
228 case E_FPCR_REGNUM + 2:
229 memset (zerobuf, 0, MAX_REGISTER_SIZE);
230 regcache_raw_supply (regcache, E_FPCR_REGNUM + 2, zerobuf);
231 break;
232 default: /* An error, obviously, but should we error out? */
233 break;
234 case -1:
235 for (i = 0; i < MN10300_ELF_NGREG; i++)
236 am33_supply_gregset_method (regset, regcache, i, gregs, len);
237 break;
239 return;
242 /* Copy fp register value of REGNUM from regset to regcache.
243 If REGNUM is -1, do this for all fp registers in regset. */
245 static void
246 am33_supply_fpregset_method (const struct regset *regset,
247 struct regcache *regcache,
248 int regnum, const void *fpregs, size_t len)
250 const mn10300_elf_fpregset_t *fpregset = fpregs;
252 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
254 if (regnum == -1)
256 int i;
258 for (i = 0; i < MN10300_ELF_NFPREG; i++)
259 am33_supply_fpregset_method (regset, regcache,
260 E_FS0_REGNUM + i, fpregs, len);
261 am33_supply_fpregset_method (regset, regcache,
262 E_FPCR_REGNUM, fpregs, len);
264 else if (regnum == E_FPCR_REGNUM)
265 regcache_raw_supply (regcache, E_FPCR_REGNUM,
266 &fpregset->fpcr);
267 else if (E_FS0_REGNUM <= regnum && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
268 regcache_raw_supply (regcache, regnum,
269 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
271 return;
274 /* Copy register values from regcache to regset. */
276 static void
277 am33_collect_gregset_method (const struct regset *regset,
278 const struct regcache *regcache,
279 int regnum, void *gregs, size_t len)
281 mn10300_elf_gregset_t *regp = gregs;
282 int i;
284 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
286 switch (regnum) {
287 case E_D0_REGNUM:
288 regcache_raw_collect (regcache, E_D0_REGNUM,
289 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
290 break;
291 case E_D1_REGNUM:
292 regcache_raw_collect (regcache, E_D1_REGNUM,
293 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
294 break;
295 case E_D2_REGNUM:
296 regcache_raw_collect (regcache, E_D2_REGNUM,
297 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
298 break;
299 case E_D3_REGNUM:
300 regcache_raw_collect (regcache, E_D3_REGNUM,
301 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
302 break;
303 case E_A0_REGNUM:
304 regcache_raw_collect (regcache, E_A0_REGNUM,
305 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
306 break;
307 case E_A1_REGNUM:
308 regcache_raw_collect (regcache, E_A1_REGNUM,
309 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
310 break;
311 case E_A2_REGNUM:
312 regcache_raw_collect (regcache, E_A2_REGNUM,
313 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
314 break;
315 case E_A3_REGNUM:
316 regcache_raw_collect (regcache, E_A3_REGNUM,
317 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
318 break;
319 case E_SP_REGNUM:
320 regcache_raw_collect (regcache, E_SP_REGNUM,
321 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
322 break;
323 case E_PC_REGNUM:
324 regcache_raw_collect (regcache, E_PC_REGNUM,
325 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
326 break;
327 case E_MDR_REGNUM:
328 regcache_raw_collect (regcache, E_MDR_REGNUM,
329 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
330 break;
331 case E_PSW_REGNUM:
332 regcache_raw_collect (regcache, E_PSW_REGNUM,
333 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
334 break;
335 case E_LIR_REGNUM:
336 regcache_raw_collect (regcache, E_LIR_REGNUM,
337 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
338 break;
339 case E_LAR_REGNUM:
340 regcache_raw_collect (regcache, E_LAR_REGNUM,
341 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
342 break;
343 case E_MDRQ_REGNUM:
344 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
345 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
346 break;
347 case E_E0_REGNUM:
348 regcache_raw_collect (regcache, E_E0_REGNUM,
349 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
350 break;
351 case E_E1_REGNUM:
352 regcache_raw_collect (regcache, E_E1_REGNUM,
353 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
354 break;
355 case E_E2_REGNUM:
356 regcache_raw_collect (regcache, E_E2_REGNUM,
357 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
358 break;
359 case E_E3_REGNUM:
360 regcache_raw_collect (regcache, E_E3_REGNUM,
361 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
362 break;
363 case E_E4_REGNUM:
364 regcache_raw_collect (regcache, E_E4_REGNUM,
365 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
366 break;
367 case E_E5_REGNUM:
368 regcache_raw_collect (regcache, E_E5_REGNUM,
369 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
370 break;
371 case E_E6_REGNUM:
372 regcache_raw_collect (regcache, E_E6_REGNUM,
373 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
374 break;
375 case E_E7_REGNUM:
376 regcache_raw_collect (regcache, E_E7_REGNUM,
377 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
378 break;
380 /* ssp, msp, and usp are inaccessible. */
381 case E_E8_REGNUM:
382 /* The gregset struct has noplace to put this: do nothing. */
383 break;
384 case E_E9_REGNUM:
385 /* The gregset struct has noplace to put this: do nothing. */
386 break;
387 case E_E10_REGNUM:
388 /* The gregset struct has noplace to put this: do nothing. */
389 break;
390 case E_MCRH_REGNUM:
391 regcache_raw_collect (regcache, E_MCRH_REGNUM,
392 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
393 break;
394 case E_MCRL_REGNUM:
395 regcache_raw_collect (regcache, E_MCRL_REGNUM,
396 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
397 break;
398 case E_MCVF_REGNUM:
399 regcache_raw_collect (regcache, E_MCVF_REGNUM,
400 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
401 break;
402 case E_FPCR_REGNUM:
403 /* FPCR is numbered among the GP regs, but handled as an FP reg.
404 Do nothing. */
405 break;
406 case E_FPCR_REGNUM + 1:
407 /* The gregset struct has noplace to put this: do nothing. */
408 break;
409 case E_FPCR_REGNUM + 2:
410 /* The gregset struct has noplace to put this: do nothing. */
411 break;
412 default: /* An error, obviously, but should we error out? */
413 break;
414 case -1:
415 for (i = 0; i < MN10300_ELF_NGREG; i++)
416 am33_collect_gregset_method (regset, regcache, i, gregs, len);
417 break;
419 return;
422 /* Copy fp register values from regcache to regset. */
424 static void
425 am33_collect_fpregset_method (const struct regset *regset,
426 const struct regcache *regcache,
427 int regnum, void *fpregs, size_t len)
429 mn10300_elf_fpregset_t *fpregset = fpregs;
431 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
433 if (regnum == -1)
435 int i;
436 for (i = 0; i < MN10300_ELF_NFPREG; i++)
437 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
438 fpregs, len);
439 am33_collect_fpregset_method (regset, regcache,
440 E_FPCR_REGNUM, fpregs, len);
442 else if (regnum == E_FPCR_REGNUM)
443 regcache_raw_collect (regcache, E_FPCR_REGNUM,
444 &fpregset->fpcr);
445 else if (E_FS0_REGNUM <= regnum
446 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
447 regcache_raw_collect (regcache, regnum,
448 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
450 return;
453 /* Create a struct regset from a corefile register section. */
455 static const struct regset *
456 am33_regset_from_core_section (struct gdbarch *gdbarch,
457 const char *sect_name,
458 size_t sect_size)
460 /* We will call regset_alloc, and pass the names of the supply and
461 collect methods. */
463 if (sect_size == sizeof (mn10300_elf_fpregset_t))
464 return regset_alloc (gdbarch,
465 am33_supply_fpregset_method,
466 am33_collect_fpregset_method);
467 else
468 return regset_alloc (gdbarch,
469 am33_supply_gregset_method,
470 am33_collect_gregset_method);
473 static void
474 am33_linux_sigframe_cache_init (const struct tramp_frame *self,
475 struct frame_info *next_frame,
476 struct trad_frame_cache *this_cache,
477 CORE_ADDR func);
479 static const struct tramp_frame am33_linux_sigframe = {
480 SIGTRAMP_FRAME,
483 /* mov 119,d0 */
484 { 0x2c, -1 },
485 { 0x77, -1 },
486 { 0x00, -1 },
487 /* syscall 0 */
488 { 0xf0, -1 },
489 { 0xe0, -1 },
490 { TRAMP_SENTINEL_INSN, -1 }
492 am33_linux_sigframe_cache_init
495 static const struct tramp_frame am33_linux_rt_sigframe = {
496 SIGTRAMP_FRAME,
499 /* mov 173,d0 */
500 { 0x2c, -1 },
501 { 0xad, -1 },
502 { 0x00, -1 },
503 /* syscall 0 */
504 { 0xf0, -1 },
505 { 0xe0, -1 },
506 { TRAMP_SENTINEL_INSN, -1 }
508 am33_linux_sigframe_cache_init
511 /* Relevant struct definitions for signal handling...
513 From arch/mn10300/kernel/sigframe.h:
515 struct sigframe
517 void (*pretcode)(void);
518 int sig;
519 struct sigcontext *psc;
520 struct sigcontext sc;
521 struct fpucontext fpuctx;
522 unsigned long extramask[_NSIG_WORDS-1];
523 char retcode[8];
526 struct rt_sigframe
528 void (*pretcode)(void);
529 int sig;
530 struct siginfo *pinfo;
531 void *puc;
532 struct siginfo info;
533 struct ucontext uc;
534 struct fpucontext fpuctx;
535 char retcode[8];
538 From include/asm-mn10300/ucontext.h:
540 struct ucontext {
541 unsigned long uc_flags;
542 struct ucontext *uc_link;
543 stack_t uc_stack;
544 struct sigcontext uc_mcontext;
545 sigset_t uc_sigmask;
548 From include/asm-mn10300/sigcontext.h:
550 struct fpucontext {
551 unsigned long fs[32];
552 unsigned long fpcr;
555 struct sigcontext {
556 unsigned long d0;
557 unsigned long d1;
558 unsigned long d2;
559 unsigned long d3;
560 unsigned long a0;
561 unsigned long a1;
562 unsigned long a2;
563 unsigned long a3;
564 unsigned long e0;
565 unsigned long e1;
566 unsigned long e2;
567 unsigned long e3;
568 unsigned long e4;
569 unsigned long e5;
570 unsigned long e6;
571 unsigned long e7;
572 unsigned long lar;
573 unsigned long lir;
574 unsigned long mdr;
575 unsigned long mcvf;
576 unsigned long mcrl;
577 unsigned long mcrh;
578 unsigned long mdrq;
579 unsigned long sp;
580 unsigned long epsw;
581 unsigned long pc;
582 struct fpucontext *fpucontext;
583 unsigned long oldmask;
584 }; */
587 #define AM33_SIGCONTEXT_D0 0
588 #define AM33_SIGCONTEXT_D1 4
589 #define AM33_SIGCONTEXT_D2 8
590 #define AM33_SIGCONTEXT_D3 12
591 #define AM33_SIGCONTEXT_A0 16
592 #define AM33_SIGCONTEXT_A1 20
593 #define AM33_SIGCONTEXT_A2 24
594 #define AM33_SIGCONTEXT_A3 28
595 #define AM33_SIGCONTEXT_E0 32
596 #define AM33_SIGCONTEXT_E1 36
597 #define AM33_SIGCONTEXT_E2 40
598 #define AM33_SIGCONTEXT_E3 44
599 #define AM33_SIGCONTEXT_E4 48
600 #define AM33_SIGCONTEXT_E5 52
601 #define AM33_SIGCONTEXT_E6 56
602 #define AM33_SIGCONTEXT_E7 60
603 #define AM33_SIGCONTEXT_LAR 64
604 #define AM33_SIGCONTEXT_LIR 68
605 #define AM33_SIGCONTEXT_MDR 72
606 #define AM33_SIGCONTEXT_MCVF 76
607 #define AM33_SIGCONTEXT_MCRL 80
608 #define AM33_SIGCONTEXT_MCRH 84
609 #define AM33_SIGCONTEXT_MDRQ 88
610 #define AM33_SIGCONTEXT_SP 92
611 #define AM33_SIGCONTEXT_EPSW 96
612 #define AM33_SIGCONTEXT_PC 100
613 #define AM33_SIGCONTEXT_FPUCONTEXT 104
616 static void
617 am33_linux_sigframe_cache_init (const struct tramp_frame *self,
618 struct frame_info *next_frame,
619 struct trad_frame_cache *this_cache,
620 CORE_ADDR func)
622 CORE_ADDR sc_base, fpubase;
623 int i;
625 sc_base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
626 if (self == &am33_linux_sigframe)
628 sc_base += 8;
629 sc_base = get_frame_memory_unsigned (next_frame, sc_base, 4);
631 else
633 sc_base += 12;
634 sc_base = get_frame_memory_unsigned (next_frame, sc_base, 4);
635 sc_base += 20;
638 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
639 sc_base + AM33_SIGCONTEXT_D0);
640 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
641 sc_base + AM33_SIGCONTEXT_D1);
642 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
643 sc_base + AM33_SIGCONTEXT_D2);
644 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
645 sc_base + AM33_SIGCONTEXT_D3);
647 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
648 sc_base + AM33_SIGCONTEXT_A0);
649 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
650 sc_base + AM33_SIGCONTEXT_A1);
651 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
652 sc_base + AM33_SIGCONTEXT_A2);
653 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
654 sc_base + AM33_SIGCONTEXT_A3);
656 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
657 sc_base + AM33_SIGCONTEXT_E0);
658 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
659 sc_base + AM33_SIGCONTEXT_E1);
660 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
661 sc_base + AM33_SIGCONTEXT_E2);
662 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
663 sc_base + AM33_SIGCONTEXT_E3);
664 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
665 sc_base + AM33_SIGCONTEXT_E4);
666 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
667 sc_base + AM33_SIGCONTEXT_E5);
668 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
669 sc_base + AM33_SIGCONTEXT_E6);
670 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
671 sc_base + AM33_SIGCONTEXT_E7);
673 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
674 sc_base + AM33_SIGCONTEXT_LAR);
675 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
676 sc_base + AM33_SIGCONTEXT_LIR);
677 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
678 sc_base + AM33_SIGCONTEXT_MDR);
679 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
680 sc_base + AM33_SIGCONTEXT_MCVF);
681 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
682 sc_base + AM33_SIGCONTEXT_MCRL);
683 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
684 sc_base + AM33_SIGCONTEXT_MDRQ);
686 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
687 sc_base + AM33_SIGCONTEXT_SP);
688 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
689 sc_base + AM33_SIGCONTEXT_EPSW);
690 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
691 sc_base + AM33_SIGCONTEXT_PC);
693 fpubase = get_frame_memory_unsigned (next_frame,
694 sc_base + AM33_SIGCONTEXT_FPUCONTEXT, 4);
695 if (fpubase)
697 for (i = 0; i < 32; i++)
699 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
700 fpubase + 4 * i);
702 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
705 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
708 /* AM33 GNU/Linux osabi has been recognized.
709 Now's our chance to register our corefile handling. */
711 static void
712 am33_linux_init_osabi (struct gdbarch_info gdbinfo, struct gdbarch *gdbarch)
714 set_gdbarch_regset_from_core_section (gdbarch,
715 am33_regset_from_core_section);
716 set_solib_svr4_fetch_link_map_offsets
717 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
719 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
720 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
723 void
724 _initialize_mn10300_linux_tdep (void)
726 gdbarch_register_osabi (bfd_arch_mn10300, 0,
727 GDB_OSABI_LINUX, am33_linux_init_osabi);