cxgbe/t4_tom: Read the chip's DDP page sizes and save them in a
[freebsd-src.git] / sys / sparc64 / include / param.h
blob46bacae360b3c63b40b5c78a505729869fd35e64
1 /*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
29 * from: @(#)param.h 5.8 (Berkeley) 6/28/91
30 * $FreeBSD$
33 #ifndef _SPARC64_INCLUDE_PARAM_H_
34 #define _SPARC64_INCLUDE_PARAM_H_
37 * Machine dependent constants for sparc64.
40 #include <machine/_align.h>
42 #define __PCI_BAR_ZERO_VALID
44 #ifndef MACHINE
45 #define MACHINE "sparc64"
46 #endif
47 #ifndef MACHINE_ARCH
48 #define MACHINE_ARCH "sparc64"
49 #endif
50 #define MID_MACHINE MID_SPARC64
52 #if defined(SMP) || defined(KLD_MODULE)
53 #ifndef MAXCPU
54 #define MAXCPU 64
55 #endif
56 #else
57 #define MAXCPU 1
58 #endif /* SMP || KLD_MODULE */
60 #ifndef MAXMEMDOM
61 #define MAXMEMDOM 1
62 #endif
64 #define INT_SHIFT 2
65 #define PTR_SHIFT 3
67 #define ALIGNBYTES _ALIGNBYTES
68 #define ALIGN(p) _ALIGN(p)
70 * ALIGNED_POINTER is a boolean macro that checks whether an address
71 * is valid to fetch data elements of type t from on this architecture.
72 * This does not reflect the optimal alignment, just the possibility
73 * (within reasonable limits).
75 #define ALIGNED_POINTER(p, t) ((((u_long)(p)) & (sizeof (t) - 1)) == 0)
78 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
79 * architecture. It should be used with appropriate caution.
81 #define CACHE_LINE_SHIFT 7
82 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
84 #define PAGE_SHIFT_8K 13
85 #define PAGE_SIZE_8K (1L<<PAGE_SHIFT_8K)
86 #define PAGE_MASK_8K (PAGE_SIZE_8K-1)
88 #define PAGE_SHIFT_64K 16
89 #define PAGE_SIZE_64K (1L<<PAGE_SHIFT_64K)
90 #define PAGE_MASK_64K (PAGE_SIZE_64K-1)
92 #define PAGE_SHIFT_512K 19
93 #define PAGE_SIZE_512K (1L<<PAGE_SHIFT_512K)
94 #define PAGE_MASK_512K (PAGE_SIZE_512K-1)
96 #define PAGE_SHIFT_4M 22
97 #define PAGE_SIZE_4M (1L<<PAGE_SHIFT_4M)
98 #define PAGE_MASK_4M (PAGE_SIZE_4M-1)
100 #define PAGE_SHIFT_32M 25
101 #define PAGE_SIZE_32M (1L<<PAGE_SHIFT_32M)
102 #define PAGE_MASK_32M (PAGE_SIZE_32M-1)
104 #define PAGE_SHIFT_256M 28
105 #define PAGE_SIZE_256M (1L<<PAGE_SHIFT_256M)
106 #define PAGE_MASK_256M (PAGE_SIZE_256M-1)
108 #define PAGE_SHIFT_MIN PAGE_SHIFT_8K
109 #define PAGE_SIZE_MIN PAGE_SIZE_8K
110 #define PAGE_MASK_MIN PAGE_MASK_8K
111 #define PAGE_SHIFT PAGE_SHIFT_8K /* LOG2(PAGE_SIZE) */
112 #define PAGE_SIZE PAGE_SIZE_8K /* bytes/page */
113 #define PAGE_MASK PAGE_MASK_8K
114 #define PAGE_SHIFT_MAX PAGE_SHIFT_4M
115 #define PAGE_SIZE_MAX PAGE_SIZE_4M
116 #define PAGE_MASK_MAX PAGE_MASK_4M
118 #define MAXPAGESIZES 1 /* maximum number of supported page sizes */
120 #ifndef KSTACK_PAGES
121 #define KSTACK_PAGES 4 /* pages of kernel stack (with pcb) */
122 #endif
123 #define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */
124 #define PCPU_PAGES 1
127 * Ceiling on size of buffer cache (really only effects write queueing,
128 * the VM page cache is not effected), can be changed via
129 * the kern.maxbcache /boot/loader.conf variable.
131 #ifndef VM_BCACHE_SIZE_MAX
132 #define VM_BCACHE_SIZE_MAX (400 * 1024 * 1024)
133 #endif
136 * Mach derived conversion macros
138 #define round_page(x) (((unsigned long)(x) + PAGE_MASK) & ~PAGE_MASK)
139 #define trunc_page(x) ((unsigned long)(x) & ~PAGE_MASK)
141 #define atop(x) ((unsigned long)(x) >> PAGE_SHIFT)
142 #define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT)
144 #define sparc64_btop(x) ((unsigned long)(x) >> PAGE_SHIFT)
145 #define sparc64_ptob(x) ((unsigned long)(x) << PAGE_SHIFT)
147 #define pgtok(x) ((unsigned long)(x) * (PAGE_SIZE / 1024))
149 #ifdef _KERNEL
150 #define NO_FUEWORD 1
151 #endif
153 #endif /* !_SPARC64_INCLUDE_PARAM_H_ */