drivers/net/wireless/iwlwifi/iwl-5000.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007-2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  23  *
  24  *****************************************************************************/
  25
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/version.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-4965.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-5000-hw.h"
  46
  47 #define IWL5000_UCODE_API  "-1"
  48
  49 static int iwl5000_apm_init(struct iwl_priv *priv)
  50 {
  51         int ret = 0;
  52
  53         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  54                     CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  55
  56         iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
  57
  58         /* set "initialization complete" bit to move adapter
  59          * D0U* --> D0A* state */
  60         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  61
  62         /* wait for clock stabilization */
  63         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  64                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  65                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  66         if (ret < 0) {
  67                 IWL_DEBUG_INFO("Failed to init the card\n");
  68                 return ret;
  69         }
  70
  71         ret = iwl_grab_nic_access(priv);
  72         if (ret)
  73                 return ret;
  74
  75         /* enable DMA */
  76         iwl_write_prph(priv, APMG_CLK_EN_REG,
  77                         APMG_CLK_VAL_DMA_CLK_RQT);
  78
  79         udelay(20);
  80
  81         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  82                         APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  83
  84         iwl_release_nic_access(priv);
  85
  86         return ret;
  87 }
  88
  89 /*
  90  * EEPROM
  91  */
  92 static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
  93 {
  94         u16 offset = 0;
  95
  96         if ((address & INDIRECT_ADDRESS) == 0)
  97                 return address;
  98
  99         switch (address & INDIRECT_TYPE_MSK) {
 100         case INDIRECT_HOST:
 101                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_HOST);
 102                 break;
 103         case INDIRECT_GENERAL:
 104                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_GENERAL);
 105                 break;
 106         case INDIRECT_REGULATORY:
 107                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_REGULATORY);
 108                 break;
 109         case INDIRECT_CALIBRATION:
 110                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_CALIBRATION);
 111                 break;
 112         case INDIRECT_PROCESS_ADJST:
 113                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_PROCESS_ADJST);
 114                 break;
 115         case INDIRECT_OTHERS:
 116                 offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_OTHERS);
 117                 break;
 118         default:
 119                 IWL_ERROR("illegal indirect type: 0x%X\n",
 120                 address & INDIRECT_TYPE_MSK);
 121                 break;
 122         }
 123
 124         /* translate the offset from words to byte */
 125         return (address & ADDRESS_MSK) + (offset << 1);
 126 }
 127
 128 static int iwl5000_eeprom_check_version(struct iwl_priv *priv)
 129 {
 130         u16 eeprom_ver;
 131         struct iwl_eeprom_calib_hdr {
 132                 u8 version;
 133                 u8 pa_type;
 134                 u16 voltage;
 135         } *hdr;
 136
 137         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 138
 139         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 140                                                         EEPROM_5000_CALIB_ALL);
 141
 142         if (eeprom_ver < EEPROM_5000_EEPROM_VERSION ||
 143             hdr->version < EEPROM_5000_TX_POWER_VERSION)
 144                 goto err;
 145
 146         return 0;
 147 err:
 148         IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 149                   eeprom_ver, EEPROM_5000_EEPROM_VERSION,
 150                   hdr->version, EEPROM_5000_TX_POWER_VERSION);
 151         return -EINVAL;
 152
 153 }
 154
 155 #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
 156
 157 static void iwl5000_gain_computation(struct iwl_priv *priv,
 158                 u32 average_noise[NUM_RX_CHAINS],
 159                 u16 min_average_noise_antenna_i,
 160                 u32 min_average_noise)
 161 {
 162         int i;
 163         s32 delta_g;
 164         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 165
 166         /* Find Gain Code for the antennas B and C */
 167         for (i = 1; i < NUM_RX_CHAINS; i++) {
 168                 if ((data->disconn_array[i])) {
 169                         data->delta_gain_code[i] = 0;
 170                         continue;
 171                 }
 172                 delta_g = (1000 * ((s32)average_noise[0] -
 173                         (s32)average_noise[i])) / 1500;
 174                 /* bound gain by 2 bits value max, 3rd bit is sign */
 175                 data->delta_gain_code[i] =
 176                         min(abs(delta_g), CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 177
 178                 if (delta_g < 0)
 179                         /* set negative sign */
 180                         data->delta_gain_code[i] |= (1 << 2);
 181         }
 182
 183         IWL_DEBUG_CALIB("Delta gains: ANT_B = %d  ANT_C = %d\n",
 184                         data->delta_gain_code[1], data->delta_gain_code[2]);
 185
 186         if (!data->radio_write) {
 187                 struct iwl5000_calibration_chain_noise_gain_cmd cmd;
 188                 memset(&cmd, 0, sizeof(cmd));
 189
 190                 cmd.op_code = IWL5000_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD;
 191                 cmd.delta_gain_1 = data->delta_gain_code[1];
 192                 cmd.delta_gain_2 = data->delta_gain_code[2];
 193                 iwl_send_cmd_pdu_async(priv, REPLY_PHY_CALIBRATION_CMD,
 194                         sizeof(cmd), &cmd, NULL);
 195
 196                 data->radio_write = 1;
 197                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 198         }
 199
 200         data->chain_noise_a = 0;
 201         data->chain_noise_b = 0;
 202         data->chain_noise_c = 0;
 203         data->chain_signal_a = 0;
 204         data->chain_signal_b = 0;
 205         data->chain_signal_c = 0;
 206         data->beacon_count = 0;
 207 }
 208
 209
 210 static void iwl5000_chain_noise_reset(struct iwl_priv *priv)
 211 {
 212         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 213
 214         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 215                 struct iwl5000_calibration_chain_noise_reset_cmd cmd;
 216
 217                 memset(&cmd, 0, sizeof(cmd));
 218                 cmd.op_code = IWL5000_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD;
 219                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 220                         sizeof(cmd), &cmd))
 221                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 222                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 223                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 224         }
 225 }
 226
 227 static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
 228         .min_nrg_cck = 95,
 229         .max_nrg_cck = 0,
 230         .auto_corr_min_ofdm = 90,
 231         .auto_corr_min_ofdm_mrc = 170,
 232         .auto_corr_min_ofdm_x1 = 120,
 233         .auto_corr_min_ofdm_mrc_x1 = 240,
 234
 235         .auto_corr_max_ofdm = 120,
 236         .auto_corr_max_ofdm_mrc = 210,
 237         .auto_corr_max_ofdm_x1 = 155,
 238         .auto_corr_max_ofdm_mrc_x1 = 290,
 239
 240         .auto_corr_min_cck = 125,
 241         .auto_corr_max_cck = 200,
 242         .auto_corr_min_cck_mrc = 170,
 243         .auto_corr_max_cck_mrc = 400,
 244         .nrg_th_cck = 95,
 245         .nrg_th_ofdm = 95,
 246 };
 247
 248 #endif /* CONFIG_IWL5000_RUN_TIME_CALIB */
 249
 250 static const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
 251                                            size_t offset)
 252 {
 253         u32 address = eeprom_indirect_address(priv, offset);
 254         BUG_ON(address >= priv->cfg->eeprom_size);
 255         return &priv->eeprom[address];
 256 }
 257
 258 static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
 259 {
 260         if ((priv->cfg->mod_params->num_of_queues > IWL50_NUM_QUEUES) ||
 261             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 262                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 263                           IWL_MIN_NUM_QUEUES, IWL50_NUM_QUEUES);
 264                 return -EINVAL;
 265         }
 266
 267         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 268         priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
 269         priv->hw_params.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
 270         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
 271         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
 272         if (priv->cfg->mod_params->amsdu_size_8K)
 273                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
 274         else
 275                 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
 276         priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
 277         priv->hw_params.max_stations = IWL5000_STATION_COUNT;
 278         priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID;
 279         priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE;
 280         priv->hw_params.max_inst_size = IWL50_RTC_INST_SIZE;
 281         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 282         priv->hw_params.fat_channel =  BIT(IEEE80211_BAND_2GHZ) |
 283                                         BIT(IEEE80211_BAND_5GHZ);
 284 #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
 285         priv->hw_params.sens = &iwl5000_sensitivity;
 286 #endif
 287
 288         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 289         case CSR_HW_REV_TYPE_5100:
 290         case CSR_HW_REV_TYPE_5150:
 291                 priv->hw_params.tx_chains_num = 1;
 292                 priv->hw_params.rx_chains_num = 2;
 293                 /* FIXME: move to ANT_A, ANT_B, ANT_C enum */
 294                 priv->hw_params.valid_tx_ant = ANT_A;
 295                 priv->hw_params.valid_rx_ant = ANT_AB;
 296                 break;
 297         case CSR_HW_REV_TYPE_5300:
 298         case CSR_HW_REV_TYPE_5350:
 299                 priv->hw_params.tx_chains_num = 3;
 300                 priv->hw_params.rx_chains_num = 3;
 301                 priv->hw_params.valid_tx_ant = ANT_ABC;
 302                 priv->hw_params.valid_rx_ant = ANT_ABC;
 303                 break;
 304         }
 305
 306         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 307         case CSR_HW_REV_TYPE_5100:
 308         case CSR_HW_REV_TYPE_5300:
 309                 /* 5X00 wants in Celsius */
 310                 priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD;
 311                 break;
 312         case CSR_HW_REV_TYPE_5150:
 313         case CSR_HW_REV_TYPE_5350:
 314                 /* 5X50 wants in Kelvin */
 315                 priv->hw_params.ct_kill_threshold =
 316                                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 317                 break;
 318         }
 319
 320         return 0;
 321 }
 322
 323 static int iwl5000_alloc_shared_mem(struct iwl_priv *priv)
 324 {
 325         priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
 326                                         sizeof(struct iwl5000_shared),
 327                                         &priv->shared_phys);
 328         if (!priv->shared_virt)
 329                 return -ENOMEM;
 330
 331         memset(priv->shared_virt, 0, sizeof(struct iwl5000_shared));
 332
 333         return 0;
 334 }
 335
 336 static void iwl5000_free_shared_mem(struct iwl_priv *priv)
 337 {
 338         if (priv->shared_virt)
 339                 pci_free_consistent(priv->pci_dev,
 340                                     sizeof(struct iwl5000_shared),
 341                                     priv->shared_virt,
 342                                     priv->shared_phys);
 343 }
 344
 345 /**
 346  * iwl5000_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
 347  */
 348 static void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
 349                                             struct iwl4965_tx_queue *txq,
 350                                             u16 byte_cnt)
 351 {
 352         struct iwl5000_shared *shared_data = priv->shared_virt;
 353         int txq_id = txq->q.id;
 354         u8 sec_ctl = 0;
 355         u8 sta = 0;
 356         int len;
 357
 358         len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
 359
 360         if (txq_id != IWL_CMD_QUEUE_NUM) {
 361                 sta = txq->cmd[txq->q.write_ptr].cmd.tx.sta_id;
 362                 sec_ctl = txq->cmd[txq->q.write_ptr].cmd.tx.sec_ctl;
 363
 364                 switch (sec_ctl & TX_CMD_SEC_MSK) {
 365                 case TX_CMD_SEC_CCM:
 366                         len += CCMP_MIC_LEN;
 367                         break;
 368                 case TX_CMD_SEC_TKIP:
 369                         len += TKIP_ICV_LEN;
 370                         break;
 371                 case TX_CMD_SEC_WEP:
 372                         len += WEP_IV_LEN + WEP_ICV_LEN;
 373                         break;
 374                 }
 375         }
 376
 377         IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
 378                        tfd_offset[txq->q.write_ptr], byte_cnt, len);
 379
 380         IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
 381                        tfd_offset[txq->q.write_ptr], sta_id, sta);
 382
 383         if (txq->q.write_ptr < IWL50_MAX_WIN_SIZE) {
 384                 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
 385                         tfd_offset[IWL50_QUEUE_SIZE + txq->q.write_ptr],
 386                         byte_cnt, len);
 387                 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
 388                         tfd_offset[IWL50_QUEUE_SIZE + txq->q.write_ptr],
 389                         sta_id, sta);
 390         }
 391 }
 392
 393 static struct iwl_hcmd_ops iwl5000_hcmd = {
 394 };
 395
 396 static struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = {
 397 #ifdef CONFIG_IWL5000_RUN_TIME_CALIB
 398         .gain_computation = iwl5000_gain_computation,
 399         .chain_noise_reset = iwl5000_chain_noise_reset,
 400 #endif
 401 };
 402
 403 static struct iwl_lib_ops iwl5000_lib = {
 404         .set_hw_params = iwl5000_hw_set_hw_params,
 405         .alloc_shared_mem = iwl5000_alloc_shared_mem,
 406         .free_shared_mem = iwl5000_free_shared_mem,
 407         .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl,
 408         .apm_ops = {
 409                 .init = iwl5000_apm_init,
 410                 .set_pwr_src = iwl4965_set_pwr_src,
 411         },
 412         .eeprom_ops = {
 413                 .regulatory_bands = {
 414                         EEPROM_5000_REG_BAND_1_CHANNELS,
 415                         EEPROM_5000_REG_BAND_2_CHANNELS,
 416                         EEPROM_5000_REG_BAND_3_CHANNELS,
 417                         EEPROM_5000_REG_BAND_4_CHANNELS,
 418                         EEPROM_5000_REG_BAND_5_CHANNELS,
 419                         EEPROM_5000_REG_BAND_24_FAT_CHANNELS,
 420                         EEPROM_5000_REG_BAND_52_FAT_CHANNELS
 421                 },
 422                 .verify_signature  = iwlcore_eeprom_verify_signature,
 423                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
 424                 .release_semaphore = iwlcore_eeprom_release_semaphore,
 425                 .check_version  = iwl5000_eeprom_check_version,
 426                 .query_addr = iwl5000_eeprom_query_addr,
 427         },
 428 };
 429
 430 static struct iwl_ops iwl5000_ops = {
 431         .lib = &iwl5000_lib,
 432         .hcmd = &iwl5000_hcmd,
 433         .utils = &iwl5000_hcmd_utils,
 434 };
 435
 436 static struct iwl_mod_params iwl50_mod_params = {
 437         .num_of_queues = IWL50_NUM_QUEUES,
 438         .enable_qos = 1,
 439         .amsdu_size_8K = 1,
 440         /* the rest are 0 by default */
 441 };
 442
 443
 444 struct iwl_cfg iwl5300_agn_cfg = {
 445         .name = "5300AGN",
 446         .fw_name = "iwlwifi-5000" IWL5000_UCODE_API ".ucode",
 447         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
 448         .ops = &iwl5000_ops,
 449         .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
 450         .mod_params = &iwl50_mod_params,
 451 };
 452
 453 struct iwl_cfg iwl5100_agn_cfg = {
 454         .name = "5100AGN",
 455         .fw_name = "iwlwifi-5000" IWL5000_UCODE_API ".ucode",
 456         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
 457         .ops = &iwl5000_ops,
 458         .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
 459         .mod_params = &iwl50_mod_params,
 460 };
 461
 462 struct iwl_cfg iwl5350_agn_cfg = {
 463         .name = "5350AGN",
 464         .fw_name = "iwlwifi-5000" IWL5000_UCODE_API ".ucode",
 465         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
 466         .ops = &iwl5000_ops,
 467         .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
 468         .mod_params = &iwl50_mod_params,
 469 };
 470
 471 module_param_named(disable50, iwl50_mod_params.disable, int, 0444);
 472 MODULE_PARM_DESC(disable50,
 473                   "manually disable the 50XX radio (default 0 [radio on])");
 474 module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, 0444);
 475 MODULE_PARM_DESC(swcrypto50,
 476                   "using software crypto engine (default 0 [hardware])\n");
 477 module_param_named(debug50, iwl50_mod_params.debug, int, 0444);
 478 MODULE_PARM_DESC(debug50, "50XX debug output mask");
 479 module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, 0444);
 480 MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series");
 481 module_param_named(qos_enable50, iwl50_mod_params.enable_qos, int, 0444);
 482 MODULE_PARM_DESC(qos_enable50, "enable all 50XX QoS functionality");
 483 module_param_named(amsdu_size_8K50, iwl50_mod_params.amsdu_size_8K, int, 0444);
 484 MODULE_PARM_DESC(amsdu_size_8K50, "enable 8K amsdu size in 50XX series");
 485
 486