2 * linux/arch/x86-64/kernel/time.c
4 * "High Precision Event Timer" based timekeeping.
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002,2006 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/notifier.h>
28 #include <linux/cpu.h>
29 #include <linux/kallsyms.h>
30 #include <linux/acpi.h>
32 #include <acpi/achware.h> /* for PM timer frequency */
33 #include <acpi/acpi_bus.h>
35 #include <asm/8253pit.h>
36 #include <asm/pgtable.h>
37 #include <asm/vsyscall.h>
38 #include <asm/timex.h>
39 #include <asm/proto.h>
41 #include <asm/sections.h>
42 #include <linux/hpet.h>
45 #include <asm/mpspec.h>
47 #include <asm/vgtod.h>
49 static char *timename
= NULL
;
51 DEFINE_SPINLOCK(rtc_lock
);
52 EXPORT_SYMBOL(rtc_lock
);
53 DEFINE_SPINLOCK(i8253_lock
);
55 volatile unsigned long __jiffies __section_jiffies
= INITIAL_JIFFIES
;
57 unsigned long profile_pc(struct pt_regs
*regs
)
59 unsigned long pc
= instruction_pointer(regs
);
61 /* Assume the lock function has either no stack frame or a copy
63 Eflags always has bits 22 and up cleared unlike kernel addresses. */
64 if (!user_mode(regs
) && in_lock_functions(pc
)) {
65 unsigned long *sp
= (unsigned long *)regs
->rsp
;
73 EXPORT_SYMBOL(profile_pc
);
76 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
77 * ms after the second nowtime has started, because when nowtime is written
78 * into the registers of the CMOS clock, it will jump to the next second
79 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
83 static int set_rtc_mmss(unsigned long nowtime
)
86 int real_seconds
, real_minutes
, cmos_minutes
;
87 unsigned char control
, freq_select
;
90 * IRQs are disabled when we're called from the timer interrupt,
91 * no need for spin_lock_irqsave()
97 * Tell the clock it's being set and stop it.
100 control
= CMOS_READ(RTC_CONTROL
);
101 CMOS_WRITE(control
| RTC_SET
, RTC_CONTROL
);
103 freq_select
= CMOS_READ(RTC_FREQ_SELECT
);
104 CMOS_WRITE(freq_select
| RTC_DIV_RESET2
, RTC_FREQ_SELECT
);
106 cmos_minutes
= CMOS_READ(RTC_MINUTES
);
107 BCD_TO_BIN(cmos_minutes
);
110 * since we're only adjusting minutes and seconds, don't interfere with hour
111 * overflow. This avoids messing with unknown time zones but requires your RTC
112 * not to be off by more than 15 minutes. Since we're calling it only when
113 * our clock is externally synchronized using NTP, this shouldn't be a problem.
116 real_seconds
= nowtime
% 60;
117 real_minutes
= nowtime
/ 60;
118 if (((abs(real_minutes
- cmos_minutes
) + 15) / 30) & 1)
119 real_minutes
+= 30; /* correct for half hour time zone */
122 if (abs(real_minutes
- cmos_minutes
) >= 30) {
123 printk(KERN_WARNING
"time.c: can't update CMOS clock "
124 "from %d to %d\n", cmos_minutes
, real_minutes
);
127 BIN_TO_BCD(real_seconds
);
128 BIN_TO_BCD(real_minutes
);
129 CMOS_WRITE(real_seconds
, RTC_SECONDS
);
130 CMOS_WRITE(real_minutes
, RTC_MINUTES
);
134 * The following flags have to be released exactly in this order, otherwise the
135 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
136 * not reset the oscillator and will not update precisely 500 ms later. You
137 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
138 * believes data sheets anyway ... -- Markus Kuhn
141 CMOS_WRITE(control
, RTC_CONTROL
);
142 CMOS_WRITE(freq_select
, RTC_FREQ_SELECT
);
144 spin_unlock(&rtc_lock
);
149 int update_persistent_clock(struct timespec now
)
151 return set_rtc_mmss(now
.tv_sec
);
154 void main_timer_handler(void)
157 * Here we are in the timer irq handler. We have irqs locally disabled (so we
158 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
159 * on the other CPU, so we need a lock. We also need to lock the vsyscall
160 * variables, because both do_timer() and us change them -arca+vojtech
163 write_seqlock(&xtime_lock
);
166 * Do the timer stuff.
171 update_process_times(user_mode(get_irq_regs()));
175 * In the SMP case we use the local APIC timer interrupt to do the profiling,
176 * except when we simulate SMP mode on a uniprocessor system, in that case we
177 * have to call the local interrupt handler.
180 if (!using_apic_timer
)
181 smp_local_timer_interrupt();
183 write_sequnlock(&xtime_lock
);
186 static irqreturn_t
timer_interrupt(int irq
, void *dev_id
)
188 if (apic_runs_main_timer
> 1)
190 main_timer_handler();
191 if (using_apic_timer
)
192 smp_send_timer_broadcast_ipi();
196 unsigned long read_persistent_clock(void)
198 unsigned int year
, mon
, day
, hour
, min
, sec
;
200 unsigned century
= 0;
202 spin_lock_irqsave(&rtc_lock
, flags
);
205 sec
= CMOS_READ(RTC_SECONDS
);
206 min
= CMOS_READ(RTC_MINUTES
);
207 hour
= CMOS_READ(RTC_HOURS
);
208 day
= CMOS_READ(RTC_DAY_OF_MONTH
);
209 mon
= CMOS_READ(RTC_MONTH
);
210 year
= CMOS_READ(RTC_YEAR
);
212 if (acpi_gbl_FADT
.header
.revision
>= FADT2_REVISION_ID
&&
213 acpi_gbl_FADT
.century
)
214 century
= CMOS_READ(acpi_gbl_FADT
.century
);
216 } while (sec
!= CMOS_READ(RTC_SECONDS
));
218 spin_unlock_irqrestore(&rtc_lock
, flags
);
221 * We know that x86-64 always uses BCD format, no need to check the
234 year
+= century
* 100;
235 printk(KERN_INFO
"Extended CMOS year: %d\n", century
* 100);
238 * x86-64 systems only exists since 2002.
239 * This will work up to Dec 31, 2100
244 return mktime(year
, mon
, day
, hour
, min
, sec
);
247 /* calibrate_cpu is used on systems with fixed rate TSCs to determine
248 * processor frequency */
249 #define TICK_COUNT 100000000
250 static unsigned int __init
tsc_calibrate_cpu_khz(void)
252 int tsc_start
, tsc_now
;
254 unsigned long evntsel3
= 0, pmc3
= 0, pmc_now
= 0;
257 for (i
= 0; i
< 4; i
++)
258 if (avail_to_resrv_perfctr_nmi_bit(i
))
260 no_ctr_free
= (i
== 4);
263 rdmsrl(MSR_K7_EVNTSEL3
, evntsel3
);
264 wrmsrl(MSR_K7_EVNTSEL3
, 0);
265 rdmsrl(MSR_K7_PERFCTR3
, pmc3
);
267 reserve_perfctr_nmi(MSR_K7_PERFCTR0
+ i
);
268 reserve_evntsel_nmi(MSR_K7_EVNTSEL0
+ i
);
270 local_irq_save(flags
);
271 /* start meauring cycles, incrementing from 0 */
272 wrmsrl(MSR_K7_PERFCTR0
+ i
, 0);
273 wrmsrl(MSR_K7_EVNTSEL0
+ i
, 1 << 22 | 3 << 16 | 0x76);
276 rdmsrl(MSR_K7_PERFCTR0
+ i
, pmc_now
);
277 tsc_now
= get_cycles_sync();
278 } while ((tsc_now
- tsc_start
) < TICK_COUNT
);
280 local_irq_restore(flags
);
282 wrmsrl(MSR_K7_EVNTSEL3
, 0);
283 wrmsrl(MSR_K7_PERFCTR3
, pmc3
);
284 wrmsrl(MSR_K7_EVNTSEL3
, evntsel3
);
286 release_perfctr_nmi(MSR_K7_PERFCTR0
+ i
);
287 release_evntsel_nmi(MSR_K7_EVNTSEL0
+ i
);
290 return pmc_now
* tsc_khz
/ (tsc_now
- tsc_start
);
294 * pit_calibrate_tsc() uses the speaker output (channel 2) of
295 * the PIT. This is better than using the timer interrupt output,
296 * because we can read the value of the speaker with just one inb(),
297 * where we need three i/o operations for the interrupt channel.
298 * We count how many ticks the TSC does in 50 ms.
301 static unsigned int __init
pit_calibrate_tsc(void)
303 unsigned long start
, end
;
306 spin_lock_irqsave(&i8253_lock
, flags
);
308 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
311 outb((PIT_TICK_RATE
/ (1000 / 50)) & 0xff, 0x42);
312 outb((PIT_TICK_RATE
/ (1000 / 50)) >> 8, 0x42);
313 start
= get_cycles_sync();
314 while ((inb(0x61) & 0x20) == 0);
315 end
= get_cycles_sync();
317 spin_unlock_irqrestore(&i8253_lock
, flags
);
319 return (end
- start
) / 50;
322 #define PIT_MODE 0x43
325 static void __pit_init(int val
, u8 mode
)
329 spin_lock_irqsave(&i8253_lock
, flags
);
330 outb_p(mode
, PIT_MODE
);
331 outb_p(val
& 0xff, PIT_CH0
); /* LSB */
332 outb_p(val
>> 8, PIT_CH0
); /* MSB */
333 spin_unlock_irqrestore(&i8253_lock
, flags
);
336 void __init
pit_init(void)
338 __pit_init(LATCH
, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
341 void pit_stop_interrupt(void)
343 __pit_init(0, 0x30); /* mode 0 */
346 void stop_timer_interrupt(void)
351 hpet_timer_stop_set_go(0);
354 pit_stop_interrupt();
356 printk(KERN_INFO
"timer: %s interrupt stopped.\n", name
);
359 static struct irqaction irq0
= {
360 .handler
= timer_interrupt
,
361 .flags
= IRQF_DISABLED
| IRQF_IRQPOLL
,
362 .mask
= CPU_MASK_NONE
,
366 void __init
time_init(void)
371 if (hpet_arch_init())
374 if (hpet_use_timer
) {
375 /* set tick_nsec to use the proper rate for HPET */
376 tick_nsec
= TICK_NSEC_HPET
;
377 tsc_khz
= hpet_calibrate_tsc();
381 tsc_khz
= pit_calibrate_tsc();
386 if (cpu_has(&boot_cpu_data
, X86_FEATURE_CONSTANT_TSC
) &&
387 boot_cpu_data
.x86_vendor
== X86_VENDOR_AMD
&&
388 boot_cpu_data
.x86
== 16)
389 cpu_khz
= tsc_calibrate_cpu_khz();
391 if (unsynchronized_tsc())
392 mark_tsc_unstable("TSCs unsynchronized");
394 if (cpu_has(&boot_cpu_data
, X86_FEATURE_RDTSCP
))
395 vgetcpu_mode
= VGETCPU_RDTSCP
;
397 vgetcpu_mode
= VGETCPU_LSL
;
399 set_cyc2ns_scale(tsc_khz
);
400 printk(KERN_INFO
"time.c: Detected %d.%03d MHz processor.\n",
401 cpu_khz
/ 1000, cpu_khz
% 1000);
402 init_tsc_clocksource();
408 * sysfs support for the timer.
411 static int timer_suspend(struct sys_device
*dev
, pm_message_t state
)
416 static int timer_resume(struct sys_device
*dev
)
421 i8254_timer_resume();
425 static struct sysdev_class timer_sysclass
= {
426 .resume
= timer_resume
,
427 .suspend
= timer_suspend
,
428 set_kset_name("timer"),
431 /* XXX this sysfs stuff should probably go elsewhere later -john */
432 static struct sys_device device_timer
= {
434 .cls
= &timer_sysclass
,
437 static int time_init_device(void)
439 int error
= sysdev_class_register(&timer_sysclass
);
441 error
= sysdev_register(&device_timer
);
445 device_initcall(time_init_device
);