2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/poll.h>
30 #include <linux/ptrace.h>
31 #include <linux/slab.h>
32 #include <linux/wait.h>
34 #include <asm/firmware.h>
37 #include <linux/mutex.h>
39 #include <asm/spu_priv1.h>
40 #include <asm/mmu_context.h>
42 #include "interrupt.h"
44 const struct spu_priv1_ops
*spu_priv1_ops
;
46 EXPORT_SYMBOL_GPL(spu_priv1_ops
);
48 static int __spu_trap_invalid_dma(struct spu
*spu
)
50 pr_debug("%s\n", __FUNCTION__
);
51 spu
->dma_callback(spu
, SPE_EVENT_INVALID_DMA
);
55 static int __spu_trap_dma_align(struct spu
*spu
)
57 pr_debug("%s\n", __FUNCTION__
);
58 spu
->dma_callback(spu
, SPE_EVENT_DMA_ALIGNMENT
);
62 static int __spu_trap_error(struct spu
*spu
)
64 pr_debug("%s\n", __FUNCTION__
);
65 spu
->dma_callback(spu
, SPE_EVENT_SPE_ERROR
);
69 static void spu_restart_dma(struct spu
*spu
)
71 struct spu_priv2 __iomem
*priv2
= spu
->priv2
;
73 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING
, &spu
->flags
))
74 out_be64(&priv2
->mfc_control_RW
, MFC_CNTL_RESTART_DMA_COMMAND
);
77 static int __spu_trap_data_seg(struct spu
*spu
, unsigned long ea
)
79 struct spu_priv2 __iomem
*priv2
= spu
->priv2
;
80 struct mm_struct
*mm
= spu
->mm
;
83 pr_debug("%s\n", __FUNCTION__
);
85 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE
, &spu
->flags
)) {
86 /* SLBs are pre-loaded for context switch, so
87 * we should never get here!
89 printk("%s: invalid access during switch!\n", __func__
);
92 if (!mm
|| (REGION_ID(ea
) != USER_REGION_ID
)) {
93 /* Future: support kernel segments so that drivers
96 pr_debug("invalid region access at %016lx\n", ea
);
100 esid
= (ea
& ESID_MASK
) | SLB_ESID_V
;
101 #ifdef CONFIG_HUGETLB_PAGE
102 if (in_hugepage_area(mm
->context
, ea
))
103 llp
= mmu_psize_defs
[mmu_huge_psize
].sllp
;
106 llp
= mmu_psize_defs
[mmu_virtual_psize
].sllp
;
107 vsid
= (get_vsid(mm
->context
.id
, ea
) << SLB_VSID_SHIFT
) |
110 out_be64(&priv2
->slb_index_W
, spu
->slb_replace
);
111 out_be64(&priv2
->slb_vsid_RW
, vsid
);
112 out_be64(&priv2
->slb_esid_RW
, esid
);
115 if (spu
->slb_replace
>= 8)
116 spu
->slb_replace
= 0;
118 spu_restart_dma(spu
);
123 extern int hash_page(unsigned long ea
, unsigned long access
, unsigned long trap
); //XXX
124 static int __spu_trap_data_map(struct spu
*spu
, unsigned long ea
, u64 dsisr
)
126 pr_debug("%s, %lx, %lx\n", __FUNCTION__
, dsisr
, ea
);
128 /* Handle kernel space hash faults immediately.
129 User hash faults need to be deferred to process context. */
130 if ((dsisr
& MFC_DSISR_PTE_NOT_FOUND
)
131 && REGION_ID(ea
) != USER_REGION_ID
132 && hash_page(ea
, _PAGE_PRESENT
, 0x300) == 0) {
133 spu_restart_dma(spu
);
137 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE
, &spu
->flags
)) {
138 printk("%s: invalid access during switch!\n", __func__
);
145 spu
->stop_callback(spu
);
150 spu_irq_class_0(int irq
, void *data
)
155 spu
->class_0_pending
= 1;
156 spu
->stop_callback(spu
);
162 spu_irq_class_0_bottom(struct spu
*spu
)
164 unsigned long stat
, mask
;
166 spu
->class_0_pending
= 0;
168 mask
= spu_int_mask_get(spu
, 0);
169 stat
= spu_int_stat_get(spu
, 0);
173 if (stat
& 1) /* invalid DMA alignment */
174 __spu_trap_dma_align(spu
);
176 if (stat
& 2) /* invalid MFC DMA */
177 __spu_trap_invalid_dma(spu
);
179 if (stat
& 4) /* error on SPU */
180 __spu_trap_error(spu
);
182 spu_int_stat_clear(spu
, 0, stat
);
184 return (stat
& 0x7) ? -EIO
: 0;
186 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom
);
189 spu_irq_class_1(int irq
, void *data
)
192 unsigned long stat
, mask
, dar
, dsisr
;
196 /* atomically read & clear class1 status. */
197 spin_lock(&spu
->register_lock
);
198 mask
= spu_int_mask_get(spu
, 1);
199 stat
= spu_int_stat_get(spu
, 1) & mask
;
200 dar
= spu_mfc_dar_get(spu
);
201 dsisr
= spu_mfc_dsisr_get(spu
);
202 if (stat
& 2) /* mapping fault */
203 spu_mfc_dsisr_set(spu
, 0ul);
204 spu_int_stat_clear(spu
, 1, stat
);
205 spin_unlock(&spu
->register_lock
);
206 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__
, mask
, stat
,
209 if (stat
& 1) /* segment fault */
210 __spu_trap_data_seg(spu
, dar
);
212 if (stat
& 2) { /* mapping fault */
213 __spu_trap_data_map(spu
, dar
, dsisr
);
216 if (stat
& 4) /* ls compare & suspend on get */
219 if (stat
& 8) /* ls compare & suspend on put */
222 return stat
? IRQ_HANDLED
: IRQ_NONE
;
224 EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom
);
227 spu_irq_class_2(int irq
, void *data
)
234 spin_lock(&spu
->register_lock
);
235 stat
= spu_int_stat_get(spu
, 2);
236 mask
= spu_int_mask_get(spu
, 2);
237 /* ignore interrupts we're not waiting for */
240 * mailbox interrupts (0x1 and 0x10) are level triggered.
241 * mask them now before acknowledging.
244 spu_int_mask_and(spu
, 2, ~(stat
& 0x11));
245 /* acknowledge all interrupts before the callbacks */
246 spu_int_stat_clear(spu
, 2, stat
);
247 spin_unlock(&spu
->register_lock
);
249 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq
, stat
, mask
);
251 if (stat
& 1) /* PPC core mailbox */
252 spu
->ibox_callback(spu
);
254 if (stat
& 2) /* SPU stop-and-signal */
255 spu
->stop_callback(spu
);
257 if (stat
& 4) /* SPU halted */
258 spu
->stop_callback(spu
);
260 if (stat
& 8) /* DMA tag group complete */
261 spu
->mfc_callback(spu
);
263 if (stat
& 0x10) /* SPU mailbox threshold */
264 spu
->wbox_callback(spu
);
266 return stat
? IRQ_HANDLED
: IRQ_NONE
;
269 static int spu_request_irqs(struct spu
*spu
)
273 if (spu
->irqs
[0] != NO_IRQ
) {
274 snprintf(spu
->irq_c0
, sizeof (spu
->irq_c0
), "spe%02d.0",
276 ret
= request_irq(spu
->irqs
[0], spu_irq_class_0
,
282 if (spu
->irqs
[1] != NO_IRQ
) {
283 snprintf(spu
->irq_c1
, sizeof (spu
->irq_c1
), "spe%02d.1",
285 ret
= request_irq(spu
->irqs
[1], spu_irq_class_1
,
291 if (spu
->irqs
[2] != NO_IRQ
) {
292 snprintf(spu
->irq_c2
, sizeof (spu
->irq_c2
), "spe%02d.2",
294 ret
= request_irq(spu
->irqs
[2], spu_irq_class_2
,
303 if (spu
->irqs
[1] != NO_IRQ
)
304 free_irq(spu
->irqs
[1], spu
);
306 if (spu
->irqs
[0] != NO_IRQ
)
307 free_irq(spu
->irqs
[0], spu
);
312 static void spu_free_irqs(struct spu
*spu
)
314 if (spu
->irqs
[0] != NO_IRQ
)
315 free_irq(spu
->irqs
[0], spu
);
316 if (spu
->irqs
[1] != NO_IRQ
)
317 free_irq(spu
->irqs
[1], spu
);
318 if (spu
->irqs
[2] != NO_IRQ
)
319 free_irq(spu
->irqs
[2], spu
);
322 static struct list_head spu_list
[MAX_NUMNODES
];
323 static DEFINE_MUTEX(spu_mutex
);
325 static void spu_init_channels(struct spu
*spu
)
327 static const struct {
331 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
332 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
334 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
335 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
336 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
338 struct spu_priv2 __iomem
*priv2
;
343 /* initialize all channel data to zero */
344 for (i
= 0; i
< ARRAY_SIZE(zero_list
); i
++) {
347 out_be64(&priv2
->spu_chnlcntptr_RW
, zero_list
[i
].channel
);
348 for (count
= 0; count
< zero_list
[i
].count
; count
++)
349 out_be64(&priv2
->spu_chnldata_RW
, 0);
352 /* initialize channel counts to meaningful values */
353 for (i
= 0; i
< ARRAY_SIZE(count_list
); i
++) {
354 out_be64(&priv2
->spu_chnlcntptr_RW
, count_list
[i
].channel
);
355 out_be64(&priv2
->spu_chnlcnt_RW
, count_list
[i
].count
);
359 struct spu
*spu_alloc_node(int node
)
361 struct spu
*spu
= NULL
;
363 mutex_lock(&spu_mutex
);
364 if (!list_empty(&spu_list
[node
])) {
365 spu
= list_entry(spu_list
[node
].next
, struct spu
, list
);
366 list_del_init(&spu
->list
);
367 pr_debug("Got SPU %x %d %d\n",
368 spu
->isrc
, spu
->number
, spu
->node
);
369 spu_init_channels(spu
);
371 mutex_unlock(&spu_mutex
);
375 EXPORT_SYMBOL_GPL(spu_alloc_node
);
377 struct spu
*spu_alloc(void)
379 struct spu
*spu
= NULL
;
382 for (node
= 0; node
< MAX_NUMNODES
; node
++) {
383 spu
= spu_alloc_node(node
);
391 void spu_free(struct spu
*spu
)
393 mutex_lock(&spu_mutex
);
394 list_add_tail(&spu
->list
, &spu_list
[spu
->node
]);
395 mutex_unlock(&spu_mutex
);
397 EXPORT_SYMBOL_GPL(spu_free
);
399 static int spu_handle_mm_fault(struct spu
*spu
)
401 struct mm_struct
*mm
= spu
->mm
;
402 struct vm_area_struct
*vma
;
403 u64 ea
, dsisr
, is_write
;
409 if (!IS_VALID_EA(ea
)) {
416 if (mm
->pgd
== NULL
) {
420 down_read(&mm
->mmap_sem
);
421 vma
= find_vma(mm
, ea
);
424 if (vma
->vm_start
<= ea
)
426 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
429 if (expand_stack(vma
, ea
))
433 is_write
= dsisr
& MFC_DSISR_ACCESS_PUT
;
435 if (!(vma
->vm_flags
& VM_WRITE
))
438 if (dsisr
& MFC_DSISR_ACCESS_DENIED
)
440 if (!(vma
->vm_flags
& (VM_READ
| VM_EXEC
)))
444 switch (handle_mm_fault(mm
, vma
, ea
, is_write
)) {
451 case VM_FAULT_SIGBUS
:
460 up_read(&mm
->mmap_sem
);
464 up_read(&mm
->mmap_sem
);
468 int spu_irq_class_1_bottom(struct spu
*spu
)
470 u64 ea
, dsisr
, access
, error
= 0UL;
475 if (dsisr
& (MFC_DSISR_PTE_NOT_FOUND
| MFC_DSISR_ACCESS_DENIED
)) {
478 access
= (_PAGE_PRESENT
| _PAGE_USER
);
479 access
|= (dsisr
& MFC_DSISR_ACCESS_PUT
) ? _PAGE_RW
: 0UL;
480 local_irq_save(flags
);
481 if (hash_page(ea
, access
, 0x300) != 0)
482 error
|= CLASS1_ENABLE_STORAGE_FAULT_INTR
;
483 local_irq_restore(flags
);
485 if (error
& CLASS1_ENABLE_STORAGE_FAULT_INTR
) {
486 if ((ret
= spu_handle_mm_fault(spu
)) != 0)
487 error
|= CLASS1_ENABLE_STORAGE_FAULT_INTR
;
489 error
&= ~CLASS1_ENABLE_STORAGE_FAULT_INTR
;
494 spu_restart_dma(spu
);
496 __spu_trap_invalid_dma(spu
);
501 static int __init
find_spu_node_id(struct device_node
*spe
)
503 const unsigned int *id
;
504 struct device_node
*cpu
;
505 cpu
= spe
->parent
->parent
;
506 id
= get_property(cpu
, "node-id", NULL
);
510 static int __init
cell_spuprop_present(struct spu
*spu
, struct device_node
*spe
,
513 static DEFINE_MUTEX(add_spumem_mutex
);
515 const struct address_prop
{
516 unsigned long address
;
518 } __attribute__((packed
)) *p
;
521 unsigned long start_pfn
, nr_pages
;
522 struct pglist_data
*pgdata
;
526 p
= get_property(spe
, prop
, &proplen
);
527 WARN_ON(proplen
!= sizeof (*p
));
529 start_pfn
= p
->address
>> PAGE_SHIFT
;
530 nr_pages
= ((unsigned long)p
->len
+ PAGE_SIZE
- 1) >> PAGE_SHIFT
;
532 pgdata
= NODE_DATA(spu
->nid
);
533 zone
= pgdata
->node_zones
;
535 /* XXX rethink locking here */
536 mutex_lock(&add_spumem_mutex
);
537 ret
= __add_pages(zone
, start_pfn
, nr_pages
);
538 mutex_unlock(&add_spumem_mutex
);
543 static void __iomem
* __init
map_spe_prop(struct spu
*spu
,
544 struct device_node
*n
, const char *name
)
546 const struct address_prop
{
547 unsigned long address
;
549 } __attribute__((packed
)) *prop
;
553 void __iomem
*ret
= NULL
;
556 p
= get_property(n
, name
, &proplen
);
557 if (proplen
!= sizeof (struct address_prop
))
562 err
= cell_spuprop_present(spu
, n
, name
);
563 if (err
&& (err
!= -EEXIST
))
566 ret
= ioremap(prop
->address
, prop
->len
);
572 static void spu_unmap(struct spu
*spu
)
576 iounmap(spu
->problem
);
577 iounmap((__force u8 __iomem
*)spu
->local_store
);
580 /* This function shall be abstracted for HV platforms */
581 static int __init
spu_map_interrupts_old(struct spu
*spu
, struct device_node
*np
)
586 /* Get the interrupt source unit from the device-tree */
587 tmp
= get_property(np
, "isrc", NULL
);
592 /* Add the node number */
593 isrc
|= spu
->node
<< IIC_IRQ_NODE_SHIFT
;
596 /* Now map interrupts of all 3 classes */
597 spu
->irqs
[0] = irq_create_mapping(NULL
, IIC_IRQ_CLASS_0
| isrc
);
598 spu
->irqs
[1] = irq_create_mapping(NULL
, IIC_IRQ_CLASS_1
| isrc
);
599 spu
->irqs
[2] = irq_create_mapping(NULL
, IIC_IRQ_CLASS_2
| isrc
);
601 /* Right now, we only fail if class 2 failed */
602 return spu
->irqs
[2] == NO_IRQ
? -EINVAL
: 0;
605 static int __init
spu_map_device_old(struct spu
*spu
, struct device_node
*node
)
611 spu
->name
= get_property(node
, "name", NULL
);
615 prop
= get_property(node
, "local-store", NULL
);
618 spu
->local_store_phys
= *(unsigned long *)prop
;
620 /* we use local store as ram, not io memory */
621 spu
->local_store
= (void __force
*)
622 map_spe_prop(spu
, node
, "local-store");
623 if (!spu
->local_store
)
626 prop
= get_property(node
, "problem", NULL
);
629 spu
->problem_phys
= *(unsigned long *)prop
;
631 spu
->problem
= map_spe_prop(spu
, node
, "problem");
635 spu
->priv1
= map_spe_prop(spu
, node
, "priv1");
636 /* priv1 is not available on a hypervisor */
638 spu
->priv2
= map_spe_prop(spu
, node
, "priv2");
650 static int __init
spu_map_interrupts(struct spu
*spu
, struct device_node
*np
)
656 for (i
=0; i
< 3; i
++) {
657 ret
= of_irq_map_one(np
, i
, &oirq
);
662 spu
->irqs
[i
] = irq_create_of_mapping(oirq
.controller
,
663 oirq
.specifier
, oirq
.size
);
664 if (spu
->irqs
[i
] == NO_IRQ
)
670 pr_debug("failed to map irq %x for spu %s\n", *oirq
.specifier
, spu
->name
);
671 for (; i
>= 0; i
--) {
672 if (spu
->irqs
[i
] != NO_IRQ
)
673 irq_dispose_mapping(spu
->irqs
[i
]);
678 static int spu_map_resource(struct device_node
*node
, int nr
,
679 void __iomem
** virt
, unsigned long *phys
)
681 struct resource resource
= { };
684 ret
= of_address_to_resource(node
, 0, &resource
);
689 *phys
= resource
.start
;
690 *virt
= ioremap(resource
.start
, resource
.end
- resource
.start
);
698 static int __init
spu_map_device(struct spu
*spu
, struct device_node
*node
)
701 spu
->name
= get_property(node
, "name", NULL
);
705 ret
= spu_map_resource(node
, 0, (void __iomem
**)&spu
->local_store
,
706 &spu
->local_store_phys
);
709 ret
= spu_map_resource(node
, 1, (void __iomem
**)&spu
->problem
,
713 ret
= spu_map_resource(node
, 2, (void __iomem
**)&spu
->priv2
,
718 if (!firmware_has_feature(FW_FEATURE_LPAR
))
719 ret
= spu_map_resource(node
, 3, (void __iomem
**)&spu
->priv1
,
728 pr_debug("failed to map spe %s: %d\n", spu
->name
, ret
);
732 struct sysdev_class spu_sysdev_class
= {
736 static ssize_t
spu_show_isrc(struct sys_device
*sysdev
, char *buf
)
738 struct spu
*spu
= container_of(sysdev
, struct spu
, sysdev
);
739 return sprintf(buf
, "%d\n", spu
->isrc
);
742 static SYSDEV_ATTR(isrc
, 0400, spu_show_isrc
, NULL
);
744 extern int attach_sysdev_to_node(struct sys_device
*dev
, int nid
);
746 static int spu_create_sysdev(struct spu
*spu
)
750 spu
->sysdev
.id
= spu
->number
;
751 spu
->sysdev
.cls
= &spu_sysdev_class
;
752 ret
= sysdev_register(&spu
->sysdev
);
754 printk(KERN_ERR
"Can't register SPU %d with sysfs\n",
760 sysdev_create_file(&spu
->sysdev
, &attr_isrc
);
761 sysfs_add_device_to_node(&spu
->sysdev
, spu
->nid
);
766 static void spu_destroy_sysdev(struct spu
*spu
)
768 sysdev_remove_file(&spu
->sysdev
, &attr_isrc
);
769 sysfs_remove_device_from_node(&spu
->sysdev
, spu
->nid
);
770 sysdev_unregister(&spu
->sysdev
);
773 static int __init
create_spu(struct device_node
*spe
)
780 spu
= kzalloc(sizeof (*spu
), GFP_KERNEL
);
784 spu
->node
= find_spu_node_id(spe
);
785 if (spu
->node
>= MAX_NUMNODES
) {
786 printk(KERN_WARNING
"SPE %s on node %d ignored,"
787 " node number too big\n", spe
->full_name
, spu
->node
);
788 printk(KERN_WARNING
"Check if CONFIG_NUMA is enabled.\n");
791 spu
->nid
= of_node_to_nid(spe
);
795 ret
= spu_map_device(spu
, spe
);
798 ret
= spu_map_device_old(spu
, spe
);
802 ret
= spu_map_interrupts(spu
, spe
);
804 ret
= spu_map_interrupts_old(spu
, spe
);
807 spin_lock_init(&spu
->register_lock
);
808 spu_mfc_sdr_set(spu
, mfspr(SPRN_SDR1
));
809 spu_mfc_sr1_set(spu
, 0x33);
810 mutex_lock(&spu_mutex
);
812 spu
->number
= number
++;
813 ret
= spu_request_irqs(spu
);
817 ret
= spu_create_sysdev(spu
);
821 list_add(&spu
->list
, &spu_list
[spu
->node
]);
822 mutex_unlock(&spu_mutex
);
824 pr_debug(KERN_DEBUG
"Using SPE %s %02x %p %p %p %p %d\n",
825 spu
->name
, spu
->isrc
, spu
->local_store
,
826 spu
->problem
, spu
->priv1
, spu
->priv2
, spu
->number
);
832 mutex_unlock(&spu_mutex
);
841 static void destroy_spu(struct spu
*spu
)
843 list_del_init(&spu
->list
);
845 spu_destroy_sysdev(spu
);
851 static void cleanup_spu_base(void)
853 struct spu
*spu
, *tmp
;
856 mutex_lock(&spu_mutex
);
857 for (node
= 0; node
< MAX_NUMNODES
; node
++) {
858 list_for_each_entry_safe(spu
, tmp
, &spu_list
[node
], list
)
861 mutex_unlock(&spu_mutex
);
862 sysdev_class_unregister(&spu_sysdev_class
);
864 module_exit(cleanup_spu_base
);
866 static int __init
init_spu_base(void)
868 struct device_node
*node
;
871 /* create sysdev class for spus */
872 ret
= sysdev_class_register(&spu_sysdev_class
);
876 for (i
= 0; i
< MAX_NUMNODES
; i
++)
877 INIT_LIST_HEAD(&spu_list
[i
]);
880 for (node
= of_find_node_by_type(NULL
, "spe");
881 node
; node
= of_find_node_by_type(node
, "spe")) {
882 ret
= create_spu(node
);
884 printk(KERN_WARNING
"%s: Error initializing %s\n",
885 __FUNCTION__
, node
->name
);
892 module_init(init_spu_base
);
894 MODULE_LICENSE("GPL");
895 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");