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[PATCH] dvb: core: dvb_demux formatting fixes
[firewire-audio.git] / drivers / scsi / sata_nv.c
bloba1d62dee3be640d43b2315146a73b6401705cb3b
1 /*
2 * sata_nv.c - NVIDIA nForce SATA
3 *
4 * Copyright 2004 NVIDIA Corp. All rights reserved.
5 * Copyright 2004 Andrew Chew
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; see the file COPYING. If not, write to
20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 *
23 * libata documentation is available via 'make {ps|pdf}docs',
24 * as Documentation/DocBook/libata.*
25 *
26 * No hardware documentation available outside of NVIDIA.
27 * This driver programs the NVIDIA SATA controller in a similar
28 * fashion as with other PCI IDE BMDMA controllers, with a few
29 * NV-specific details such as register offsets, SATA phy location,
30 * hotplug info, etc.
31 *
32 *
33 * 0.08
34 * - Added support for MCP51 and MCP55.
35 *
36 * 0.07
37 * - Added support for RAID class code.
38 *
39 * 0.06
40 * - Added generic SATA support by using a pci_device_id that filters on
41 * the IDE storage class code.
42 *
43 * 0.03
44 * - Fixed a bug where the hotplug handlers for non-CK804/MCP04 were using
45 * mmio_base, which is only set for the CK804/MCP04 case.
46 *
47 * 0.02
48 * - Added support for CK804 SATA controller.
49 *
50 * 0.01
51 * - Initial revision.
52 */
53
54 #include <linux/config.h>
55 #include <linux/kernel.h>
56 #include <linux/module.h>
57 #include <linux/pci.h>
58 #include <linux/init.h>
59 #include <linux/blkdev.h>
60 #include <linux/delay.h>
61 #include <linux/interrupt.h>
62 #include "scsi.h"
63 #include <scsi/scsi_host.h>
64 #include <linux/libata.h>
65
66 #define DRV_NAME "sata_nv"
67 #define DRV_VERSION "0.8"
68
69 #define NV_PORTS 2
70 #define NV_PIO_MASK 0x1f
71 #define NV_MWDMA_MASK 0x07
72 #define NV_UDMA_MASK 0x7f
73 #define NV_PORT0_SCR_REG_OFFSET 0x00
74 #define NV_PORT1_SCR_REG_OFFSET 0x40
75
76 #define NV_INT_STATUS 0x10
77 #define NV_INT_STATUS_CK804 0x440
78 #define NV_INT_STATUS_PDEV_INT 0x01
79 #define NV_INT_STATUS_PDEV_PM 0x02
80 #define NV_INT_STATUS_PDEV_ADDED 0x04
81 #define NV_INT_STATUS_PDEV_REMOVED 0x08
82 #define NV_INT_STATUS_SDEV_INT 0x10
83 #define NV_INT_STATUS_SDEV_PM 0x20
84 #define NV_INT_STATUS_SDEV_ADDED 0x40
85 #define NV_INT_STATUS_SDEV_REMOVED 0x80
86 #define NV_INT_STATUS_PDEV_HOTPLUG (NV_INT_STATUS_PDEV_ADDED | \
87 NV_INT_STATUS_PDEV_REMOVED)
88 #define NV_INT_STATUS_SDEV_HOTPLUG (NV_INT_STATUS_SDEV_ADDED | \
89 NV_INT_STATUS_SDEV_REMOVED)
90 #define NV_INT_STATUS_HOTPLUG (NV_INT_STATUS_PDEV_HOTPLUG | \
91 NV_INT_STATUS_SDEV_HOTPLUG)
92
93 #define NV_INT_ENABLE 0x11
94 #define NV_INT_ENABLE_CK804 0x441
95 #define NV_INT_ENABLE_PDEV_MASK 0x01
96 #define NV_INT_ENABLE_PDEV_PM 0x02
97 #define NV_INT_ENABLE_PDEV_ADDED 0x04
98 #define NV_INT_ENABLE_PDEV_REMOVED 0x08
99 #define NV_INT_ENABLE_SDEV_MASK 0x10
100 #define NV_INT_ENABLE_SDEV_PM 0x20
101 #define NV_INT_ENABLE_SDEV_ADDED 0x40
102 #define NV_INT_ENABLE_SDEV_REMOVED 0x80
103 #define NV_INT_ENABLE_PDEV_HOTPLUG (NV_INT_ENABLE_PDEV_ADDED | \
104 NV_INT_ENABLE_PDEV_REMOVED)
105 #define NV_INT_ENABLE_SDEV_HOTPLUG (NV_INT_ENABLE_SDEV_ADDED | \
106 NV_INT_ENABLE_SDEV_REMOVED)
107 #define NV_INT_ENABLE_HOTPLUG (NV_INT_ENABLE_PDEV_HOTPLUG | \
108 NV_INT_ENABLE_SDEV_HOTPLUG)
109
110 #define NV_INT_CONFIG 0x12
111 #define NV_INT_CONFIG_METHD 0x01 // 0 = INT, 1 = SMI
112
113 // For PCI config register 20
114 #define NV_MCP_SATA_CFG_20 0x50
115 #define NV_MCP_SATA_CFG_20_SATA_SPACE_EN 0x04
116
117 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
118 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
119 struct pt_regs *regs);
120 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg);
121 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
122 static void nv_host_stop (struct ata_host_set *host_set);
123 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent);
124 static void nv_disable_hotplug(struct ata_host_set *host_set);
125 static void nv_check_hotplug(struct ata_host_set *host_set);
126 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent);
127 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set);
128 static void nv_check_hotplug_ck804(struct ata_host_set *host_set);
129
130 enum nv_host_type
131 {
132 GENERIC,
133 NFORCE2,
134 NFORCE3,
135 CK804,
136 MCP51,
137 MCP55
138 };
139
140 static struct pci_device_id nv_pci_tbl[] = {
141 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
142 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE2 },
143 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
144 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
145 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
146 PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE3 },
147 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA,
148 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
149 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2,
150 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
151 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA,
152 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
153 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
155 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA,
156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 },
157 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2,
158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 },
159 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA,
160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP55 },
161 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
162 PCI_ANY_ID, PCI_ANY_ID,
163 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
164 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
165 PCI_ANY_ID, PCI_ANY_ID,
166 PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC },
167 { 0, } /* terminate list */
168 };
169
170 #define NV_HOST_FLAGS_SCR_MMIO 0x00000001
171
172 struct nv_host_desc
173 {
174 enum nv_host_type host_type;
175 void (*enable_hotplug)(struct ata_probe_ent *probe_ent);
176 void (*disable_hotplug)(struct ata_host_set *host_set);
177 void (*check_hotplug)(struct ata_host_set *host_set);
178
179 };
180 static struct nv_host_desc nv_device_tbl[] = {
181 {
182 .host_type = GENERIC,
183 .enable_hotplug = NULL,
184 .disable_hotplug= NULL,
185 .check_hotplug = NULL,
186 },
187 {
188 .host_type = NFORCE2,
189 .enable_hotplug = nv_enable_hotplug,
190 .disable_hotplug= nv_disable_hotplug,
191 .check_hotplug = nv_check_hotplug,
192 },
193 {
194 .host_type = NFORCE3,
195 .enable_hotplug = nv_enable_hotplug,
196 .disable_hotplug= nv_disable_hotplug,
197 .check_hotplug = nv_check_hotplug,
198 },
199 { .host_type = CK804,
200 .enable_hotplug = nv_enable_hotplug_ck804,
201 .disable_hotplug= nv_disable_hotplug_ck804,
202 .check_hotplug = nv_check_hotplug_ck804,
203 },
204 };
205
206 struct nv_host
207 {
208 struct nv_host_desc *host_desc;
209 unsigned long host_flags;
210 };
211
212 static struct pci_driver nv_pci_driver = {
213 .name = DRV_NAME,
214 .id_table = nv_pci_tbl,
215 .probe = nv_init_one,
216 .remove = ata_pci_remove_one,
217 };
218
219 static Scsi_Host_Template nv_sht = {
220 .module = THIS_MODULE,
221 .name = DRV_NAME,
222 .ioctl = ata_scsi_ioctl,
223 .queuecommand = ata_scsi_queuecmd,
224 .eh_strategy_handler = ata_scsi_error,
225 .can_queue = ATA_DEF_QUEUE,
226 .this_id = ATA_SHT_THIS_ID,
227 .sg_tablesize = LIBATA_MAX_PRD,
228 .max_sectors = ATA_MAX_SECTORS,
229 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
230 .emulated = ATA_SHT_EMULATED,
231 .use_clustering = ATA_SHT_USE_CLUSTERING,
232 .proc_name = DRV_NAME,
233 .dma_boundary = ATA_DMA_BOUNDARY,
234 .slave_configure = ata_scsi_slave_config,
235 .bios_param = ata_std_bios_param,
236 .ordered_flush = 1,
237 };
238
239 static struct ata_port_operations nv_ops = {
240 .port_disable = ata_port_disable,
241 .tf_load = ata_tf_load,
242 .tf_read = ata_tf_read,
243 .exec_command = ata_exec_command,
244 .check_status = ata_check_status,
245 .dev_select = ata_std_dev_select,
246 .phy_reset = sata_phy_reset,
247 .bmdma_setup = ata_bmdma_setup,
248 .bmdma_start = ata_bmdma_start,
249 .bmdma_stop = ata_bmdma_stop,
250 .bmdma_status = ata_bmdma_status,
251 .qc_prep = ata_qc_prep,
252 .qc_issue = ata_qc_issue_prot,
253 .eng_timeout = ata_eng_timeout,
254 .irq_handler = nv_interrupt,
255 .irq_clear = ata_bmdma_irq_clear,
256 .scr_read = nv_scr_read,
257 .scr_write = nv_scr_write,
258 .port_start = ata_port_start,
259 .port_stop = ata_port_stop,
260 .host_stop = nv_host_stop,
261 };
262
263 /* FIXME: The hardware provides the necessary SATA PHY controls
264 * to support ATA_FLAG_SATA_RESET. However, it is currently
265 * necessary to disable that flag, to solve misdetection problems.
266 * See http://bugme.osdl.org/show_bug.cgi?id=3352 for more info.
267 *
268 * This problem really needs to be investigated further. But in the
269 * meantime, we avoid ATA_FLAG_SATA_RESET to get people working.
270 */
271 static struct ata_port_info nv_port_info = {
272 .sht = &nv_sht,
273 .host_flags = ATA_FLAG_SATA |
274 /* ATA_FLAG_SATA_RESET | */
275 ATA_FLAG_SRST |
276 ATA_FLAG_NO_LEGACY,
277 .pio_mask = NV_PIO_MASK,
278 .mwdma_mask = NV_MWDMA_MASK,
279 .udma_mask = NV_UDMA_MASK,
280 .port_ops = &nv_ops,
281 };
282
283 MODULE_AUTHOR("NVIDIA");
284 MODULE_DESCRIPTION("low-level driver for NVIDIA nForce SATA controller");
285 MODULE_LICENSE("GPL");
286 MODULE_DEVICE_TABLE(pci, nv_pci_tbl);
287 MODULE_VERSION(DRV_VERSION);
288
289 static irqreturn_t nv_interrupt (int irq, void *dev_instance,
290 struct pt_regs *regs)
291 {
292 struct ata_host_set *host_set = dev_instance;
293 struct nv_host *host = host_set->private_data;
294 unsigned int i;
295 unsigned int handled = 0;
296 unsigned long flags;
297
298 spin_lock_irqsave(&host_set->lock, flags);
299
300 for (i = 0; i < host_set->n_ports; i++) {
301 struct ata_port *ap;
302
303 ap = host_set->ports[i];
304 if (ap &&
305 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
306 struct ata_queued_cmd *qc;
307
308 qc = ata_qc_from_tag(ap, ap->active_tag);
309 if (qc && (!(qc->tf.ctl & ATA_NIEN)))
310 handled += ata_host_intr(ap, qc);
311 }
312
313 }
314
315 if (host->host_desc->check_hotplug)
316 host->host_desc->check_hotplug(host_set);
317
318 spin_unlock_irqrestore(&host_set->lock, flags);
319
320 return IRQ_RETVAL(handled);
321 }
322
323 static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg)
324 {
325 struct ata_host_set *host_set = ap->host_set;
326 struct nv_host *host = host_set->private_data;
327
328 if (sc_reg > SCR_CONTROL)
329 return 0xffffffffU;
330
331 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
332 return readl((void*)ap->ioaddr.scr_addr + (sc_reg * 4));
333 else
334 return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
335 }
336
337 static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
338 {
339 struct ata_host_set *host_set = ap->host_set;
340 struct nv_host *host = host_set->private_data;
341
342 if (sc_reg > SCR_CONTROL)
343 return;
344
345 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
346 writel(val, (void*)ap->ioaddr.scr_addr + (sc_reg * 4));
347 else
348 outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
349 }
350
351 static void nv_host_stop (struct ata_host_set *host_set)
352 {
353 struct nv_host *host = host_set->private_data;
354 struct pci_dev *pdev = to_pci_dev(host_set->dev);
355
356 // Disable hotplug event interrupts.
357 if (host->host_desc->disable_hotplug)
358 host->host_desc->disable_hotplug(host_set);
359
360 kfree(host);
361
362 if (host_set->mmio_base)
363 pci_iounmap(pdev, host_set->mmio_base);
364 }
365
366 static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
367 {
368 static int printed_version = 0;
369 struct nv_host *host;
370 struct ata_port_info *ppi;
371 struct ata_probe_ent *probe_ent;
372 int pci_dev_busy = 0;
373 int rc;
374 u32 bar;
375
376 // Make sure this is a SATA controller by counting the number of bars
377 // (NVIDIA SATA controllers will always have six bars). Otherwise,
378 // it's an IDE controller and we ignore it.
379 for (bar=0; bar<6; bar++)
380 if (pci_resource_start(pdev, bar) == 0)
381 return -ENODEV;
382
383 if (!printed_version++)
384 printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
385
386 rc = pci_enable_device(pdev);
387 if (rc)
388 goto err_out;
389
390 rc = pci_request_regions(pdev, DRV_NAME);
391 if (rc) {
392 pci_dev_busy = 1;
393 goto err_out_disable;
394 }
395
396 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
397 if (rc)
398 goto err_out_regions;
399 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
400 if (rc)
401 goto err_out_regions;
402
403 rc = -ENOMEM;
404
405 ppi = &nv_port_info;
406 probe_ent = ata_pci_init_native_mode(pdev, &ppi);
407 if (!probe_ent)
408 goto err_out_regions;
409
410 host = kmalloc(sizeof(struct nv_host), GFP_KERNEL);
411 if (!host)
412 goto err_out_free_ent;
413
414 memset(host, 0, sizeof(struct nv_host));
415 host->host_desc = &nv_device_tbl[ent->driver_data];
416
417 probe_ent->private_data = host;
418
419 if (pci_resource_flags(pdev, 5) & IORESOURCE_MEM)
420 host->host_flags |= NV_HOST_FLAGS_SCR_MMIO;
421
422 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO) {
423 unsigned long base;
424
425 probe_ent->mmio_base = pci_iomap(pdev, 5, 0);
426 if (probe_ent->mmio_base == NULL) {
427 rc = -EIO;
428 goto err_out_free_host;
429 }
430
431 base = (unsigned long)probe_ent->mmio_base;
432
433 probe_ent->port[0].scr_addr =
434 base + NV_PORT0_SCR_REG_OFFSET;
435 probe_ent->port[1].scr_addr =
436 base + NV_PORT1_SCR_REG_OFFSET;
437 } else {
438
439 probe_ent->port[0].scr_addr =
440 pci_resource_start(pdev, 5) | NV_PORT0_SCR_REG_OFFSET;
441 probe_ent->port[1].scr_addr =
442 pci_resource_start(pdev, 5) | NV_PORT1_SCR_REG_OFFSET;
443 }
444
445 pci_set_master(pdev);
446
447 rc = ata_device_add(probe_ent);
448 if (rc != NV_PORTS)
449 goto err_out_iounmap;
450
451 // Enable hotplug event interrupts.
452 if (host->host_desc->enable_hotplug)
453 host->host_desc->enable_hotplug(probe_ent);
454
455 kfree(probe_ent);
456
457 return 0;
458
459 err_out_iounmap:
460 if (host->host_flags & NV_HOST_FLAGS_SCR_MMIO)
461 pci_iounmap(pdev, probe_ent->mmio_base);
462 err_out_free_host:
463 kfree(host);
464 err_out_free_ent:
465 kfree(probe_ent);
466 err_out_regions:
467 pci_release_regions(pdev);
468 err_out_disable:
469 if (!pci_dev_busy)
470 pci_disable_device(pdev);
471 err_out:
472 return rc;
473 }
474
475 static void nv_enable_hotplug(struct ata_probe_ent *probe_ent)
476 {
477 u8 intr_mask;
478
479 outb(NV_INT_STATUS_HOTPLUG,
480 probe_ent->port[0].scr_addr + NV_INT_STATUS);
481
482 intr_mask = inb(probe_ent->port[0].scr_addr + NV_INT_ENABLE);
483 intr_mask |= NV_INT_ENABLE_HOTPLUG;
484
485 outb(intr_mask, probe_ent->port[0].scr_addr + NV_INT_ENABLE);
486 }
487
488 static void nv_disable_hotplug(struct ata_host_set *host_set)
489 {
490 u8 intr_mask;
491
492 intr_mask = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
493
494 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
495
496 outb(intr_mask, host_set->ports[0]->ioaddr.scr_addr + NV_INT_ENABLE);
497 }
498
499 static void nv_check_hotplug(struct ata_host_set *host_set)
500 {
501 u8 intr_status;
502
503 intr_status = inb(host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
504
505 // Clear interrupt status.
506 outb(0xff, host_set->ports[0]->ioaddr.scr_addr + NV_INT_STATUS);
507
508 if (intr_status & NV_INT_STATUS_HOTPLUG) {
509 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
510 printk(KERN_WARNING "nv_sata: "
511 "Primary device added\n");
512
513 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
514 printk(KERN_WARNING "nv_sata: "
515 "Primary device removed\n");
516
517 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
518 printk(KERN_WARNING "nv_sata: "
519 "Secondary device added\n");
520
521 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
522 printk(KERN_WARNING "nv_sata: "
523 "Secondary device removed\n");
524 }
525 }
526
527 static void nv_enable_hotplug_ck804(struct ata_probe_ent *probe_ent)
528 {
529 struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
530 u8 intr_mask;
531 u8 regval;
532
533 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
534 regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
535 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
536
537 writeb(NV_INT_STATUS_HOTPLUG, probe_ent->mmio_base + NV_INT_STATUS_CK804);
538
539 intr_mask = readb(probe_ent->mmio_base + NV_INT_ENABLE_CK804);
540 intr_mask |= NV_INT_ENABLE_HOTPLUG;
541
542 writeb(intr_mask, probe_ent->mmio_base + NV_INT_ENABLE_CK804);
543 }
544
545 static void nv_disable_hotplug_ck804(struct ata_host_set *host_set)
546 {
547 struct pci_dev *pdev = to_pci_dev(host_set->dev);
548 u8 intr_mask;
549 u8 regval;
550
551 intr_mask = readb(host_set->mmio_base + NV_INT_ENABLE_CK804);
552
553 intr_mask &= ~(NV_INT_ENABLE_HOTPLUG);
554
555 writeb(intr_mask, host_set->mmio_base + NV_INT_ENABLE_CK804);
556
557 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval);
558 regval &= ~NV_MCP_SATA_CFG_20_SATA_SPACE_EN;
559 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
560 }
561
562 static void nv_check_hotplug_ck804(struct ata_host_set *host_set)
563 {
564 u8 intr_status;
565
566 intr_status = readb(host_set->mmio_base + NV_INT_STATUS_CK804);
567
568 // Clear interrupt status.
569 writeb(0xff, host_set->mmio_base + NV_INT_STATUS_CK804);
570
571 if (intr_status & NV_INT_STATUS_HOTPLUG) {
572 if (intr_status & NV_INT_STATUS_PDEV_ADDED)
573 printk(KERN_WARNING "nv_sata: "
574 "Primary device added\n");
575
576 if (intr_status & NV_INT_STATUS_PDEV_REMOVED)
577 printk(KERN_WARNING "nv_sata: "
578 "Primary device removed\n");
579
580 if (intr_status & NV_INT_STATUS_SDEV_ADDED)
581 printk(KERN_WARNING "nv_sata: "
582 "Secondary device added\n");
583
584 if (intr_status & NV_INT_STATUS_SDEV_REMOVED)
585 printk(KERN_WARNING "nv_sata: "
586 "Secondary device removed\n");
587 }
588 }
589
590 static int __init nv_init(void)
591 {
592 return pci_module_init(&nv_pci_driver);
593 }
594
595 static void __exit nv_exit(void)
596 {
597 pci_unregister_driver(&nv_pci_driver);
598 }
599
600 module_init(nv_init);
601 module_exit(nv_exit);
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