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ALSA: aaci - Clean up duplicate code
[firewire-audio.git] / sound / arm / aaci.c
blob83b0328d389e7c1e807945a47677f92acea60b8c
1 /*
2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
3 *
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Documentation: ARM DDI 0173B
11 */
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
21 #include <linux/io.h>
22
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28
29 #include "aaci.h"
30 #include "devdma.h"
31
32 #define DRIVER_NAME "aaci-pl041"
33
34 /*
35 * PM support is not complete. Turn it off.
36 */
37 #undef CONFIG_PM
38
39 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
40 {
41 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
42
43 /*
44 * Ensure that the slot 1/2 RX registers are empty.
45 */
46 v = readl(aaci->base + AACI_SLFR);
47 if (v & SLFR_2RXV)
48 readl(aaci->base + AACI_SL2RX);
49 if (v & SLFR_1RXV)
50 readl(aaci->base + AACI_SL1RX);
51
52 writel(maincr, aaci->base + AACI_MAINCR);
53 }
54
55 /*
56 * P29:
57 * The recommended use of programming the external codec through slot 1
58 * and slot 2 data is to use the channels during setup routines and the
59 * slot register at any other time. The data written into slot 1, slot 2
60 * and slot 12 registers is transmitted only when their corresponding
61 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
62 * register.
63 */
64 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
65 unsigned short val)
66 {
67 struct aaci *aaci = ac97->private_data;
68 u32 v;
69 int timeout = 5000;
70
71 if (ac97->num >= 4)
72 return;
73
74 mutex_lock(&aaci->ac97_sem);
75
76 aaci_ac97_select_codec(aaci, ac97);
77
78 /*
79 * P54: You must ensure that AACI_SL2TX is always written
80 * to, if required, before data is written to AACI_SL1TX.
81 */
82 writel(val << 4, aaci->base + AACI_SL2TX);
83 writel(reg << 12, aaci->base + AACI_SL1TX);
84
85 /*
86 * Wait for the transmission of both slots to complete.
87 */
88 do {
89 v = readl(aaci->base + AACI_SLFR);
90 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
91
92 if (!timeout)
93 dev_err(&aaci->dev->dev,
94 "timeout waiting for write to complete\n");
95
96 mutex_unlock(&aaci->ac97_sem);
97 }
98
99 /*
100 * Read an AC'97 register.
101 */
102 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
103 {
104 struct aaci *aaci = ac97->private_data;
105 u32 v;
106 int timeout = 5000;
107 int retries = 10;
108
109 if (ac97->num >= 4)
110 return ~0;
111
112 mutex_lock(&aaci->ac97_sem);
113
114 aaci_ac97_select_codec(aaci, ac97);
115
116 /*
117 * Write the register address to slot 1.
118 */
119 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
120
121 /*
122 * Wait for the transmission to complete.
123 */
124 do {
125 v = readl(aaci->base + AACI_SLFR);
126 } while ((v & SLFR_1TXB) && --timeout);
127
128 if (!timeout) {
129 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
130 v = ~0;
131 goto out;
132 }
133
134 /*
135 * Give the AC'97 codec more than enough time
136 * to respond. (42us = ~2 frames at 48kHz.)
137 */
138 udelay(42);
139
140 /*
141 * Wait for slot 2 to indicate data.
142 */
143 timeout = 5000;
144 do {
145 cond_resched();
146 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
147 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
148
149 if (!timeout) {
150 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
151 v = ~0;
152 goto out;
153 }
154
155 do {
156 v = readl(aaci->base + AACI_SL1RX) >> 12;
157 if (v == reg) {
158 v = readl(aaci->base + AACI_SL2RX) >> 4;
159 break;
160 } else if (--retries) {
161 dev_warn(&aaci->dev->dev,
162 "ac97 read back fail. retry\n");
163 continue;
164 } else {
165 dev_warn(&aaci->dev->dev,
166 "wrong ac97 register read back (%x != %x)\n",
167 v, reg);
168 v = ~0;
169 }
170 } while (retries);
171 out:
172 mutex_unlock(&aaci->ac97_sem);
173 return v;
174 }
175
176 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
177 {
178 u32 val;
179 int timeout = 5000;
180
181 do {
182 val = readl(aacirun->base + AACI_SR);
183 } while (val & (SR_TXB|SR_RXB) && timeout--);
184 }
185
186
187
188 /*
189 * Interrupt support.
190 */
191 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
192 {
193 if (mask & ISR_ORINTR) {
194 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
195 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
196 }
197
198 if (mask & ISR_RXTOINTR) {
199 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
200 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
201 }
202
203 if (mask & ISR_RXINTR) {
204 struct aaci_runtime *aacirun = &aaci->capture;
205 void *ptr;
206
207 if (!aacirun->substream || !aacirun->start) {
208 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
209 writel(0, aacirun->base + AACI_IE);
210 return;
211 }
212 ptr = aacirun->ptr;
213
214 do {
215 unsigned int len = aacirun->fifosz;
216 u32 val;
217
218 if (aacirun->bytes <= 0) {
219 aacirun->bytes += aacirun->period;
220 aacirun->ptr = ptr;
221 spin_unlock(&aaci->lock);
222 snd_pcm_period_elapsed(aacirun->substream);
223 spin_lock(&aaci->lock);
224 }
225 if (!(aacirun->cr & CR_EN))
226 break;
227
228 val = readl(aacirun->base + AACI_SR);
229 if (!(val & SR_RXHF))
230 break;
231 if (!(val & SR_RXFF))
232 len >>= 1;
233
234 aacirun->bytes -= len;
235
236 /* reading 16 bytes at a time */
237 for( ; len > 0; len -= 16) {
238 asm(
239 "ldmia %1, {r0, r1, r2, r3}\n\t"
240 "stmia %0!, {r0, r1, r2, r3}"
241 : "+r" (ptr)
242 : "r" (aacirun->fifo)
243 : "r0", "r1", "r2", "r3", "cc");
244
245 if (ptr >= aacirun->end)
246 ptr = aacirun->start;
247 }
248 } while(1);
249 aacirun->ptr = ptr;
250 }
251
252 if (mask & ISR_URINTR) {
253 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
254 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
255 }
256
257 if (mask & ISR_TXINTR) {
258 struct aaci_runtime *aacirun = &aaci->playback;
259 void *ptr;
260
261 if (!aacirun->substream || !aacirun->start) {
262 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
263 writel(0, aacirun->base + AACI_IE);
264 return;
265 }
266
267 ptr = aacirun->ptr;
268 do {
269 unsigned int len = aacirun->fifosz;
270 u32 val;
271
272 if (aacirun->bytes <= 0) {
273 aacirun->bytes += aacirun->period;
274 aacirun->ptr = ptr;
275 spin_unlock(&aaci->lock);
276 snd_pcm_period_elapsed(aacirun->substream);
277 spin_lock(&aaci->lock);
278 }
279 if (!(aacirun->cr & CR_EN))
280 break;
281
282 val = readl(aacirun->base + AACI_SR);
283 if (!(val & SR_TXHE))
284 break;
285 if (!(val & SR_TXFE))
286 len >>= 1;
287
288 aacirun->bytes -= len;
289
290 /* writing 16 bytes at a time */
291 for ( ; len > 0; len -= 16) {
292 asm(
293 "ldmia %0!, {r0, r1, r2, r3}\n\t"
294 "stmia %1, {r0, r1, r2, r3}"
295 : "+r" (ptr)
296 : "r" (aacirun->fifo)
297 : "r0", "r1", "r2", "r3", "cc");
298
299 if (ptr >= aacirun->end)
300 ptr = aacirun->start;
301 }
302 } while (1);
303
304 aacirun->ptr = ptr;
305 }
306 }
307
308 static irqreturn_t aaci_irq(int irq, void *devid)
309 {
310 struct aaci *aaci = devid;
311 u32 mask;
312 int i;
313
314 spin_lock(&aaci->lock);
315 mask = readl(aaci->base + AACI_ALLINTS);
316 if (mask) {
317 u32 m = mask;
318 for (i = 0; i < 4; i++, m >>= 7) {
319 if (m & 0x7f) {
320 aaci_fifo_irq(aaci, i, m);
321 }
322 }
323 }
324 spin_unlock(&aaci->lock);
325
326 return mask ? IRQ_HANDLED : IRQ_NONE;
327 }
328
329
330
331 /*
332 * ALSA support.
333 */
334
335 struct aaci_stream {
336 unsigned char codec_idx;
337 unsigned char rate_idx;
338 };
339
340 static struct aaci_stream aaci_streams[] = {
341 [ACSTREAM_FRONT] = {
342 .codec_idx = 0,
343 .rate_idx = AC97_RATES_FRONT_DAC,
344 },
345 [ACSTREAM_SURROUND] = {
346 .codec_idx = 0,
347 .rate_idx = AC97_RATES_SURR_DAC,
348 },
349 [ACSTREAM_LFE] = {
350 .codec_idx = 0,
351 .rate_idx = AC97_RATES_LFE_DAC,
352 },
353 };
354
355 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
356 {
357 struct aaci_stream *s = aaci_streams + streamid;
358 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
359 }
360
361 static unsigned int rate_list[] = {
362 5512, 8000, 11025, 16000, 22050, 32000, 44100,
363 48000, 64000, 88200, 96000, 176400, 192000
364 };
365
366 /*
367 * Double-rate rule: we can support double rate iff channels == 2
368 * (unimplemented)
369 */
370 static int
371 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
372 {
373 struct aaci *aaci = rule->private;
374 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
375 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
376
377 switch (c->max) {
378 case 6:
379 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
380 case 4:
381 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
382 case 2:
383 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
384 }
385
386 return snd_interval_list(hw_param_interval(p, rule->var),
387 ARRAY_SIZE(rate_list), rate_list,
388 rate_mask);
389 }
390
391 static struct snd_pcm_hardware aaci_hw_info = {
392 .info = SNDRV_PCM_INFO_MMAP |
393 SNDRV_PCM_INFO_MMAP_VALID |
394 SNDRV_PCM_INFO_INTERLEAVED |
395 SNDRV_PCM_INFO_BLOCK_TRANSFER |
396 SNDRV_PCM_INFO_RESUME,
397
398 /*
399 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
400 * words. It also doesn't support 12-bit at all.
401 */
402 .formats = SNDRV_PCM_FMTBIT_S16_LE,
403
404 /* should this be continuous or knot? */
405 .rates = SNDRV_PCM_RATE_CONTINUOUS,
406 .rate_max = 48000,
407 .rate_min = 4000,
408 .channels_min = 2,
409 .channels_max = 6,
410 .buffer_bytes_max = 64 * 1024,
411 .period_bytes_min = 256,
412 .period_bytes_max = PAGE_SIZE,
413 .periods_min = 4,
414 .periods_max = PAGE_SIZE / 16,
415 };
416
417 static int __aaci_pcm_open(struct aaci *aaci,
418 struct snd_pcm_substream *substream,
419 struct aaci_runtime *aacirun)
420 {
421 struct snd_pcm_runtime *runtime = substream->runtime;
422 int ret;
423
424 aacirun->substream = substream;
425 runtime->private_data = aacirun;
426 runtime->hw = aaci_hw_info;
427
428 /*
429 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
430 * mode, each 32-bit word contains one sample. If we're in
431 * compact mode, each 32-bit word contains two samples, effectively
432 * halving the FIFO size. However, we don't know for sure which
433 * we'll be using at this point. We set this to the lower limit.
434 */
435 runtime->hw.fifo_size = aaci->fifosize * 2;
436
437 /*
438 * Add rule describing hardware rate dependency
439 * on the number of channels.
440 */
441 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
442 aaci_rule_rate_by_channels, aaci,
443 SNDRV_PCM_HW_PARAM_CHANNELS,
444 SNDRV_PCM_HW_PARAM_RATE, -1);
445 if (ret)
446 goto out;
447
448 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
449 DRIVER_NAME, aaci);
450 if (ret)
451 goto out;
452
453 return 0;
454
455 out:
456 return ret;
457 }
458
459
460 /*
461 * Common ALSA stuff
462 */
463 static int aaci_pcm_close(struct snd_pcm_substream *substream)
464 {
465 struct aaci *aaci = substream->private_data;
466 struct aaci_runtime *aacirun = substream->runtime->private_data;
467
468 WARN_ON(aacirun->cr & CR_EN);
469
470 aacirun->substream = NULL;
471 free_irq(aaci->dev->irq[0], aaci);
472
473 return 0;
474 }
475
476 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
477 {
478 struct aaci_runtime *aacirun = substream->runtime->private_data;
479
480 /*
481 * This must not be called with the device enabled.
482 */
483 WARN_ON(aacirun->cr & CR_EN);
484
485 if (aacirun->pcm_open)
486 snd_ac97_pcm_close(aacirun->pcm);
487 aacirun->pcm_open = 0;
488
489 /*
490 * Clear out the DMA and any allocated buffers.
491 */
492 devdma_hw_free(NULL, substream);
493
494 return 0;
495 }
496
497 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
498 struct aaci_runtime *aacirun,
499 struct snd_pcm_hw_params *params)
500 {
501 int err;
502
503 aaci_pcm_hw_free(substream);
504 if (aacirun->pcm_open) {
505 snd_ac97_pcm_close(aacirun->pcm);
506 aacirun->pcm_open = 0;
507 }
508
509 err = devdma_hw_alloc(NULL, substream,
510 params_buffer_bytes(params));
511 if (err < 0)
512 goto out;
513
514 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
515 params_channels(params),
516 aacirun->pcm->r[0].slots);
517 if (err)
518 goto out;
519
520 aacirun->pcm_open = 1;
521
522 out:
523 return err;
524 }
525
526 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
527 {
528 struct snd_pcm_runtime *runtime = substream->runtime;
529 struct aaci_runtime *aacirun = runtime->private_data;
530
531 aacirun->start = (void *)runtime->dma_area;
532 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
533 aacirun->ptr = aacirun->start;
534 aacirun->period =
535 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
536
537 return 0;
538 }
539
540 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
541 {
542 struct snd_pcm_runtime *runtime = substream->runtime;
543 struct aaci_runtime *aacirun = runtime->private_data;
544 ssize_t bytes = aacirun->ptr - aacirun->start;
545
546 return bytes_to_frames(runtime, bytes);
547 }
548
549 static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma)
550 {
551 return devdma_mmap(NULL, substream, vma);
552 }
553
554
555 /*
556 * Playback specific ALSA stuff
557 */
558 static const u32 channels_to_txmask[] = {
559 [2] = CR_SL3 | CR_SL4,
560 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
561 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
562 };
563
564 /*
565 * We can support two and four channel audio. Unfortunately
566 * six channel audio requires a non-standard channel ordering:
567 * 2 -> FL(3), FR(4)
568 * 4 -> FL(3), FR(4), SL(7), SR(8)
569 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
570 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
571 * This requires an ALSA configuration file to correct.
572 */
573 static unsigned int channel_list[] = { 2, 4, 6 };
574
575 static int
576 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
577 {
578 struct aaci *aaci = rule->private;
579 unsigned int chan_mask = 1 << 0, slots;
580
581 /*
582 * pcms[0] is the our 5.1 PCM instance.
583 */
584 slots = aaci->ac97_bus->pcms[0].r[0].slots;
585 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
586 chan_mask |= 1 << 1;
587 if (slots & (1 << AC97_SLOT_LFE))
588 chan_mask |= 1 << 2;
589 }
590
591 return snd_interval_list(hw_param_interval(p, rule->var),
592 ARRAY_SIZE(channel_list), channel_list,
593 chan_mask);
594 }
595
596 static int aaci_pcm_open(struct snd_pcm_substream *substream)
597 {
598 struct aaci *aaci = substream->private_data;
599 int ret;
600
601 /*
602 * Add rule describing channel dependency.
603 */
604 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
605 SNDRV_PCM_HW_PARAM_CHANNELS,
606 aaci_rule_channels, aaci,
607 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
608 if (ret)
609 return ret;
610
611 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
612 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
613 } else {
614 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
615 }
616 return ret;
617 }
618
619 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
620 struct snd_pcm_hw_params *params)
621 {
622 struct aaci *aaci = substream->private_data;
623 struct aaci_runtime *aacirun = substream->runtime->private_data;
624 unsigned int channels = params_channels(params);
625 int ret;
626
627 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
628 !channels_to_txmask[channels]);
629
630 ret = aaci_pcm_hw_params(substream, aacirun, params);
631
632 /*
633 * Enable FIFO, compact mode, 16 bits per sample.
634 * FIXME: double rate slots?
635 */
636 if (ret >= 0) {
637 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
638 aacirun->cr |= channels_to_txmask[channels];
639
640 aacirun->fifosz = aaci->fifosize * 4;
641 if (aacirun->cr & CR_COMPACT)
642 aacirun->fifosz >>= 1;
643 }
644 return ret;
645 }
646
647 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
648 {
649 u32 ie;
650
651 ie = readl(aacirun->base + AACI_IE);
652 ie &= ~(IE_URIE|IE_TXIE);
653 writel(ie, aacirun->base + AACI_IE);
654 aacirun->cr &= ~CR_EN;
655 aaci_chan_wait_ready(aacirun);
656 writel(aacirun->cr, aacirun->base + AACI_TXCR);
657 }
658
659 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
660 {
661 u32 ie;
662
663 aaci_chan_wait_ready(aacirun);
664 aacirun->cr |= CR_EN;
665
666 ie = readl(aacirun->base + AACI_IE);
667 ie |= IE_URIE | IE_TXIE;
668 writel(ie, aacirun->base + AACI_IE);
669 writel(aacirun->cr, aacirun->base + AACI_TXCR);
670 }
671
672 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
673 {
674 struct aaci *aaci = substream->private_data;
675 struct aaci_runtime *aacirun = substream->runtime->private_data;
676 unsigned long flags;
677 int ret = 0;
678
679 spin_lock_irqsave(&aaci->lock, flags);
680 switch (cmd) {
681 case SNDRV_PCM_TRIGGER_START:
682 aaci_pcm_playback_start(aacirun);
683 break;
684
685 case SNDRV_PCM_TRIGGER_RESUME:
686 aaci_pcm_playback_start(aacirun);
687 break;
688
689 case SNDRV_PCM_TRIGGER_STOP:
690 aaci_pcm_playback_stop(aacirun);
691 break;
692
693 case SNDRV_PCM_TRIGGER_SUSPEND:
694 aaci_pcm_playback_stop(aacirun);
695 break;
696
697 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
698 break;
699
700 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
701 break;
702
703 default:
704 ret = -EINVAL;
705 }
706 spin_unlock_irqrestore(&aaci->lock, flags);
707
708 return ret;
709 }
710
711 static struct snd_pcm_ops aaci_playback_ops = {
712 .open = aaci_pcm_open,
713 .close = aaci_pcm_close,
714 .ioctl = snd_pcm_lib_ioctl,
715 .hw_params = aaci_pcm_playback_hw_params,
716 .hw_free = aaci_pcm_hw_free,
717 .prepare = aaci_pcm_prepare,
718 .trigger = aaci_pcm_playback_trigger,
719 .pointer = aaci_pcm_pointer,
720 .mmap = aaci_pcm_mmap,
721 };
722
723 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
724 struct snd_pcm_hw_params *params)
725 {
726 struct aaci *aaci = substream->private_data;
727 struct aaci_runtime *aacirun = substream->runtime->private_data;
728 int ret;
729
730 ret = aaci_pcm_hw_params(substream, aacirun, params);
731
732 if (ret >= 0) {
733 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
734
735 /* Line in record: slot 3 and 4 */
736 aacirun->cr |= CR_SL3 | CR_SL4;
737
738 aacirun->fifosz = aaci->fifosize * 4;
739
740 if (aacirun->cr & CR_COMPACT)
741 aacirun->fifosz >>= 1;
742 }
743 return ret;
744 }
745
746 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
747 {
748 u32 ie;
749
750 aaci_chan_wait_ready(aacirun);
751
752 ie = readl(aacirun->base + AACI_IE);
753 ie &= ~(IE_ORIE | IE_RXIE);
754 writel(ie, aacirun->base+AACI_IE);
755
756 aacirun->cr &= ~CR_EN;
757
758 writel(aacirun->cr, aacirun->base + AACI_RXCR);
759 }
760
761 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
762 {
763 u32 ie;
764
765 aaci_chan_wait_ready(aacirun);
766
767 #ifdef DEBUG
768 /* RX Timeout value: bits 28:17 in RXCR */
769 aacirun->cr |= 0xf << 17;
770 #endif
771
772 aacirun->cr |= CR_EN;
773 writel(aacirun->cr, aacirun->base + AACI_RXCR);
774
775 ie = readl(aacirun->base + AACI_IE);
776 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
777 writel(ie, aacirun->base + AACI_IE);
778 }
779
780 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
781 {
782 struct aaci *aaci = substream->private_data;
783 struct aaci_runtime *aacirun = substream->runtime->private_data;
784 unsigned long flags;
785 int ret = 0;
786
787 spin_lock_irqsave(&aaci->lock, flags);
788
789 switch (cmd) {
790 case SNDRV_PCM_TRIGGER_START:
791 aaci_pcm_capture_start(aacirun);
792 break;
793
794 case SNDRV_PCM_TRIGGER_RESUME:
795 aaci_pcm_capture_start(aacirun);
796 break;
797
798 case SNDRV_PCM_TRIGGER_STOP:
799 aaci_pcm_capture_stop(aacirun);
800 break;
801
802 case SNDRV_PCM_TRIGGER_SUSPEND:
803 aaci_pcm_capture_stop(aacirun);
804 break;
805
806 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
807 break;
808
809 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
810 break;
811
812 default:
813 ret = -EINVAL;
814 }
815
816 spin_unlock_irqrestore(&aaci->lock, flags);
817
818 return ret;
819 }
820
821 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
822 {
823 struct snd_pcm_runtime *runtime = substream->runtime;
824 struct aaci *aaci = substream->private_data;
825
826 aaci_pcm_prepare(substream);
827
828 /* allow changing of sample rate */
829 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
830 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
831 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
832
833 /* Record select: Mic: 0, Aux: 3, Line: 4 */
834 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
835
836 return 0;
837 }
838
839 static struct snd_pcm_ops aaci_capture_ops = {
840 .open = aaci_pcm_open,
841 .close = aaci_pcm_close,
842 .ioctl = snd_pcm_lib_ioctl,
843 .hw_params = aaci_pcm_capture_hw_params,
844 .hw_free = aaci_pcm_hw_free,
845 .prepare = aaci_pcm_capture_prepare,
846 .trigger = aaci_pcm_capture_trigger,
847 .pointer = aaci_pcm_pointer,
848 .mmap = aaci_pcm_mmap,
849 };
850
851 /*
852 * Power Management.
853 */
854 #ifdef CONFIG_PM
855 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
856 {
857 struct aaci *aaci = card->private_data;
858 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
859 snd_pcm_suspend_all(aaci->pcm);
860 return 0;
861 }
862
863 static int aaci_do_resume(struct snd_card *card, unsigned int state)
864 {
865 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
866 return 0;
867 }
868
869 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
870 {
871 struct snd_card *card = amba_get_drvdata(dev);
872 return card ? aaci_do_suspend(card) : 0;
873 }
874
875 static int aaci_resume(struct amba_device *dev)
876 {
877 struct snd_card *card = amba_get_drvdata(dev);
878 return card ? aaci_do_resume(card) : 0;
879 }
880 #else
881 #define aaci_do_suspend NULL
882 #define aaci_do_resume NULL
883 #define aaci_suspend NULL
884 #define aaci_resume NULL
885 #endif
886
887
888 static struct ac97_pcm ac97_defs[] __devinitdata = {
889 [0] = { /* Front PCM */
890 .exclusive = 1,
891 .r = {
892 [0] = {
893 .slots = (1 << AC97_SLOT_PCM_LEFT) |
894 (1 << AC97_SLOT_PCM_RIGHT) |
895 (1 << AC97_SLOT_PCM_CENTER) |
896 (1 << AC97_SLOT_PCM_SLEFT) |
897 (1 << AC97_SLOT_PCM_SRIGHT) |
898 (1 << AC97_SLOT_LFE),
899 },
900 },
901 },
902 [1] = { /* PCM in */
903 .stream = 1,
904 .exclusive = 1,
905 .r = {
906 [0] = {
907 .slots = (1 << AC97_SLOT_PCM_LEFT) |
908 (1 << AC97_SLOT_PCM_RIGHT),
909 },
910 },
911 },
912 [2] = { /* Mic in */
913 .stream = 1,
914 .exclusive = 1,
915 .r = {
916 [0] = {
917 .slots = (1 << AC97_SLOT_MIC),
918 },
919 },
920 }
921 };
922
923 static struct snd_ac97_bus_ops aaci_bus_ops = {
924 .write = aaci_ac97_write,
925 .read = aaci_ac97_read,
926 };
927
928 static int __devinit aaci_probe_ac97(struct aaci *aaci)
929 {
930 struct snd_ac97_template ac97_template;
931 struct snd_ac97_bus *ac97_bus;
932 struct snd_ac97 *ac97;
933 int ret;
934
935 writel(0, aaci->base + AC97_POWERDOWN);
936 /*
937 * Assert AACIRESET for 2us
938 */
939 writel(0, aaci->base + AACI_RESET);
940 udelay(2);
941 writel(RESET_NRST, aaci->base + AACI_RESET);
942
943 /*
944 * Give the AC'97 codec more than enough time
945 * to wake up. (42us = ~2 frames at 48kHz.)
946 */
947 udelay(42);
948
949 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
950 if (ret)
951 goto out;
952
953 ac97_bus->clock = 48000;
954 aaci->ac97_bus = ac97_bus;
955
956 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
957 ac97_template.private_data = aaci;
958 ac97_template.num = 0;
959 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
960
961 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
962 if (ret)
963 goto out;
964 aaci->ac97 = ac97;
965
966 /*
967 * Disable AC97 PC Beep input on audio codecs.
968 */
969 if (ac97_is_audio(ac97))
970 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
971
972 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
973 if (ret)
974 goto out;
975
976 aaci->playback.pcm = &ac97_bus->pcms[0];
977 aaci->capture.pcm = &ac97_bus->pcms[1];
978
979 out:
980 return ret;
981 }
982
983 static void aaci_free_card(struct snd_card *card)
984 {
985 struct aaci *aaci = card->private_data;
986 if (aaci->base)
987 iounmap(aaci->base);
988 }
989
990 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
991 {
992 struct aaci *aaci;
993 struct snd_card *card;
994 int err;
995
996 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
997 THIS_MODULE, sizeof(struct aaci), &card);
998 if (err < 0)
999 return NULL;
1000
1001 card->private_free = aaci_free_card;
1002
1003 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
1004 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
1005 snprintf(card->longname, sizeof(card->longname),
1006 "%s at 0x%016llx, irq %d",
1007 card->shortname, (unsigned long long)dev->res.start,
1008 dev->irq[0]);
1009
1010 aaci = card->private_data;
1011 mutex_init(&aaci->ac97_sem);
1012 spin_lock_init(&aaci->lock);
1013 aaci->card = card;
1014 aaci->dev = dev;
1015
1016 /* Set MAINCR to allow slot 1 and 2 data IO */
1017 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
1018 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
1019
1020 return aaci;
1021 }
1022
1023 static int __devinit aaci_init_pcm(struct aaci *aaci)
1024 {
1025 struct snd_pcm *pcm;
1026 int ret;
1027
1028 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
1029 if (ret == 0) {
1030 aaci->pcm = pcm;
1031 pcm->private_data = aaci;
1032 pcm->info_flags = 0;
1033
1034 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
1035
1036 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
1037 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
1038 }
1039
1040 return ret;
1041 }
1042
1043 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
1044 {
1045 struct aaci_runtime *aacirun = &aaci->playback;
1046 int i;
1047
1048 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
1049
1050 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
1051 writel(0, aacirun->fifo);
1052
1053 writel(0, aacirun->base + AACI_TXCR);
1054
1055 /*
1056 * Re-initialise the AACI after the FIFO depth test, to
1057 * ensure that the FIFOs are empty. Unfortunately, merely
1058 * disabling the channel doesn't clear the FIFO.
1059 */
1060 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
1061 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1062
1063 /*
1064 * If we hit 4096, we failed. Go back to the specified
1065 * fifo depth.
1066 */
1067 if (i == 4096)
1068 i = 8;
1069
1070 return i;
1071 }
1072
1073 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1074 {
1075 struct aaci *aaci;
1076 int ret, i;
1077
1078 ret = amba_request_regions(dev, NULL);
1079 if (ret)
1080 return ret;
1081
1082 aaci = aaci_init_card(dev);
1083 if (!aaci) {
1084 ret = -ENOMEM;
1085 goto out;
1086 }
1087
1088 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1089 if (!aaci->base) {
1090 ret = -ENOMEM;
1091 goto out;
1092 }
1093
1094 /*
1095 * Playback uses AACI channel 0
1096 */
1097 aaci->playback.base = aaci->base + AACI_CSCH1;
1098 aaci->playback.fifo = aaci->base + AACI_DR1;
1099
1100 /*
1101 * Capture uses AACI channel 0
1102 */
1103 aaci->capture.base = aaci->base + AACI_CSCH1;
1104 aaci->capture.fifo = aaci->base + AACI_DR1;
1105
1106 for (i = 0; i < 4; i++) {
1107 void __iomem *base = aaci->base + i * 0x14;
1108
1109 writel(0, base + AACI_IE);
1110 writel(0, base + AACI_TXCR);
1111 writel(0, base + AACI_RXCR);
1112 }
1113
1114 writel(0x1fff, aaci->base + AACI_INTCLR);
1115 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1116
1117 ret = aaci_probe_ac97(aaci);
1118 if (ret)
1119 goto out;
1120
1121 /*
1122 * Size the FIFOs (must be multiple of 16).
1123 */
1124 aaci->fifosize = aaci_size_fifo(aaci);
1125 if (aaci->fifosize & 15) {
1126 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1127 aaci->fifosize);
1128 ret = -ENODEV;
1129 goto out;
1130 }
1131
1132 ret = aaci_init_pcm(aaci);
1133 if (ret)
1134 goto out;
1135
1136 snd_card_set_dev(aaci->card, &dev->dev);
1137
1138 ret = snd_card_register(aaci->card);
1139 if (ret == 0) {
1140 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1141 aaci->fifosize);
1142 amba_set_drvdata(dev, aaci->card);
1143 return ret;
1144 }
1145
1146 out:
1147 if (aaci)
1148 snd_card_free(aaci->card);
1149 amba_release_regions(dev);
1150 return ret;
1151 }
1152
1153 static int __devexit aaci_remove(struct amba_device *dev)
1154 {
1155 struct snd_card *card = amba_get_drvdata(dev);
1156
1157 amba_set_drvdata(dev, NULL);
1158
1159 if (card) {
1160 struct aaci *aaci = card->private_data;
1161 writel(0, aaci->base + AACI_MAINCR);
1162
1163 snd_card_free(card);
1164 amba_release_regions(dev);
1165 }
1166
1167 return 0;
1168 }
1169
1170 static struct amba_id aaci_ids[] = {
1171 {
1172 .id = 0x00041041,
1173 .mask = 0x000fffff,
1174 },
1175 { 0, 0 },
1176 };
1177
1178 static struct amba_driver aaci_driver = {
1179 .drv = {
1180 .name = DRIVER_NAME,
1181 },
1182 .probe = aaci_probe,
1183 .remove = __devexit_p(aaci_remove),
1184 .suspend = aaci_suspend,
1185 .resume = aaci_resume,
1186 .id_table = aaci_ids,
1187 };
1188
1189 static int __init aaci_init(void)
1190 {
1191 return amba_driver_register(&aaci_driver);
1192 }
1193
1194 static void __exit aaci_exit(void)
1195 {
1196 amba_driver_unregister(&aaci_driver);
1197 }
1198
1199 module_init(aaci_init);
1200 module_exit(aaci_exit);
1201
1202 MODULE_LICENSE("GPL");
1203 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");
AMDTP streaming driver for the Linux FireWire stack (Juju)