arch/powerpc/sysdev/i8259.c

   1 /*
   2  * i8259 interrupt controller driver.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * as published by the Free Software Foundation; either version
   7  * 2 of the License, or (at your option) any later version.
   8  */
   9 #undef DEBUG
  10
  11 #include <linux/init.h>
  12 #include <linux/ioport.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/kernel.h>
  15 #include <linux/delay.h>
  16 #include <asm/io.h>
  17 #include <asm/i8259.h>
  18 #include <asm/prom.h>
  19
  20 static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */
  21
  22 static unsigned char cached_8259[2] = { 0xff, 0xff };
  23 #define cached_A1 (cached_8259[0])
  24 #define cached_21 (cached_8259[1])
  25
  26 static DEFINE_SPINLOCK(i8259_lock);
  27
  28 static struct device_node *i8259_node;
  29 static struct irq_host *i8259_host;
  30
  31 /*
  32  * Acknowledge the IRQ using either the PCI host bridge's interrupt
  33  * acknowledge feature or poll.  How i8259_init() is called determines
  34  * which is called.  It should be noted that polling is broken on some
  35  * IBM and Motorola PReP boxes so we must use the int-ack feature on them.
  36  */
  37 unsigned int i8259_irq(struct pt_regs *regs)
  38 {
  39         int irq;
  40         int lock = 0;
  41
  42         /* Either int-ack or poll for the IRQ */
  43         if (pci_intack)
  44                 irq = readb(pci_intack);
  45         else {
  46                 spin_lock(&i8259_lock);
  47                 lock = 1;
  48
  49                 /* Perform an interrupt acknowledge cycle on controller 1. */
  50                 outb(0x0C, 0x20);               /* prepare for poll */
  51                 irq = inb(0x20) & 7;
  52                 if (irq == 2 ) {
  53                         /*
  54                          * Interrupt is cascaded so perform interrupt
  55                          * acknowledge on controller 2.
  56                          */
  57                         outb(0x0C, 0xA0);       /* prepare for poll */
  58                         irq = (inb(0xA0) & 7) + 8;
  59                 }
  60         }
  61
  62         if (irq == 7) {
  63                 /*
  64                  * This may be a spurious interrupt.
  65                  *
  66                  * Read the interrupt status register (ISR). If the most
  67                  * significant bit is not set then there is no valid
  68                  * interrupt.
  69                  */
  70                 if (!pci_intack)
  71                         outb(0x0B, 0x20);       /* ISR register */
  72                 if(~inb(0x20) & 0x80)
  73                         irq = NO_IRQ;
  74         } else if (irq == 0xff)
  75                 irq = NO_IRQ;
  76
  77         if (lock)
  78                 spin_unlock(&i8259_lock);
  79         return irq;
  80 }
  81
  82 static void i8259_mask_and_ack_irq(unsigned int irq_nr)
  83 {
  84         unsigned long flags;
  85
  86         spin_lock_irqsave(&i8259_lock, flags);
  87         if (irq_nr > 7) {
  88                 cached_A1 |= 1 << (irq_nr-8);
  89                 inb(0xA1);      /* DUMMY */
  90                 outb(cached_A1, 0xA1);
  91                 outb(0x20, 0xA0);       /* Non-specific EOI */
  92                 outb(0x20, 0x20);       /* Non-specific EOI to cascade */
  93         } else {
  94                 cached_21 |= 1 << irq_nr;
  95                 inb(0x21);      /* DUMMY */
  96                 outb(cached_21, 0x21);
  97                 outb(0x20, 0x20);       /* Non-specific EOI */
  98         }
  99         spin_unlock_irqrestore(&i8259_lock, flags);
 100 }
 101
 102 static void i8259_set_irq_mask(int irq_nr)
 103 {
 104         outb(cached_A1,0xA1);
 105         outb(cached_21,0x21);
 106 }
 107
 108 static void i8259_mask_irq(unsigned int irq_nr)
 109 {
 110         unsigned long flags;
 111
 112         pr_debug("i8259_mask_irq(%d)\n", irq_nr);
 113
 114         spin_lock_irqsave(&i8259_lock, flags);
 115         if (irq_nr < 8)
 116                 cached_21 |= 1 << irq_nr;
 117         else
 118                 cached_A1 |= 1 << (irq_nr-8);
 119         i8259_set_irq_mask(irq_nr);
 120         spin_unlock_irqrestore(&i8259_lock, flags);
 121 }
 122
 123 static void i8259_unmask_irq(unsigned int irq_nr)
 124 {
 125         unsigned long flags;
 126
 127         pr_debug("i8259_unmask_irq(%d)\n", irq_nr);
 128
 129         spin_lock_irqsave(&i8259_lock, flags);
 130         if (irq_nr < 8)
 131                 cached_21 &= ~(1 << irq_nr);
 132         else
 133                 cached_A1 &= ~(1 << (irq_nr-8));
 134         i8259_set_irq_mask(irq_nr);
 135         spin_unlock_irqrestore(&i8259_lock, flags);
 136 }
 137
 138 static struct irq_chip i8259_pic = {
 139         .typename       = " i8259    ",
 140         .mask           = i8259_mask_irq,
 141         .unmask         = i8259_unmask_irq,
 142         .mask_ack       = i8259_mask_and_ack_irq,
 143 };
 144
 145 static struct resource pic1_iores = {
 146         .name = "8259 (master)",
 147         .start = 0x20,
 148         .end = 0x21,
 149         .flags = IORESOURCE_BUSY,
 150 };
 151
 152 static struct resource pic2_iores = {
 153         .name = "8259 (slave)",
 154         .start = 0xa0,
 155         .end = 0xa1,
 156         .flags = IORESOURCE_BUSY,
 157 };
 158
 159 static struct resource pic_edgectrl_iores = {
 160         .name = "8259 edge control",
 161         .start = 0x4d0,
 162         .end = 0x4d1,
 163         .flags = IORESOURCE_BUSY,
 164 };
 165
 166 static int i8259_host_match(struct irq_host *h, struct device_node *node)
 167 {
 168         return i8259_node == NULL || i8259_node == node;
 169 }
 170
 171 static int i8259_host_map(struct irq_host *h, unsigned int virq,
 172                           irq_hw_number_t hw)
 173 {
 174         pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw);
 175
 176         /* We block the internal cascade */
 177         if (hw == 2)
 178                 get_irq_desc(virq)->status |= IRQ_NOREQUEST;
 179
 180         /* We use the level handler only for now, we might want to
 181          * be more cautious here but that works for now
 182          */
 183         get_irq_desc(virq)->status |= IRQ_LEVEL;
 184         set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq);
 185         return 0;
 186 }
 187
 188 static void i8259_host_unmap(struct irq_host *h, unsigned int virq)
 189 {
 190         /* Make sure irq is masked in hardware */
 191         i8259_mask_irq(virq);
 192
 193         /* remove chip and handler */
 194         set_irq_chip_and_handler(virq, NULL, NULL);
 195
 196         /* Make sure it's completed */
 197         synchronize_irq(virq);
 198 }
 199
 200 static int i8259_host_xlate(struct irq_host *h, struct device_node *ct,
 201                             u32 *intspec, unsigned int intsize,
 202                             irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 203 {
 204         static unsigned char map_isa_senses[4] = {
 205                 IRQ_TYPE_LEVEL_LOW,
 206                 IRQ_TYPE_LEVEL_HIGH,
 207                 IRQ_TYPE_EDGE_FALLING,
 208                 IRQ_TYPE_EDGE_RISING,
 209         };
 210
 211         *out_hwirq = intspec[0];
 212         if (intsize > 1 && intspec[1] < 4)
 213                 *out_flags = map_isa_senses[intspec[1]];
 214         else
 215                 *out_flags = IRQ_TYPE_NONE;
 216
 217         return 0;
 218 }
 219
 220 static struct irq_host_ops i8259_host_ops = {
 221         .match = i8259_host_match,
 222         .map = i8259_host_map,
 223         .unmap = i8259_host_unmap,
 224         .xlate = i8259_host_xlate,
 225 };
 226
 227 /**
 228  * i8259_init - Initialize the legacy controller
 229  * @node: device node of the legacy PIC (can be NULL, but then, it will match
 230  *        all interrupts, so beware)
 231  * @intack_addr: PCI interrupt acknowledge (real) address which will return
 232  *               the active irq from the 8259
 233  */
 234 void i8259_init(struct device_node *node, unsigned long intack_addr)
 235 {
 236         unsigned long flags;
 237
 238         /* initialize the controller */
 239         spin_lock_irqsave(&i8259_lock, flags);
 240
 241         /* Mask all first */
 242         outb(0xff, 0xA1);
 243         outb(0xff, 0x21);
 244
 245         /* init master interrupt controller */
 246         outb(0x11, 0x20); /* Start init sequence */
 247         outb(0x00, 0x21); /* Vector base */
 248         outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */
 249         outb(0x01, 0x21); /* Select 8086 mode */
 250
 251         /* init slave interrupt controller */
 252         outb(0x11, 0xA0); /* Start init sequence */
 253         outb(0x08, 0xA1); /* Vector base */
 254         outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */
 255         outb(0x01, 0xA1); /* Select 8086 mode */
 256
 257         /* That thing is slow */
 258         udelay(100);
 259
 260         /* always read ISR */
 261         outb(0x0B, 0x20);
 262         outb(0x0B, 0xA0);
 263
 264         /* Unmask the internal cascade */
 265         cached_21 &= ~(1 << 2);
 266
 267         /* Set interrupt masks */
 268         outb(cached_A1, 0xA1);
 269         outb(cached_21, 0x21);
 270
 271         spin_unlock_irqrestore(&i8259_lock, flags);
 272
 273         /* create a legacy host */
 274         if (node)
 275                 i8259_node = of_node_get(node);
 276         i8259_host = irq_alloc_host(IRQ_HOST_MAP_LEGACY, 0, &i8259_host_ops, 0);
 277         if (i8259_host == NULL) {
 278                 printk(KERN_ERR "i8259: failed to allocate irq host !\n");
 279                 return;
 280         }
 281
 282         /* reserve our resources */
 283         /* XXX should we continue doing that ? it seems to cause problems
 284          * with further requesting of PCI IO resources for that range...
 285          * need to look into it.
 286          */
 287         request_resource(&ioport_resource, &pic1_iores);
 288         request_resource(&ioport_resource, &pic2_iores);
 289         request_resource(&ioport_resource, &pic_edgectrl_iores);
 290
 291         if (intack_addr != 0)
 292                 pci_intack = ioremap(intack_addr, 1);
 293
 294         printk(KERN_INFO "i8259 legacy interrupt controller initialized\n");
 295 }