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[PATCH] ARM: 2777/1: Fix broken comment arch/arm/mm/proc-arm1020.S
[firewire-audio.git] / sound / pci / atiixp_modem.c
bloba6b4b8d589fd672918da5efda911e280f59cfc10
1 /*
2 * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #include <sound/driver.h>
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/info.h>
34 #include <sound/ac97_codec.h>
35 #include <sound/initval.h>
36
37 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38 MODULE_DESCRIPTION("ATI IXP MC97 controller");
39 MODULE_LICENSE("GPL");
40 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
41
42 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
43 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
44 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
45 static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
46
47 module_param_array(index, int, NULL, 0444);
48 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
49 module_param_array(id, charp, NULL, 0444);
50 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
51 module_param_array(enable, bool, NULL, 0444);
52 MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
53 module_param_array(ac97_clock, int, NULL, 0444);
54 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
55
56
57 /*
58 */
59
60 #define ATI_REG_ISR 0x00 /* interrupt source */
61 #define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
62 #define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
63 #define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
64 #define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
65 #define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
66 #define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
67 #define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
68 #define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
69 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
70 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
71 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
72 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
73 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
74 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
75 #define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
76
77 #define ATI_REG_IER 0x04 /* interrupt enable */
78 #define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
79 #define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
80 #define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
81 #define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
82 #define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
83 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
84 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
85 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
86 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
87 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
88 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
89 #define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
90 #define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
91
92 #define ATI_REG_CMD 0x08 /* command */
93 #define ATI_REG_CMD_POWERDOWN (1U<<0)
94 #define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
95 #define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
96 #define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
97 #define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
98 #define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
99 #define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
100 #define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
101 #define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
102 #define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
103 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
104 #define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
105 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
106 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
107 #define ATI_REG_CMD_BURST_EN (1U<<25)
108 #define ATI_REG_CMD_PANIC_EN (1U<<26)
109 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
110 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
111 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
112 #define ATI_REG_CMD_AC_SYNC (1U<<30)
113 #define ATI_REG_CMD_AC_RESET (1U<<31)
114
115 #define ATI_REG_PHYS_OUT_ADDR 0x0c
116 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
117 #define ATI_REG_PHYS_OUT_RW (1U<<2)
118 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
119 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
120 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
121
122 #define ATI_REG_PHYS_IN_ADDR 0x10
123 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
124 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
125 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
126
127 #define ATI_REG_SLOTREQ 0x14
128
129 #define ATI_REG_COUNTER 0x18
130 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
131 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
132
133 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
134
135 #define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
136 #define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
137 #define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
138 #define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
139 #define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
140 #define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
141 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
142 #define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
143 #define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
144 #define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
145 #define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
146 #define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
147 #define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
148 #define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
149 #define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
150 #define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
151 #define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
152 #define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
153 #define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
154 #define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
155 #define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
156 #define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
157 #define ATI_REG_MODEM_OUT_FIFO_USED 0x70
158 #define ATI_REG_MODEM_OUT_GPIO 0x74
159 #define ATI_REG_MODEM_OUT_GPIO_EN 1
160 #define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
161 #define ATI_REG_MODEM_IN_GPIO 0x78
162
163 #define ATI_REG_MODEM_MIRROR 0x7c
164 #define ATI_REG_AUDIO_MIRROR 0x80
165
166 #define ATI_REG_MODEM_FIFO_FLUSH 0x88
167 #define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
168 #define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
169 #define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
170 #define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
171
172 /* LINKPTR */
173 #define ATI_REG_LINKPTR_EN (1U<<0)
174
175 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
176
177
178 /*
179 */
180
181 typedef struct snd_atiixp atiixp_t;
182 typedef struct snd_atiixp_dma atiixp_dma_t;
183 typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
184
185
186 /*
187 * DMA packate descriptor
188 */
189
190 typedef struct atiixp_dma_desc {
191 u32 addr; /* DMA buffer address */
192 u16 status; /* status bits */
193 u16 size; /* size of the packet in dwords */
194 u32 next; /* address of the next packet descriptor */
195 } atiixp_dma_desc_t;
196
197 /*
198 * stream enum
199 */
200 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
201 enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
202 enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
203
204 #define NUM_ATI_CODECS 3
205
206
207 /*
208 * constants and callbacks for each DMA type
209 */
210 struct snd_atiixp_dma_ops {
211 int type; /* ATI_DMA_XXX */
212 unsigned int llp_offset; /* LINKPTR offset */
213 unsigned int dt_cur; /* DT_CUR offset */
214 void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
215 void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
216 void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
217 };
218
219 /*
220 * DMA stream
221 */
222 struct snd_atiixp_dma {
223 const atiixp_dma_ops_t *ops;
224 struct snd_dma_buffer desc_buf;
225 snd_pcm_substream_t *substream; /* assigned PCM substream */
226 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
227 unsigned int period_bytes, periods;
228 int opened;
229 int running;
230 int pcm_open_flag;
231 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
232 };
233
234 /*
235 * ATI IXP chip
236 */
237 struct snd_atiixp {
238 snd_card_t *card;
239 struct pci_dev *pci;
240
241 struct resource *res; /* memory i/o */
242 unsigned long addr;
243 void __iomem *remap_addr;
244 int irq;
245
246 ac97_bus_t *ac97_bus;
247 ac97_t *ac97[NUM_ATI_CODECS];
248
249 spinlock_t reg_lock;
250
251 atiixp_dma_t dmas[NUM_ATI_DMAS];
252 struct ac97_pcm *pcms[NUM_ATI_PCMS];
253 snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
254
255 int max_channels; /* max. channels for PCM out */
256
257 unsigned int codec_not_ready_bits; /* for codec detection */
258
259 int spdif_over_aclink; /* passed from the module option */
260 struct semaphore open_mutex; /* playback open mutex */
261 };
262
263
264 /*
265 */
266 static struct pci_device_id snd_atiixp_ids[] = {
267 { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
268 { 0, }
269 };
270
271 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
272
273
274 /*
275 * lowlevel functions
276 */
277
278 /*
279 * update the bits of the given register.
280 * return 1 if the bits changed.
281 */
282 static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
283 unsigned int mask, unsigned int value)
284 {
285 void __iomem *addr = chip->remap_addr + reg;
286 unsigned int data, old_data;
287 old_data = data = readl(addr);
288 data &= ~mask;
289 data |= value;
290 if (old_data == data)
291 return 0;
292 writel(data, addr);
293 return 1;
294 }
295
296 /*
297 * macros for easy use
298 */
299 #define atiixp_write(chip,reg,value) \
300 writel(value, chip->remap_addr + ATI_REG_##reg)
301 #define atiixp_read(chip,reg) \
302 readl(chip->remap_addr + ATI_REG_##reg)
303 #define atiixp_update(chip,reg,mask,val) \
304 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
305
306 /* delay for one tick */
307 #define do_delay() do { \
308 set_current_state(TASK_UNINTERRUPTIBLE); \
309 schedule_timeout(1); \
310 } while (0)
311
312
313 /*
314 * handling DMA packets
315 *
316 * we allocate a linear buffer for the DMA, and split it to each packet.
317 * in a future version, a scatter-gather buffer should be implemented.
318 */
319
320 #define ATI_DESC_LIST_SIZE \
321 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
322
323 /*
324 * build packets ring for the given buffer size.
325 *
326 * IXP handles the buffer descriptors, which are connected as a linked
327 * list. although we can change the list dynamically, in this version,
328 * a static RING of buffer descriptors is used.
329 *
330 * the ring is built in this function, and is set up to the hardware.
331 */
332 static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
333 snd_pcm_substream_t *substream,
334 unsigned int periods,
335 unsigned int period_bytes)
336 {
337 unsigned int i;
338 u32 addr, desc_addr;
339 unsigned long flags;
340
341 if (periods > ATI_MAX_DESCRIPTORS)
342 return -ENOMEM;
343
344 if (dma->desc_buf.area == NULL) {
345 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
346 ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
347 return -ENOMEM;
348 dma->period_bytes = dma->periods = 0; /* clear */
349 }
350
351 if (dma->periods == periods && dma->period_bytes == period_bytes)
352 return 0;
353
354 /* reset DMA before changing the descriptor table */
355 spin_lock_irqsave(&chip->reg_lock, flags);
356 writel(0, chip->remap_addr + dma->ops->llp_offset);
357 dma->ops->enable_dma(chip, 0);
358 dma->ops->enable_dma(chip, 1);
359 spin_unlock_irqrestore(&chip->reg_lock, flags);
360
361 /* fill the entries */
362 addr = (u32)substream->runtime->dma_addr;
363 desc_addr = (u32)dma->desc_buf.addr;
364 for (i = 0; i < periods; i++) {
365 atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
366 desc->addr = cpu_to_le32(addr);
367 desc->status = 0;
368 desc->size = period_bytes >> 2; /* in dwords */
369 desc_addr += sizeof(atiixp_dma_desc_t);
370 if (i == periods - 1)
371 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
372 else
373 desc->next = cpu_to_le32(desc_addr);
374 addr += period_bytes;
375 }
376
377 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
378 chip->remap_addr + dma->ops->llp_offset);
379
380 dma->period_bytes = period_bytes;
381 dma->periods = periods;
382
383 return 0;
384 }
385
386 /*
387 * remove the ring buffer and release it if assigned
388 */
389 static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
390 {
391 if (dma->desc_buf.area) {
392 writel(0, chip->remap_addr + dma->ops->llp_offset);
393 snd_dma_free_pages(&dma->desc_buf);
394 dma->desc_buf.area = NULL;
395 }
396 }
397
398 /*
399 * AC97 interface
400 */
401 static int snd_atiixp_acquire_codec(atiixp_t *chip)
402 {
403 int timeout = 1000;
404
405 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
406 if (! timeout--) {
407 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
408 return -EBUSY;
409 }
410 udelay(1);
411 }
412 return 0;
413 }
414
415 static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
416 {
417 unsigned int data;
418 int timeout;
419
420 if (snd_atiixp_acquire_codec(chip) < 0)
421 return 0xffff;
422 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
423 ATI_REG_PHYS_OUT_ADDR_EN |
424 ATI_REG_PHYS_OUT_RW |
425 codec;
426 atiixp_write(chip, PHYS_OUT_ADDR, data);
427 if (snd_atiixp_acquire_codec(chip) < 0)
428 return 0xffff;
429 timeout = 1000;
430 do {
431 data = atiixp_read(chip, PHYS_IN_ADDR);
432 if (data & ATI_REG_PHYS_IN_READ_FLAG)
433 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
434 udelay(1);
435 } while (--timeout);
436 /* time out may happen during reset */
437 if (reg < 0x7c)
438 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
439 return 0xffff;
440 }
441
442
443 static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
444 {
445 unsigned int data;
446
447 if (snd_atiixp_acquire_codec(chip) < 0)
448 return;
449 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
450 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
451 ATI_REG_PHYS_OUT_ADDR_EN | codec;
452 atiixp_write(chip, PHYS_OUT_ADDR, data);
453 }
454
455
456 static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
457 {
458 atiixp_t *chip = ac97->private_data;
459 return snd_atiixp_codec_read(chip, ac97->num, reg);
460
461 }
462
463 static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
464 {
465 atiixp_t *chip = ac97->private_data;
466 if (reg == AC97_GPIO_STATUS) {
467 atiixp_write(chip, MODEM_OUT_GPIO,
468 (val << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN);
469 return;
470 }
471 snd_atiixp_codec_write(chip, ac97->num, reg, val);
472 }
473
474 /*
475 * reset AC link
476 */
477 static int snd_atiixp_aclink_reset(atiixp_t *chip)
478 {
479 int timeout;
480
481 /* reset powerdoewn */
482 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
483 udelay(10);
484
485 /* perform a software reset */
486 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
487 atiixp_read(chip, CMD);
488 udelay(10);
489 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
490
491 timeout = 10;
492 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
493 /* do a hard reset */
494 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
495 ATI_REG_CMD_AC_SYNC);
496 atiixp_read(chip, CMD);
497 do_delay();
498 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
499 if (--timeout) {
500 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
501 break;
502 }
503 }
504
505 /* deassert RESET and assert SYNC to make sure */
506 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
507 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
508
509 return 0;
510 }
511
512 #ifdef CONFIG_PM
513 static int snd_atiixp_aclink_down(atiixp_t *chip)
514 {
515 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
516 // return -EBUSY;
517 atiixp_update(chip, CMD,
518 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
519 ATI_REG_CMD_POWERDOWN);
520 return 0;
521 }
522 #endif
523
524 /*
525 * auto-detection of codecs
526 *
527 * the IXP chip can generate interrupts for the non-existing codecs.
528 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
529 * even if all three codecs are connected.
530 */
531
532 #define ALL_CODEC_NOT_READY \
533 (ATI_REG_ISR_CODEC0_NOT_READY |\
534 ATI_REG_ISR_CODEC1_NOT_READY |\
535 ATI_REG_ISR_CODEC2_NOT_READY)
536 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
537
538 static int snd_atiixp_codec_detect(atiixp_t *chip)
539 {
540 int timeout;
541
542 chip->codec_not_ready_bits = 0;
543 atiixp_write(chip, IER, CODEC_CHECK_BITS);
544 /* wait for the interrupts */
545 timeout = HZ / 10;
546 while (timeout-- > 0) {
547 do_delay();
548 if (chip->codec_not_ready_bits)
549 break;
550 }
551 atiixp_write(chip, IER, 0); /* disable irqs */
552
553 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
554 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
555 return -ENXIO;
556 }
557 return 0;
558 }
559
560
561 /*
562 * enable DMA and irqs
563 */
564 static int snd_atiixp_chip_start(atiixp_t *chip)
565 {
566 unsigned int reg;
567
568 /* set up spdif, enable burst mode */
569 reg = atiixp_read(chip, CMD);
570 reg |= ATI_REG_CMD_BURST_EN;
571 if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
572 reg |= ATI_REG_CMD_MODEM_PRESENT;
573 atiixp_write(chip, CMD, reg);
574
575 /* clear all interrupt source */
576 atiixp_write(chip, ISR, 0xffffffff);
577 /* enable irqs */
578 atiixp_write(chip, IER,
579 ATI_REG_IER_MODEM_STATUS_EN |
580 ATI_REG_IER_MODEM_IN_XRUN_EN |
581 ATI_REG_IER_MODEM_OUT1_XRUN_EN);
582 return 0;
583 }
584
585
586 /*
587 * disable DMA and IRQs
588 */
589 static int snd_atiixp_chip_stop(atiixp_t *chip)
590 {
591 /* clear interrupt source */
592 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
593 /* disable irqs */
594 atiixp_write(chip, IER, 0);
595 return 0;
596 }
597
598
599 /*
600 * PCM section
601 */
602
603 /*
604 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
605 * position. when SG-buffer is implemented, the offset must be calculated
606 * correctly...
607 */
608 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
609 {
610 atiixp_t *chip = snd_pcm_substream_chip(substream);
611 snd_pcm_runtime_t *runtime = substream->runtime;
612 atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
613 unsigned int curptr;
614 int timeout = 1000;
615
616 while (timeout--) {
617 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
618 if (curptr < dma->buf_addr)
619 continue;
620 curptr -= dma->buf_addr;
621 if (curptr >= dma->buf_bytes)
622 continue;
623 return bytes_to_frames(runtime, curptr);
624 }
625 snd_printd("atiixp-modem: invalid DMA pointer read 0x%x (buf=%x)\n",
626 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
627 return 0;
628 }
629
630 /*
631 * XRUN detected, and stop the PCM substream
632 */
633 static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
634 {
635 if (! dma->substream || ! dma->running)
636 return;
637 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
638 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
639 }
640
641 /*
642 * the period ack. update the substream.
643 */
644 static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
645 {
646 if (! dma->substream || ! dma->running)
647 return;
648 snd_pcm_period_elapsed(dma->substream);
649 }
650
651 /* set BUS_BUSY interrupt bit if any DMA is running */
652 /* call with spinlock held */
653 static void snd_atiixp_check_bus_busy(atiixp_t *chip)
654 {
655 unsigned int bus_busy;
656 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
657 ATI_REG_CMD_MODEM_RECEIVE_EN))
658 bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
659 else
660 bus_busy = 0;
661 atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
662 }
663
664 /* common trigger callback
665 * calling the lowlevel callbacks in it
666 */
667 static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
668 {
669 atiixp_t *chip = snd_pcm_substream_chip(substream);
670 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
671 int err = 0;
672
673 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
674
675 spin_lock(&chip->reg_lock);
676 switch(cmd) {
677 case SNDRV_PCM_TRIGGER_START:
678 dma->ops->enable_transfer(chip, 1);
679 dma->running = 1;
680 break;
681 case SNDRV_PCM_TRIGGER_STOP:
682 dma->ops->enable_transfer(chip, 0);
683 dma->running = 0;
684 break;
685 default:
686 err = -EINVAL;
687 break;
688 }
689 if (! err) {
690 snd_atiixp_check_bus_busy(chip);
691 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
692 dma->ops->flush_dma(chip);
693 snd_atiixp_check_bus_busy(chip);
694 }
695 }
696 spin_unlock(&chip->reg_lock);
697 return err;
698 }
699
700
701 /*
702 * lowlevel callbacks for each DMA type
703 *
704 * every callback is supposed to be called in chip->reg_lock spinlock
705 */
706
707 /* flush FIFO of analog OUT DMA */
708 static void atiixp_out_flush_dma(atiixp_t *chip)
709 {
710 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
711 }
712
713 /* enable/disable analog OUT DMA */
714 static void atiixp_out_enable_dma(atiixp_t *chip, int on)
715 {
716 unsigned int data;
717 data = atiixp_read(chip, CMD);
718 if (on) {
719 if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
720 return;
721 atiixp_out_flush_dma(chip);
722 data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
723 } else
724 data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
725 atiixp_write(chip, CMD, data);
726 }
727
728 /* start/stop transfer over OUT DMA */
729 static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
730 {
731 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
732 on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
733 }
734
735 /* enable/disable analog IN DMA */
736 static void atiixp_in_enable_dma(atiixp_t *chip, int on)
737 {
738 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
739 on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
740 }
741
742 /* start/stop analog IN DMA */
743 static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
744 {
745 if (on) {
746 unsigned int data = atiixp_read(chip, CMD);
747 if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
748 data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
749 atiixp_write(chip, CMD, data);
750 }
751 } else
752 atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
753 }
754
755 /* flush FIFO of analog IN DMA */
756 static void atiixp_in_flush_dma(atiixp_t *chip)
757 {
758 atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
759 }
760
761 /* set up slots and formats for analog OUT */
762 static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
763 {
764 atiixp_t *chip = snd_pcm_substream_chip(substream);
765 unsigned int data;
766
767 spin_lock_irq(&chip->reg_lock);
768 /* set output threshold */
769 data = atiixp_read(chip, MODEM_OUT_FIFO);
770 data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
771 data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
772 atiixp_write(chip, MODEM_OUT_FIFO, data);
773 spin_unlock_irq(&chip->reg_lock);
774 return 0;
775 }
776
777 /* set up slots and formats for analog IN */
778 static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
779 {
780 return 0;
781 }
782
783 /*
784 * hw_params - allocate the buffer and set up buffer descriptors
785 */
786 static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
787 snd_pcm_hw_params_t *hw_params)
788 {
789 atiixp_t *chip = snd_pcm_substream_chip(substream);
790 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
791 int err;
792 int i;
793
794 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
795 if (err < 0)
796 return err;
797 dma->buf_addr = substream->runtime->dma_addr;
798 dma->buf_bytes = params_buffer_bytes(hw_params);
799
800 err = atiixp_build_dma_packets(chip, dma, substream,
801 params_periods(hw_params),
802 params_period_bytes(hw_params));
803 if (err < 0)
804 return err;
805
806 /* set up modem rate */
807 for (i = 0; i < NUM_ATI_CODECS; i++) {
808 if (! chip->ac97[i])
809 continue;
810 snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
811 snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
812 }
813
814 return err;
815 }
816
817 static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
818 {
819 atiixp_t *chip = snd_pcm_substream_chip(substream);
820 atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
821
822 atiixp_clear_dma_packets(chip, dma, substream);
823 snd_pcm_lib_free_pages(substream);
824 return 0;
825 }
826
827
828 /*
829 * pcm hardware definition, identical for all DMA types
830 */
831 static snd_pcm_hardware_t snd_atiixp_pcm_hw =
832 {
833 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
834 SNDRV_PCM_INFO_BLOCK_TRANSFER |
835 SNDRV_PCM_INFO_MMAP_VALID),
836 .formats = SNDRV_PCM_FMTBIT_S16_LE,
837 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_KNOT,
838 .rate_min = 8000,
839 .rate_max = 16000,
840 .channels_min = 2,
841 .channels_max = 2,
842 .buffer_bytes_max = 256 * 1024,
843 .period_bytes_min = 32,
844 .period_bytes_max = 128 * 1024,
845 .periods_min = 2,
846 .periods_max = ATI_MAX_DESCRIPTORS,
847 };
848
849 static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
850 {
851 atiixp_t *chip = snd_pcm_substream_chip(substream);
852 snd_pcm_runtime_t *runtime = substream->runtime;
853 int err;
854 static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
855 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
856 .count = ARRAY_SIZE(rates),
857 .list = rates,
858 .mask = 0,
859 };
860
861 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
862
863 if (dma->opened)
864 return -EBUSY;
865 dma->substream = substream;
866 runtime->hw = snd_atiixp_pcm_hw;
867 dma->ac97_pcm_type = pcm_type;
868 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
869 return err;
870 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
871 return err;
872 runtime->private_data = dma;
873
874 /* enable DMA bits */
875 spin_lock_irq(&chip->reg_lock);
876 dma->ops->enable_dma(chip, 1);
877 spin_unlock_irq(&chip->reg_lock);
878 dma->opened = 1;
879
880 return 0;
881 }
882
883 static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
884 {
885 atiixp_t *chip = snd_pcm_substream_chip(substream);
886 /* disable DMA bits */
887 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
888 spin_lock_irq(&chip->reg_lock);
889 dma->ops->enable_dma(chip, 0);
890 spin_unlock_irq(&chip->reg_lock);
891 dma->substream = NULL;
892 dma->opened = 0;
893 return 0;
894 }
895
896 /*
897 */
898 static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
899 {
900 atiixp_t *chip = snd_pcm_substream_chip(substream);
901 int err;
902
903 down(&chip->open_mutex);
904 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
905 up(&chip->open_mutex);
906 if (err < 0)
907 return err;
908 return 0;
909 }
910
911 static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
912 {
913 atiixp_t *chip = snd_pcm_substream_chip(substream);
914 int err;
915 down(&chip->open_mutex);
916 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
917 up(&chip->open_mutex);
918 return err;
919 }
920
921 static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
922 {
923 atiixp_t *chip = snd_pcm_substream_chip(substream);
924 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
925 }
926
927 static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
928 {
929 atiixp_t *chip = snd_pcm_substream_chip(substream);
930 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
931 }
932
933
934 /* AC97 playback */
935 static snd_pcm_ops_t snd_atiixp_playback_ops = {
936 .open = snd_atiixp_playback_open,
937 .close = snd_atiixp_playback_close,
938 .ioctl = snd_pcm_lib_ioctl,
939 .hw_params = snd_atiixp_pcm_hw_params,
940 .hw_free = snd_atiixp_pcm_hw_free,
941 .prepare = snd_atiixp_playback_prepare,
942 .trigger = snd_atiixp_pcm_trigger,
943 .pointer = snd_atiixp_pcm_pointer,
944 };
945
946 /* AC97 capture */
947 static snd_pcm_ops_t snd_atiixp_capture_ops = {
948 .open = snd_atiixp_capture_open,
949 .close = snd_atiixp_capture_close,
950 .ioctl = snd_pcm_lib_ioctl,
951 .hw_params = snd_atiixp_pcm_hw_params,
952 .hw_free = snd_atiixp_pcm_hw_free,
953 .prepare = snd_atiixp_capture_prepare,
954 .trigger = snd_atiixp_pcm_trigger,
955 .pointer = snd_atiixp_pcm_pointer,
956 };
957
958 static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
959 .type = ATI_DMA_PLAYBACK,
960 .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
961 .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
962 .enable_dma = atiixp_out_enable_dma,
963 .enable_transfer = atiixp_out_enable_transfer,
964 .flush_dma = atiixp_out_flush_dma,
965 };
966
967 static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
968 .type = ATI_DMA_CAPTURE,
969 .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
970 .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
971 .enable_dma = atiixp_in_enable_dma,
972 .enable_transfer = atiixp_in_enable_transfer,
973 .flush_dma = atiixp_in_flush_dma,
974 };
975
976 static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
977 {
978 snd_pcm_t *pcm;
979 int err;
980
981 /* initialize constants */
982 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
983 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
984
985 /* PCM #0: analog I/O */
986 err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
987 if (err < 0)
988 return err;
989 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
990 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
991 pcm->private_data = chip;
992 strcpy(pcm->name, "ATI IXP MC97");
993 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
994
995 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
996 snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
997
998 return 0;
999 }
1000
1001
1002
1003 /*
1004 * interrupt handler
1005 */
1006 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1007 {
1008 atiixp_t *chip = dev_id;
1009 unsigned int status;
1010
1011 status = atiixp_read(chip, ISR);
1012
1013 if (! status)
1014 return IRQ_NONE;
1015
1016 /* process audio DMA */
1017 if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
1018 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1019 else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
1020 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1021 if (status & ATI_REG_ISR_MODEM_IN_XRUN)
1022 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1023 else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
1024 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1025
1026 /* for codec detection */
1027 if (status & CODEC_CHECK_BITS) {
1028 unsigned int detected;
1029 detected = status & CODEC_CHECK_BITS;
1030 spin_lock(&chip->reg_lock);
1031 chip->codec_not_ready_bits |= detected;
1032 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1033 spin_unlock(&chip->reg_lock);
1034 }
1035
1036 /* ack */
1037 atiixp_write(chip, ISR, status);
1038
1039 return IRQ_HANDLED;
1040 }
1041
1042
1043 /*
1044 * ac97 mixer section
1045 */
1046
1047 static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
1048 {
1049 ac97_bus_t *pbus;
1050 ac97_template_t ac97;
1051 int i, err;
1052 int codec_count;
1053 static ac97_bus_ops_t ops = {
1054 .write = snd_atiixp_ac97_write,
1055 .read = snd_atiixp_ac97_read,
1056 };
1057 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1058 ATI_REG_ISR_CODEC0_NOT_READY,
1059 ATI_REG_ISR_CODEC1_NOT_READY,
1060 ATI_REG_ISR_CODEC2_NOT_READY,
1061 };
1062
1063 if (snd_atiixp_codec_detect(chip) < 0)
1064 return -ENXIO;
1065
1066 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1067 return err;
1068 pbus->clock = clock;
1069 pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with audio driver */
1070 chip->ac97_bus = pbus;
1071
1072 codec_count = 0;
1073 for (i = 0; i < NUM_ATI_CODECS; i++) {
1074 if (chip->codec_not_ready_bits & codec_skip[i])
1075 continue;
1076 memset(&ac97, 0, sizeof(ac97));
1077 ac97.private_data = chip;
1078 ac97.pci = chip->pci;
1079 ac97.num = i;
1080 ac97.scaps = AC97_SCAP_SKIP_AUDIO;
1081 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1082 chip->ac97[i] = NULL; /* to be sure */
1083 snd_printdd("atiixp: codec %d not available for modem\n", i);
1084 continue;
1085 }
1086 codec_count++;
1087 }
1088
1089 if (! codec_count) {
1090 snd_printk(KERN_ERR "atiixp: no codec available\n");
1091 return -ENODEV;
1092 }
1093
1094 /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
1095
1096 return 0;
1097 }
1098
1099
1100 #ifdef CONFIG_PM
1101 /*
1102 * power management
1103 */
1104 static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
1105 {
1106 atiixp_t *chip = card->pm_private_data;
1107 int i;
1108
1109 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1110 if (chip->pcmdevs[i])
1111 snd_pcm_suspend_all(chip->pcmdevs[i]);
1112 for (i = 0; i < NUM_ATI_CODECS; i++)
1113 if (chip->ac97[i])
1114 snd_ac97_suspend(chip->ac97[i]);
1115 snd_atiixp_aclink_down(chip);
1116 snd_atiixp_chip_stop(chip);
1117
1118 pci_set_power_state(chip->pci, PCI_D3hot);
1119 pci_disable_device(chip->pci);
1120 return 0;
1121 }
1122
1123 static int snd_atiixp_resume(snd_card_t *card)
1124 {
1125 atiixp_t *chip = card->pm_private_data;
1126 int i;
1127
1128 pci_enable_device(chip->pci);
1129 pci_set_power_state(chip->pci, PCI_D0);
1130 pci_set_master(chip->pci);
1131
1132 snd_atiixp_aclink_reset(chip);
1133 snd_atiixp_chip_start(chip);
1134
1135 for (i = 0; i < NUM_ATI_CODECS; i++)
1136 if (chip->ac97[i])
1137 snd_ac97_resume(chip->ac97[i]);
1138
1139 return 0;
1140 }
1141 #endif /* CONFIG_PM */
1142
1143
1144 /*
1145 * proc interface for register dump
1146 */
1147
1148 static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
1149 {
1150 atiixp_t *chip = entry->private_data;
1151 int i;
1152
1153 for (i = 0; i < 256; i += 4)
1154 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1155 }
1156
1157 static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
1158 {
1159 snd_info_entry_t *entry;
1160
1161 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1162 snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
1163 }
1164
1165
1166
1167 /*
1168 * destructor
1169 */
1170
1171 static int snd_atiixp_free(atiixp_t *chip)
1172 {
1173 if (chip->irq < 0)
1174 goto __hw_end;
1175 snd_atiixp_chip_stop(chip);
1176 synchronize_irq(chip->irq);
1177 __hw_end:
1178 if (chip->irq >= 0)
1179 free_irq(chip->irq, (void *)chip);
1180 if (chip->remap_addr)
1181 iounmap(chip->remap_addr);
1182 pci_release_regions(chip->pci);
1183 pci_disable_device(chip->pci);
1184 kfree(chip);
1185 return 0;
1186 }
1187
1188 static int snd_atiixp_dev_free(snd_device_t *device)
1189 {
1190 atiixp_t *chip = device->device_data;
1191 return snd_atiixp_free(chip);
1192 }
1193
1194 /*
1195 * constructor for chip instance
1196 */
1197 static int __devinit snd_atiixp_create(snd_card_t *card,
1198 struct pci_dev *pci,
1199 atiixp_t **r_chip)
1200 {
1201 static snd_device_ops_t ops = {
1202 .dev_free = snd_atiixp_dev_free,
1203 };
1204 atiixp_t *chip;
1205 int err;
1206
1207 if ((err = pci_enable_device(pci)) < 0)
1208 return err;
1209
1210 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1211 if (chip == NULL) {
1212 pci_disable_device(pci);
1213 return -ENOMEM;
1214 }
1215
1216 spin_lock_init(&chip->reg_lock);
1217 init_MUTEX(&chip->open_mutex);
1218 chip->card = card;
1219 chip->pci = pci;
1220 chip->irq = -1;
1221 if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
1222 kfree(chip);
1223 pci_disable_device(pci);
1224 return err;
1225 }
1226 chip->addr = pci_resource_start(pci, 0);
1227 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1228 if (chip->remap_addr == NULL) {
1229 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1230 snd_atiixp_free(chip);
1231 return -EIO;
1232 }
1233
1234 if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
1235 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1236 snd_atiixp_free(chip);
1237 return -EBUSY;
1238 }
1239 chip->irq = pci->irq;
1240 pci_set_master(pci);
1241 synchronize_irq(chip->irq);
1242
1243 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1244 snd_atiixp_free(chip);
1245 return err;
1246 }
1247
1248 snd_card_set_dev(card, &pci->dev);
1249
1250 *r_chip = chip;
1251 return 0;
1252 }
1253
1254
1255 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1256 const struct pci_device_id *pci_id)
1257 {
1258 static int dev;
1259 snd_card_t *card;
1260 atiixp_t *chip;
1261 unsigned char revision;
1262 int err;
1263
1264 if (dev >= SNDRV_CARDS)
1265 return -ENODEV;
1266 if (!enable[dev]) {
1267 dev++;
1268 return -ENOENT;
1269 }
1270
1271 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1272 if (card == NULL)
1273 return -ENOMEM;
1274
1275 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
1276
1277 strcpy(card->driver, "ATIIXP-MODEM");
1278 strcpy(card->shortname, "ATI IXP Modem");
1279 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1280 goto __error;
1281
1282 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1283 goto __error;
1284
1285 if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
1286 goto __error;
1287
1288 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1289 goto __error;
1290
1291 snd_atiixp_proc_init(chip);
1292
1293 snd_atiixp_chip_start(chip);
1294
1295 sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
1296 card->shortname, revision, chip->addr, chip->irq);
1297
1298 snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
1299
1300 if ((err = snd_card_register(card)) < 0)
1301 goto __error;
1302
1303 pci_set_drvdata(pci, card);
1304 dev++;
1305 return 0;
1306
1307 __error:
1308 snd_card_free(card);
1309 return err;
1310 }
1311
1312 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1313 {
1314 snd_card_free(pci_get_drvdata(pci));
1315 pci_set_drvdata(pci, NULL);
1316 }
1317
1318 static struct pci_driver driver = {
1319 .name = "ATI IXP MC97 controller",
1320 .id_table = snd_atiixp_ids,
1321 .probe = snd_atiixp_probe,
1322 .remove = __devexit_p(snd_atiixp_remove),
1323 SND_PCI_PM_CALLBACKS
1324 };
1325
1326
1327 static int __init alsa_card_atiixp_init(void)
1328 {
1329 return pci_register_driver(&driver);
1330 }
1331
1332 static void __exit alsa_card_atiixp_exit(void)
1333 {
1334 pci_unregister_driver(&driver);
1335 }
1336
1337 module_init(alsa_card_atiixp_init)
1338 module_exit(alsa_card_atiixp_exit)
AMDTP streaming driver for the Linux FireWire stack (Juju)