?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
sonypi: Storage class should be before const qualifier
[firewire-audio.git] / drivers / char / moxa.c
blob64b7b2b18352526d92e0ebf83f6bda424aed7d1c
1 /*****************************************************************************/
2 /*
3 * moxa.c -- MOXA Intellio family multiport serial driver.
4 *
5 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com.tw).
6 *
7 * This code is loosely based on the Linux serial driver, written by
8 * Linus Torvalds, Theodore T'so and others.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 /*
17 * MOXA Intellio Series Driver
18 * for : LINUX
19 * date : 1999/1/7
20 * version : 5.1
21 */
22
23 #include <linux/module.h>
24 #include <linux/types.h>
25 #include <linux/mm.h>
26 #include <linux/ioport.h>
27 #include <linux/errno.h>
28 #include <linux/signal.h>
29 #include <linux/sched.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
38 #include <linux/serial.h>
39 #include <linux/tty_driver.h>
40 #include <linux/delay.h>
41 #include <linux/pci.h>
42 #include <linux/init.h>
43 #include <linux/bitops.h>
44 #include <linux/completion.h>
45
46 #include <asm/system.h>
47 #include <asm/io.h>
48 #include <asm/uaccess.h>
49
50 #define MOXA_VERSION "5.1k"
51
52 #define MOXAMAJOR 172
53 #define MOXACUMAJOR 173
54
55 #define MAX_BOARDS 4 /* Don't change this value */
56 #define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
57 #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
58
59 /*
60 * Define the Moxa PCI vendor and device IDs.
61 */
62 #define MOXA_BUS_TYPE_ISA 0
63 #define MOXA_BUS_TYPE_PCI 1
64
65 enum {
66 MOXA_BOARD_C218_PCI = 1,
67 MOXA_BOARD_C218_ISA,
68 MOXA_BOARD_C320_PCI,
69 MOXA_BOARD_C320_ISA,
70 MOXA_BOARD_CP204J,
71 };
72
73 static char *moxa_brdname[] =
74 {
75 "C218 Turbo PCI series",
76 "C218 Turbo ISA series",
77 "C320 Turbo PCI series",
78 "C320 Turbo ISA series",
79 "CP-204J series",
80 };
81
82 #ifdef CONFIG_PCI
83 static struct pci_device_id moxa_pcibrds[] = {
84 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
85 .driver_data = MOXA_BOARD_C218_PCI },
86 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
87 .driver_data = MOXA_BOARD_C320_PCI },
88 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
89 .driver_data = MOXA_BOARD_CP204J },
90 { 0 }
91 };
92 MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
93 #endif /* CONFIG_PCI */
94
95 struct moxa_isa_board_conf {
96 int boardType;
97 int numPorts;
98 unsigned long baseAddr;
99 };
100
101 static struct moxa_isa_board_conf moxa_isa_boards[] =
102 {
103 /* {MOXA_BOARD_C218_ISA,8,0xDC000}, */
104 };
105
106 static struct moxa_board_conf {
107 int boardType;
108 int numPorts;
109 unsigned long baseAddr;
110 int busType;
111
112 int loadstat;
113
114 void __iomem *basemem;
115 void __iomem *intNdx;
116 void __iomem *intPend;
117 void __iomem *intTable;
118 } moxa_boards[MAX_BOARDS];
119
120 struct mxser_mstatus {
121 tcflag_t cflag;
122 int cts;
123 int dsr;
124 int ri;
125 int dcd;
126 };
127
128 struct moxaq_str {
129 int inq;
130 int outq;
131 };
132
133 struct moxa_port {
134 int type;
135 int port;
136 int close_delay;
137 unsigned short closing_wait;
138 int count;
139 int blocked_open;
140 long event; /* long req'd for set_bit --RR */
141 int asyncflags;
142 unsigned long statusflags;
143 struct tty_struct *tty;
144 int cflag;
145 wait_queue_head_t open_wait;
146 struct completion close_wait;
147
148 struct timer_list emptyTimer;
149
150 char chkPort;
151 char lineCtrl;
152 void __iomem *tableAddr;
153 long curBaud;
154 char DCDState;
155 char lowChkFlag;
156
157 ushort breakCnt;
158 };
159
160 /* statusflags */
161 #define TXSTOPPED 0x1
162 #define LOWWAIT 0x2
163 #define EMPTYWAIT 0x4
164 #define THROTTLE 0x8
165
166 #define SERIAL_DO_RESTART
167
168 #define WAKEUP_CHARS 256
169
170 static int ttymajor = MOXAMAJOR;
171 /* Variables for insmod */
172 #ifdef MODULE
173 static int baseaddr[4];
174 static int type[4];
175 static int numports[4];
176 #endif
177
178 MODULE_AUTHOR("William Chen");
179 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
180 MODULE_LICENSE("GPL");
181 #ifdef MODULE
182 module_param_array(type, int, NULL, 0);
183 module_param_array(baseaddr, int, NULL, 0);
184 module_param_array(numports, int, NULL, 0);
185 #endif
186 module_param(ttymajor, int, 0);
187
188 /*
189 * static functions:
190 */
191 static int moxa_open(struct tty_struct *, struct file *);
192 static void moxa_close(struct tty_struct *, struct file *);
193 static int moxa_write(struct tty_struct *, const unsigned char *, int);
194 static int moxa_write_room(struct tty_struct *);
195 static void moxa_flush_buffer(struct tty_struct *);
196 static int moxa_chars_in_buffer(struct tty_struct *);
197 static void moxa_flush_chars(struct tty_struct *);
198 static void moxa_put_char(struct tty_struct *, unsigned char);
199 static int moxa_ioctl(struct tty_struct *, struct file *, unsigned int, unsigned long);
200 static void moxa_throttle(struct tty_struct *);
201 static void moxa_unthrottle(struct tty_struct *);
202 static void moxa_set_termios(struct tty_struct *, struct ktermios *);
203 static void moxa_stop(struct tty_struct *);
204 static void moxa_start(struct tty_struct *);
205 static void moxa_hangup(struct tty_struct *);
206 static int moxa_tiocmget(struct tty_struct *tty, struct file *file);
207 static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
208 unsigned int set, unsigned int clear);
209 static void moxa_poll(unsigned long);
210 static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
211 static int moxa_block_till_ready(struct tty_struct *, struct file *,
212 struct moxa_port *);
213 static void moxa_setup_empty_event(struct tty_struct *);
214 static void moxa_check_xmit_empty(unsigned long);
215 static void moxa_shut_down(struct moxa_port *);
216 static void moxa_receive_data(struct moxa_port *);
217 /*
218 * moxa board interface functions:
219 */
220 static void MoxaDriverInit(void);
221 static int MoxaDriverIoctl(unsigned int, unsigned long, int);
222 static int MoxaDriverPoll(void);
223 static int MoxaPortsOfCard(int);
224 static int MoxaPortIsValid(int);
225 static void MoxaPortEnable(int);
226 static void MoxaPortDisable(int);
227 static long MoxaPortGetMaxBaud(int);
228 static long MoxaPortSetBaud(int, long);
229 static int MoxaPortSetTermio(int, struct ktermios *, speed_t);
230 static int MoxaPortGetLineOut(int, int *, int *);
231 static void MoxaPortLineCtrl(int, int, int);
232 static void MoxaPortFlowCtrl(int, int, int, int, int, int);
233 static int MoxaPortLineStatus(int);
234 static int MoxaPortDCDChange(int);
235 static int MoxaPortDCDON(int);
236 static void MoxaPortFlushData(int, int);
237 static int MoxaPortWriteData(int, unsigned char *, int);
238 static int MoxaPortReadData(int, struct tty_struct *tty);
239 static int MoxaPortTxQueue(int);
240 static int MoxaPortRxQueue(int);
241 static int MoxaPortTxFree(int);
242 static void MoxaPortTxDisable(int);
243 static void MoxaPortTxEnable(int);
244 static int MoxaPortResetBrkCnt(int);
245 static void MoxaPortSendBreak(int, int);
246 static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
247 static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
248 static void MoxaSetFifo(int port, int enable);
249
250 static const struct tty_operations moxa_ops = {
251 .open = moxa_open,
252 .close = moxa_close,
253 .write = moxa_write,
254 .write_room = moxa_write_room,
255 .flush_buffer = moxa_flush_buffer,
256 .chars_in_buffer = moxa_chars_in_buffer,
257 .flush_chars = moxa_flush_chars,
258 .put_char = moxa_put_char,
259 .ioctl = moxa_ioctl,
260 .throttle = moxa_throttle,
261 .unthrottle = moxa_unthrottle,
262 .set_termios = moxa_set_termios,
263 .stop = moxa_stop,
264 .start = moxa_start,
265 .hangup = moxa_hangup,
266 .tiocmget = moxa_tiocmget,
267 .tiocmset = moxa_tiocmset,
268 };
269
270 static struct tty_driver *moxaDriver;
271 static struct moxa_port moxa_ports[MAX_PORTS];
272 static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
273 static DEFINE_SPINLOCK(moxa_lock);
274
275 #ifdef CONFIG_PCI
276 static int __devinit moxa_pci_probe(struct pci_dev *pdev,
277 const struct pci_device_id *ent)
278 {
279 struct moxa_board_conf *board;
280 unsigned int i;
281 int board_type = ent->driver_data;
282 int retval;
283
284 retval = pci_enable_device(pdev);
285 if (retval) {
286 dev_err(&pdev->dev, "can't enable pci device\n");
287 goto err;
288 }
289
290 for (i = 0; i < MAX_BOARDS; i++)
291 if (moxa_boards[i].basemem == NULL)
292 break;
293
294 retval = -ENODEV;
295 if (i >= MAX_BOARDS) {
296 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
297 "found. Board is ignored.\n", MAX_BOARDS);
298 goto err;
299 }
300
301 board = &moxa_boards[i];
302 board->basemem = pci_iomap(pdev, 2, 0x4000);
303 if (board->basemem == NULL) {
304 dev_err(&pdev->dev, "can't remap io space 2\n");
305 goto err;
306 }
307
308 board->boardType = board_type;
309 switch (board_type) {
310 case MOXA_BOARD_C218_ISA:
311 case MOXA_BOARD_C218_PCI:
312 board->numPorts = 8;
313 break;
314
315 case MOXA_BOARD_CP204J:
316 board->numPorts = 4;
317 break;
318 default:
319 board->numPorts = 0;
320 break;
321 }
322 board->busType = MOXA_BUS_TYPE_PCI;
323
324 pci_set_drvdata(pdev, board);
325
326 return (0);
327 err:
328 return retval;
329 }
330
331 static void __devexit moxa_pci_remove(struct pci_dev *pdev)
332 {
333 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
334
335 pci_iounmap(pdev, brd->basemem);
336 brd->basemem = NULL;
337 }
338
339 static struct pci_driver moxa_pci_driver = {
340 .name = "moxa",
341 .id_table = moxa_pcibrds,
342 .probe = moxa_pci_probe,
343 .remove = __devexit_p(moxa_pci_remove)
344 };
345 #endif /* CONFIG_PCI */
346
347 static int __init moxa_init(void)
348 {
349 int i, numBoards, retval = 0;
350 struct moxa_port *ch;
351
352 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
353 MOXA_VERSION);
354 moxaDriver = alloc_tty_driver(MAX_PORTS + 1);
355 if (!moxaDriver)
356 return -ENOMEM;
357
358 moxaDriver->owner = THIS_MODULE;
359 moxaDriver->name = "ttyMX";
360 moxaDriver->major = ttymajor;
361 moxaDriver->minor_start = 0;
362 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
363 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
364 moxaDriver->init_termios = tty_std_termios;
365 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
366 moxaDriver->init_termios.c_ispeed = 9600;
367 moxaDriver->init_termios.c_ospeed = 9600;
368 moxaDriver->flags = TTY_DRIVER_REAL_RAW;
369 tty_set_operations(moxaDriver, &moxa_ops);
370
371 for (i = 0, ch = moxa_ports; i < MAX_PORTS; i++, ch++) {
372 ch->type = PORT_16550A;
373 ch->port = i;
374 ch->close_delay = 5 * HZ / 10;
375 ch->closing_wait = 30 * HZ;
376 ch->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
377 init_waitqueue_head(&ch->open_wait);
378 init_completion(&ch->close_wait);
379
380 setup_timer(&ch->emptyTimer, moxa_check_xmit_empty,
381 (unsigned long)ch);
382 }
383
384 pr_debug("Moxa tty devices major number = %d\n", ttymajor);
385
386 if (tty_register_driver(moxaDriver)) {
387 printk(KERN_ERR "Couldn't install MOXA Smartio family driver !\n");
388 put_tty_driver(moxaDriver);
389 return -1;
390 }
391
392 mod_timer(&moxaTimer, jiffies + HZ / 50);
393
394 /* Find the boards defined in source code */
395 numBoards = 0;
396 for (i = 0; i < MAX_BOARDS; i++) {
397 if ((moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA) ||
398 (moxa_isa_boards[i].boardType == MOXA_BOARD_C320_ISA)) {
399 moxa_boards[numBoards].boardType = moxa_isa_boards[i].boardType;
400 if (moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA)
401 moxa_boards[numBoards].numPorts = 8;
402 else
403 moxa_boards[numBoards].numPorts = moxa_isa_boards[i].numPorts;
404 moxa_boards[numBoards].busType = MOXA_BUS_TYPE_ISA;
405 moxa_boards[numBoards].baseAddr = moxa_isa_boards[i].baseAddr;
406 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
407 numBoards + 1,
408 moxa_brdname[moxa_boards[numBoards].boardType-1],
409 moxa_boards[numBoards].baseAddr);
410 numBoards++;
411 }
412 }
413 /* Find the boards defined form module args. */
414 #ifdef MODULE
415 for (i = 0; i < MAX_BOARDS; i++) {
416 if ((type[i] == MOXA_BOARD_C218_ISA) ||
417 (type[i] == MOXA_BOARD_C320_ISA)) {
418 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
419 numBoards + 1, moxa_brdname[type[i] - 1],
420 (unsigned long)baseaddr[i]);
421 if (numBoards >= MAX_BOARDS) {
422 printk(KERN_WARNING "More than %d MOXA "
423 "Intellio family boards found. Board "
424 "is ignored.\n", MAX_BOARDS);
425 continue;
426 }
427 moxa_boards[numBoards].boardType = type[i];
428 if (moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA)
429 moxa_boards[numBoards].numPorts = 8;
430 else
431 moxa_boards[numBoards].numPorts = numports[i];
432 moxa_boards[numBoards].busType = MOXA_BUS_TYPE_ISA;
433 moxa_boards[numBoards].baseAddr = baseaddr[i];
434 numBoards++;
435 }
436 }
437 #endif
438
439 #ifdef CONFIG_PCI
440 retval = pci_register_driver(&moxa_pci_driver);
441 if (retval) {
442 printk(KERN_ERR "Can't register moxa pci driver!\n");
443 if (numBoards)
444 retval = 0;
445 }
446 #endif
447
448 for (i = 0; i < numBoards; i++) {
449 moxa_boards[i].basemem = ioremap(moxa_boards[i].baseAddr,
450 0x4000);
451 }
452
453 return retval;
454 }
455
456 static void __exit moxa_exit(void)
457 {
458 int i;
459
460 del_timer_sync(&moxaTimer);
461
462 for (i = 0; i < MAX_PORTS; i++)
463 del_timer_sync(&moxa_ports[i].emptyTimer);
464
465 if (tty_unregister_driver(moxaDriver))
466 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
467 "serial driver\n");
468 put_tty_driver(moxaDriver);
469
470 #ifdef CONFIG_PCI
471 pci_unregister_driver(&moxa_pci_driver);
472 #endif
473
474 for (i = 0; i < MAX_BOARDS; i++)
475 if (moxa_boards[i].basemem)
476 iounmap(moxa_boards[i].basemem);
477 }
478
479 module_init(moxa_init);
480 module_exit(moxa_exit);
481
482 static int moxa_open(struct tty_struct *tty, struct file *filp)
483 {
484 struct moxa_port *ch;
485 int port;
486 int retval;
487
488 port = tty->index;
489 if (port == MAX_PORTS) {
490 return (0);
491 }
492 if (!MoxaPortIsValid(port)) {
493 tty->driver_data = NULL;
494 return (-ENODEV);
495 }
496
497 ch = &moxa_ports[port];
498 ch->count++;
499 tty->driver_data = ch;
500 ch->tty = tty;
501 if (!(ch->asyncflags & ASYNC_INITIALIZED)) {
502 ch->statusflags = 0;
503 moxa_set_tty_param(tty, tty->termios);
504 MoxaPortLineCtrl(ch->port, 1, 1);
505 MoxaPortEnable(ch->port);
506 ch->asyncflags |= ASYNC_INITIALIZED;
507 }
508 retval = moxa_block_till_ready(tty, filp, ch);
509
510 moxa_unthrottle(tty);
511
512 if (ch->type == PORT_16550A) {
513 MoxaSetFifo(ch->port, 1);
514 } else {
515 MoxaSetFifo(ch->port, 0);
516 }
517
518 return (retval);
519 }
520
521 static void moxa_close(struct tty_struct *tty, struct file *filp)
522 {
523 struct moxa_port *ch;
524 int port;
525
526 port = tty->index;
527 if (port == MAX_PORTS) {
528 return;
529 }
530 if (!MoxaPortIsValid(port)) {
531 pr_debug("Invalid portno in moxa_close\n");
532 tty->driver_data = NULL;
533 return;
534 }
535 if (tty->driver_data == NULL) {
536 return;
537 }
538 if (tty_hung_up_p(filp)) {
539 return;
540 }
541 ch = (struct moxa_port *) tty->driver_data;
542
543 if ((tty->count == 1) && (ch->count != 1)) {
544 printk(KERN_WARNING "moxa_close: bad serial port count; "
545 "tty->count is 1, ch->count is %d\n", ch->count);
546 ch->count = 1;
547 }
548 if (--ch->count < 0) {
549 printk(KERN_WARNING "moxa_close: bad serial port count, "
550 "device=%s\n", tty->name);
551 ch->count = 0;
552 }
553 if (ch->count) {
554 return;
555 }
556 ch->asyncflags |= ASYNC_CLOSING;
557
558 ch->cflag = tty->termios->c_cflag;
559 if (ch->asyncflags & ASYNC_INITIALIZED) {
560 moxa_setup_empty_event(tty);
561 tty_wait_until_sent(tty, 30 * HZ); /* 30 seconds timeout */
562 del_timer_sync(&moxa_ports[ch->port].emptyTimer);
563 }
564 moxa_shut_down(ch);
565 MoxaPortFlushData(port, 2);
566
567 if (tty->driver->flush_buffer)
568 tty->driver->flush_buffer(tty);
569 tty_ldisc_flush(tty);
570
571 tty->closing = 0;
572 ch->event = 0;
573 ch->tty = NULL;
574 if (ch->blocked_open) {
575 if (ch->close_delay) {
576 msleep_interruptible(jiffies_to_msecs(ch->close_delay));
577 }
578 wake_up_interruptible(&ch->open_wait);
579 }
580 ch->asyncflags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
581 complete_all(&ch->close_wait);
582 }
583
584 static int moxa_write(struct tty_struct *tty,
585 const unsigned char *buf, int count)
586 {
587 struct moxa_port *ch;
588 int len, port;
589 unsigned long flags;
590
591 ch = (struct moxa_port *) tty->driver_data;
592 if (ch == NULL)
593 return (0);
594 port = ch->port;
595
596 spin_lock_irqsave(&moxa_lock, flags);
597 len = MoxaPortWriteData(port, (unsigned char *) buf, count);
598 spin_unlock_irqrestore(&moxa_lock, flags);
599
600 /*********************************************
601 if ( !(ch->statusflags & LOWWAIT) &&
602 ((len != count) || (MoxaPortTxFree(port) <= 100)) )
603 ************************************************/
604 ch->statusflags |= LOWWAIT;
605 return (len);
606 }
607
608 static int moxa_write_room(struct tty_struct *tty)
609 {
610 struct moxa_port *ch;
611
612 if (tty->stopped)
613 return (0);
614 ch = (struct moxa_port *) tty->driver_data;
615 if (ch == NULL)
616 return (0);
617 return (MoxaPortTxFree(ch->port));
618 }
619
620 static void moxa_flush_buffer(struct tty_struct *tty)
621 {
622 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
623
624 if (ch == NULL)
625 return;
626 MoxaPortFlushData(ch->port, 1);
627 tty_wakeup(tty);
628 }
629
630 static int moxa_chars_in_buffer(struct tty_struct *tty)
631 {
632 int chars;
633 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
634
635 /*
636 * Sigh...I have to check if driver_data is NULL here, because
637 * if an open() fails, the TTY subsystem eventually calls
638 * tty_wait_until_sent(), which calls the driver's chars_in_buffer()
639 * routine. And since the open() failed, we return 0 here. TDJ
640 */
641 if (ch == NULL)
642 return (0);
643 chars = MoxaPortTxQueue(ch->port);
644 if (chars) {
645 /*
646 * Make it possible to wakeup anything waiting for output
647 * in tty_ioctl.c, etc.
648 */
649 if (!(ch->statusflags & EMPTYWAIT))
650 moxa_setup_empty_event(tty);
651 }
652 return (chars);
653 }
654
655 static void moxa_flush_chars(struct tty_struct *tty)
656 {
657 /*
658 * Don't think I need this, because this is called to empty the TX
659 * buffer for the 16450, 16550, etc.
660 */
661 }
662
663 static void moxa_put_char(struct tty_struct *tty, unsigned char c)
664 {
665 struct moxa_port *ch;
666 int port;
667 unsigned long flags;
668
669 ch = (struct moxa_port *) tty->driver_data;
670 if (ch == NULL)
671 return;
672 port = ch->port;
673 spin_lock_irqsave(&moxa_lock, flags);
674 MoxaPortWriteData(port, &c, 1);
675 spin_unlock_irqrestore(&moxa_lock, flags);
676 /************************************************
677 if ( !(ch->statusflags & LOWWAIT) && (MoxaPortTxFree(port) <= 100) )
678 *************************************************/
679 ch->statusflags |= LOWWAIT;
680 }
681
682 static int moxa_tiocmget(struct tty_struct *tty, struct file *file)
683 {
684 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
685 int port;
686 int flag = 0, dtr, rts;
687
688 port = tty->index;
689 if ((port != MAX_PORTS) && (!ch))
690 return (-EINVAL);
691
692 MoxaPortGetLineOut(ch->port, &dtr, &rts);
693 if (dtr)
694 flag |= TIOCM_DTR;
695 if (rts)
696 flag |= TIOCM_RTS;
697 dtr = MoxaPortLineStatus(ch->port);
698 if (dtr & 1)
699 flag |= TIOCM_CTS;
700 if (dtr & 2)
701 flag |= TIOCM_DSR;
702 if (dtr & 4)
703 flag |= TIOCM_CD;
704 return flag;
705 }
706
707 static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
708 unsigned int set, unsigned int clear)
709 {
710 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
711 int port;
712 int dtr, rts;
713
714 port = tty->index;
715 if ((port != MAX_PORTS) && (!ch))
716 return (-EINVAL);
717
718 MoxaPortGetLineOut(ch->port, &dtr, &rts);
719 if (set & TIOCM_RTS)
720 rts = 1;
721 if (set & TIOCM_DTR)
722 dtr = 1;
723 if (clear & TIOCM_RTS)
724 rts = 0;
725 if (clear & TIOCM_DTR)
726 dtr = 0;
727 MoxaPortLineCtrl(ch->port, dtr, rts);
728 return 0;
729 }
730
731 static int moxa_ioctl(struct tty_struct *tty, struct file *file,
732 unsigned int cmd, unsigned long arg)
733 {
734 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
735 register int port;
736 void __user *argp = (void __user *)arg;
737 int retval;
738
739 port = tty->index;
740 if ((port != MAX_PORTS) && (!ch))
741 return (-EINVAL);
742
743 switch (cmd) {
744 case TCSBRK: /* SVID version: non-zero arg --> no break */
745 retval = tty_check_change(tty);
746 if (retval)
747 return (retval);
748 moxa_setup_empty_event(tty);
749 tty_wait_until_sent(tty, 0);
750 if (!arg)
751 MoxaPortSendBreak(ch->port, 0);
752 return (0);
753 case TCSBRKP: /* support for POSIX tcsendbreak() */
754 retval = tty_check_change(tty);
755 if (retval)
756 return (retval);
757 moxa_setup_empty_event(tty);
758 tty_wait_until_sent(tty, 0);
759 MoxaPortSendBreak(ch->port, arg);
760 return (0);
761 case TIOCGSOFTCAR:
762 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *) argp);
763 case TIOCSSOFTCAR:
764 if(get_user(retval, (unsigned long __user *) argp))
765 return -EFAULT;
766 arg = retval;
767 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) |
768 (arg ? CLOCAL : 0));
769 if (C_CLOCAL(tty))
770 ch->asyncflags &= ~ASYNC_CHECK_CD;
771 else
772 ch->asyncflags |= ASYNC_CHECK_CD;
773 return (0);
774 case TIOCGSERIAL:
775 return moxa_get_serial_info(ch, argp);
776
777 case TIOCSSERIAL:
778 return moxa_set_serial_info(ch, argp);
779 default:
780 retval = MoxaDriverIoctl(cmd, arg, port);
781 }
782 return (retval);
783 }
784
785 static void moxa_throttle(struct tty_struct *tty)
786 {
787 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
788
789 ch->statusflags |= THROTTLE;
790 }
791
792 static void moxa_unthrottle(struct tty_struct *tty)
793 {
794 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
795
796 ch->statusflags &= ~THROTTLE;
797 }
798
799 static void moxa_set_termios(struct tty_struct *tty,
800 struct ktermios *old_termios)
801 {
802 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
803
804 if (ch == NULL)
805 return;
806 moxa_set_tty_param(tty, old_termios);
807 if (!(old_termios->c_cflag & CLOCAL) &&
808 (tty->termios->c_cflag & CLOCAL))
809 wake_up_interruptible(&ch->open_wait);
810 }
811
812 static void moxa_stop(struct tty_struct *tty)
813 {
814 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
815
816 if (ch == NULL)
817 return;
818 MoxaPortTxDisable(ch->port);
819 ch->statusflags |= TXSTOPPED;
820 }
821
822
823 static void moxa_start(struct tty_struct *tty)
824 {
825 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
826
827 if (ch == NULL)
828 return;
829
830 if (!(ch->statusflags & TXSTOPPED))
831 return;
832
833 MoxaPortTxEnable(ch->port);
834 ch->statusflags &= ~TXSTOPPED;
835 }
836
837 static void moxa_hangup(struct tty_struct *tty)
838 {
839 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
840
841 moxa_flush_buffer(tty);
842 moxa_shut_down(ch);
843 ch->event = 0;
844 ch->count = 0;
845 ch->asyncflags &= ~ASYNC_NORMAL_ACTIVE;
846 ch->tty = NULL;
847 wake_up_interruptible(&ch->open_wait);
848 }
849
850 static void moxa_poll(unsigned long ignored)
851 {
852 register int card;
853 struct moxa_port *ch;
854 struct tty_struct *tp;
855 int i, ports;
856
857 del_timer(&moxaTimer);
858
859 if (MoxaDriverPoll() < 0) {
860 mod_timer(&moxaTimer, jiffies + HZ / 50);
861 return;
862 }
863 for (card = 0; card < MAX_BOARDS; card++) {
864 if ((ports = MoxaPortsOfCard(card)) <= 0)
865 continue;
866 ch = &moxa_ports[card * MAX_PORTS_PER_BOARD];
867 for (i = 0; i < ports; i++, ch++) {
868 if ((ch->asyncflags & ASYNC_INITIALIZED) == 0)
869 continue;
870 if (!(ch->statusflags & THROTTLE) &&
871 (MoxaPortRxQueue(ch->port) > 0))
872 moxa_receive_data(ch);
873 if ((tp = ch->tty) == 0)
874 continue;
875 if (ch->statusflags & LOWWAIT) {
876 if (MoxaPortTxQueue(ch->port) <= WAKEUP_CHARS) {
877 if (!tp->stopped) {
878 ch->statusflags &= ~LOWWAIT;
879 tty_wakeup(tp);
880 }
881 }
882 }
883 if (!I_IGNBRK(tp) && (MoxaPortResetBrkCnt(ch->port) > 0)) {
884 tty_insert_flip_char(tp, 0, TTY_BREAK);
885 tty_schedule_flip(tp);
886 }
887 if (MoxaPortDCDChange(ch->port)) {
888 if (ch->asyncflags & ASYNC_CHECK_CD) {
889 if (MoxaPortDCDON(ch->port))
890 wake_up_interruptible(&ch->open_wait);
891 else {
892 tty_hangup(tp);
893 wake_up_interruptible(&ch->open_wait);
894 ch->asyncflags &= ~ASYNC_NORMAL_ACTIVE;
895 }
896 }
897 }
898 }
899 }
900
901 mod_timer(&moxaTimer, jiffies + HZ / 50);
902 }
903
904 /******************************************************************************/
905
906 static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
907 {
908 register struct ktermios *ts;
909 struct moxa_port *ch;
910 int rts, cts, txflow, rxflow, xany, baud;
911
912 ch = (struct moxa_port *) tty->driver_data;
913 ts = tty->termios;
914 if (ts->c_cflag & CLOCAL)
915 ch->asyncflags &= ~ASYNC_CHECK_CD;
916 else
917 ch->asyncflags |= ASYNC_CHECK_CD;
918 rts = cts = txflow = rxflow = xany = 0;
919 if (ts->c_cflag & CRTSCTS)
920 rts = cts = 1;
921 if (ts->c_iflag & IXON)
922 txflow = 1;
923 if (ts->c_iflag & IXOFF)
924 rxflow = 1;
925 if (ts->c_iflag & IXANY)
926 xany = 1;
927
928 /* Clear the features we don't support */
929 ts->c_cflag &= ~CMSPAR;
930 MoxaPortFlowCtrl(ch->port, rts, cts, txflow, rxflow, xany);
931 baud = MoxaPortSetTermio(ch->port, ts, tty_get_baud_rate(tty));
932 if (baud == -1)
933 baud = tty_termios_baud_rate(old_termios);
934 /* Not put the baud rate into the termios data */
935 tty_encode_baud_rate(tty, baud, baud);
936 }
937
938 static int moxa_block_till_ready(struct tty_struct *tty, struct file *filp,
939 struct moxa_port *ch)
940 {
941 DECLARE_WAITQUEUE(wait,current);
942 unsigned long flags;
943 int retval;
944 int do_clocal = C_CLOCAL(tty);
945
946 /*
947 * If the device is in the middle of being closed, then block
948 * until it's done, and then try again.
949 */
950 if (tty_hung_up_p(filp) || (ch->asyncflags & ASYNC_CLOSING)) {
951 if (ch->asyncflags & ASYNC_CLOSING)
952 wait_for_completion_interruptible(&ch->close_wait);
953 #ifdef SERIAL_DO_RESTART
954 if (ch->asyncflags & ASYNC_HUP_NOTIFY)
955 return (-EAGAIN);
956 else
957 return (-ERESTARTSYS);
958 #else
959 return (-EAGAIN);
960 #endif
961 }
962 /*
963 * If non-blocking mode is set, then make the check up front
964 * and then exit.
965 */
966 if (filp->f_flags & O_NONBLOCK) {
967 ch->asyncflags |= ASYNC_NORMAL_ACTIVE;
968 return (0);
969 }
970 /*
971 * Block waiting for the carrier detect and the line to become free
972 */
973 retval = 0;
974 add_wait_queue(&ch->open_wait, &wait);
975 pr_debug("block_til_ready before block: ttys%d, count = %d\n",
976 ch->port, ch->count);
977 spin_lock_irqsave(&moxa_lock, flags);
978 if (!tty_hung_up_p(filp))
979 ch->count--;
980 ch->blocked_open++;
981 spin_unlock_irqrestore(&moxa_lock, flags);
982
983 while (1) {
984 set_current_state(TASK_INTERRUPTIBLE);
985 if (tty_hung_up_p(filp) ||
986 !(ch->asyncflags & ASYNC_INITIALIZED)) {
987 #ifdef SERIAL_DO_RESTART
988 if (ch->asyncflags & ASYNC_HUP_NOTIFY)
989 retval = -EAGAIN;
990 else
991 retval = -ERESTARTSYS;
992 #else
993 retval = -EAGAIN;
994 #endif
995 break;
996 }
997 if (!(ch->asyncflags & ASYNC_CLOSING) && (do_clocal ||
998 MoxaPortDCDON(ch->port)))
999 break;
1000
1001 if (signal_pending(current)) {
1002 retval = -ERESTARTSYS;
1003 break;
1004 }
1005 schedule();
1006 }
1007 set_current_state(TASK_RUNNING);
1008 remove_wait_queue(&ch->open_wait, &wait);
1009
1010 spin_lock_irqsave(&moxa_lock, flags);
1011 if (!tty_hung_up_p(filp))
1012 ch->count++;
1013 ch->blocked_open--;
1014 spin_unlock_irqrestore(&moxa_lock, flags);
1015 pr_debug("block_til_ready after blocking: ttys%d, count = %d\n",
1016 ch->port, ch->count);
1017 if (retval)
1018 return (retval);
1019 /* FIXME: review to see if we need to use set_bit on these */
1020 ch->asyncflags |= ASYNC_NORMAL_ACTIVE;
1021 return 0;
1022 }
1023
1024 static void moxa_setup_empty_event(struct tty_struct *tty)
1025 {
1026 struct moxa_port *ch = tty->driver_data;
1027 unsigned long flags;
1028
1029 spin_lock_irqsave(&moxa_lock, flags);
1030 ch->statusflags |= EMPTYWAIT;
1031 mod_timer(&moxa_ports[ch->port].emptyTimer, jiffies + HZ);
1032 spin_unlock_irqrestore(&moxa_lock, flags);
1033 }
1034
1035 static void moxa_check_xmit_empty(unsigned long data)
1036 {
1037 struct moxa_port *ch;
1038
1039 ch = (struct moxa_port *) data;
1040 if (ch->tty && (ch->statusflags & EMPTYWAIT)) {
1041 if (MoxaPortTxQueue(ch->port) == 0) {
1042 ch->statusflags &= ~EMPTYWAIT;
1043 tty_wakeup(ch->tty);
1044 return;
1045 }
1046 mod_timer(&moxa_ports[ch->port].emptyTimer,
1047 round_jiffies(jiffies + HZ));
1048 } else
1049 ch->statusflags &= ~EMPTYWAIT;
1050 }
1051
1052 static void moxa_shut_down(struct moxa_port *ch)
1053 {
1054 struct tty_struct *tp;
1055
1056 if (!(ch->asyncflags & ASYNC_INITIALIZED))
1057 return;
1058
1059 tp = ch->tty;
1060
1061 MoxaPortDisable(ch->port);
1062
1063 /*
1064 * If we're a modem control device and HUPCL is on, drop RTS & DTR.
1065 */
1066 if (tp->termios->c_cflag & HUPCL)
1067 MoxaPortLineCtrl(ch->port, 0, 0);
1068
1069 ch->asyncflags &= ~ASYNC_INITIALIZED;
1070 }
1071
1072 static void moxa_receive_data(struct moxa_port *ch)
1073 {
1074 struct tty_struct *tp;
1075 struct ktermios *ts;
1076 unsigned long flags;
1077
1078 ts = NULL;
1079 tp = ch->tty;
1080 if (tp)
1081 ts = tp->termios;
1082 /**************************************************
1083 if ( !tp || !ts || !(ts->c_cflag & CREAD) ) {
1084 *****************************************************/
1085 if (!tp || !ts) {
1086 MoxaPortFlushData(ch->port, 0);
1087 return;
1088 }
1089 spin_lock_irqsave(&moxa_lock, flags);
1090 MoxaPortReadData(ch->port, tp);
1091 spin_unlock_irqrestore(&moxa_lock, flags);
1092 tty_schedule_flip(tp);
1093 }
1094
1095 #define Magic_code 0x404
1096
1097 /*
1098 * System Configuration
1099 */
1100 /*
1101 * for C218 BIOS initialization
1102 */
1103 #define C218_ConfBase 0x800
1104 #define C218_status (C218_ConfBase + 0) /* BIOS running status */
1105 #define C218_diag (C218_ConfBase + 2) /* diagnostic status */
1106 #define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
1107 #define C218DLoad_len (C218_ConfBase + 6) /* WORD */
1108 #define C218check_sum (C218_ConfBase + 8) /* BYTE */
1109 #define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
1110 #define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
1111 #define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
1112 #define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
1113 #define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
1114
1115 #define C218_LoadBuf 0x0F00
1116 #define C218_KeyCode 0x218
1117 #define CP204J_KeyCode 0x204
1118
1119 /*
1120 * for C320 BIOS initialization
1121 */
1122 #define C320_ConfBase 0x800
1123 #define C320_LoadBuf 0x0f00
1124 #define STS_init 0x05 /* for C320_status */
1125
1126 #define C320_status C320_ConfBase + 0 /* BIOS running status */
1127 #define C320_diag C320_ConfBase + 2 /* diagnostic status */
1128 #define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */
1129 #define C320DLoad_len C320_ConfBase + 6 /* WORD */
1130 #define C320check_sum C320_ConfBase + 8 /* WORD */
1131 #define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */
1132 #define C320bapi_len C320_ConfBase + 0x0c /* WORD */
1133 #define C320UART_no C320_ConfBase + 0x0e /* WORD */
1134
1135 #define C320_KeyCode 0x320
1136
1137 #define FixPage_addr 0x0000 /* starting addr of static page */
1138 #define DynPage_addr 0x2000 /* starting addr of dynamic page */
1139 #define C218_start 0x3000 /* starting addr of C218 BIOS prg */
1140 #define Control_reg 0x1ff0 /* select page and reset control */
1141 #define HW_reset 0x80
1142
1143 /*
1144 * Function Codes
1145 */
1146 #define FC_CardReset 0x80
1147 #define FC_ChannelReset 1 /* C320 firmware not supported */
1148 #define FC_EnableCH 2
1149 #define FC_DisableCH 3
1150 #define FC_SetParam 4
1151 #define FC_SetMode 5
1152 #define FC_SetRate 6
1153 #define FC_LineControl 7
1154 #define FC_LineStatus 8
1155 #define FC_XmitControl 9
1156 #define FC_FlushQueue 10
1157 #define FC_SendBreak 11
1158 #define FC_StopBreak 12
1159 #define FC_LoopbackON 13
1160 #define FC_LoopbackOFF 14
1161 #define FC_ClrIrqTable 15
1162 #define FC_SendXon 16
1163 #define FC_SetTermIrq 17 /* C320 firmware not supported */
1164 #define FC_SetCntIrq 18 /* C320 firmware not supported */
1165 #define FC_SetBreakIrq 19
1166 #define FC_SetLineIrq 20
1167 #define FC_SetFlowCtl 21
1168 #define FC_GenIrq 22
1169 #define FC_InCD180 23
1170 #define FC_OutCD180 24
1171 #define FC_InUARTreg 23
1172 #define FC_OutUARTreg 24
1173 #define FC_SetXonXoff 25
1174 #define FC_OutCD180CCR 26
1175 #define FC_ExtIQueue 27
1176 #define FC_ExtOQueue 28
1177 #define FC_ClrLineIrq 29
1178 #define FC_HWFlowCtl 30
1179 #define FC_GetClockRate 35
1180 #define FC_SetBaud 36
1181 #define FC_SetDataMode 41
1182 #define FC_GetCCSR 43
1183 #define FC_GetDataError 45
1184 #define FC_RxControl 50
1185 #define FC_ImmSend 51
1186 #define FC_SetXonState 52
1187 #define FC_SetXoffState 53
1188 #define FC_SetRxFIFOTrig 54
1189 #define FC_SetTxFIFOCnt 55
1190 #define FC_UnixRate 56
1191 #define FC_UnixResetTimer 57
1192
1193 #define RxFIFOTrig1 0
1194 #define RxFIFOTrig4 1
1195 #define RxFIFOTrig8 2
1196 #define RxFIFOTrig14 3
1197
1198 /*
1199 * Dual-Ported RAM
1200 */
1201 #define DRAM_global 0
1202 #define INT_data (DRAM_global + 0)
1203 #define Config_base (DRAM_global + 0x108)
1204
1205 #define IRQindex (INT_data + 0)
1206 #define IRQpending (INT_data + 4)
1207 #define IRQtable (INT_data + 8)
1208
1209 /*
1210 * Interrupt Status
1211 */
1212 #define IntrRx 0x01 /* receiver data O.K. */
1213 #define IntrTx 0x02 /* transmit buffer empty */
1214 #define IntrFunc 0x04 /* function complete */
1215 #define IntrBreak 0x08 /* received break */
1216 #define IntrLine 0x10 /* line status change
1217 for transmitter */
1218 #define IntrIntr 0x20 /* received INTR code */
1219 #define IntrQuit 0x40 /* received QUIT code */
1220 #define IntrEOF 0x80 /* received EOF code */
1221
1222 #define IntrRxTrigger 0x100 /* rx data count reach tigger value */
1223 #define IntrTxTrigger 0x200 /* tx data count below trigger value */
1224
1225 #define Magic_no (Config_base + 0)
1226 #define Card_model_no (Config_base + 2)
1227 #define Total_ports (Config_base + 4)
1228 #define Module_cnt (Config_base + 8)
1229 #define Module_no (Config_base + 10)
1230 #define Timer_10ms (Config_base + 14)
1231 #define Disable_IRQ (Config_base + 20)
1232 #define TMS320_PORT1 (Config_base + 22)
1233 #define TMS320_PORT2 (Config_base + 24)
1234 #define TMS320_CLOCK (Config_base + 26)
1235
1236 /*
1237 * DATA BUFFER in DRAM
1238 */
1239 #define Extern_table 0x400 /* Base address of the external table
1240 (24 words * 64) total 3K bytes
1241 (24 words * 128) total 6K bytes */
1242 #define Extern_size 0x60 /* 96 bytes */
1243 #define RXrptr 0x00 /* read pointer for RX buffer */
1244 #define RXwptr 0x02 /* write pointer for RX buffer */
1245 #define TXrptr 0x04 /* read pointer for TX buffer */
1246 #define TXwptr 0x06 /* write pointer for TX buffer */
1247 #define HostStat 0x08 /* IRQ flag and general flag */
1248 #define FlagStat 0x0A
1249 #define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */
1250 /* x x x x | | | | */
1251 /* | | | + CTS flow */
1252 /* | | +--- RTS flow */
1253 /* | +------ TX Xon/Xoff */
1254 /* +--------- RX Xon/Xoff */
1255 #define Break_cnt 0x0E /* received break count */
1256 #define CD180TXirq 0x10 /* if non-0: enable TX irq */
1257 #define RX_mask 0x12
1258 #define TX_mask 0x14
1259 #define Ofs_rxb 0x16
1260 #define Ofs_txb 0x18
1261 #define Page_rxb 0x1A
1262 #define Page_txb 0x1C
1263 #define EndPage_rxb 0x1E
1264 #define EndPage_txb 0x20
1265 #define Data_error 0x22
1266 #define RxTrigger 0x28
1267 #define TxTrigger 0x2a
1268
1269 #define rRXwptr 0x34
1270 #define Low_water 0x36
1271
1272 #define FuncCode 0x40
1273 #define FuncArg 0x42
1274 #define FuncArg1 0x44
1275
1276 #define C218rx_size 0x2000 /* 8K bytes */
1277 #define C218tx_size 0x8000 /* 32K bytes */
1278
1279 #define C218rx_mask (C218rx_size - 1)
1280 #define C218tx_mask (C218tx_size - 1)
1281
1282 #define C320p8rx_size 0x2000
1283 #define C320p8tx_size 0x8000
1284 #define C320p8rx_mask (C320p8rx_size - 1)
1285 #define C320p8tx_mask (C320p8tx_size - 1)
1286
1287 #define C320p16rx_size 0x2000
1288 #define C320p16tx_size 0x4000
1289 #define C320p16rx_mask (C320p16rx_size - 1)
1290 #define C320p16tx_mask (C320p16tx_size - 1)
1291
1292 #define C320p24rx_size 0x2000
1293 #define C320p24tx_size 0x2000
1294 #define C320p24rx_mask (C320p24rx_size - 1)
1295 #define C320p24tx_mask (C320p24tx_size - 1)
1296
1297 #define C320p32rx_size 0x1000
1298 #define C320p32tx_size 0x1000
1299 #define C320p32rx_mask (C320p32rx_size - 1)
1300 #define C320p32tx_mask (C320p32tx_size - 1)
1301
1302 #define Page_size 0x2000
1303 #define Page_mask (Page_size - 1)
1304 #define C218rx_spage 3
1305 #define C218tx_spage 4
1306 #define C218rx_pageno 1
1307 #define C218tx_pageno 4
1308 #define C218buf_pageno 5
1309
1310 #define C320p8rx_spage 3
1311 #define C320p8tx_spage 4
1312 #define C320p8rx_pgno 1
1313 #define C320p8tx_pgno 4
1314 #define C320p8buf_pgno 5
1315
1316 #define C320p16rx_spage 3
1317 #define C320p16tx_spage 4
1318 #define C320p16rx_pgno 1
1319 #define C320p16tx_pgno 2
1320 #define C320p16buf_pgno 3
1321
1322 #define C320p24rx_spage 3
1323 #define C320p24tx_spage 4
1324 #define C320p24rx_pgno 1
1325 #define C320p24tx_pgno 1
1326 #define C320p24buf_pgno 2
1327
1328 #define C320p32rx_spage 3
1329 #define C320p32tx_ofs C320p32rx_size
1330 #define C320p32tx_spage 3
1331 #define C320p32buf_pgno 1
1332
1333 /*
1334 * Host Status
1335 */
1336 #define WakeupRx 0x01
1337 #define WakeupTx 0x02
1338 #define WakeupBreak 0x08
1339 #define WakeupLine 0x10
1340 #define WakeupIntr 0x20
1341 #define WakeupQuit 0x40
1342 #define WakeupEOF 0x80 /* used in VTIME control */
1343 #define WakeupRxTrigger 0x100
1344 #define WakeupTxTrigger 0x200
1345 /*
1346 * Flag status
1347 */
1348 #define Rx_over 0x01
1349 #define Xoff_state 0x02
1350 #define Tx_flowOff 0x04
1351 #define Tx_enable 0x08
1352 #define CTS_state 0x10
1353 #define DSR_state 0x20
1354 #define DCD_state 0x80
1355 /*
1356 * FlowControl
1357 */
1358 #define CTS_FlowCtl 1
1359 #define RTS_FlowCtl 2
1360 #define Tx_FlowCtl 4
1361 #define Rx_FlowCtl 8
1362 #define IXM_IXANY 0x10
1363
1364 #define LowWater 128
1365
1366 #define DTR_ON 1
1367 #define RTS_ON 2
1368 #define CTS_ON 1
1369 #define DSR_ON 2
1370 #define DCD_ON 8
1371
1372 /* mode definition */
1373 #define MX_CS8 0x03
1374 #define MX_CS7 0x02
1375 #define MX_CS6 0x01
1376 #define MX_CS5 0x00
1377
1378 #define MX_STOP1 0x00
1379 #define MX_STOP15 0x04
1380 #define MX_STOP2 0x08
1381
1382 #define MX_PARNONE 0x00
1383 #define MX_PAREVEN 0x40
1384 #define MX_PARODD 0xC0
1385
1386 /*
1387 * Query
1388 */
1389
1390 struct mon_str {
1391 int tick;
1392 int rxcnt[MAX_PORTS];
1393 int txcnt[MAX_PORTS];
1394 };
1395
1396 #define DCD_changed 0x01
1397 #define DCD_oldstate 0x80
1398
1399 static unsigned char moxaBuff[10240];
1400 static int moxaLowWaterChk;
1401 static int moxaCard;
1402 static struct mon_str moxaLog;
1403 static int moxaFuncTout = HZ / 2;
1404
1405 static void moxafunc(void __iomem *, int, ushort);
1406 static void moxa_wait_finish(void __iomem *);
1407 static void moxa_low_water_check(void __iomem *);
1408 static int moxaloadbios(int, unsigned char __user *, int);
1409 static int moxafindcard(int);
1410 static int moxaload320b(int, unsigned char __user *, int);
1411 static int moxaloadcode(int, unsigned char __user *, int);
1412 static int moxaloadc218(int, void __iomem *, int);
1413 static int moxaloadc320(int, void __iomem *, int, int *);
1414
1415 /*****************************************************************************
1416 * Driver level functions: *
1417 * 1. MoxaDriverInit(void); *
1418 * 2. MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port); *
1419 * 3. MoxaDriverPoll(void); *
1420 *****************************************************************************/
1421 void MoxaDriverInit(void)
1422 {
1423 struct moxa_port *p;
1424 unsigned int i;
1425
1426 moxaFuncTout = HZ / 2; /* 500 mini-seconds */
1427 moxaCard = 0;
1428 moxaLog.tick = 0;
1429 moxaLowWaterChk = 0;
1430 for (i = 0; i < MAX_PORTS; i++) {
1431 p = &moxa_ports[i];
1432 p->chkPort = 0;
1433 p->lowChkFlag = 0;
1434 p->lineCtrl = 0;
1435 moxaLog.rxcnt[i] = 0;
1436 moxaLog.txcnt[i] = 0;
1437 }
1438 }
1439
1440 #define MOXA 0x400
1441 #define MOXA_GET_IQUEUE (MOXA + 1) /* get input buffered count */
1442 #define MOXA_GET_OQUEUE (MOXA + 2) /* get output buffered count */
1443 #define MOXA_INIT_DRIVER (MOXA + 6) /* moxaCard=0 */
1444 #define MOXA_LOAD_BIOS (MOXA + 9) /* download BIOS */
1445 #define MOXA_FIND_BOARD (MOXA + 10) /* Check if MOXA card exist? */
1446 #define MOXA_LOAD_C320B (MOXA + 11) /* download 320B firmware */
1447 #define MOXA_LOAD_CODE (MOXA + 12) /* download firmware */
1448 #define MOXA_GETDATACOUNT (MOXA + 23)
1449 #define MOXA_GET_IOQUEUE (MOXA + 27)
1450 #define MOXA_FLUSH_QUEUE (MOXA + 28)
1451 #define MOXA_GET_CONF (MOXA + 35) /* configuration */
1452 #define MOXA_GET_MAJOR (MOXA + 63)
1453 #define MOXA_GET_CUMAJOR (MOXA + 64)
1454 #define MOXA_GETMSTATUS (MOXA + 65)
1455
1456 struct dl_str {
1457 char __user *buf;
1458 int len;
1459 int cardno;
1460 };
1461
1462 static struct dl_str dltmp;
1463
1464 void MoxaPortFlushData(int port, int mode)
1465 {
1466 void __iomem *ofsAddr;
1467 if ((mode < 0) || (mode > 2))
1468 return;
1469 ofsAddr = moxa_ports[port].tableAddr;
1470 moxafunc(ofsAddr, FC_FlushQueue, mode);
1471 if (mode != 1) {
1472 moxa_ports[port].lowChkFlag = 0;
1473 moxa_low_water_check(ofsAddr);
1474 }
1475 }
1476
1477 int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port)
1478 {
1479 int i;
1480 int status;
1481 int MoxaPortTxQueue(int), MoxaPortRxQueue(int);
1482 void __user *argp = (void __user *)arg;
1483
1484 if (port == MAX_PORTS) {
1485 if ((cmd != MOXA_GET_CONF) && (cmd != MOXA_INIT_DRIVER) &&
1486 (cmd != MOXA_LOAD_BIOS) && (cmd != MOXA_FIND_BOARD) && (cmd != MOXA_LOAD_C320B) &&
1487 (cmd != MOXA_LOAD_CODE) && (cmd != MOXA_GETDATACOUNT) &&
1488 (cmd != MOXA_GET_IOQUEUE) && (cmd != MOXA_GET_MAJOR) &&
1489 (cmd != MOXA_GET_CUMAJOR) && (cmd != MOXA_GETMSTATUS))
1490 return (-EINVAL);
1491 }
1492 switch (cmd) {
1493 case MOXA_GET_CONF:
1494 if(copy_to_user(argp, &moxa_boards, MAX_BOARDS *
1495 sizeof(struct moxa_board_conf)))
1496 return -EFAULT;
1497 return (0);
1498 case MOXA_INIT_DRIVER:
1499 if ((int) arg == 0x404)
1500 MoxaDriverInit();
1501 return (0);
1502 case MOXA_GETDATACOUNT:
1503 moxaLog.tick = jiffies;
1504 if(copy_to_user(argp, &moxaLog, sizeof(struct mon_str)))
1505 return -EFAULT;
1506 return (0);
1507 case MOXA_FLUSH_QUEUE:
1508 MoxaPortFlushData(port, arg);
1509 return (0);
1510 case MOXA_GET_IOQUEUE: {
1511 struct moxaq_str __user *argm = argp;
1512 struct moxaq_str tmp;
1513
1514 for (i = 0; i < MAX_PORTS; i++, argm++) {
1515 memset(&tmp, 0, sizeof(tmp));
1516 if (moxa_ports[i].chkPort) {
1517 tmp.inq = MoxaPortRxQueue(i);
1518 tmp.outq = MoxaPortTxQueue(i);
1519 }
1520 if (copy_to_user(argm, &tmp, sizeof(tmp)))
1521 return -EFAULT;
1522 }
1523 return (0);
1524 } case MOXA_GET_OQUEUE:
1525 i = MoxaPortTxQueue(port);
1526 return put_user(i, (unsigned long __user *)argp);
1527 case MOXA_GET_IQUEUE:
1528 i = MoxaPortRxQueue(port);
1529 return put_user(i, (unsigned long __user *)argp);
1530 case MOXA_GET_MAJOR:
1531 if(copy_to_user(argp, &ttymajor, sizeof(int)))
1532 return -EFAULT;
1533 return 0;
1534 case MOXA_GET_CUMAJOR:
1535 i = 0;
1536 if(copy_to_user(argp, &i, sizeof(int)))
1537 return -EFAULT;
1538 return 0;
1539 case MOXA_GETMSTATUS: {
1540 struct mxser_mstatus __user *argm = argp;
1541 struct mxser_mstatus tmp;
1542 struct moxa_port *p;
1543
1544 for (i = 0; i < MAX_PORTS; i++, argm++) {
1545 p = &moxa_ports[i];
1546 memset(&tmp, 0, sizeof(tmp));
1547 if (!p->chkPort) {
1548 goto copy;
1549 } else {
1550 status = MoxaPortLineStatus(p->port);
1551 if (status & 1)
1552 tmp.cts = 1;
1553 if (status & 2)
1554 tmp.dsr = 1;
1555 if (status & 4)
1556 tmp.dcd = 1;
1557 }
1558
1559 if (!p->tty || !p->tty->termios)
1560 tmp.cflag = p->cflag;
1561 else
1562 tmp.cflag = p->tty->termios->c_cflag;
1563 copy:
1564 if (copy_to_user(argm, &tmp, sizeof(tmp)))
1565 return -EFAULT;
1566 }
1567 return 0;
1568 } default:
1569 return (-ENOIOCTLCMD);
1570 case MOXA_LOAD_BIOS:
1571 case MOXA_FIND_BOARD:
1572 case MOXA_LOAD_C320B:
1573 case MOXA_LOAD_CODE:
1574 if (!capable(CAP_SYS_RAWIO))
1575 return -EPERM;
1576 break;
1577 }
1578
1579 if(copy_from_user(&dltmp, argp, sizeof(struct dl_str)))
1580 return -EFAULT;
1581 if(dltmp.cardno < 0 || dltmp.cardno >= MAX_BOARDS || dltmp.len < 0)
1582 return -EINVAL;
1583
1584 switch(cmd)
1585 {
1586 case MOXA_LOAD_BIOS:
1587 i = moxaloadbios(dltmp.cardno, dltmp.buf, dltmp.len);
1588 return (i);
1589 case MOXA_FIND_BOARD:
1590 return moxafindcard(dltmp.cardno);
1591 case MOXA_LOAD_C320B:
1592 moxaload320b(dltmp.cardno, dltmp.buf, dltmp.len);
1593 default: /* to keep gcc happy */
1594 return (0);
1595 case MOXA_LOAD_CODE:
1596 i = moxaloadcode(dltmp.cardno, dltmp.buf, dltmp.len);
1597 if (i == -1)
1598 return (-EFAULT);
1599 return (i);
1600
1601 }
1602 }
1603
1604 int MoxaDriverPoll(void)
1605 {
1606 struct moxa_board_conf *brd;
1607 register ushort temp;
1608 register int card;
1609 void __iomem *ofsAddr;
1610 void __iomem *ip;
1611 int port, p, ports;
1612
1613 if (moxaCard == 0)
1614 return (-1);
1615 for (card = 0; card < MAX_BOARDS; card++) {
1616 brd = &moxa_boards[card];
1617 if (brd->loadstat == 0)
1618 continue;
1619 if ((ports = brd->numPorts) == 0)
1620 continue;
1621 if (readb(brd->intPend) == 0xff) {
1622 ip = brd->intTable + readb(brd->intNdx);
1623 p = card * MAX_PORTS_PER_BOARD;
1624 ports <<= 1;
1625 for (port = 0; port < ports; port += 2, p++) {
1626 if ((temp = readw(ip + port)) != 0) {
1627 writew(0, ip + port);
1628 ofsAddr = moxa_ports[p].tableAddr;
1629 if (temp & IntrTx)
1630 writew(readw(ofsAddr + HostStat) & ~WakeupTx, ofsAddr + HostStat);
1631 if (temp & IntrBreak) {
1632 moxa_ports[p].breakCnt++;
1633 }
1634 if (temp & IntrLine) {
1635 if (readb(ofsAddr + FlagStat) & DCD_state) {
1636 if ((moxa_ports[p].DCDState & DCD_oldstate) == 0)
1637 moxa_ports[p].DCDState = (DCD_oldstate |
1638 DCD_changed);
1639 } else {
1640 if (moxa_ports[p].DCDState & DCD_oldstate)
1641 moxa_ports[p].DCDState = DCD_changed;
1642 }
1643 }
1644 }
1645 }
1646 writeb(0, brd->intPend);
1647 }
1648 if (moxaLowWaterChk) {
1649 p = card * MAX_PORTS_PER_BOARD;
1650 for (port = 0; port < ports; port++, p++) {
1651 if (moxa_ports[p].lowChkFlag) {
1652 moxa_ports[p].lowChkFlag = 0;
1653 ofsAddr = moxa_ports[p].tableAddr;
1654 moxa_low_water_check(ofsAddr);
1655 }
1656 }
1657 }
1658 }
1659 moxaLowWaterChk = 0;
1660 return (0);
1661 }
1662
1663 /*****************************************************************************
1664 * Card level function: *
1665 * 1. MoxaPortsOfCard(int cardno); *
1666 *****************************************************************************/
1667 int MoxaPortsOfCard(int cardno)
1668 {
1669
1670 if (moxa_boards[cardno].boardType == 0)
1671 return (0);
1672 return (moxa_boards[cardno].numPorts);
1673 }
1674
1675 /*****************************************************************************
1676 * Port level functions: *
1677 * 1. MoxaPortIsValid(int port); *
1678 * 2. MoxaPortEnable(int port); *
1679 * 3. MoxaPortDisable(int port); *
1680 * 4. MoxaPortGetMaxBaud(int port); *
1681 * 6. MoxaPortSetBaud(int port, long baud); *
1682 * 8. MoxaPortSetTermio(int port, unsigned char *termio); *
1683 * 9. MoxaPortGetLineOut(int port, int *dtrState, int *rtsState); *
1684 * 10. MoxaPortLineCtrl(int port, int dtrState, int rtsState); *
1685 * 11. MoxaPortFlowCtrl(int port, int rts, int cts, int rx, int tx,int xany); *
1686 * 12. MoxaPortLineStatus(int port); *
1687 * 13. MoxaPortDCDChange(int port); *
1688 * 14. MoxaPortDCDON(int port); *
1689 * 15. MoxaPortFlushData(int port, int mode); *
1690 * 16. MoxaPortWriteData(int port, unsigned char * buffer, int length); *
1691 * 17. MoxaPortReadData(int port, struct tty_struct *tty); *
1692 * 20. MoxaPortTxQueue(int port); *
1693 * 21. MoxaPortTxFree(int port); *
1694 * 22. MoxaPortRxQueue(int port); *
1695 * 24. MoxaPortTxDisable(int port); *
1696 * 25. MoxaPortTxEnable(int port); *
1697 * 27. MoxaPortResetBrkCnt(int port); *
1698 * 30. MoxaPortSendBreak(int port, int ticks); *
1699 *****************************************************************************/
1700 /*
1701 * Moxa Port Number Description:
1702 *
1703 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1704 * the port number using in MOXA driver functions will be 0 to 31 for
1705 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1706 * to 127 for fourth. For example, if you setup three MOXA boards,
1707 * first board is C218, second board is C320-16 and third board is
1708 * C320-32. The port number of first board (C218 - 8 ports) is from
1709 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1710 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1711 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1712 * 127 will be invalid.
1713 *
1714 *
1715 * Moxa Functions Description:
1716 *
1717 * Function 1: Driver initialization routine, this routine must be
1718 * called when initialized driver.
1719 * Syntax:
1720 * void MoxaDriverInit();
1721 *
1722 *
1723 * Function 2: Moxa driver private IOCTL command processing.
1724 * Syntax:
1725 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1726 *
1727 * unsigned int cmd : IOCTL command
1728 * unsigned long arg : IOCTL argument
1729 * int port : port number (0 - 127)
1730 *
1731 * return: 0 (OK)
1732 * -EINVAL
1733 * -ENOIOCTLCMD
1734 *
1735 *
1736 * Function 3: Moxa driver polling process routine.
1737 * Syntax:
1738 * int MoxaDriverPoll(void);
1739 *
1740 * return: 0 ; polling O.K.
1741 * -1 : no any Moxa card.
1742 *
1743 *
1744 * Function 4: Get the ports of this card.
1745 * Syntax:
1746 * int MoxaPortsOfCard(int cardno);
1747 *
1748 * int cardno : card number (0 - 3)
1749 *
1750 * return: 0 : this card is invalid
1751 * 8/16/24/32
1752 *
1753 *
1754 * Function 5: Check this port is valid or invalid
1755 * Syntax:
1756 * int MoxaPortIsValid(int port);
1757 * int port : port number (0 - 127, ref port description)
1758 *
1759 * return: 0 : this port is invalid
1760 * 1 : this port is valid
1761 *
1762 *
1763 * Function 6: Enable this port to start Tx/Rx data.
1764 * Syntax:
1765 * void MoxaPortEnable(int port);
1766 * int port : port number (0 - 127)
1767 *
1768 *
1769 * Function 7: Disable this port
1770 * Syntax:
1771 * void MoxaPortDisable(int port);
1772 * int port : port number (0 - 127)
1773 *
1774 *
1775 * Function 8: Get the maximun available baud rate of this port.
1776 * Syntax:
1777 * long MoxaPortGetMaxBaud(int port);
1778 * int port : port number (0 - 127)
1779 *
1780 * return: 0 : this port is invalid
1781 * 38400/57600/115200 bps
1782 *
1783 *
1784 * Function 10: Setting baud rate of this port.
1785 * Syntax:
1786 * long MoxaPortSetBaud(int port, long baud);
1787 * int port : port number (0 - 127)
1788 * long baud : baud rate (50 - 115200)
1789 *
1790 * return: 0 : this port is invalid or baud < 50
1791 * 50 - 115200 : the real baud rate set to the port, if
1792 * the argument baud is large than maximun
1793 * available baud rate, the real setting
1794 * baud rate will be the maximun baud rate.
1795 *
1796 *
1797 * Function 12: Configure the port.
1798 * Syntax:
1799 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1800 * int port : port number (0 - 127)
1801 * struct ktermios * termio : termio structure pointer
1802 * speed_t baud : baud rate
1803 *
1804 * return: -1 : this port is invalid or termio == NULL
1805 * 0 : setting O.K.
1806 *
1807 *
1808 * Function 13: Get the DTR/RTS state of this port.
1809 * Syntax:
1810 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1811 * int port : port number (0 - 127)
1812 * int * dtrState : pointer to INT to receive the current DTR
1813 * state. (if NULL, this function will not
1814 * write to this address)
1815 * int * rtsState : pointer to INT to receive the current RTS
1816 * state. (if NULL, this function will not
1817 * write to this address)
1818 *
1819 * return: -1 : this port is invalid
1820 * 0 : O.K.
1821 *
1822 *
1823 * Function 14: Setting the DTR/RTS output state of this port.
1824 * Syntax:
1825 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1826 * int port : port number (0 - 127)
1827 * int dtrState : DTR output state (0: off, 1: on)
1828 * int rtsState : RTS output state (0: off, 1: on)
1829 *
1830 *
1831 * Function 15: Setting the flow control of this port.
1832 * Syntax:
1833 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1834 * int txFlow,int xany);
1835 * int port : port number (0 - 127)
1836 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1837 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1838 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1839 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1840 * int xany : S/W XANY flow control (0: no, 1: yes)
1841 *
1842 *
1843 * Function 16: Get ths line status of this port
1844 * Syntax:
1845 * int MoxaPortLineStatus(int port);
1846 * int port : port number (0 - 127)
1847 *
1848 * return: Bit 0 - CTS state (0: off, 1: on)
1849 * Bit 1 - DSR state (0: off, 1: on)
1850 * Bit 2 - DCD state (0: off, 1: on)
1851 *
1852 *
1853 * Function 17: Check the DCD state has changed since the last read
1854 * of this function.
1855 * Syntax:
1856 * int MoxaPortDCDChange(int port);
1857 * int port : port number (0 - 127)
1858 *
1859 * return: 0 : no changed
1860 * 1 : DCD has changed
1861 *
1862 *
1863 * Function 18: Check ths current DCD state is ON or not.
1864 * Syntax:
1865 * int MoxaPortDCDON(int port);
1866 * int port : port number (0 - 127)
1867 *
1868 * return: 0 : DCD off
1869 * 1 : DCD on
1870 *
1871 *
1872 * Function 19: Flush the Rx/Tx buffer data of this port.
1873 * Syntax:
1874 * void MoxaPortFlushData(int port, int mode);
1875 * int port : port number (0 - 127)
1876 * int mode
1877 * 0 : flush the Rx buffer
1878 * 1 : flush the Tx buffer
1879 * 2 : flush the Rx and Tx buffer
1880 *
1881 *
1882 * Function 20: Write data.
1883 * Syntax:
1884 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1885 * int port : port number (0 - 127)
1886 * unsigned char * buffer : pointer to write data buffer.
1887 * int length : write data length
1888 *
1889 * return: 0 - length : real write data length
1890 *
1891 *
1892 * Function 21: Read data.
1893 * Syntax:
1894 * int MoxaPortReadData(int port, struct tty_struct *tty);
1895 * int port : port number (0 - 127)
1896 * struct tty_struct *tty : tty for data
1897 *
1898 * return: 0 - length : real read data length
1899 *
1900 *
1901 * Function 24: Get the Tx buffer current queued data bytes
1902 * Syntax:
1903 * int MoxaPortTxQueue(int port);
1904 * int port : port number (0 - 127)
1905 *
1906 * return: .. : Tx buffer current queued data bytes
1907 *
1908 *
1909 * Function 25: Get the Tx buffer current free space
1910 * Syntax:
1911 * int MoxaPortTxFree(int port);
1912 * int port : port number (0 - 127)
1913 *
1914 * return: .. : Tx buffer current free space
1915 *
1916 *
1917 * Function 26: Get the Rx buffer current queued data bytes
1918 * Syntax:
1919 * int MoxaPortRxQueue(int port);
1920 * int port : port number (0 - 127)
1921 *
1922 * return: .. : Rx buffer current queued data bytes
1923 *
1924 *
1925 * Function 28: Disable port data transmission.
1926 * Syntax:
1927 * void MoxaPortTxDisable(int port);
1928 * int port : port number (0 - 127)
1929 *
1930 *
1931 * Function 29: Enable port data transmission.
1932 * Syntax:
1933 * void MoxaPortTxEnable(int port);
1934 * int port : port number (0 - 127)
1935 *
1936 *
1937 * Function 31: Get the received BREAK signal count and reset it.
1938 * Syntax:
1939 * int MoxaPortResetBrkCnt(int port);
1940 * int port : port number (0 - 127)
1941 *
1942 * return: 0 - .. : BREAK signal count
1943 *
1944 *
1945 * Function 34: Send out a BREAK signal.
1946 * Syntax:
1947 * void MoxaPortSendBreak(int port, int ms100);
1948 * int port : port number (0 - 127)
1949 * int ms100 : break signal time interval.
1950 * unit: 100 mini-second. if ms100 == 0, it will
1951 * send out a about 250 ms BREAK signal.
1952 *
1953 */
1954 int MoxaPortIsValid(int port)
1955 {
1956
1957 if (moxaCard == 0)
1958 return (0);
1959 if (moxa_ports[port].chkPort == 0)
1960 return (0);
1961 return (1);
1962 }
1963
1964 void MoxaPortEnable(int port)
1965 {
1966 void __iomem *ofsAddr;
1967 int MoxaPortLineStatus(int);
1968 short lowwater = 512;
1969
1970 ofsAddr = moxa_ports[port].tableAddr;
1971 writew(lowwater, ofsAddr + Low_water);
1972 moxa_ports[port].breakCnt = 0;
1973 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
1974 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
1975 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1976 } else {
1977 writew(readw(ofsAddr + HostStat) | WakeupBreak, ofsAddr + HostStat);
1978 }
1979
1980 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1981 moxafunc(ofsAddr, FC_FlushQueue, 2);
1982
1983 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1984 MoxaPortLineStatus(port);
1985 }
1986
1987 void MoxaPortDisable(int port)
1988 {
1989 void __iomem *ofsAddr = moxa_ports[port].tableAddr;
1990
1991 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1992 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1993 writew(0, ofsAddr + HostStat);
1994 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1995 }
1996
1997 long MoxaPortGetMaxBaud(int port)
1998 {
1999 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2000 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI))
2001 return (460800L);
2002 else
2003 return (921600L);
2004 }
2005
2006
2007 long MoxaPortSetBaud(int port, long baud)
2008 {
2009 void __iomem *ofsAddr;
2010 long max, clock;
2011 unsigned int val;
2012
2013 if ((baud < 50L) || ((max = MoxaPortGetMaxBaud(port)) == 0))
2014 return (0);
2015 ofsAddr = moxa_ports[port].tableAddr;
2016 if (baud > max)
2017 baud = max;
2018 if (max == 38400L)
2019 clock = 614400L; /* for 9.8304 Mhz : max. 38400 bps */
2020 else if (max == 57600L)
2021 clock = 691200L; /* for 11.0592 Mhz : max. 57600 bps */
2022 else
2023 clock = 921600L; /* for 14.7456 Mhz : max. 115200 bps */
2024 val = clock / baud;
2025 moxafunc(ofsAddr, FC_SetBaud, val);
2026 baud = clock / val;
2027 moxa_ports[port].curBaud = baud;
2028 return (baud);
2029 }
2030
2031 int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud)
2032 {
2033 void __iomem *ofsAddr;
2034 tcflag_t cflag;
2035 tcflag_t mode = 0;
2036
2037 if (moxa_ports[port].chkPort == 0 || termio == 0)
2038 return (-1);
2039 ofsAddr = moxa_ports[port].tableAddr;
2040 cflag = termio->c_cflag; /* termio->c_cflag */
2041
2042 mode = termio->c_cflag & CSIZE;
2043 if (mode == CS5)
2044 mode = MX_CS5;
2045 else if (mode == CS6)
2046 mode = MX_CS6;
2047 else if (mode == CS7)
2048 mode = MX_CS7;
2049 else if (mode == CS8)
2050 mode = MX_CS8;
2051
2052 if (termio->c_cflag & CSTOPB) {
2053 if (mode == MX_CS5)
2054 mode |= MX_STOP15;
2055 else
2056 mode |= MX_STOP2;
2057 } else
2058 mode |= MX_STOP1;
2059
2060 if (termio->c_cflag & PARENB) {
2061 if (termio->c_cflag & PARODD)
2062 mode |= MX_PARODD;
2063 else
2064 mode |= MX_PAREVEN;
2065 } else
2066 mode |= MX_PARNONE;
2067
2068 moxafunc(ofsAddr, FC_SetDataMode, (ushort) mode);
2069
2070 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2071 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
2072 if (baud >= 921600L)
2073 return (-1);
2074 }
2075 baud = MoxaPortSetBaud(port, baud);
2076
2077 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
2078 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
2079 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
2080 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
2081 moxa_wait_finish(ofsAddr);
2082
2083 }
2084 return (baud);
2085 }
2086
2087 int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState)
2088 {
2089
2090 if (!MoxaPortIsValid(port))
2091 return (-1);
2092 if (dtrState) {
2093 if (moxa_ports[port].lineCtrl & DTR_ON)
2094 *dtrState = 1;
2095 else
2096 *dtrState = 0;
2097 }
2098 if (rtsState) {
2099 if (moxa_ports[port].lineCtrl & RTS_ON)
2100 *rtsState = 1;
2101 else
2102 *rtsState = 0;
2103 }
2104 return (0);
2105 }
2106
2107 void MoxaPortLineCtrl(int port, int dtr, int rts)
2108 {
2109 void __iomem *ofsAddr;
2110 int mode;
2111
2112 ofsAddr = moxa_ports[port].tableAddr;
2113 mode = 0;
2114 if (dtr)
2115 mode |= DTR_ON;
2116 if (rts)
2117 mode |= RTS_ON;
2118 moxa_ports[port].lineCtrl = mode;
2119 moxafunc(ofsAddr, FC_LineControl, mode);
2120 }
2121
2122 void MoxaPortFlowCtrl(int port, int rts, int cts, int txflow, int rxflow, int txany)
2123 {
2124 void __iomem *ofsAddr;
2125 int mode;
2126
2127 ofsAddr = moxa_ports[port].tableAddr;
2128 mode = 0;
2129 if (rts)
2130 mode |= RTS_FlowCtl;
2131 if (cts)
2132 mode |= CTS_FlowCtl;
2133 if (txflow)
2134 mode |= Tx_FlowCtl;
2135 if (rxflow)
2136 mode |= Rx_FlowCtl;
2137 if (txany)
2138 mode |= IXM_IXANY;
2139 moxafunc(ofsAddr, FC_SetFlowCtl, mode);
2140 }
2141
2142 int MoxaPortLineStatus(int port)
2143 {
2144 void __iomem *ofsAddr;
2145 int val;
2146
2147 ofsAddr = moxa_ports[port].tableAddr;
2148 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2149 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
2150 moxafunc(ofsAddr, FC_LineStatus, 0);
2151 val = readw(ofsAddr + FuncArg);
2152 } else {
2153 val = readw(ofsAddr + FlagStat) >> 4;
2154 }
2155 val &= 0x0B;
2156 if (val & 8) {
2157 val |= 4;
2158 if ((moxa_ports[port].DCDState & DCD_oldstate) == 0)
2159 moxa_ports[port].DCDState = (DCD_oldstate | DCD_changed);
2160 } else {
2161 if (moxa_ports[port].DCDState & DCD_oldstate)
2162 moxa_ports[port].DCDState = DCD_changed;
2163 }
2164 val &= 7;
2165 return (val);
2166 }
2167
2168 int MoxaPortDCDChange(int port)
2169 {
2170 int n;
2171
2172 if (moxa_ports[port].chkPort == 0)
2173 return (0);
2174 n = moxa_ports[port].DCDState;
2175 moxa_ports[port].DCDState &= ~DCD_changed;
2176 n &= DCD_changed;
2177 return (n);
2178 }
2179
2180 int MoxaPortDCDON(int port)
2181 {
2182 int n;
2183
2184 if (moxa_ports[port].chkPort == 0)
2185 return (0);
2186 if (moxa_ports[port].DCDState & DCD_oldstate)
2187 n = 1;
2188 else
2189 n = 0;
2190 return (n);
2191 }
2192
2193 int MoxaPortWriteData(int port, unsigned char * buffer, int len)
2194 {
2195 int c, total, i;
2196 ushort tail;
2197 int cnt;
2198 ushort head, tx_mask, spage, epage;
2199 ushort pageno, pageofs, bufhead;
2200 void __iomem *baseAddr, *ofsAddr, *ofs;
2201
2202 ofsAddr = moxa_ports[port].tableAddr;
2203 baseAddr = moxa_boards[port / MAX_PORTS_PER_BOARD].basemem;
2204 tx_mask = readw(ofsAddr + TX_mask);
2205 spage = readw(ofsAddr + Page_txb);
2206 epage = readw(ofsAddr + EndPage_txb);
2207 tail = readw(ofsAddr + TXwptr);
2208 head = readw(ofsAddr + TXrptr);
2209 c = (head > tail) ? (head - tail - 1)
2210 : (head - tail + tx_mask);
2211 if (c > len)
2212 c = len;
2213 moxaLog.txcnt[port] += c;
2214 total = c;
2215 if (spage == epage) {
2216 bufhead = readw(ofsAddr + Ofs_txb);
2217 writew(spage, baseAddr + Control_reg);
2218 while (c > 0) {
2219 if (head > tail)
2220 len = head - tail - 1;
2221 else
2222 len = tx_mask + 1 - tail;
2223 len = (c > len) ? len : c;
2224 ofs = baseAddr + DynPage_addr + bufhead + tail;
2225 for (i = 0; i < len; i++)
2226 writeb(*buffer++, ofs + i);
2227 tail = (tail + len) & tx_mask;
2228 c -= len;
2229 }
2230 writew(tail, ofsAddr + TXwptr);
2231 } else {
2232 len = c;
2233 pageno = spage + (tail >> 13);
2234 pageofs = tail & Page_mask;
2235 do {
2236 cnt = Page_size - pageofs;
2237 if (cnt > c)
2238 cnt = c;
2239 c -= cnt;
2240 writeb(pageno, baseAddr + Control_reg);
2241 ofs = baseAddr + DynPage_addr + pageofs;
2242 for (i = 0; i < cnt; i++)
2243 writeb(*buffer++, ofs + i);
2244 if (c == 0) {
2245 writew((tail + len) & tx_mask, ofsAddr + TXwptr);
2246 break;
2247 }
2248 if (++pageno == epage)
2249 pageno = spage;
2250 pageofs = 0;
2251 } while (1);
2252 }
2253 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2254 return (total);
2255 }
2256
2257 int MoxaPortReadData(int port, struct tty_struct *tty)
2258 {
2259 register ushort head, pageofs;
2260 int i, count, cnt, len, total, remain;
2261 ushort tail, rx_mask, spage, epage;
2262 ushort pageno, bufhead;
2263 void __iomem *baseAddr, *ofsAddr, *ofs;
2264
2265 ofsAddr = moxa_ports[port].tableAddr;
2266 baseAddr = moxa_boards[port / MAX_PORTS_PER_BOARD].basemem;
2267 head = readw(ofsAddr + RXrptr);
2268 tail = readw(ofsAddr + RXwptr);
2269 rx_mask = readw(ofsAddr + RX_mask);
2270 spage = readw(ofsAddr + Page_rxb);
2271 epage = readw(ofsAddr + EndPage_rxb);
2272 count = (tail >= head) ? (tail - head)
2273 : (tail - head + rx_mask + 1);
2274 if (count == 0)
2275 return 0;
2276
2277 total = count;
2278 remain = count - total;
2279 moxaLog.rxcnt[port] += total;
2280 count = total;
2281 if (spage == epage) {
2282 bufhead = readw(ofsAddr + Ofs_rxb);
2283 writew(spage, baseAddr + Control_reg);
2284 while (count > 0) {
2285 if (tail >= head)
2286 len = tail - head;
2287 else
2288 len = rx_mask + 1 - head;
2289 len = (count > len) ? len : count;
2290 ofs = baseAddr + DynPage_addr + bufhead + head;
2291 for (i = 0; i < len; i++)
2292 tty_insert_flip_char(tty, readb(ofs + i), TTY_NORMAL);
2293 head = (head + len) & rx_mask;
2294 count -= len;
2295 }
2296 writew(head, ofsAddr + RXrptr);
2297 } else {
2298 len = count;
2299 pageno = spage + (head >> 13);
2300 pageofs = head & Page_mask;
2301 do {
2302 cnt = Page_size - pageofs;
2303 if (cnt > count)
2304 cnt = count;
2305 count -= cnt;
2306 writew(pageno, baseAddr + Control_reg);
2307 ofs = baseAddr + DynPage_addr + pageofs;
2308 for (i = 0; i < cnt; i++)
2309 tty_insert_flip_char(tty, readb(ofs + i), TTY_NORMAL);
2310 if (count == 0) {
2311 writew((head + len) & rx_mask, ofsAddr + RXrptr);
2312 break;
2313 }
2314 if (++pageno == epage)
2315 pageno = spage;
2316 pageofs = 0;
2317 } while (1);
2318 }
2319 if ((readb(ofsAddr + FlagStat) & Xoff_state) && (remain < LowWater)) {
2320 moxaLowWaterChk = 1;
2321 moxa_ports[port].lowChkFlag = 1;
2322 }
2323 return (total);
2324 }
2325
2326
2327 int MoxaPortTxQueue(int port)
2328 {
2329 void __iomem *ofsAddr;
2330 ushort rptr, wptr, mask;
2331 int len;
2332
2333 ofsAddr = moxa_ports[port].tableAddr;
2334 rptr = readw(ofsAddr + TXrptr);
2335 wptr = readw(ofsAddr + TXwptr);
2336 mask = readw(ofsAddr + TX_mask);
2337 len = (wptr - rptr) & mask;
2338 return (len);
2339 }
2340
2341 int MoxaPortTxFree(int port)
2342 {
2343 void __iomem *ofsAddr;
2344 ushort rptr, wptr, mask;
2345 int len;
2346
2347 ofsAddr = moxa_ports[port].tableAddr;
2348 rptr = readw(ofsAddr + TXrptr);
2349 wptr = readw(ofsAddr + TXwptr);
2350 mask = readw(ofsAddr + TX_mask);
2351 len = mask - ((wptr - rptr) & mask);
2352 return (len);
2353 }
2354
2355 int MoxaPortRxQueue(int port)
2356 {
2357 void __iomem *ofsAddr;
2358 ushort rptr, wptr, mask;
2359 int len;
2360
2361 ofsAddr = moxa_ports[port].tableAddr;
2362 rptr = readw(ofsAddr + RXrptr);
2363 wptr = readw(ofsAddr + RXwptr);
2364 mask = readw(ofsAddr + RX_mask);
2365 len = (wptr - rptr) & mask;
2366 return (len);
2367 }
2368
2369
2370 void MoxaPortTxDisable(int port)
2371 {
2372 void __iomem *ofsAddr;
2373
2374 ofsAddr = moxa_ports[port].tableAddr;
2375 moxafunc(ofsAddr, FC_SetXoffState, Magic_code);
2376 }
2377
2378 void MoxaPortTxEnable(int port)
2379 {
2380 void __iomem *ofsAddr;
2381
2382 ofsAddr = moxa_ports[port].tableAddr;
2383 moxafunc(ofsAddr, FC_SetXonState, Magic_code);
2384 }
2385
2386
2387 int MoxaPortResetBrkCnt(int port)
2388 {
2389 ushort cnt;
2390 cnt = moxa_ports[port].breakCnt;
2391 moxa_ports[port].breakCnt = 0;
2392 return (cnt);
2393 }
2394
2395
2396 void MoxaPortSendBreak(int port, int ms100)
2397 {
2398 void __iomem *ofsAddr;
2399
2400 ofsAddr = moxa_ports[port].tableAddr;
2401 if (ms100) {
2402 moxafunc(ofsAddr, FC_SendBreak, Magic_code);
2403 msleep(ms100 * 10);
2404 } else {
2405 moxafunc(ofsAddr, FC_SendBreak, Magic_code);
2406 msleep(250);
2407 }
2408 moxafunc(ofsAddr, FC_StopBreak, Magic_code);
2409 }
2410
2411 static int moxa_get_serial_info(struct moxa_port *info,
2412 struct serial_struct __user *retinfo)
2413 {
2414 struct serial_struct tmp;
2415
2416 memset(&tmp, 0, sizeof(tmp));
2417 tmp.type = info->type;
2418 tmp.line = info->port;
2419 tmp.port = 0;
2420 tmp.irq = 0;
2421 tmp.flags = info->asyncflags;
2422 tmp.baud_base = 921600;
2423 tmp.close_delay = info->close_delay;
2424 tmp.closing_wait = info->closing_wait;
2425 tmp.custom_divisor = 0;
2426 tmp.hub6 = 0;
2427 if(copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2428 return -EFAULT;
2429 return (0);
2430 }
2431
2432
2433 static int moxa_set_serial_info(struct moxa_port *info,
2434 struct serial_struct __user *new_info)
2435 {
2436 struct serial_struct new_serial;
2437
2438 if(copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2439 return -EFAULT;
2440
2441 if ((new_serial.irq != 0) ||
2442 (new_serial.port != 0) ||
2443 // (new_serial.type != info->type) ||
2444 (new_serial.custom_divisor != 0) ||
2445 (new_serial.baud_base != 921600))
2446 return (-EPERM);
2447
2448 if (!capable(CAP_SYS_ADMIN)) {
2449 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
2450 (info->asyncflags & ~ASYNC_USR_MASK)))
2451 return (-EPERM);
2452 } else {
2453 info->close_delay = new_serial.close_delay * HZ / 100;
2454 info->closing_wait = new_serial.closing_wait * HZ / 100;
2455 }
2456
2457 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
2458 new_serial.flags |= (info->asyncflags & ASYNC_FLAGS);
2459
2460 if (new_serial.type == PORT_16550A) {
2461 MoxaSetFifo(info->port, 1);
2462 } else {
2463 MoxaSetFifo(info->port, 0);
2464 }
2465
2466 info->type = new_serial.type;
2467 return (0);
2468 }
2469
2470
2471
2472 /*****************************************************************************
2473 * Static local functions: *
2474 *****************************************************************************/
2475 static void moxafunc(void __iomem *ofsAddr, int cmd, ushort arg)
2476 {
2477
2478 writew(arg, ofsAddr + FuncArg);
2479 writew(cmd, ofsAddr + FuncCode);
2480 moxa_wait_finish(ofsAddr);
2481 }
2482
2483 static void moxa_wait_finish(void __iomem *ofsAddr)
2484 {
2485 unsigned long i, j;
2486
2487 i = jiffies;
2488 while (readw(ofsAddr + FuncCode) != 0) {
2489 j = jiffies;
2490 if ((j - i) > moxaFuncTout) {
2491 return;
2492 }
2493 }
2494 }
2495
2496 static void moxa_low_water_check(void __iomem *ofsAddr)
2497 {
2498 int len;
2499 ushort rptr, wptr, mask;
2500
2501 if (readb(ofsAddr + FlagStat) & Xoff_state) {
2502 rptr = readw(ofsAddr + RXrptr);
2503 wptr = readw(ofsAddr + RXwptr);
2504 mask = readw(ofsAddr + RX_mask);
2505 len = (wptr - rptr) & mask;
2506 if (len <= Low_water)
2507 moxafunc(ofsAddr, FC_SendXon, 0);
2508 }
2509 }
2510
2511 static int moxaloadbios(int cardno, unsigned char __user *tmp, int len)
2512 {
2513 void __iomem *baseAddr;
2514 int i;
2515
2516 if(len < 0 || len > sizeof(moxaBuff))
2517 return -EINVAL;
2518 if(copy_from_user(moxaBuff, tmp, len))
2519 return -EFAULT;
2520 baseAddr = moxa_boards[cardno].basemem;
2521 writeb(HW_reset, baseAddr + Control_reg); /* reset */
2522 msleep(10);
2523 for (i = 0; i < 4096; i++)
2524 writeb(0, baseAddr + i); /* clear fix page */
2525 for (i = 0; i < len; i++)
2526 writeb(moxaBuff[i], baseAddr + i); /* download BIOS */
2527 writeb(0, baseAddr + Control_reg); /* restart */
2528 return (0);
2529 }
2530
2531 static int moxafindcard(int cardno)
2532 {
2533 void __iomem *baseAddr;
2534 ushort tmp;
2535
2536 baseAddr = moxa_boards[cardno].basemem;
2537 switch (moxa_boards[cardno].boardType) {
2538 case MOXA_BOARD_C218_ISA:
2539 case MOXA_BOARD_C218_PCI:
2540 if ((tmp = readw(baseAddr + C218_key)) != C218_KeyCode) {
2541 return (-1);
2542 }
2543 break;
2544 case MOXA_BOARD_CP204J:
2545 if ((tmp = readw(baseAddr + C218_key)) != CP204J_KeyCode) {
2546 return (-1);
2547 }
2548 break;
2549 default:
2550 if ((tmp = readw(baseAddr + C320_key)) != C320_KeyCode) {
2551 return (-1);
2552 }
2553 if ((tmp = readw(baseAddr + C320_status)) != STS_init) {
2554 return (-2);
2555 }
2556 }
2557 return (0);
2558 }
2559
2560 static int moxaload320b(int cardno, unsigned char __user *tmp, int len)
2561 {
2562 void __iomem *baseAddr;
2563 int i;
2564
2565 if(len < 0 || len > sizeof(moxaBuff))
2566 return -EINVAL;
2567 if(copy_from_user(moxaBuff, tmp, len))
2568 return -EFAULT;
2569 baseAddr = moxa_boards[cardno].basemem;
2570 writew(len - 7168 - 2, baseAddr + C320bapi_len);
2571 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
2572 for (i = 0; i < 7168; i++)
2573 writeb(moxaBuff[i], baseAddr + DynPage_addr + i);
2574 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
2575 for (i = 0; i < (len - 7168); i++)
2576 writeb(moxaBuff[i + 7168], baseAddr + DynPage_addr + i);
2577 return (0);
2578 }
2579
2580 static int moxaloadcode(int cardno, unsigned char __user *tmp, int len)
2581 {
2582 void __iomem *baseAddr, *ofsAddr;
2583 int retval, port, i;
2584
2585 if(len < 0 || len > sizeof(moxaBuff))
2586 return -EINVAL;
2587 if(copy_from_user(moxaBuff, tmp, len))
2588 return -EFAULT;
2589 baseAddr = moxa_boards[cardno].basemem;
2590 switch (moxa_boards[cardno].boardType) {
2591 case MOXA_BOARD_C218_ISA:
2592 case MOXA_BOARD_C218_PCI:
2593 case MOXA_BOARD_CP204J:
2594 retval = moxaloadc218(cardno, baseAddr, len);
2595 if (retval)
2596 return (retval);
2597 port = cardno * MAX_PORTS_PER_BOARD;
2598 for (i = 0; i < moxa_boards[cardno].numPorts; i++, port++) {
2599 struct moxa_port *p = &moxa_ports[port];
2600
2601 p->chkPort = 1;
2602 p->curBaud = 9600L;
2603 p->DCDState = 0;
2604 p->tableAddr = baseAddr + Extern_table + Extern_size * i;
2605 ofsAddr = p->tableAddr;
2606 writew(C218rx_mask, ofsAddr + RX_mask);
2607 writew(C218tx_mask, ofsAddr + TX_mask);
2608 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
2609 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
2610
2611 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
2612 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
2613
2614 }
2615 break;
2616 default:
2617 retval = moxaloadc320(cardno, baseAddr, len,
2618 &moxa_boards[cardno].numPorts);
2619 if (retval)
2620 return (retval);
2621 port = cardno * MAX_PORTS_PER_BOARD;
2622 for (i = 0; i < moxa_boards[cardno].numPorts; i++, port++) {
2623 struct moxa_port *p = &moxa_ports[port];
2624
2625 p->chkPort = 1;
2626 p->curBaud = 9600L;
2627 p->DCDState = 0;
2628 p->tableAddr = baseAddr + Extern_table + Extern_size * i;
2629 ofsAddr = p->tableAddr;
2630 if (moxa_boards[cardno].numPorts == 8) {
2631 writew(C320p8rx_mask, ofsAddr + RX_mask);
2632 writew(C320p8tx_mask, ofsAddr + TX_mask);
2633 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
2634 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
2635 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
2636 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
2637
2638 } else if (moxa_boards[cardno].numPorts == 16) {
2639 writew(C320p16rx_mask, ofsAddr + RX_mask);
2640 writew(C320p16tx_mask, ofsAddr + TX_mask);
2641 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
2642 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
2643 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
2644 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
2645
2646 } else if (moxa_boards[cardno].numPorts == 24) {
2647 writew(C320p24rx_mask, ofsAddr + RX_mask);
2648 writew(C320p24tx_mask, ofsAddr + TX_mask);
2649 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
2650 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
2651 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
2652 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
2653 } else if (moxa_boards[cardno].numPorts == 32) {
2654 writew(C320p32rx_mask, ofsAddr + RX_mask);
2655 writew(C320p32tx_mask, ofsAddr + TX_mask);
2656 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
2657 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
2658 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
2659 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
2660 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
2661 }
2662 }
2663 break;
2664 }
2665 moxa_boards[cardno].loadstat = 1;
2666 return (0);
2667 }
2668
2669 static int moxaloadc218(int cardno, void __iomem *baseAddr, int len)
2670 {
2671 char retry;
2672 int i, j, len1, len2;
2673 ushort usum, *ptr, keycode;
2674
2675 if (moxa_boards[cardno].boardType == MOXA_BOARD_CP204J)
2676 keycode = CP204J_KeyCode;
2677 else
2678 keycode = C218_KeyCode;
2679 usum = 0;
2680 len1 = len >> 1;
2681 ptr = (ushort *) moxaBuff;
2682 for (i = 0; i < len1; i++)
2683 usum += le16_to_cpu(*(ptr + i));
2684 retry = 0;
2685 do {
2686 len1 = len >> 1;
2687 j = 0;
2688 while (len1) {
2689 len2 = (len1 > 2048) ? 2048 : len1;
2690 len1 -= len2;
2691 for (i = 0; i < len2 << 1; i++)
2692 writeb(moxaBuff[i + j], baseAddr + C218_LoadBuf + i);
2693 j += i;
2694
2695 writew(len2, baseAddr + C218DLoad_len);
2696 writew(0, baseAddr + C218_key);
2697 for (i = 0; i < 100; i++) {
2698 if (readw(baseAddr + C218_key) == keycode)
2699 break;
2700 msleep(10);
2701 }
2702 if (readw(baseAddr + C218_key) != keycode) {
2703 return (-1);
2704 }
2705 }
2706 writew(0, baseAddr + C218DLoad_len);
2707 writew(usum, baseAddr + C218check_sum);
2708 writew(0, baseAddr + C218_key);
2709 for (i = 0; i < 100; i++) {
2710 if (readw(baseAddr + C218_key) == keycode)
2711 break;
2712 msleep(10);
2713 }
2714 retry++;
2715 } while ((readb(baseAddr + C218chksum_ok) != 1) && (retry < 3));
2716 if (readb(baseAddr + C218chksum_ok) != 1) {
2717 return (-1);
2718 }
2719 writew(0, baseAddr + C218_key);
2720 for (i = 0; i < 100; i++) {
2721 if (readw(baseAddr + Magic_no) == Magic_code)
2722 break;
2723 msleep(10);
2724 }
2725 if (readw(baseAddr + Magic_no) != Magic_code) {
2726 return (-1);
2727 }
2728 writew(1, baseAddr + Disable_IRQ);
2729 writew(0, baseAddr + Magic_no);
2730 for (i = 0; i < 100; i++) {
2731 if (readw(baseAddr + Magic_no) == Magic_code)
2732 break;
2733 msleep(10);
2734 }
2735 if (readw(baseAddr + Magic_no) != Magic_code) {
2736 return (-1);
2737 }
2738 moxaCard = 1;
2739 moxa_boards[cardno].intNdx = baseAddr + IRQindex;
2740 moxa_boards[cardno].intPend = baseAddr + IRQpending;
2741 moxa_boards[cardno].intTable = baseAddr + IRQtable;
2742 return (0);
2743 }
2744
2745 static int moxaloadc320(int cardno, void __iomem *baseAddr, int len, int *numPorts)
2746 {
2747 ushort usum;
2748 int i, j, wlen, len2, retry;
2749 ushort *uptr;
2750
2751 usum = 0;
2752 wlen = len >> 1;
2753 uptr = (ushort *) moxaBuff;
2754 for (i = 0; i < wlen; i++)
2755 usum += le16_to_cpu(uptr[i]);
2756 retry = 0;
2757 j = 0;
2758 do {
2759 while (wlen) {
2760 if (wlen > 2048)
2761 len2 = 2048;
2762 else
2763 len2 = wlen;
2764 wlen -= len2;
2765 len2 <<= 1;
2766 for (i = 0; i < len2; i++)
2767 writeb(moxaBuff[j + i], baseAddr + C320_LoadBuf + i);
2768 len2 >>= 1;
2769 j += i;
2770 writew(len2, baseAddr + C320DLoad_len);
2771 writew(0, baseAddr + C320_key);
2772 for (i = 0; i < 10; i++) {
2773 if (readw(baseAddr + C320_key) == C320_KeyCode)
2774 break;
2775 msleep(10);
2776 }
2777 if (readw(baseAddr + C320_key) != C320_KeyCode)
2778 return (-1);
2779 }
2780 writew(0, baseAddr + C320DLoad_len);
2781 writew(usum, baseAddr + C320check_sum);
2782 writew(0, baseAddr + C320_key);
2783 for (i = 0; i < 10; i++) {
2784 if (readw(baseAddr + C320_key) == C320_KeyCode)
2785 break;
2786 msleep(10);
2787 }
2788 retry++;
2789 } while ((readb(baseAddr + C320chksum_ok) != 1) && (retry < 3));
2790 if (readb(baseAddr + C320chksum_ok) != 1)
2791 return (-1);
2792 writew(0, baseAddr + C320_key);
2793 for (i = 0; i < 600; i++) {
2794 if (readw(baseAddr + Magic_no) == Magic_code)
2795 break;
2796 msleep(10);
2797 }
2798 if (readw(baseAddr + Magic_no) != Magic_code)
2799 return (-100);
2800
2801 if (moxa_boards[cardno].busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
2802 writew(0x3800, baseAddr + TMS320_PORT1);
2803 writew(0x3900, baseAddr + TMS320_PORT2);
2804 writew(28499, baseAddr + TMS320_CLOCK);
2805 } else {
2806 writew(0x3200, baseAddr + TMS320_PORT1);
2807 writew(0x3400, baseAddr + TMS320_PORT2);
2808 writew(19999, baseAddr + TMS320_CLOCK);
2809 }
2810 writew(1, baseAddr + Disable_IRQ);
2811 writew(0, baseAddr + Magic_no);
2812 for (i = 0; i < 500; i++) {
2813 if (readw(baseAddr + Magic_no) == Magic_code)
2814 break;
2815 msleep(10);
2816 }
2817 if (readw(baseAddr + Magic_no) != Magic_code)
2818 return (-102);
2819
2820 j = readw(baseAddr + Module_cnt);
2821 if (j <= 0)
2822 return (-101);
2823 *numPorts = j * 8;
2824 writew(j, baseAddr + Module_no);
2825 writew(0, baseAddr + Magic_no);
2826 for (i = 0; i < 600; i++) {
2827 if (readw(baseAddr + Magic_no) == Magic_code)
2828 break;
2829 msleep(10);
2830 }
2831 if (readw(baseAddr + Magic_no) != Magic_code)
2832 return (-102);
2833 moxaCard = 1;
2834 moxa_boards[cardno].intNdx = baseAddr + IRQindex;
2835 moxa_boards[cardno].intPend = baseAddr + IRQpending;
2836 moxa_boards[cardno].intTable = baseAddr + IRQtable;
2837 return (0);
2838 }
2839
2840 static void MoxaSetFifo(int port, int enable)
2841 {
2842 void __iomem *ofsAddr = moxa_ports[port].tableAddr;
2843
2844 if (!enable) {
2845 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2846 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2847 } else {
2848 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2849 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2850 }
2851 }
AMDTP streaming driver for the Linux FireWire stack (Juju)