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[SCSI] ipr: Log error for SAS dual path switch
[firewire-audio.git] / drivers / ata / sata_via.c
blob598e6a26a481a7934d8ae14121e395844c1f22dd
1 /*
2 * sata_via.c - VIA Serial ATA controllers
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available under NDA.
31 *
32 *
33 * To-do list:
34 * - VT6421 PATA support
35 *
36 */
37
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/pci.h>
41 #include <linux/init.h>
42 #include <linux/blkdev.h>
43 #include <linux/delay.h>
44 #include <linux/device.h>
45 #include <scsi/scsi_host.h>
46 #include <linux/libata.h>
47
48 #define DRV_NAME "sata_via"
49 #define DRV_VERSION "2.1"
50
51 enum board_ids_enum {
52 vt6420,
53 vt6421,
54 };
55
56 enum {
57 SATA_CHAN_ENAB = 0x40, /* SATA channel enable */
58 SATA_INT_GATE = 0x41, /* SATA interrupt gating */
59 SATA_NATIVE_MODE = 0x42, /* Native mode enable */
60 SATA_PATA_SHARING = 0x49, /* PATA/SATA sharing func ctrl */
61 PATA_UDMA_TIMING = 0xB3, /* PATA timing for DMA/ cable detect */
62 PATA_PIO_TIMING = 0xAB, /* PATA timing register */
63
64 PORT0 = (1 << 1),
65 PORT1 = (1 << 0),
66 ALL_PORTS = PORT0 | PORT1,
67 PATA_PORT = 2, /* PATA is port 2 */
68 N_PORTS = 3,
69
70 NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4),
71
72 SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */
73 SATA_2DEV = (1 << 5), /* SATA is master/slave */
74 };
75
76 static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
77 static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg);
78 static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
79 static void svia_noop_freeze(struct ata_port *ap);
80 static void vt6420_error_handler(struct ata_port *ap);
81 static void vt6421_sata_error_handler(struct ata_port *ap);
82 static void vt6421_pata_error_handler(struct ata_port *ap);
83 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
84 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
85 static int vt6421_port_start(struct ata_port *ap);
86
87 static const struct pci_device_id svia_pci_tbl[] = {
88 { PCI_VDEVICE(VIA, 0x5337), vt6420 },
89 { PCI_VDEVICE(VIA, 0x0591), vt6420 },
90 { PCI_VDEVICE(VIA, 0x3149), vt6420 },
91 { PCI_VDEVICE(VIA, 0x3249), vt6421 },
92
93 { } /* terminate list */
94 };
95
96 static struct pci_driver svia_pci_driver = {
97 .name = DRV_NAME,
98 .id_table = svia_pci_tbl,
99 .probe = svia_init_one,
100 .remove = ata_pci_remove_one,
101 };
102
103 static struct scsi_host_template svia_sht = {
104 .module = THIS_MODULE,
105 .name = DRV_NAME,
106 .ioctl = ata_scsi_ioctl,
107 .queuecommand = ata_scsi_queuecmd,
108 .can_queue = ATA_DEF_QUEUE,
109 .this_id = ATA_SHT_THIS_ID,
110 .sg_tablesize = LIBATA_MAX_PRD,
111 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
112 .emulated = ATA_SHT_EMULATED,
113 .use_clustering = ATA_SHT_USE_CLUSTERING,
114 .proc_name = DRV_NAME,
115 .dma_boundary = ATA_DMA_BOUNDARY,
116 .slave_configure = ata_scsi_slave_config,
117 .slave_destroy = ata_scsi_slave_destroy,
118 .bios_param = ata_std_bios_param,
119 };
120
121 static const struct ata_port_operations vt6420_sata_ops = {
122 .port_disable = ata_port_disable,
123
124 .tf_load = ata_tf_load,
125 .tf_read = ata_tf_read,
126 .check_status = ata_check_status,
127 .exec_command = ata_exec_command,
128 .dev_select = ata_std_dev_select,
129
130 .bmdma_setup = ata_bmdma_setup,
131 .bmdma_start = ata_bmdma_start,
132 .bmdma_stop = ata_bmdma_stop,
133 .bmdma_status = ata_bmdma_status,
134
135 .qc_prep = ata_qc_prep,
136 .qc_issue = ata_qc_issue_prot,
137 .data_xfer = ata_data_xfer,
138
139 .freeze = svia_noop_freeze,
140 .thaw = ata_bmdma_thaw,
141 .error_handler = vt6420_error_handler,
142 .post_internal_cmd = ata_bmdma_post_internal_cmd,
143
144 .irq_handler = ata_interrupt,
145 .irq_clear = ata_bmdma_irq_clear,
146 .irq_on = ata_irq_on,
147 .irq_ack = ata_irq_ack,
148
149 .port_start = ata_port_start,
150 };
151
152 static const struct ata_port_operations vt6421_pata_ops = {
153 .port_disable = ata_port_disable,
154
155 .set_piomode = vt6421_set_pio_mode,
156 .set_dmamode = vt6421_set_dma_mode,
157
158 .tf_load = ata_tf_load,
159 .tf_read = ata_tf_read,
160 .check_status = ata_check_status,
161 .exec_command = ata_exec_command,
162 .dev_select = ata_std_dev_select,
163
164 .bmdma_setup = ata_bmdma_setup,
165 .bmdma_start = ata_bmdma_start,
166 .bmdma_stop = ata_bmdma_stop,
167 .bmdma_status = ata_bmdma_status,
168
169 .qc_prep = ata_qc_prep,
170 .qc_issue = ata_qc_issue_prot,
171 .data_xfer = ata_data_xfer,
172
173 .freeze = ata_bmdma_freeze,
174 .thaw = ata_bmdma_thaw,
175 .error_handler = vt6421_pata_error_handler,
176 .post_internal_cmd = ata_bmdma_post_internal_cmd,
177
178 .irq_handler = ata_interrupt,
179 .irq_clear = ata_bmdma_irq_clear,
180 .irq_on = ata_irq_on,
181 .irq_ack = ata_irq_ack,
182
183 .port_start = vt6421_port_start,
184 };
185
186 static const struct ata_port_operations vt6421_sata_ops = {
187 .port_disable = ata_port_disable,
188
189 .tf_load = ata_tf_load,
190 .tf_read = ata_tf_read,
191 .check_status = ata_check_status,
192 .exec_command = ata_exec_command,
193 .dev_select = ata_std_dev_select,
194
195 .bmdma_setup = ata_bmdma_setup,
196 .bmdma_start = ata_bmdma_start,
197 .bmdma_stop = ata_bmdma_stop,
198 .bmdma_status = ata_bmdma_status,
199
200 .qc_prep = ata_qc_prep,
201 .qc_issue = ata_qc_issue_prot,
202 .data_xfer = ata_data_xfer,
203
204 .freeze = ata_bmdma_freeze,
205 .thaw = ata_bmdma_thaw,
206 .error_handler = vt6421_sata_error_handler,
207 .post_internal_cmd = ata_bmdma_post_internal_cmd,
208
209 .irq_handler = ata_interrupt,
210 .irq_clear = ata_bmdma_irq_clear,
211 .irq_on = ata_irq_on,
212 .irq_ack = ata_irq_ack,
213
214 .scr_read = svia_scr_read,
215 .scr_write = svia_scr_write,
216
217 .port_start = vt6421_port_start,
218 };
219
220 static struct ata_port_info vt6420_port_info = {
221 .sht = &svia_sht,
222 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
223 .pio_mask = 0x1f,
224 .mwdma_mask = 0x07,
225 .udma_mask = 0x7f,
226 .port_ops = &vt6420_sata_ops,
227 };
228
229 MODULE_AUTHOR("Jeff Garzik");
230 MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
231 MODULE_LICENSE("GPL");
232 MODULE_DEVICE_TABLE(pci, svia_pci_tbl);
233 MODULE_VERSION(DRV_VERSION);
234
235 static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg)
236 {
237 if (sc_reg > SCR_CONTROL)
238 return 0xffffffffU;
239 return ioread32(ap->ioaddr.scr_addr + (4 * sc_reg));
240 }
241
242 static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
243 {
244 if (sc_reg > SCR_CONTROL)
245 return;
246 iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg));
247 }
248
249 static void svia_noop_freeze(struct ata_port *ap)
250 {
251 /* Some VIA controllers choke if ATA_NIEN is manipulated in
252 * certain way. Leave it alone and just clear pending IRQ.
253 */
254 ata_chk_status(ap);
255 ata_bmdma_irq_clear(ap);
256 }
257
258 /**
259 * vt6420_prereset - prereset for vt6420
260 * @ap: target ATA port
261 *
262 * SCR registers on vt6420 are pieces of shit and may hang the
263 * whole machine completely if accessed with the wrong timing.
264 * To avoid such catastrophe, vt6420 doesn't provide generic SCR
265 * access operations, but uses SStatus and SControl only during
266 * boot probing in controlled way.
267 *
268 * As the old (pre EH update) probing code is proven to work, we
269 * strictly follow the access pattern.
270 *
271 * LOCKING:
272 * Kernel thread context (may sleep)
273 *
274 * RETURNS:
275 * 0 on success, -errno otherwise.
276 */
277 static int vt6420_prereset(struct ata_port *ap)
278 {
279 struct ata_eh_context *ehc = &ap->eh_context;
280 unsigned long timeout = jiffies + (HZ * 5);
281 u32 sstatus, scontrol;
282 int online;
283
284 /* don't do any SCR stuff if we're not loading */
285 if (!(ap->pflags & ATA_PFLAG_LOADING))
286 goto skip_scr;
287
288 /* Resume phy. This is the old resume sequence from
289 * __sata_phy_reset().
290 */
291 svia_scr_write(ap, SCR_CONTROL, 0x300);
292 svia_scr_read(ap, SCR_CONTROL); /* flush */
293
294 /* wait for phy to become ready, if necessary */
295 do {
296 msleep(200);
297 if ((svia_scr_read(ap, SCR_STATUS) & 0xf) != 1)
298 break;
299 } while (time_before(jiffies, timeout));
300
301 /* open code sata_print_link_status() */
302 sstatus = svia_scr_read(ap, SCR_STATUS);
303 scontrol = svia_scr_read(ap, SCR_CONTROL);
304
305 online = (sstatus & 0xf) == 0x3;
306
307 ata_port_printk(ap, KERN_INFO,
308 "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n",
309 online ? "up" : "down", sstatus, scontrol);
310
311 /* SStatus is read one more time */
312 svia_scr_read(ap, SCR_STATUS);
313
314 if (!online) {
315 /* tell EH to bail */
316 ehc->i.action &= ~ATA_EH_RESET_MASK;
317 return 0;
318 }
319
320 skip_scr:
321 /* wait for !BSY */
322 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
323
324 return 0;
325 }
326
327 static void vt6420_error_handler(struct ata_port *ap)
328 {
329 return ata_bmdma_drive_eh(ap, vt6420_prereset, ata_std_softreset,
330 NULL, ata_std_postreset);
331 }
332
333 static int vt6421_pata_prereset(struct ata_port *ap)
334 {
335 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
336 u8 tmp;
337
338 pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp);
339 if (tmp & 0x10)
340 ap->cbl = ATA_CBL_PATA40;
341 else
342 ap->cbl = ATA_CBL_PATA80;
343 return 0;
344 }
345
346 static void vt6421_pata_error_handler(struct ata_port *ap)
347 {
348 return ata_bmdma_drive_eh(ap, vt6421_pata_prereset, ata_std_softreset,
349 NULL, ata_std_postreset);
350 }
351
352 static int vt6421_sata_prereset(struct ata_port *ap)
353 {
354 ap->cbl = ATA_CBL_SATA;
355 return 0;
356 }
357
358 static void vt6421_sata_error_handler(struct ata_port *ap)
359 {
360 return ata_bmdma_drive_eh(ap, vt6421_sata_prereset, ata_std_softreset,
361 NULL, ata_std_postreset);
362 }
363
364 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
365 {
366 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
367 static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
368 pci_write_config_byte(pdev, PATA_PIO_TIMING, pio_bits[adev->pio_mode - XFER_PIO_0]);
369 }
370
371 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
372 {
373 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
374 static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
375 pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->pio_mode - XFER_UDMA_0]);
376 }
377
378 static int vt6421_port_start(struct ata_port *ap)
379 {
380 if (ap->port_no == PATA_PORT) {
381 ap->ops = &vt6421_pata_ops;
382 ap->mwdma_mask = 0;
383 ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST;
384 }
385 return ata_port_start(ap);
386 }
387
388 static const unsigned int svia_bar_sizes[] = {
389 8, 4, 8, 4, 16, 256
390 };
391
392 static const unsigned int vt6421_bar_sizes[] = {
393 16, 16, 16, 16, 32, 128
394 };
395
396 static void __iomem * svia_scr_addr(void __iomem *addr, unsigned int port)
397 {
398 return addr + (port * 128);
399 }
400
401 static void __iomem * vt6421_scr_addr(void __iomem *addr, unsigned int port)
402 {
403 return addr + (port * 64);
404 }
405
406 static void vt6421_init_addrs(struct ata_probe_ent *probe_ent,
407 void __iomem * const *iomap, unsigned int port)
408 {
409 void __iomem *reg_addr = iomap[port];
410 void __iomem *bmdma_addr = iomap[4] + (port * 8);
411
412 probe_ent->port[port].cmd_addr = reg_addr;
413 probe_ent->port[port].altstatus_addr =
414 probe_ent->port[port].ctl_addr = (void __iomem *)
415 ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS);
416 probe_ent->port[port].bmdma_addr = bmdma_addr;
417 probe_ent->port[port].scr_addr = vt6421_scr_addr(iomap[5], port);
418
419 ata_std_ports(&probe_ent->port[port]);
420 }
421
422 static struct ata_probe_ent *vt6420_init_probe_ent(struct pci_dev *pdev)
423 {
424 struct ata_probe_ent *probe_ent;
425 struct ata_port_info *ppi[2];
426 void __iomem *bar5;
427
428 ppi[0] = ppi[1] = &vt6420_port_info;
429 probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
430 if (!probe_ent)
431 return NULL;
432
433 bar5 = pcim_iomap(pdev, 5, 0);
434 if (!bar5) {
435 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n");
436 return NULL;
437 }
438
439 probe_ent->port[0].scr_addr = svia_scr_addr(bar5, 0);
440 probe_ent->port[1].scr_addr = svia_scr_addr(bar5, 1);
441
442 return probe_ent;
443 }
444
445 static struct ata_probe_ent *vt6421_init_probe_ent(struct pci_dev *pdev)
446 {
447 struct ata_probe_ent *probe_ent;
448 unsigned int i;
449
450 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL);
451 if (!probe_ent)
452 return NULL;
453
454 memset(probe_ent, 0, sizeof(*probe_ent));
455 probe_ent->dev = pci_dev_to_dev(pdev);
456 INIT_LIST_HEAD(&probe_ent->node);
457
458 probe_ent->sht = &svia_sht;
459 probe_ent->port_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY;
460 probe_ent->port_ops = &vt6421_sata_ops;
461 probe_ent->n_ports = N_PORTS;
462 probe_ent->irq = pdev->irq;
463 probe_ent->irq_flags = IRQF_SHARED;
464 probe_ent->pio_mask = 0x1f;
465 probe_ent->mwdma_mask = 0x07;
466 probe_ent->udma_mask = 0x7f;
467
468 for (i = 0; i < 6; i++)
469 if (!pcim_iomap(pdev, i, 0)) {
470 dev_printk(KERN_ERR, &pdev->dev,
471 "failed to iomap PCI BAR %d\n", i);
472 return NULL;
473 }
474
475 for (i = 0; i < N_PORTS; i++)
476 vt6421_init_addrs(probe_ent, pcim_iomap_table(pdev), i);
477
478 return probe_ent;
479 }
480
481 static void svia_configure(struct pci_dev *pdev)
482 {
483 u8 tmp8;
484
485 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8);
486 dev_printk(KERN_INFO, &pdev->dev, "routed to hard irq line %d\n",
487 (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f);
488
489 /* make sure SATA channels are enabled */
490 pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8);
491 if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
492 dev_printk(KERN_DEBUG, &pdev->dev,
493 "enabling SATA channels (0x%x)\n",
494 (int) tmp8);
495 tmp8 |= ALL_PORTS;
496 pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8);
497 }
498
499 /* make sure interrupts for each channel sent to us */
500 pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8);
501 if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
502 dev_printk(KERN_DEBUG, &pdev->dev,
503 "enabling SATA channel interrupts (0x%x)\n",
504 (int) tmp8);
505 tmp8 |= ALL_PORTS;
506 pci_write_config_byte(pdev, SATA_INT_GATE, tmp8);
507 }
508
509 /* make sure native mode is enabled */
510 pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8);
511 if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) {
512 dev_printk(KERN_DEBUG, &pdev->dev,
513 "enabling SATA channel native mode (0x%x)\n",
514 (int) tmp8);
515 tmp8 |= NATIVE_MODE_ALL;
516 pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
517 }
518 }
519
520 static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
521 {
522 static int printed_version;
523 unsigned int i;
524 int rc;
525 struct ata_probe_ent *probe_ent;
526 int board_id = (int) ent->driver_data;
527 const int *bar_sizes;
528 u8 tmp8;
529
530 if (!printed_version++)
531 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
532
533 rc = pcim_enable_device(pdev);
534 if (rc)
535 return rc;
536
537 rc = pci_request_regions(pdev, DRV_NAME);
538 if (rc) {
539 pcim_pin_device(pdev);
540 return rc;
541 }
542
543 if (board_id == vt6420) {
544 pci_read_config_byte(pdev, SATA_PATA_SHARING, &tmp8);
545 if (tmp8 & SATA_2DEV) {
546 dev_printk(KERN_ERR, &pdev->dev,
547 "SATA master/slave not supported (0x%x)\n",
548 (int) tmp8);
549 return -EIO;
550 }
551
552 bar_sizes = &svia_bar_sizes[0];
553 } else {
554 bar_sizes = &vt6421_bar_sizes[0];
555 }
556
557 for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++)
558 if ((pci_resource_start(pdev, i) == 0) ||
559 (pci_resource_len(pdev, i) < bar_sizes[i])) {
560 dev_printk(KERN_ERR, &pdev->dev,
561 "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n",
562 i,
563 (unsigned long long)pci_resource_start(pdev, i),
564 (unsigned long long)pci_resource_len(pdev, i));
565 return -ENODEV;
566 }
567
568 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
569 if (rc)
570 return rc;
571 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
572 if (rc)
573 return rc;
574
575 if (board_id == vt6420)
576 probe_ent = vt6420_init_probe_ent(pdev);
577 else
578 probe_ent = vt6421_init_probe_ent(pdev);
579
580 if (!probe_ent) {
581 dev_printk(KERN_ERR, &pdev->dev, "out of memory\n");
582 return -ENOMEM;
583 }
584
585 svia_configure(pdev);
586
587 pci_set_master(pdev);
588
589 if (!ata_device_add(probe_ent))
590 return -ENODEV;
591
592 devm_kfree(&pdev->dev, probe_ent);
593 return 0;
594 }
595
596 static int __init svia_init(void)
597 {
598 return pci_register_driver(&svia_pci_driver);
599 }
600
601 static void __exit svia_exit(void)
602 {
603 pci_unregister_driver(&svia_pci_driver);
604 }
605
606 module_init(svia_init);
607 module_exit(svia_exit);
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