2 * wm8903.c -- WM8903 ALSA SoC Audio driver
4 * Copyright 2008 Wolfson Microelectronics
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * - TDM mode configuration.
14 * - Digital microphone support.
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/init.h>
20 #include <linux/completion.h>
21 #include <linux/delay.h>
23 #include <linux/i2c.h>
24 #include <linux/platform_device.h>
25 #include <linux/slab.h>
26 #include <sound/core.h>
27 #include <sound/jack.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/tlv.h>
31 #include <sound/soc.h>
32 #include <sound/initval.h>
33 #include <sound/wm8903.h>
34 #include <trace/events/asoc.h>
38 /* Register defaults at reset */
39 static u16 wm8903_reg_defaults
[] = {
40 0x8903, /* R0 - SW Reset and ID */
41 0x0000, /* R1 - Revision Number */
44 0x0018, /* R4 - Bias Control 0 */
45 0x0000, /* R5 - VMID Control 0 */
46 0x0000, /* R6 - Mic Bias Control 0 */
48 0x0001, /* R8 - Analogue DAC 0 */
50 0x0001, /* R10 - Analogue ADC 0 */
52 0x0000, /* R12 - Power Management 0 */
53 0x0000, /* R13 - Power Management 1 */
54 0x0000, /* R14 - Power Management 2 */
55 0x0000, /* R15 - Power Management 3 */
56 0x0000, /* R16 - Power Management 4 */
57 0x0000, /* R17 - Power Management 5 */
58 0x0000, /* R18 - Power Management 6 */
60 0x0400, /* R20 - Clock Rates 0 */
61 0x0D07, /* R21 - Clock Rates 1 */
62 0x0000, /* R22 - Clock Rates 2 */
64 0x0050, /* R24 - Audio Interface 0 */
65 0x0242, /* R25 - Audio Interface 1 */
66 0x0008, /* R26 - Audio Interface 2 */
67 0x0022, /* R27 - Audio Interface 3 */
70 0x00C0, /* R30 - DAC Digital Volume Left */
71 0x00C0, /* R31 - DAC Digital Volume Right */
72 0x0000, /* R32 - DAC Digital 0 */
73 0x0000, /* R33 - DAC Digital 1 */
76 0x00C0, /* R36 - ADC Digital Volume Left */
77 0x00C0, /* R37 - ADC Digital Volume Right */
78 0x0000, /* R38 - ADC Digital 0 */
79 0x0073, /* R39 - Digital Microphone 0 */
80 0x09BF, /* R40 - DRC 0 */
81 0x3241, /* R41 - DRC 1 */
82 0x0020, /* R42 - DRC 2 */
83 0x0000, /* R43 - DRC 3 */
84 0x0085, /* R44 - Analogue Left Input 0 */
85 0x0085, /* R45 - Analogue Right Input 0 */
86 0x0044, /* R46 - Analogue Left Input 1 */
87 0x0044, /* R47 - Analogue Right Input 1 */
90 0x0008, /* R50 - Analogue Left Mix 0 */
91 0x0004, /* R51 - Analogue Right Mix 0 */
92 0x0000, /* R52 - Analogue Spk Mix Left 0 */
93 0x0000, /* R53 - Analogue Spk Mix Left 1 */
94 0x0000, /* R54 - Analogue Spk Mix Right 0 */
95 0x0000, /* R55 - Analogue Spk Mix Right 1 */
97 0x002D, /* R57 - Analogue OUT1 Left */
98 0x002D, /* R58 - Analogue OUT1 Right */
99 0x0039, /* R59 - Analogue OUT2 Left */
100 0x0039, /* R60 - Analogue OUT2 Right */
102 0x0139, /* R62 - Analogue OUT3 Left */
103 0x0139, /* R63 - Analogue OUT3 Right */
105 0x0000, /* R65 - Analogue SPK Output Control 0 */
107 0x0010, /* R67 - DC Servo 0 */
109 0x00A4, /* R69 - DC Servo 2 */
130 0x0000, /* R90 - Analogue HP 0 */
134 0x0000, /* R94 - Analogue Lineout 0 */
138 0x0000, /* R98 - Charge Pump 0 */
144 0x0000, /* R104 - Class W 0 */
148 0x0000, /* R108 - Write Sequencer 0 */
149 0x0000, /* R109 - Write Sequencer 1 */
150 0x0000, /* R110 - Write Sequencer 2 */
151 0x0000, /* R111 - Write Sequencer 3 */
152 0x0000, /* R112 - Write Sequencer 4 */
154 0x0000, /* R114 - Control Interface */
156 0x00A8, /* R116 - GPIO Control 1 */
157 0x00A8, /* R117 - GPIO Control 2 */
158 0x00A8, /* R118 - GPIO Control 3 */
159 0x0220, /* R119 - GPIO Control 4 */
160 0x01A0, /* R120 - GPIO Control 5 */
161 0x0000, /* R121 - Interrupt Status 1 */
162 0xFFFF, /* R122 - Interrupt Status 1 Mask */
163 0x0000, /* R123 - Interrupt Polarity 1 */
166 0x0000, /* R126 - Interrupt Control */
169 0x0000, /* R129 - Control Interface Test 1 */
189 0x6810, /* R149 - Charge Pump Test 1 */
204 0x0028, /* R164 - Clock Rate Test 4 */
212 0x0000, /* R172 - Analogue Output Bias 0 */
223 /* Reference count */
226 struct completion wseq
;
228 struct snd_soc_jack
*mic_jack
;
235 static int wm8903_volatile_register(unsigned int reg
)
238 case WM8903_SW_RESET_AND_ID
:
239 case WM8903_REVISION_NUMBER
:
240 case WM8903_INTERRUPT_STATUS_1
:
241 case WM8903_WRITE_SEQUENCER_4
:
249 static int wm8903_run_sequence(struct snd_soc_codec
*codec
, unsigned int start
)
252 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
256 /* Enable the sequencer if it's not already on */
257 reg
[0] = snd_soc_read(codec
, WM8903_WRITE_SEQUENCER_0
);
258 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_0
,
259 reg
[0] | WM8903_WSEQ_ENA
);
261 dev_dbg(codec
->dev
, "Starting sequence at %d\n", start
);
263 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_3
,
264 start
| WM8903_WSEQ_START
);
266 /* Wait for it to complete. If we have the interrupt wired up then
267 * that will break us out of the poll early.
270 wait_for_completion_timeout(&wm8903
->wseq
,
271 msecs_to_jiffies(10));
273 reg
[4] = snd_soc_read(codec
, WM8903_WRITE_SEQUENCER_4
);
274 } while (reg
[4] & WM8903_WSEQ_BUSY
);
276 dev_dbg(codec
->dev
, "Sequence complete\n");
278 /* Disable the sequencer again if we enabled it */
279 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_0
, reg
[0]);
284 static void wm8903_sync_reg_cache(struct snd_soc_codec
*codec
, u16
*cache
)
288 /* There really ought to be something better we can do here :/ */
289 for (i
= 0; i
< ARRAY_SIZE(wm8903_reg_defaults
); i
++)
290 cache
[i
] = codec
->hw_read(codec
, i
);
293 static void wm8903_reset(struct snd_soc_codec
*codec
)
295 snd_soc_write(codec
, WM8903_SW_RESET_AND_ID
, 0);
296 memcpy(codec
->reg_cache
, wm8903_reg_defaults
,
297 sizeof(wm8903_reg_defaults
));
300 #define WM8903_OUTPUT_SHORT 0x8
301 #define WM8903_OUTPUT_OUT 0x4
302 #define WM8903_OUTPUT_INT 0x2
303 #define WM8903_OUTPUT_IN 0x1
305 static int wm8903_cp_event(struct snd_soc_dapm_widget
*w
,
306 struct snd_kcontrol
*kcontrol
, int event
)
308 WARN_ON(event
!= SND_SOC_DAPM_POST_PMU
);
315 * Event for headphone and line out amplifier power changes. Special
316 * power up/down sequences are required in order to maximise pop/click
319 static int wm8903_output_event(struct snd_soc_dapm_widget
*w
,
320 struct snd_kcontrol
*kcontrol
, int event
)
322 struct snd_soc_codec
*codec
= w
->codec
;
330 case WM8903_POWER_MANAGEMENT_2
:
331 reg
= WM8903_ANALOGUE_HP_0
;
332 dcs_bit
= 0 + w
->shift
;
334 case WM8903_POWER_MANAGEMENT_3
:
335 reg
= WM8903_ANALOGUE_LINEOUT_0
;
336 dcs_bit
= 2 + w
->shift
;
340 return -EINVAL
; /* Spurious warning from some compilers */
352 return -EINVAL
; /* Spurious warning from some compilers */
355 if (event
& SND_SOC_DAPM_PRE_PMU
) {
356 val
= snd_soc_read(codec
, reg
);
358 /* Short the output */
359 val
&= ~(WM8903_OUTPUT_SHORT
<< shift
);
360 snd_soc_write(codec
, reg
, val
);
363 if (event
& SND_SOC_DAPM_POST_PMU
) {
364 val
= snd_soc_read(codec
, reg
);
366 val
|= (WM8903_OUTPUT_IN
<< shift
);
367 snd_soc_write(codec
, reg
, val
);
369 val
|= (WM8903_OUTPUT_INT
<< shift
);
370 snd_soc_write(codec
, reg
, val
);
372 /* Turn on the output ENA_OUTP */
373 val
|= (WM8903_OUTPUT_OUT
<< shift
);
374 snd_soc_write(codec
, reg
, val
);
376 /* Enable the DC servo */
377 dcs_reg
= snd_soc_read(codec
, WM8903_DC_SERVO_0
);
379 snd_soc_write(codec
, WM8903_DC_SERVO_0
, dcs_reg
);
381 /* Remove the short */
382 val
|= (WM8903_OUTPUT_SHORT
<< shift
);
383 snd_soc_write(codec
, reg
, val
);
386 if (event
& SND_SOC_DAPM_PRE_PMD
) {
387 val
= snd_soc_read(codec
, reg
);
389 /* Short the output */
390 val
&= ~(WM8903_OUTPUT_SHORT
<< shift
);
391 snd_soc_write(codec
, reg
, val
);
393 /* Disable the DC servo */
394 dcs_reg
= snd_soc_read(codec
, WM8903_DC_SERVO_0
);
396 snd_soc_write(codec
, WM8903_DC_SERVO_0
, dcs_reg
);
398 /* Then disable the intermediate and output stages */
399 val
&= ~((WM8903_OUTPUT_OUT
| WM8903_OUTPUT_INT
|
400 WM8903_OUTPUT_IN
) << shift
);
401 snd_soc_write(codec
, reg
, val
);
408 * When used with DAC outputs only the WM8903 charge pump supports
409 * operation in class W mode, providing very low power consumption
410 * when used with digital sources. Enable and disable this mode
411 * automatically depending on the mixer configuration.
413 * All the relevant controls are simple switches.
415 static int wm8903_class_w_put(struct snd_kcontrol
*kcontrol
,
416 struct snd_ctl_elem_value
*ucontrol
)
418 struct snd_soc_dapm_widget
*widget
= snd_kcontrol_chip(kcontrol
);
419 struct snd_soc_codec
*codec
= widget
->codec
;
420 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
424 reg
= snd_soc_read(codec
, WM8903_CLASS_W_0
);
426 /* Turn it off if we're about to enable bypass */
427 if (ucontrol
->value
.integer
.value
[0]) {
428 if (wm8903
->class_w_users
== 0) {
429 dev_dbg(codec
->dev
, "Disabling Class W\n");
430 snd_soc_write(codec
, WM8903_CLASS_W_0
, reg
&
431 ~(WM8903_CP_DYN_FREQ
| WM8903_CP_DYN_V
));
433 wm8903
->class_w_users
++;
436 /* Implement the change */
437 ret
= snd_soc_dapm_put_volsw(kcontrol
, ucontrol
);
439 /* If we've just disabled the last bypass path turn Class W on */
440 if (!ucontrol
->value
.integer
.value
[0]) {
441 if (wm8903
->class_w_users
== 1) {
442 dev_dbg(codec
->dev
, "Enabling Class W\n");
443 snd_soc_write(codec
, WM8903_CLASS_W_0
, reg
|
444 WM8903_CP_DYN_FREQ
| WM8903_CP_DYN_V
);
446 wm8903
->class_w_users
--;
449 dev_dbg(codec
->dev
, "Bypass use count now %d\n",
450 wm8903
->class_w_users
);
455 #define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
456 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
457 .info = snd_soc_info_volsw, \
458 .get = snd_soc_dapm_get_volsw, .put = wm8903_class_w_put, \
459 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
462 static int wm8903_deemph
[] = { 0, 32000, 44100, 48000 };
464 static int wm8903_set_deemph(struct snd_soc_codec
*codec
)
466 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
469 /* If we're using deemphasis select the nearest available sample
472 if (wm8903
->deemph
) {
474 for (i
= 2; i
< ARRAY_SIZE(wm8903_deemph
); i
++) {
475 if (abs(wm8903_deemph
[i
] - wm8903
->fs
) <
476 abs(wm8903_deemph
[best
] - wm8903
->fs
))
480 val
= best
<< WM8903_DEEMPH_SHIFT
;
486 dev_dbg(codec
->dev
, "Set deemphasis %d (%dHz)\n",
487 best
, wm8903_deemph
[best
]);
489 return snd_soc_update_bits(codec
, WM8903_DAC_DIGITAL_1
,
490 WM8903_DEEMPH_MASK
, val
);
493 static int wm8903_get_deemph(struct snd_kcontrol
*kcontrol
,
494 struct snd_ctl_elem_value
*ucontrol
)
496 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
497 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
499 ucontrol
->value
.enumerated
.item
[0] = wm8903
->deemph
;
504 static int wm8903_put_deemph(struct snd_kcontrol
*kcontrol
,
505 struct snd_ctl_elem_value
*ucontrol
)
507 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
508 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
509 int deemph
= ucontrol
->value
.enumerated
.item
[0];
515 mutex_lock(&codec
->mutex
);
516 if (wm8903
->deemph
!= deemph
) {
517 wm8903
->deemph
= deemph
;
519 wm8903_set_deemph(codec
);
523 mutex_unlock(&codec
->mutex
);
528 /* ALSA can only do steps of .01dB */
529 static const DECLARE_TLV_DB_SCALE(digital_tlv
, -7200, 75, 1);
531 static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv
, -3600, 300, 0);
532 static const DECLARE_TLV_DB_SCALE(out_tlv
, -5700, 100, 0);
534 static const DECLARE_TLV_DB_SCALE(drc_tlv_thresh
, 0, 75, 0);
535 static const DECLARE_TLV_DB_SCALE(drc_tlv_amp
, -2250, 75, 0);
536 static const DECLARE_TLV_DB_SCALE(drc_tlv_min
, 0, 600, 0);
537 static const DECLARE_TLV_DB_SCALE(drc_tlv_max
, 1200, 600, 0);
538 static const DECLARE_TLV_DB_SCALE(drc_tlv_startup
, -300, 50, 0);
540 static const char *hpf_mode_text
[] = {
541 "Hi-fi", "Voice 1", "Voice 2", "Voice 3"
544 static const struct soc_enum hpf_mode
=
545 SOC_ENUM_SINGLE(WM8903_ADC_DIGITAL_0
, 5, 4, hpf_mode_text
);
547 static const char *osr_text
[] = {
548 "Low power", "High performance"
551 static const struct soc_enum adc_osr
=
552 SOC_ENUM_SINGLE(WM8903_ANALOGUE_ADC_0
, 0, 2, osr_text
);
554 static const struct soc_enum dac_osr
=
555 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 0, 2, osr_text
);
557 static const char *drc_slope_text
[] = {
558 "1", "1/2", "1/4", "1/8", "1/16", "0"
561 static const struct soc_enum drc_slope_r0
=
562 SOC_ENUM_SINGLE(WM8903_DRC_2
, 3, 6, drc_slope_text
);
564 static const struct soc_enum drc_slope_r1
=
565 SOC_ENUM_SINGLE(WM8903_DRC_2
, 0, 6, drc_slope_text
);
567 static const char *drc_attack_text
[] = {
569 "363us", "762us", "1.45ms", "2.9ms", "5.8ms", "11.6ms", "23.2ms",
570 "46.4ms", "92.8ms", "185.6ms"
573 static const struct soc_enum drc_attack
=
574 SOC_ENUM_SINGLE(WM8903_DRC_1
, 12, 11, drc_attack_text
);
576 static const char *drc_decay_text
[] = {
577 "186ms", "372ms", "743ms", "1.49s", "2.97s", "5.94s", "11.89s",
581 static const struct soc_enum drc_decay
=
582 SOC_ENUM_SINGLE(WM8903_DRC_1
, 8, 9, drc_decay_text
);
584 static const char *drc_ff_delay_text
[] = {
585 "5 samples", "9 samples"
588 static const struct soc_enum drc_ff_delay
=
589 SOC_ENUM_SINGLE(WM8903_DRC_0
, 5, 2, drc_ff_delay_text
);
591 static const char *drc_qr_decay_text
[] = {
592 "0.725ms", "1.45ms", "5.8ms"
595 static const struct soc_enum drc_qr_decay
=
596 SOC_ENUM_SINGLE(WM8903_DRC_1
, 4, 3, drc_qr_decay_text
);
598 static const char *drc_smoothing_text
[] = {
599 "Low", "Medium", "High"
602 static const struct soc_enum drc_smoothing
=
603 SOC_ENUM_SINGLE(WM8903_DRC_0
, 11, 3, drc_smoothing_text
);
605 static const char *soft_mute_text
[] = {
606 "Fast (fs/2)", "Slow (fs/32)"
609 static const struct soc_enum soft_mute
=
610 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 10, 2, soft_mute_text
);
612 static const char *mute_mode_text
[] = {
616 static const struct soc_enum mute_mode
=
617 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 9, 2, mute_mode_text
);
619 static const char *companding_text
[] = {
623 static const struct soc_enum dac_companding
=
624 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 0, 2, companding_text
);
626 static const struct soc_enum adc_companding
=
627 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 2, 2, companding_text
);
629 static const char *input_mode_text
[] = {
630 "Single-Ended", "Differential Line", "Differential Mic"
633 static const struct soc_enum linput_mode_enum
=
634 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 0, 3, input_mode_text
);
636 static const struct soc_enum rinput_mode_enum
=
637 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 0, 3, input_mode_text
);
639 static const char *linput_mux_text
[] = {
640 "IN1L", "IN2L", "IN3L"
643 static const struct soc_enum linput_enum
=
644 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 2, 3, linput_mux_text
);
646 static const struct soc_enum linput_inv_enum
=
647 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 4, 3, linput_mux_text
);
649 static const char *rinput_mux_text
[] = {
650 "IN1R", "IN2R", "IN3R"
653 static const struct soc_enum rinput_enum
=
654 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 2, 3, rinput_mux_text
);
656 static const struct soc_enum rinput_inv_enum
=
657 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 4, 3, rinput_mux_text
);
660 static const char *sidetone_text
[] = {
661 "None", "Left", "Right"
664 static const struct soc_enum lsidetone_enum
=
665 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0
, 2, 3, sidetone_text
);
667 static const struct soc_enum rsidetone_enum
=
668 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0
, 0, 3, sidetone_text
);
670 static const struct snd_kcontrol_new wm8903_snd_controls
[] = {
672 /* Input PGAs - No TLV since the scale depends on PGA mode */
673 SOC_SINGLE("Left Input PGA Switch", WM8903_ANALOGUE_LEFT_INPUT_0
,
675 SOC_SINGLE("Left Input PGA Volume", WM8903_ANALOGUE_LEFT_INPUT_0
,
677 SOC_SINGLE("Left Input PGA Common Mode Switch", WM8903_ANALOGUE_LEFT_INPUT_1
,
680 SOC_SINGLE("Right Input PGA Switch", WM8903_ANALOGUE_RIGHT_INPUT_0
,
682 SOC_SINGLE("Right Input PGA Volume", WM8903_ANALOGUE_RIGHT_INPUT_0
,
684 SOC_SINGLE("Right Input PGA Common Mode Switch", WM8903_ANALOGUE_RIGHT_INPUT_1
,
688 SOC_ENUM("ADC OSR", adc_osr
),
689 SOC_SINGLE("HPF Switch", WM8903_ADC_DIGITAL_0
, 4, 1, 0),
690 SOC_ENUM("HPF Mode", hpf_mode
),
691 SOC_SINGLE("DRC Switch", WM8903_DRC_0
, 15, 1, 0),
692 SOC_ENUM("DRC Compressor Slope R0", drc_slope_r0
),
693 SOC_ENUM("DRC Compressor Slope R1", drc_slope_r1
),
694 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8903_DRC_3
, 5, 124, 1,
696 SOC_SINGLE_TLV("DRC Volume", WM8903_DRC_3
, 0, 30, 1, drc_tlv_amp
),
697 SOC_SINGLE_TLV("DRC Minimum Gain Volume", WM8903_DRC_1
, 2, 3, 1, drc_tlv_min
),
698 SOC_SINGLE_TLV("DRC Maximum Gain Volume", WM8903_DRC_1
, 0, 3, 0, drc_tlv_max
),
699 SOC_ENUM("DRC Attack Rate", drc_attack
),
700 SOC_ENUM("DRC Decay Rate", drc_decay
),
701 SOC_ENUM("DRC FF Delay", drc_ff_delay
),
702 SOC_SINGLE("DRC Anticlip Switch", WM8903_DRC_0
, 1, 1, 0),
703 SOC_SINGLE("DRC QR Switch", WM8903_DRC_0
, 2, 1, 0),
704 SOC_SINGLE_TLV("DRC QR Threshold Volume", WM8903_DRC_0
, 6, 3, 0, drc_tlv_max
),
705 SOC_ENUM("DRC QR Decay Rate", drc_qr_decay
),
706 SOC_SINGLE("DRC Smoothing Switch", WM8903_DRC_0
, 3, 1, 0),
707 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8903_DRC_0
, 0, 1, 0),
708 SOC_ENUM("DRC Smoothing Threshold", drc_smoothing
),
709 SOC_SINGLE_TLV("DRC Startup Volume", WM8903_DRC_0
, 6, 18, 0, drc_tlv_startup
),
711 SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8903_ADC_DIGITAL_VOLUME_LEFT
,
712 WM8903_ADC_DIGITAL_VOLUME_RIGHT
, 1, 96, 0, digital_tlv
),
713 SOC_ENUM("ADC Companding Mode", adc_companding
),
714 SOC_SINGLE("ADC Companding Switch", WM8903_AUDIO_INTERFACE_0
, 3, 1, 0),
716 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8903_DAC_DIGITAL_0
, 4, 8,
717 12, 0, digital_sidetone_tlv
),
720 SOC_ENUM("DAC OSR", dac_osr
),
721 SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8903_DAC_DIGITAL_VOLUME_LEFT
,
722 WM8903_DAC_DIGITAL_VOLUME_RIGHT
, 1, 120, 0, digital_tlv
),
723 SOC_ENUM("DAC Soft Mute Rate", soft_mute
),
724 SOC_ENUM("DAC Mute Mode", mute_mode
),
725 SOC_SINGLE("DAC Mono Switch", WM8903_DAC_DIGITAL_1
, 12, 1, 0),
726 SOC_ENUM("DAC Companding Mode", dac_companding
),
727 SOC_SINGLE("DAC Companding Switch", WM8903_AUDIO_INTERFACE_0
, 1, 1, 0),
728 SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
729 wm8903_get_deemph
, wm8903_put_deemph
),
732 SOC_DOUBLE_R("Headphone Switch",
733 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
735 SOC_DOUBLE_R("Headphone ZC Switch",
736 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
738 SOC_DOUBLE_R_TLV("Headphone Volume",
739 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
743 SOC_DOUBLE_R("Line Out Switch",
744 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
746 SOC_DOUBLE_R("Line Out ZC Switch",
747 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
749 SOC_DOUBLE_R_TLV("Line Out Volume",
750 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
754 SOC_DOUBLE_R("Speaker Switch",
755 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
, 8, 1, 1),
756 SOC_DOUBLE_R("Speaker ZC Switch",
757 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
, 6, 1, 0),
758 SOC_DOUBLE_R_TLV("Speaker Volume",
759 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
,
763 static const struct snd_kcontrol_new linput_mode_mux
=
764 SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum
);
766 static const struct snd_kcontrol_new rinput_mode_mux
=
767 SOC_DAPM_ENUM("Right Input Mode Mux", rinput_mode_enum
);
769 static const struct snd_kcontrol_new linput_mux
=
770 SOC_DAPM_ENUM("Left Input Mux", linput_enum
);
772 static const struct snd_kcontrol_new linput_inv_mux
=
773 SOC_DAPM_ENUM("Left Inverting Input Mux", linput_inv_enum
);
775 static const struct snd_kcontrol_new rinput_mux
=
776 SOC_DAPM_ENUM("Right Input Mux", rinput_enum
);
778 static const struct snd_kcontrol_new rinput_inv_mux
=
779 SOC_DAPM_ENUM("Right Inverting Input Mux", rinput_inv_enum
);
781 static const struct snd_kcontrol_new lsidetone_mux
=
782 SOC_DAPM_ENUM("DACL Sidetone Mux", lsidetone_enum
);
784 static const struct snd_kcontrol_new rsidetone_mux
=
785 SOC_DAPM_ENUM("DACR Sidetone Mux", rsidetone_enum
);
787 static const struct snd_kcontrol_new left_output_mixer
[] = {
788 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 3, 1, 0),
789 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 2, 1, 0),
790 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 1, 1, 0),
791 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 0, 1, 0),
794 static const struct snd_kcontrol_new right_output_mixer
[] = {
795 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 3, 1, 0),
796 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 2, 1, 0),
797 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 1, 1, 0),
798 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 0, 1, 0),
801 static const struct snd_kcontrol_new left_speaker_mixer
[] = {
802 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 3, 1, 0),
803 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 2, 1, 0),
804 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 1, 1, 0),
805 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
,
809 static const struct snd_kcontrol_new right_speaker_mixer
[] = {
810 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
, 3, 1, 0),
811 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
, 2, 1, 0),
812 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
,
814 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
,
818 static const struct snd_soc_dapm_widget wm8903_dapm_widgets
[] = {
819 SND_SOC_DAPM_INPUT("IN1L"),
820 SND_SOC_DAPM_INPUT("IN1R"),
821 SND_SOC_DAPM_INPUT("IN2L"),
822 SND_SOC_DAPM_INPUT("IN2R"),
823 SND_SOC_DAPM_INPUT("IN3L"),
824 SND_SOC_DAPM_INPUT("IN3R"),
826 SND_SOC_DAPM_OUTPUT("HPOUTL"),
827 SND_SOC_DAPM_OUTPUT("HPOUTR"),
828 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
829 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
830 SND_SOC_DAPM_OUTPUT("LOP"),
831 SND_SOC_DAPM_OUTPUT("LON"),
832 SND_SOC_DAPM_OUTPUT("ROP"),
833 SND_SOC_DAPM_OUTPUT("RON"),
835 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8903_MIC_BIAS_CONTROL_0
, 0, 0),
837 SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM
, 0, 0, &linput_mux
),
838 SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM
, 0, 0,
840 SND_SOC_DAPM_MUX("Left Input Mode Mux", SND_SOC_NOPM
, 0, 0, &linput_mode_mux
),
842 SND_SOC_DAPM_MUX("Right Input Mux", SND_SOC_NOPM
, 0, 0, &rinput_mux
),
843 SND_SOC_DAPM_MUX("Right Input Inverting Mux", SND_SOC_NOPM
, 0, 0,
845 SND_SOC_DAPM_MUX("Right Input Mode Mux", SND_SOC_NOPM
, 0, 0, &rinput_mode_mux
),
847 SND_SOC_DAPM_PGA("Left Input PGA", WM8903_POWER_MANAGEMENT_0
, 1, 0, NULL
, 0),
848 SND_SOC_DAPM_PGA("Right Input PGA", WM8903_POWER_MANAGEMENT_0
, 0, 0, NULL
, 0),
850 SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8903_POWER_MANAGEMENT_6
, 1, 0),
851 SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8903_POWER_MANAGEMENT_6
, 0, 0),
853 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM
, 0, 0, &lsidetone_mux
),
854 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM
, 0, 0, &rsidetone_mux
),
856 SND_SOC_DAPM_DAC("DACL", "Left Playback", WM8903_POWER_MANAGEMENT_6
, 3, 0),
857 SND_SOC_DAPM_DAC("DACR", "Right Playback", WM8903_POWER_MANAGEMENT_6
, 2, 0),
859 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8903_POWER_MANAGEMENT_1
, 1, 0,
860 left_output_mixer
, ARRAY_SIZE(left_output_mixer
)),
861 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8903_POWER_MANAGEMENT_1
, 0, 0,
862 right_output_mixer
, ARRAY_SIZE(right_output_mixer
)),
864 SND_SOC_DAPM_MIXER("Left Speaker Mixer", WM8903_POWER_MANAGEMENT_4
, 1, 0,
865 left_speaker_mixer
, ARRAY_SIZE(left_speaker_mixer
)),
866 SND_SOC_DAPM_MIXER("Right Speaker Mixer", WM8903_POWER_MANAGEMENT_4
, 0, 0,
867 right_speaker_mixer
, ARRAY_SIZE(right_speaker_mixer
)),
869 SND_SOC_DAPM_PGA_E("Left Headphone Output PGA", WM8903_POWER_MANAGEMENT_2
,
870 1, 0, NULL
, 0, wm8903_output_event
,
871 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
872 SND_SOC_DAPM_PRE_PMD
),
873 SND_SOC_DAPM_PGA_E("Right Headphone Output PGA", WM8903_POWER_MANAGEMENT_2
,
874 0, 0, NULL
, 0, wm8903_output_event
,
875 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
876 SND_SOC_DAPM_PRE_PMD
),
878 SND_SOC_DAPM_PGA_E("Left Line Output PGA", WM8903_POWER_MANAGEMENT_3
, 1, 0,
879 NULL
, 0, wm8903_output_event
,
880 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
881 SND_SOC_DAPM_PRE_PMD
),
882 SND_SOC_DAPM_PGA_E("Right Line Output PGA", WM8903_POWER_MANAGEMENT_3
, 0, 0,
883 NULL
, 0, wm8903_output_event
,
884 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
885 SND_SOC_DAPM_PRE_PMD
),
887 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5
, 1, 0,
889 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5
, 0, 0,
892 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0
, 0, 0,
893 wm8903_cp_event
, SND_SOC_DAPM_POST_PMU
),
894 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2
, 1, 0, NULL
, 0),
897 static const struct snd_soc_dapm_route intercon
[] = {
899 { "Left Input Mux", "IN1L", "IN1L" },
900 { "Left Input Mux", "IN2L", "IN2L" },
901 { "Left Input Mux", "IN3L", "IN3L" },
903 { "Left Input Inverting Mux", "IN1L", "IN1L" },
904 { "Left Input Inverting Mux", "IN2L", "IN2L" },
905 { "Left Input Inverting Mux", "IN3L", "IN3L" },
907 { "Right Input Mux", "IN1R", "IN1R" },
908 { "Right Input Mux", "IN2R", "IN2R" },
909 { "Right Input Mux", "IN3R", "IN3R" },
911 { "Right Input Inverting Mux", "IN1R", "IN1R" },
912 { "Right Input Inverting Mux", "IN2R", "IN2R" },
913 { "Right Input Inverting Mux", "IN3R", "IN3R" },
915 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
916 { "Left Input Mode Mux", "Differential Line",
918 { "Left Input Mode Mux", "Differential Line",
919 "Left Input Inverting Mux" },
920 { "Left Input Mode Mux", "Differential Mic",
922 { "Left Input Mode Mux", "Differential Mic",
923 "Left Input Inverting Mux" },
925 { "Right Input Mode Mux", "Single-Ended",
926 "Right Input Inverting Mux" },
927 { "Right Input Mode Mux", "Differential Line",
929 { "Right Input Mode Mux", "Differential Line",
930 "Right Input Inverting Mux" },
931 { "Right Input Mode Mux", "Differential Mic",
933 { "Right Input Mode Mux", "Differential Mic",
934 "Right Input Inverting Mux" },
936 { "Left Input PGA", NULL
, "Left Input Mode Mux" },
937 { "Right Input PGA", NULL
, "Right Input Mode Mux" },
939 { "ADCL", NULL
, "Left Input PGA" },
940 { "ADCL", NULL
, "CLK_DSP" },
941 { "ADCR", NULL
, "Right Input PGA" },
942 { "ADCR", NULL
, "CLK_DSP" },
944 { "DACL Sidetone", "Left", "ADCL" },
945 { "DACL Sidetone", "Right", "ADCR" },
946 { "DACR Sidetone", "Left", "ADCL" },
947 { "DACR Sidetone", "Right", "ADCR" },
949 { "DACL", NULL
, "DACL Sidetone" },
950 { "DACL", NULL
, "CLK_DSP" },
951 { "DACR", NULL
, "DACR Sidetone" },
952 { "DACR", NULL
, "CLK_DSP" },
954 { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
955 { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
956 { "Left Output Mixer", "DACL Switch", "DACL" },
957 { "Left Output Mixer", "DACR Switch", "DACR" },
959 { "Right Output Mixer", "Left Bypass Switch", "Left Input PGA" },
960 { "Right Output Mixer", "Right Bypass Switch", "Right Input PGA" },
961 { "Right Output Mixer", "DACL Switch", "DACL" },
962 { "Right Output Mixer", "DACR Switch", "DACR" },
964 { "Left Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
965 { "Left Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
966 { "Left Speaker Mixer", "DACL Switch", "DACL" },
967 { "Left Speaker Mixer", "DACR Switch", "DACR" },
969 { "Right Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
970 { "Right Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
971 { "Right Speaker Mixer", "DACL Switch", "DACL" },
972 { "Right Speaker Mixer", "DACR Switch", "DACR" },
974 { "Left Line Output PGA", NULL
, "Left Output Mixer" },
975 { "Right Line Output PGA", NULL
, "Right Output Mixer" },
977 { "Left Headphone Output PGA", NULL
, "Left Output Mixer" },
978 { "Right Headphone Output PGA", NULL
, "Right Output Mixer" },
980 { "Left Speaker PGA", NULL
, "Left Speaker Mixer" },
981 { "Right Speaker PGA", NULL
, "Right Speaker Mixer" },
983 { "HPOUTL", NULL
, "Left Headphone Output PGA" },
984 { "HPOUTR", NULL
, "Right Headphone Output PGA" },
986 { "LINEOUTL", NULL
, "Left Line Output PGA" },
987 { "LINEOUTR", NULL
, "Right Line Output PGA" },
989 { "LOP", NULL
, "Left Speaker PGA" },
990 { "LON", NULL
, "Left Speaker PGA" },
992 { "ROP", NULL
, "Right Speaker PGA" },
993 { "RON", NULL
, "Right Speaker PGA" },
995 { "Left Headphone Output PGA", NULL
, "Charge Pump" },
996 { "Right Headphone Output PGA", NULL
, "Charge Pump" },
997 { "Left Line Output PGA", NULL
, "Charge Pump" },
998 { "Right Line Output PGA", NULL
, "Charge Pump" },
1001 static int wm8903_add_widgets(struct snd_soc_codec
*codec
)
1003 struct snd_soc_dapm_context
*dapm
= &codec
->dapm
;
1005 snd_soc_dapm_new_controls(dapm
, wm8903_dapm_widgets
,
1006 ARRAY_SIZE(wm8903_dapm_widgets
));
1007 snd_soc_dapm_add_routes(dapm
, intercon
, ARRAY_SIZE(intercon
));
1012 static int wm8903_set_bias_level(struct snd_soc_codec
*codec
,
1013 enum snd_soc_bias_level level
)
1018 case SND_SOC_BIAS_ON
:
1019 case SND_SOC_BIAS_PREPARE
:
1020 reg
= snd_soc_read(codec
, WM8903_VMID_CONTROL_0
);
1021 reg
&= ~(WM8903_VMID_RES_MASK
);
1022 reg
|= WM8903_VMID_RES_50K
;
1023 snd_soc_write(codec
, WM8903_VMID_CONTROL_0
, reg
);
1026 case SND_SOC_BIAS_STANDBY
:
1027 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_OFF
) {
1028 snd_soc_write(codec
, WM8903_CLOCK_RATES_2
,
1029 WM8903_CLK_SYS_ENA
);
1031 /* Change DC servo dither level in startup sequence */
1032 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_0
, 0x11);
1033 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_1
, 0x1257);
1034 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_2
, 0x2);
1036 wm8903_run_sequence(codec
, 0);
1037 wm8903_sync_reg_cache(codec
, codec
->reg_cache
);
1039 /* By default no bypass paths are enabled so
1040 * enable Class W support.
1042 dev_dbg(codec
->dev
, "Enabling Class W\n");
1043 snd_soc_update_bits(codec
, WM8903_CLASS_W_0
,
1044 WM8903_CP_DYN_FREQ
|
1046 WM8903_CP_DYN_FREQ
|
1050 reg
= snd_soc_read(codec
, WM8903_VMID_CONTROL_0
);
1051 reg
&= ~(WM8903_VMID_RES_MASK
);
1052 reg
|= WM8903_VMID_RES_250K
;
1053 snd_soc_write(codec
, WM8903_VMID_CONTROL_0
, reg
);
1056 case SND_SOC_BIAS_OFF
:
1057 wm8903_run_sequence(codec
, 32);
1058 reg
= snd_soc_read(codec
, WM8903_CLOCK_RATES_2
);
1059 reg
&= ~WM8903_CLK_SYS_ENA
;
1060 snd_soc_write(codec
, WM8903_CLOCK_RATES_2
, reg
);
1064 codec
->dapm
.bias_level
= level
;
1069 static int wm8903_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1070 int clk_id
, unsigned int freq
, int dir
)
1072 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1073 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1075 wm8903
->sysclk
= freq
;
1080 static int wm8903_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1083 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1084 u16 aif1
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_1
);
1086 aif1
&= ~(WM8903_LRCLK_DIR
| WM8903_BCLK_DIR
| WM8903_AIF_FMT_MASK
|
1087 WM8903_AIF_LRCLK_INV
| WM8903_AIF_BCLK_INV
);
1089 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1090 case SND_SOC_DAIFMT_CBS_CFS
:
1092 case SND_SOC_DAIFMT_CBS_CFM
:
1093 aif1
|= WM8903_LRCLK_DIR
;
1095 case SND_SOC_DAIFMT_CBM_CFM
:
1096 aif1
|= WM8903_LRCLK_DIR
| WM8903_BCLK_DIR
;
1098 case SND_SOC_DAIFMT_CBM_CFS
:
1099 aif1
|= WM8903_BCLK_DIR
;
1105 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1106 case SND_SOC_DAIFMT_DSP_A
:
1109 case SND_SOC_DAIFMT_DSP_B
:
1110 aif1
|= 0x3 | WM8903_AIF_LRCLK_INV
;
1112 case SND_SOC_DAIFMT_I2S
:
1115 case SND_SOC_DAIFMT_RIGHT_J
:
1118 case SND_SOC_DAIFMT_LEFT_J
:
1124 /* Clock inversion */
1125 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1126 case SND_SOC_DAIFMT_DSP_A
:
1127 case SND_SOC_DAIFMT_DSP_B
:
1128 /* frame inversion not valid for DSP modes */
1129 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1130 case SND_SOC_DAIFMT_NB_NF
:
1132 case SND_SOC_DAIFMT_IB_NF
:
1133 aif1
|= WM8903_AIF_BCLK_INV
;
1139 case SND_SOC_DAIFMT_I2S
:
1140 case SND_SOC_DAIFMT_RIGHT_J
:
1141 case SND_SOC_DAIFMT_LEFT_J
:
1142 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1143 case SND_SOC_DAIFMT_NB_NF
:
1145 case SND_SOC_DAIFMT_IB_IF
:
1146 aif1
|= WM8903_AIF_BCLK_INV
| WM8903_AIF_LRCLK_INV
;
1148 case SND_SOC_DAIFMT_IB_NF
:
1149 aif1
|= WM8903_AIF_BCLK_INV
;
1151 case SND_SOC_DAIFMT_NB_IF
:
1152 aif1
|= WM8903_AIF_LRCLK_INV
;
1162 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_1
, aif1
);
1167 static int wm8903_digital_mute(struct snd_soc_dai
*codec_dai
, int mute
)
1169 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1172 reg
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1175 reg
|= WM8903_DAC_MUTE
;
1177 reg
&= ~WM8903_DAC_MUTE
;
1179 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, reg
);
1184 /* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1185 * for optimal performance so we list the lower rates first and match
1186 * on the last match we find. */
1192 } clk_sys_ratios
[] = {
1193 { 64, 0x0, 0x0, 1 },
1194 { 68, 0x0, 0x1, 1 },
1195 { 125, 0x0, 0x2, 1 },
1196 { 128, 0x1, 0x0, 1 },
1197 { 136, 0x1, 0x1, 1 },
1198 { 192, 0x2, 0x0, 1 },
1199 { 204, 0x2, 0x1, 1 },
1201 { 64, 0x0, 0x0, 2 },
1202 { 68, 0x0, 0x1, 2 },
1203 { 125, 0x0, 0x2, 2 },
1204 { 128, 0x1, 0x0, 2 },
1205 { 136, 0x1, 0x1, 2 },
1206 { 192, 0x2, 0x0, 2 },
1207 { 204, 0x2, 0x1, 2 },
1209 { 250, 0x2, 0x2, 1 },
1210 { 256, 0x3, 0x0, 1 },
1211 { 272, 0x3, 0x1, 1 },
1212 { 384, 0x4, 0x0, 1 },
1213 { 408, 0x4, 0x1, 1 },
1214 { 375, 0x4, 0x2, 1 },
1215 { 512, 0x5, 0x0, 1 },
1216 { 544, 0x5, 0x1, 1 },
1217 { 500, 0x5, 0x2, 1 },
1218 { 768, 0x6, 0x0, 1 },
1219 { 816, 0x6, 0x1, 1 },
1220 { 750, 0x6, 0x2, 1 },
1221 { 1024, 0x7, 0x0, 1 },
1222 { 1088, 0x7, 0x1, 1 },
1223 { 1000, 0x7, 0x2, 1 },
1224 { 1408, 0x8, 0x0, 1 },
1225 { 1496, 0x8, 0x1, 1 },
1226 { 1536, 0x9, 0x0, 1 },
1227 { 1632, 0x9, 0x1, 1 },
1228 { 1500, 0x9, 0x2, 1 },
1230 { 250, 0x2, 0x2, 2 },
1231 { 256, 0x3, 0x0, 2 },
1232 { 272, 0x3, 0x1, 2 },
1233 { 384, 0x4, 0x0, 2 },
1234 { 408, 0x4, 0x1, 2 },
1235 { 375, 0x4, 0x2, 2 },
1236 { 512, 0x5, 0x0, 2 },
1237 { 544, 0x5, 0x1, 2 },
1238 { 500, 0x5, 0x2, 2 },
1239 { 768, 0x6, 0x0, 2 },
1240 { 816, 0x6, 0x1, 2 },
1241 { 750, 0x6, 0x2, 2 },
1242 { 1024, 0x7, 0x0, 2 },
1243 { 1088, 0x7, 0x1, 2 },
1244 { 1000, 0x7, 0x2, 2 },
1245 { 1408, 0x8, 0x0, 2 },
1246 { 1496, 0x8, 0x1, 2 },
1247 { 1536, 0x9, 0x0, 2 },
1248 { 1632, 0x9, 0x1, 2 },
1249 { 1500, 0x9, 0x2, 2 },
1252 /* CLK_SYS/BCLK ratios - multiplied by 10 due to .5s */
1276 /* Sample rates for DSP */
1280 } sample_rates
[] = {
1295 static int wm8903_hw_params(struct snd_pcm_substream
*substream
,
1296 struct snd_pcm_hw_params
*params
,
1297 struct snd_soc_dai
*dai
)
1299 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1300 struct snd_soc_codec
*codec
=rtd
->codec
;
1301 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1302 int fs
= params_rate(params
);
1312 u16 aif1
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_1
);
1313 u16 aif2
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_2
);
1314 u16 aif3
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_3
);
1315 u16 clock0
= snd_soc_read(codec
, WM8903_CLOCK_RATES_0
);
1316 u16 clock1
= snd_soc_read(codec
, WM8903_CLOCK_RATES_1
);
1317 u16 dac_digital1
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1319 /* Enable sloping stopband filter for low sample rates */
1321 dac_digital1
|= WM8903_DAC_SB_FILT
;
1323 dac_digital1
&= ~WM8903_DAC_SB_FILT
;
1325 /* Configure sample rate logic for DSP - choose nearest rate */
1327 best_val
= abs(sample_rates
[dsp_config
].rate
- fs
);
1328 for (i
= 1; i
< ARRAY_SIZE(sample_rates
); i
++) {
1329 cur_val
= abs(sample_rates
[i
].rate
- fs
);
1330 if (cur_val
<= best_val
) {
1336 dev_dbg(codec
->dev
, "DSP fs = %dHz\n", sample_rates
[dsp_config
].rate
);
1337 clock1
&= ~WM8903_SAMPLE_RATE_MASK
;
1338 clock1
|= sample_rates
[dsp_config
].value
;
1340 aif1
&= ~WM8903_AIF_WL_MASK
;
1342 switch (params_format(params
)) {
1343 case SNDRV_PCM_FORMAT_S16_LE
:
1346 case SNDRV_PCM_FORMAT_S20_3LE
:
1350 case SNDRV_PCM_FORMAT_S24_LE
:
1354 case SNDRV_PCM_FORMAT_S32_LE
:
1362 dev_dbg(codec
->dev
, "MCLK = %dHz, target sample rate = %dHz\n",
1363 wm8903
->sysclk
, fs
);
1365 /* We may not have an MCLK which allows us to generate exactly
1366 * the clock we want, particularly with USB derived inputs, so
1370 best_val
= abs((wm8903
->sysclk
/
1371 (clk_sys_ratios
[0].mclk_div
*
1372 clk_sys_ratios
[0].div
)) - fs
);
1373 for (i
= 1; i
< ARRAY_SIZE(clk_sys_ratios
); i
++) {
1374 cur_val
= abs((wm8903
->sysclk
/
1375 (clk_sys_ratios
[i
].mclk_div
*
1376 clk_sys_ratios
[i
].div
)) - fs
);
1378 if (cur_val
<= best_val
) {
1384 if (clk_sys_ratios
[clk_config
].mclk_div
== 2) {
1385 clock0
|= WM8903_MCLKDIV2
;
1386 clk_sys
= wm8903
->sysclk
/ 2;
1388 clock0
&= ~WM8903_MCLKDIV2
;
1389 clk_sys
= wm8903
->sysclk
;
1392 clock1
&= ~(WM8903_CLK_SYS_RATE_MASK
|
1393 WM8903_CLK_SYS_MODE_MASK
);
1394 clock1
|= clk_sys_ratios
[clk_config
].rate
<< WM8903_CLK_SYS_RATE_SHIFT
;
1395 clock1
|= clk_sys_ratios
[clk_config
].mode
<< WM8903_CLK_SYS_MODE_SHIFT
;
1397 dev_dbg(codec
->dev
, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1398 clk_sys_ratios
[clk_config
].rate
,
1399 clk_sys_ratios
[clk_config
].mode
,
1400 clk_sys_ratios
[clk_config
].div
);
1402 dev_dbg(codec
->dev
, "Actual CLK_SYS = %dHz\n", clk_sys
);
1404 /* We may not get quite the right frequency if using
1405 * approximate clocks so look for the closest match that is
1406 * higher than the target (we need to ensure that there enough
1407 * BCLKs to clock out the samples).
1410 best_val
= ((clk_sys
* 10) / bclk_divs
[0].ratio
) - bclk
;
1412 while (i
< ARRAY_SIZE(bclk_divs
)) {
1413 cur_val
= ((clk_sys
* 10) / bclk_divs
[i
].ratio
) - bclk
;
1414 if (cur_val
< 0) /* BCLK table is sorted */
1421 aif2
&= ~WM8903_BCLK_DIV_MASK
;
1422 aif3
&= ~WM8903_LRCLK_RATE_MASK
;
1424 dev_dbg(codec
->dev
, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1425 bclk_divs
[bclk_div
].ratio
/ 10, bclk
,
1426 (clk_sys
* 10) / bclk_divs
[bclk_div
].ratio
);
1428 aif2
|= bclk_divs
[bclk_div
].div
;
1431 wm8903
->fs
= params_rate(params
);
1432 wm8903_set_deemph(codec
);
1434 snd_soc_write(codec
, WM8903_CLOCK_RATES_0
, clock0
);
1435 snd_soc_write(codec
, WM8903_CLOCK_RATES_1
, clock1
);
1436 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_1
, aif1
);
1437 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_2
, aif2
);
1438 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_3
, aif3
);
1439 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, dac_digital1
);
1445 * wm8903_mic_detect - Enable microphone detection via the WM8903 IRQ
1447 * @codec: WM8903 codec
1448 * @jack: jack to report detection events on
1449 * @det: value to report for presence detection
1450 * @shrt: value to report for short detection
1452 * Enable microphone detection via IRQ on the WM8903. If GPIOs are
1453 * being used to bring out signals to the processor then only platform
1454 * data configuration is needed for WM8903 and processor GPIOs should
1455 * be configured using snd_soc_jack_add_gpios() instead.
1457 * The current threasholds for detection should be configured using
1458 * micdet_cfg in the platform data. Using this function will force on
1459 * the microphone bias for the device.
1461 int wm8903_mic_detect(struct snd_soc_codec
*codec
, struct snd_soc_jack
*jack
,
1464 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1465 int irq_mask
= WM8903_MICDET_EINT
| WM8903_MICSHRT_EINT
;
1467 dev_dbg(codec
->dev
, "Enabling microphone detection: %x %x\n",
1470 /* Store the configuration */
1471 wm8903
->mic_jack
= jack
;
1472 wm8903
->mic_det
= det
;
1473 wm8903
->mic_short
= shrt
;
1475 /* Enable interrupts we've got a report configured for */
1477 irq_mask
&= ~WM8903_MICDET_EINT
;
1479 irq_mask
&= ~WM8903_MICSHRT_EINT
;
1481 snd_soc_update_bits(codec
, WM8903_INTERRUPT_STATUS_1_MASK
,
1482 WM8903_MICDET_EINT
| WM8903_MICSHRT_EINT
,
1486 /* Enable mic detection, this may not have been set through
1487 * platform data (eg, if the defaults are OK). */
1488 snd_soc_update_bits(codec
, WM8903_WRITE_SEQUENCER_0
,
1489 WM8903_WSEQ_ENA
, WM8903_WSEQ_ENA
);
1490 snd_soc_update_bits(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1491 WM8903_MICDET_ENA
, WM8903_MICDET_ENA
);
1493 snd_soc_update_bits(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1494 WM8903_MICDET_ENA
, 0);
1499 EXPORT_SYMBOL_GPL(wm8903_mic_detect
);
1501 static irqreturn_t
wm8903_irq(int irq
, void *data
)
1503 struct snd_soc_codec
*codec
= data
;
1504 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1508 int mask
= ~snd_soc_read(codec
, WM8903_INTERRUPT_STATUS_1_MASK
);
1510 int_val
= snd_soc_read(codec
, WM8903_INTERRUPT_STATUS_1
) & mask
;
1512 if (int_val
& WM8903_WSEQ_BUSY_EINT
) {
1513 dev_dbg(codec
->dev
, "Write sequencer done\n");
1514 complete(&wm8903
->wseq
);
1518 * The rest is microphone jack detection. We need to manually
1519 * invert the polarity of the interrupt after each event - to
1520 * simplify the code keep track of the last state we reported
1521 * and just invert the relevant bits in both the report and
1522 * the polarity register.
1524 mic_report
= wm8903
->mic_last_report
;
1525 int_pol
= snd_soc_read(codec
, WM8903_INTERRUPT_POLARITY_1
);
1527 #ifndef CONFIG_SND_SOC_WM8903_MODULE
1528 if (int_val
& (WM8903_MICSHRT_EINT
| WM8903_MICDET_EINT
))
1529 trace_snd_soc_jack_irq(dev_name(codec
->dev
));
1532 if (int_val
& WM8903_MICSHRT_EINT
) {
1533 dev_dbg(codec
->dev
, "Microphone short (pol=%x)\n", int_pol
);
1535 mic_report
^= wm8903
->mic_short
;
1536 int_pol
^= WM8903_MICSHRT_INV
;
1539 if (int_val
& WM8903_MICDET_EINT
) {
1540 dev_dbg(codec
->dev
, "Microphone detect (pol=%x)\n", int_pol
);
1542 mic_report
^= wm8903
->mic_det
;
1543 int_pol
^= WM8903_MICDET_INV
;
1545 msleep(wm8903
->mic_delay
);
1548 snd_soc_update_bits(codec
, WM8903_INTERRUPT_POLARITY_1
,
1549 WM8903_MICSHRT_INV
| WM8903_MICDET_INV
, int_pol
);
1551 snd_soc_jack_report(wm8903
->mic_jack
, mic_report
,
1552 wm8903
->mic_short
| wm8903
->mic_det
);
1554 wm8903
->mic_last_report
= mic_report
;
1559 #define WM8903_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1560 SNDRV_PCM_RATE_11025 | \
1561 SNDRV_PCM_RATE_16000 | \
1562 SNDRV_PCM_RATE_22050 | \
1563 SNDRV_PCM_RATE_32000 | \
1564 SNDRV_PCM_RATE_44100 | \
1565 SNDRV_PCM_RATE_48000 | \
1566 SNDRV_PCM_RATE_88200 | \
1567 SNDRV_PCM_RATE_96000)
1569 #define WM8903_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1570 SNDRV_PCM_RATE_11025 | \
1571 SNDRV_PCM_RATE_16000 | \
1572 SNDRV_PCM_RATE_22050 | \
1573 SNDRV_PCM_RATE_32000 | \
1574 SNDRV_PCM_RATE_44100 | \
1575 SNDRV_PCM_RATE_48000)
1577 #define WM8903_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1578 SNDRV_PCM_FMTBIT_S20_3LE |\
1579 SNDRV_PCM_FMTBIT_S24_LE)
1581 static struct snd_soc_dai_ops wm8903_dai_ops
= {
1582 .hw_params
= wm8903_hw_params
,
1583 .digital_mute
= wm8903_digital_mute
,
1584 .set_fmt
= wm8903_set_dai_fmt
,
1585 .set_sysclk
= wm8903_set_dai_sysclk
,
1588 static struct snd_soc_dai_driver wm8903_dai
= {
1589 .name
= "wm8903-hifi",
1591 .stream_name
= "Playback",
1594 .rates
= WM8903_PLAYBACK_RATES
,
1595 .formats
= WM8903_FORMATS
,
1598 .stream_name
= "Capture",
1601 .rates
= WM8903_CAPTURE_RATES
,
1602 .formats
= WM8903_FORMATS
,
1604 .ops
= &wm8903_dai_ops
,
1605 .symmetric_rates
= 1,
1608 static int wm8903_suspend(struct snd_soc_codec
*codec
, pm_message_t state
)
1610 wm8903_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1615 static int wm8903_resume(struct snd_soc_codec
*codec
)
1618 u16
*reg_cache
= codec
->reg_cache
;
1619 u16
*tmp_cache
= kmemdup(reg_cache
, sizeof(wm8903_reg_defaults
),
1622 /* Bring the codec back up to standby first to minimise pop/clicks */
1623 wm8903_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1625 /* Sync back everything else */
1627 for (i
= 2; i
< ARRAY_SIZE(wm8903_reg_defaults
); i
++)
1628 if (tmp_cache
[i
] != reg_cache
[i
])
1629 snd_soc_write(codec
, i
, tmp_cache
[i
]);
1632 dev_err(codec
->dev
, "Failed to allocate temporary cache\n");
1638 static int wm8903_probe(struct snd_soc_codec
*codec
)
1640 struct wm8903_platform_data
*pdata
= dev_get_platdata(codec
->dev
);
1641 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1643 int trigger
, irq_pol
;
1646 init_completion(&wm8903
->wseq
);
1648 ret
= snd_soc_codec_set_cache_io(codec
, 8, 16, SND_SOC_I2C
);
1650 dev_err(codec
->dev
, "Failed to set cache I/O: %d\n", ret
);
1654 val
= snd_soc_read(codec
, WM8903_SW_RESET_AND_ID
);
1655 if (val
!= wm8903_reg_defaults
[WM8903_SW_RESET_AND_ID
]) {
1657 "Device with ID register %x is not a WM8903\n", val
);
1661 val
= snd_soc_read(codec
, WM8903_REVISION_NUMBER
);
1662 dev_info(codec
->dev
, "WM8903 revision %d\n",
1663 val
& WM8903_CHIP_REV_MASK
);
1665 wm8903_reset(codec
);
1667 /* Set up GPIOs and microphone detection */
1669 for (i
= 0; i
< ARRAY_SIZE(pdata
->gpio_cfg
); i
++) {
1670 if (!pdata
->gpio_cfg
[i
])
1673 snd_soc_write(codec
, WM8903_GPIO_CONTROL_1
+ i
,
1674 pdata
->gpio_cfg
[i
] & 0xffff);
1677 snd_soc_write(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1680 /* Microphone detection needs the WSEQ clock */
1681 if (pdata
->micdet_cfg
)
1682 snd_soc_update_bits(codec
, WM8903_WRITE_SEQUENCER_0
,
1683 WM8903_WSEQ_ENA
, WM8903_WSEQ_ENA
);
1685 wm8903
->mic_delay
= pdata
->micdet_delay
;
1689 if (pdata
&& pdata
->irq_active_low
) {
1690 trigger
= IRQF_TRIGGER_LOW
;
1691 irq_pol
= WM8903_IRQ_POL
;
1693 trigger
= IRQF_TRIGGER_HIGH
;
1697 snd_soc_update_bits(codec
, WM8903_INTERRUPT_CONTROL
,
1698 WM8903_IRQ_POL
, irq_pol
);
1700 ret
= request_threaded_irq(wm8903
->irq
, NULL
, wm8903_irq
,
1701 trigger
| IRQF_ONESHOT
,
1704 dev_err(codec
->dev
, "Failed to request IRQ: %d\n",
1709 /* Enable write sequencer interrupts */
1710 snd_soc_update_bits(codec
, WM8903_INTERRUPT_STATUS_1_MASK
,
1711 WM8903_IM_WSEQ_BUSY_EINT
, 0);
1714 /* power on device */
1715 wm8903_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1717 /* Latch volume update bits */
1718 val
= snd_soc_read(codec
, WM8903_ADC_DIGITAL_VOLUME_LEFT
);
1719 val
|= WM8903_ADCVU
;
1720 snd_soc_write(codec
, WM8903_ADC_DIGITAL_VOLUME_LEFT
, val
);
1721 snd_soc_write(codec
, WM8903_ADC_DIGITAL_VOLUME_RIGHT
, val
);
1723 val
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_VOLUME_LEFT
);
1724 val
|= WM8903_DACVU
;
1725 snd_soc_write(codec
, WM8903_DAC_DIGITAL_VOLUME_LEFT
, val
);
1726 snd_soc_write(codec
, WM8903_DAC_DIGITAL_VOLUME_RIGHT
, val
);
1728 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT1_LEFT
);
1729 val
|= WM8903_HPOUTVU
;
1730 snd_soc_write(codec
, WM8903_ANALOGUE_OUT1_LEFT
, val
);
1731 snd_soc_write(codec
, WM8903_ANALOGUE_OUT1_RIGHT
, val
);
1733 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT2_LEFT
);
1734 val
|= WM8903_LINEOUTVU
;
1735 snd_soc_write(codec
, WM8903_ANALOGUE_OUT2_LEFT
, val
);
1736 snd_soc_write(codec
, WM8903_ANALOGUE_OUT2_RIGHT
, val
);
1738 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT3_LEFT
);
1739 val
|= WM8903_SPKVU
;
1740 snd_soc_write(codec
, WM8903_ANALOGUE_OUT3_LEFT
, val
);
1741 snd_soc_write(codec
, WM8903_ANALOGUE_OUT3_RIGHT
, val
);
1743 /* Enable DAC soft mute by default */
1744 val
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1745 val
|= WM8903_DAC_MUTEMODE
;
1746 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, val
);
1748 snd_soc_add_controls(codec
, wm8903_snd_controls
,
1749 ARRAY_SIZE(wm8903_snd_controls
));
1750 wm8903_add_widgets(codec
);
1755 /* power down chip */
1756 static int wm8903_remove(struct snd_soc_codec
*codec
)
1758 wm8903_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1762 static struct snd_soc_codec_driver soc_codec_dev_wm8903
= {
1763 .probe
= wm8903_probe
,
1764 .remove
= wm8903_remove
,
1765 .suspend
= wm8903_suspend
,
1766 .resume
= wm8903_resume
,
1767 .set_bias_level
= wm8903_set_bias_level
,
1768 .reg_cache_size
= ARRAY_SIZE(wm8903_reg_defaults
),
1769 .reg_word_size
= sizeof(u16
),
1770 .reg_cache_default
= wm8903_reg_defaults
,
1771 .volatile_register
= wm8903_volatile_register
,
1774 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1775 static __devinit
int wm8903_i2c_probe(struct i2c_client
*i2c
,
1776 const struct i2c_device_id
*id
)
1778 struct wm8903_priv
*wm8903
;
1781 wm8903
= kzalloc(sizeof(struct wm8903_priv
), GFP_KERNEL
);
1785 i2c_set_clientdata(i2c
, wm8903
);
1786 wm8903
->irq
= i2c
->irq
;
1788 ret
= snd_soc_register_codec(&i2c
->dev
,
1789 &soc_codec_dev_wm8903
, &wm8903_dai
, 1);
1795 static __devexit
int wm8903_i2c_remove(struct i2c_client
*client
)
1797 snd_soc_unregister_codec(&client
->dev
);
1798 kfree(i2c_get_clientdata(client
));
1802 static const struct i2c_device_id wm8903_i2c_id
[] = {
1806 MODULE_DEVICE_TABLE(i2c
, wm8903_i2c_id
);
1808 static struct i2c_driver wm8903_i2c_driver
= {
1810 .name
= "wm8903-codec",
1811 .owner
= THIS_MODULE
,
1813 .probe
= wm8903_i2c_probe
,
1814 .remove
= __devexit_p(wm8903_i2c_remove
),
1815 .id_table
= wm8903_i2c_id
,
1819 static int __init
wm8903_modinit(void)
1822 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1823 ret
= i2c_add_driver(&wm8903_i2c_driver
);
1825 printk(KERN_ERR
"Failed to register wm8903 I2C driver: %d\n",
1831 module_init(wm8903_modinit
);
1833 static void __exit
wm8903_exit(void)
1835 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1836 i2c_del_driver(&wm8903_i2c_driver
);
1839 module_exit(wm8903_exit
);
1841 MODULE_DESCRIPTION("ASoC WM8903 driver");
1842 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.cm>");
1843 MODULE_LICENSE("GPL");