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ixgb: remove irq_sem
[firewire-audio.git] / drivers / net / ixgb / ixgb_main.c
blob9c9bf31e5c25dc9500ddfe77e6477216505c9231
1 /*******************************************************************************
2
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "ixgb.h"
30
31 char ixgb_driver_name[] = "ixgb";
32 static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
33
34 #ifndef CONFIG_IXGB_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "1.0.126-k4"DRIVERNAPI
40 const char ixgb_driver_version[] = DRV_VERSION;
41 static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51 static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63 };
64
65 MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67 /* Local Function Prototypes */
68
69 int ixgb_up(struct ixgb_adapter *adapter);
70 void ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog);
71 void ixgb_reset(struct ixgb_adapter *adapter);
72 int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73 int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74 void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75 void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76 void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78 static int ixgb_init_module(void);
79 static void ixgb_exit_module(void);
80 static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81 static void __devexit ixgb_remove(struct pci_dev *pdev);
82 static int ixgb_sw_init(struct ixgb_adapter *adapter);
83 static int ixgb_open(struct net_device *netdev);
84 static int ixgb_close(struct net_device *netdev);
85 static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86 static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87 static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88 static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89 static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90 static void ixgb_set_multi(struct net_device *netdev);
91 static void ixgb_watchdog(unsigned long data);
92 static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93 static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94 static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95 static int ixgb_set_mac(struct net_device *netdev, void *p);
96 static irqreturn_t ixgb_intr(int irq, void *data);
97 static bool ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
98
99 #ifdef CONFIG_IXGB_NAPI
100 static int ixgb_clean(struct napi_struct *napi, int budget);
101 static bool ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103 #else
104 static bool ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105 #endif
106 static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
107 static void ixgb_tx_timeout(struct net_device *dev);
108 static void ixgb_tx_timeout_task(struct work_struct *work);
109 static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp);
111 static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
112 static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
113 static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114
115 #ifdef CONFIG_NET_POLL_CONTROLLER
116 /* for netdump / net console */
117 static void ixgb_netpoll(struct net_device *dev);
118 #endif
119
120 static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
121 enum pci_channel_state state);
122 static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
123 static void ixgb_io_resume (struct pci_dev *pdev);
124
125 static struct pci_error_handlers ixgb_err_handler = {
126 .error_detected = ixgb_io_error_detected,
127 .slot_reset = ixgb_io_slot_reset,
128 .resume = ixgb_io_resume,
129 };
130
131 static struct pci_driver ixgb_driver = {
132 .name = ixgb_driver_name,
133 .id_table = ixgb_pci_tbl,
134 .probe = ixgb_probe,
135 .remove = __devexit_p(ixgb_remove),
136 .err_handler = &ixgb_err_handler
137 };
138
139 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
140 MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
141 MODULE_LICENSE("GPL");
142 MODULE_VERSION(DRV_VERSION);
143
144 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
145 static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
148
149 /* some defines for controlling descriptor fetches in h/w */
150 #define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
151 #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
152 * this */
153 #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
154 * is pushed this many descriptors
155 * from head */
156
157 /**
158 * ixgb_init_module - Driver Registration Routine
159 *
160 * ixgb_init_module is the first routine called when the driver is
161 * loaded. All it does is register with the PCI subsystem.
162 **/
163
164 static int __init
165 ixgb_init_module(void)
166 {
167 printk(KERN_INFO "%s - version %s\n",
168 ixgb_driver_string, ixgb_driver_version);
169
170 printk(KERN_INFO "%s\n", ixgb_copyright);
171
172 return pci_register_driver(&ixgb_driver);
173 }
174
175 module_init(ixgb_init_module);
176
177 /**
178 * ixgb_exit_module - Driver Exit Cleanup Routine
179 *
180 * ixgb_exit_module is called just before the driver is removed
181 * from memory.
182 **/
183
184 static void __exit
185 ixgb_exit_module(void)
186 {
187 pci_unregister_driver(&ixgb_driver);
188 }
189
190 module_exit(ixgb_exit_module);
191
192 /**
193 * ixgb_irq_disable - Mask off interrupt generation on the NIC
194 * @adapter: board private structure
195 **/
196
197 static void
198 ixgb_irq_disable(struct ixgb_adapter *adapter)
199 {
200 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
201 IXGB_WRITE_FLUSH(&adapter->hw);
202 synchronize_irq(adapter->pdev->irq);
203 }
204
205 /**
206 * ixgb_irq_enable - Enable default interrupt generation settings
207 * @adapter: board private structure
208 **/
209
210 static void
211 ixgb_irq_enable(struct ixgb_adapter *adapter)
212 {
213 u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
214 IXGB_INT_TXDW | IXGB_INT_LSC;
215 if (adapter->hw.subsystem_vendor_id == SUN_SUBVENDOR_ID)
216 val |= IXGB_INT_GPI0;
217 IXGB_WRITE_REG(&adapter->hw, IMS, val);
218 IXGB_WRITE_FLUSH(&adapter->hw);
219 }
220
221 int
222 ixgb_up(struct ixgb_adapter *adapter)
223 {
224 struct net_device *netdev = adapter->netdev;
225 int err, irq_flags = IRQF_SHARED;
226 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
227 struct ixgb_hw *hw = &adapter->hw;
228
229 /* hardware has been reset, we need to reload some things */
230
231 ixgb_rar_set(hw, netdev->dev_addr, 0);
232 ixgb_set_multi(netdev);
233
234 ixgb_restore_vlan(adapter);
235
236 ixgb_configure_tx(adapter);
237 ixgb_setup_rctl(adapter);
238 ixgb_configure_rx(adapter);
239 ixgb_alloc_rx_buffers(adapter);
240
241 /* disable interrupts and get the hardware into a known state */
242 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
243
244 /* only enable MSI if bus is in PCI-X mode */
245 if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
246 err = pci_enable_msi(adapter->pdev);
247 if (!err) {
248 adapter->have_msi = 1;
249 irq_flags = 0;
250 }
251 /* proceed to try to request regular interrupt */
252 }
253
254 err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
255 netdev->name, netdev);
256 if (err) {
257 if (adapter->have_msi)
258 pci_disable_msi(adapter->pdev);
259 DPRINTK(PROBE, ERR,
260 "Unable to allocate interrupt Error: %d\n", err);
261 return err;
262 }
263
264 if((hw->max_frame_size != max_frame) ||
265 (hw->max_frame_size !=
266 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
267
268 hw->max_frame_size = max_frame;
269
270 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
271
272 if(hw->max_frame_size >
273 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
274 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
275
276 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
277 ctrl0 |= IXGB_CTRL0_JFE;
278 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
279 }
280 }
281 }
282
283 clear_bit(__IXGB_DOWN, &adapter->flags);
284
285 #ifdef CONFIG_IXGB_NAPI
286 napi_enable(&adapter->napi);
287 #endif
288 ixgb_irq_enable(adapter);
289
290 mod_timer(&adapter->watchdog_timer, jiffies);
291
292 return 0;
293 }
294
295 void
296 ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog)
297 {
298 struct net_device *netdev = adapter->netdev;
299
300 /* prevent the interrupt handler from restarting watchdog */
301 set_bit(__IXGB_DOWN, &adapter->flags);
302
303 #ifdef CONFIG_IXGB_NAPI
304 napi_disable(&adapter->napi);
305 #endif
306 /* waiting for NAPI to complete can re-enable interrupts */
307 ixgb_irq_disable(adapter);
308 free_irq(adapter->pdev->irq, netdev);
309
310 if (adapter->have_msi)
311 pci_disable_msi(adapter->pdev);
312
313 if(kill_watchdog)
314 del_timer_sync(&adapter->watchdog_timer);
315
316 adapter->link_speed = 0;
317 adapter->link_duplex = 0;
318 netif_carrier_off(netdev);
319 netif_stop_queue(netdev);
320
321 ixgb_reset(adapter);
322 ixgb_clean_tx_ring(adapter);
323 ixgb_clean_rx_ring(adapter);
324 }
325
326 void
327 ixgb_reset(struct ixgb_adapter *adapter)
328 {
329 struct ixgb_hw *hw = &adapter->hw;
330
331 ixgb_adapter_stop(hw);
332 if (!ixgb_init_hw(hw))
333 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
334
335 /* restore frame size information */
336 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
337 if (hw->max_frame_size >
338 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
339 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
340 if (!(ctrl0 & IXGB_CTRL0_JFE)) {
341 ctrl0 |= IXGB_CTRL0_JFE;
342 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
343 }
344 }
345 }
346
347 /**
348 * ixgb_probe - Device Initialization Routine
349 * @pdev: PCI device information struct
350 * @ent: entry in ixgb_pci_tbl
351 *
352 * Returns 0 on success, negative on failure
353 *
354 * ixgb_probe initializes an adapter identified by a pci_dev structure.
355 * The OS initialization, configuring of the adapter private structure,
356 * and a hardware reset occur.
357 **/
358
359 static int __devinit
360 ixgb_probe(struct pci_dev *pdev,
361 const struct pci_device_id *ent)
362 {
363 struct net_device *netdev = NULL;
364 struct ixgb_adapter *adapter;
365 static int cards_found = 0;
366 unsigned long mmio_start;
367 int mmio_len;
368 int pci_using_dac;
369 int i;
370 int err;
371
372 if((err = pci_enable_device(pdev)))
373 return err;
374
375 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
376 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
377 pci_using_dac = 1;
378 } else {
379 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
380 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
381 printk(KERN_ERR
382 "ixgb: No usable DMA configuration, aborting\n");
383 goto err_dma_mask;
384 }
385 pci_using_dac = 0;
386 }
387
388 if((err = pci_request_regions(pdev, ixgb_driver_name)))
389 goto err_request_regions;
390
391 pci_set_master(pdev);
392
393 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
394 if(!netdev) {
395 err = -ENOMEM;
396 goto err_alloc_etherdev;
397 }
398
399 SET_NETDEV_DEV(netdev, &pdev->dev);
400
401 pci_set_drvdata(pdev, netdev);
402 adapter = netdev_priv(netdev);
403 adapter->netdev = netdev;
404 adapter->pdev = pdev;
405 adapter->hw.back = adapter;
406 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
407
408 mmio_start = pci_resource_start(pdev, BAR_0);
409 mmio_len = pci_resource_len(pdev, BAR_0);
410
411 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
412 if(!adapter->hw.hw_addr) {
413 err = -EIO;
414 goto err_ioremap;
415 }
416
417 for(i = BAR_1; i <= BAR_5; i++) {
418 if(pci_resource_len(pdev, i) == 0)
419 continue;
420 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
421 adapter->hw.io_base = pci_resource_start(pdev, i);
422 break;
423 }
424 }
425
426 netdev->open = &ixgb_open;
427 netdev->stop = &ixgb_close;
428 netdev->hard_start_xmit = &ixgb_xmit_frame;
429 netdev->get_stats = &ixgb_get_stats;
430 netdev->set_multicast_list = &ixgb_set_multi;
431 netdev->set_mac_address = &ixgb_set_mac;
432 netdev->change_mtu = &ixgb_change_mtu;
433 ixgb_set_ethtool_ops(netdev);
434 netdev->tx_timeout = &ixgb_tx_timeout;
435 netdev->watchdog_timeo = 5 * HZ;
436 #ifdef CONFIG_IXGB_NAPI
437 netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
438 #endif
439 netdev->vlan_rx_register = ixgb_vlan_rx_register;
440 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
441 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
442 #ifdef CONFIG_NET_POLL_CONTROLLER
443 netdev->poll_controller = ixgb_netpoll;
444 #endif
445
446 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
447 netdev->mem_start = mmio_start;
448 netdev->mem_end = mmio_start + mmio_len;
449 netdev->base_addr = adapter->hw.io_base;
450
451 adapter->bd_number = cards_found;
452 adapter->link_speed = 0;
453 adapter->link_duplex = 0;
454
455 /* setup the private structure */
456
457 if((err = ixgb_sw_init(adapter)))
458 goto err_sw_init;
459
460 netdev->features = NETIF_F_SG |
461 NETIF_F_HW_CSUM |
462 NETIF_F_HW_VLAN_TX |
463 NETIF_F_HW_VLAN_RX |
464 NETIF_F_HW_VLAN_FILTER;
465 netdev->features |= NETIF_F_TSO;
466 #ifdef NETIF_F_LLTX
467 netdev->features |= NETIF_F_LLTX;
468 #endif
469
470 if(pci_using_dac)
471 netdev->features |= NETIF_F_HIGHDMA;
472
473 /* make sure the EEPROM is good */
474
475 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
476 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
477 err = -EIO;
478 goto err_eeprom;
479 }
480
481 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
482 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
483
484 if(!is_valid_ether_addr(netdev->perm_addr)) {
485 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
486 err = -EIO;
487 goto err_eeprom;
488 }
489
490 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
491
492 init_timer(&adapter->watchdog_timer);
493 adapter->watchdog_timer.function = &ixgb_watchdog;
494 adapter->watchdog_timer.data = (unsigned long)adapter;
495
496 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
497
498 strcpy(netdev->name, "eth%d");
499 if((err = register_netdev(netdev)))
500 goto err_register;
501
502 /* we're going to reset, so assume we have no link for now */
503
504 netif_carrier_off(netdev);
505 netif_stop_queue(netdev);
506
507 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
508 ixgb_check_options(adapter);
509 /* reset the hardware with the new settings */
510
511 ixgb_reset(adapter);
512
513 cards_found++;
514 return 0;
515
516 err_register:
517 err_sw_init:
518 err_eeprom:
519 iounmap(adapter->hw.hw_addr);
520 err_ioremap:
521 free_netdev(netdev);
522 err_alloc_etherdev:
523 pci_release_regions(pdev);
524 err_request_regions:
525 err_dma_mask:
526 pci_disable_device(pdev);
527 return err;
528 }
529
530 /**
531 * ixgb_remove - Device Removal Routine
532 * @pdev: PCI device information struct
533 *
534 * ixgb_remove is called by the PCI subsystem to alert the driver
535 * that it should release a PCI device. The could be caused by a
536 * Hot-Plug event, or because the driver is going to be removed from
537 * memory.
538 **/
539
540 static void __devexit
541 ixgb_remove(struct pci_dev *pdev)
542 {
543 struct net_device *netdev = pci_get_drvdata(pdev);
544 struct ixgb_adapter *adapter = netdev_priv(netdev);
545
546 unregister_netdev(netdev);
547
548 iounmap(adapter->hw.hw_addr);
549 pci_release_regions(pdev);
550
551 free_netdev(netdev);
552 }
553
554 /**
555 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
556 * @adapter: board private structure to initialize
557 *
558 * ixgb_sw_init initializes the Adapter private data structure.
559 * Fields are initialized based on PCI device information and
560 * OS network device settings (MTU size).
561 **/
562
563 static int __devinit
564 ixgb_sw_init(struct ixgb_adapter *adapter)
565 {
566 struct ixgb_hw *hw = &adapter->hw;
567 struct net_device *netdev = adapter->netdev;
568 struct pci_dev *pdev = adapter->pdev;
569
570 /* PCI config space info */
571
572 hw->vendor_id = pdev->vendor;
573 hw->device_id = pdev->device;
574 hw->subsystem_vendor_id = pdev->subsystem_vendor;
575 hw->subsystem_id = pdev->subsystem_device;
576
577 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
578 adapter->rx_buffer_len = hw->max_frame_size;
579
580 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
581 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
582 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
583 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
584 hw->mac_type = ixgb_82597;
585 else {
586 /* should never have loaded on this device */
587 DPRINTK(PROBE, ERR, "unsupported device id\n");
588 }
589
590 /* enable flow control to be programmed */
591 hw->fc.send_xon = 1;
592
593 spin_lock_init(&adapter->tx_lock);
594
595 set_bit(__IXGB_DOWN, &adapter->flags);
596 return 0;
597 }
598
599 /**
600 * ixgb_open - Called when a network interface is made active
601 * @netdev: network interface device structure
602 *
603 * Returns 0 on success, negative value on failure
604 *
605 * The open entry point is called when a network interface is made
606 * active by the system (IFF_UP). At this point all resources needed
607 * for transmit and receive operations are allocated, the interrupt
608 * handler is registered with the OS, the watchdog timer is started,
609 * and the stack is notified that the interface is ready.
610 **/
611
612 static int
613 ixgb_open(struct net_device *netdev)
614 {
615 struct ixgb_adapter *adapter = netdev_priv(netdev);
616 int err;
617
618 /* allocate transmit descriptors */
619
620 if((err = ixgb_setup_tx_resources(adapter)))
621 goto err_setup_tx;
622
623 /* allocate receive descriptors */
624
625 if((err = ixgb_setup_rx_resources(adapter)))
626 goto err_setup_rx;
627
628 if((err = ixgb_up(adapter)))
629 goto err_up;
630
631 return 0;
632
633 err_up:
634 ixgb_free_rx_resources(adapter);
635 err_setup_rx:
636 ixgb_free_tx_resources(adapter);
637 err_setup_tx:
638 ixgb_reset(adapter);
639
640 return err;
641 }
642
643 /**
644 * ixgb_close - Disables a network interface
645 * @netdev: network interface device structure
646 *
647 * Returns 0, this is not allowed to fail
648 *
649 * The close entry point is called when an interface is de-activated
650 * by the OS. The hardware is still under the drivers control, but
651 * needs to be disabled. A global MAC reset is issued to stop the
652 * hardware, and all transmit and receive resources are freed.
653 **/
654
655 static int
656 ixgb_close(struct net_device *netdev)
657 {
658 struct ixgb_adapter *adapter = netdev_priv(netdev);
659
660 ixgb_down(adapter, true);
661
662 ixgb_free_tx_resources(adapter);
663 ixgb_free_rx_resources(adapter);
664
665 return 0;
666 }
667
668 /**
669 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
670 * @adapter: board private structure
671 *
672 * Return 0 on success, negative on failure
673 **/
674
675 int
676 ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
677 {
678 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
679 struct pci_dev *pdev = adapter->pdev;
680 int size;
681
682 size = sizeof(struct ixgb_buffer) * txdr->count;
683 txdr->buffer_info = vmalloc(size);
684 if(!txdr->buffer_info) {
685 DPRINTK(PROBE, ERR,
686 "Unable to allocate transmit descriptor ring memory\n");
687 return -ENOMEM;
688 }
689 memset(txdr->buffer_info, 0, size);
690
691 /* round up to nearest 4K */
692
693 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
694 txdr->size = ALIGN(txdr->size, 4096);
695
696 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
697 if(!txdr->desc) {
698 vfree(txdr->buffer_info);
699 DPRINTK(PROBE, ERR,
700 "Unable to allocate transmit descriptor memory\n");
701 return -ENOMEM;
702 }
703 memset(txdr->desc, 0, txdr->size);
704
705 txdr->next_to_use = 0;
706 txdr->next_to_clean = 0;
707
708 return 0;
709 }
710
711 /**
712 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
713 * @adapter: board private structure
714 *
715 * Configure the Tx unit of the MAC after a reset.
716 **/
717
718 static void
719 ixgb_configure_tx(struct ixgb_adapter *adapter)
720 {
721 uint64_t tdba = adapter->tx_ring.dma;
722 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
723 uint32_t tctl;
724 struct ixgb_hw *hw = &adapter->hw;
725
726 /* Setup the Base and Length of the Tx Descriptor Ring
727 * tx_ring.dma can be either a 32 or 64 bit value
728 */
729
730 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
731 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
732
733 IXGB_WRITE_REG(hw, TDLEN, tdlen);
734
735 /* Setup the HW Tx Head and Tail descriptor pointers */
736
737 IXGB_WRITE_REG(hw, TDH, 0);
738 IXGB_WRITE_REG(hw, TDT, 0);
739
740 /* don't set up txdctl, it induces performance problems if configured
741 * incorrectly */
742 /* Set the Tx Interrupt Delay register */
743
744 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
745
746 /* Program the Transmit Control Register */
747
748 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
749 IXGB_WRITE_REG(hw, TCTL, tctl);
750
751 /* Setup Transmit Descriptor Settings for this adapter */
752 adapter->tx_cmd_type =
753 IXGB_TX_DESC_TYPE
754 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
755 }
756
757 /**
758 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
759 * @adapter: board private structure
760 *
761 * Returns 0 on success, negative on failure
762 **/
763
764 int
765 ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
766 {
767 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
768 struct pci_dev *pdev = adapter->pdev;
769 int size;
770
771 size = sizeof(struct ixgb_buffer) * rxdr->count;
772 rxdr->buffer_info = vmalloc(size);
773 if(!rxdr->buffer_info) {
774 DPRINTK(PROBE, ERR,
775 "Unable to allocate receive descriptor ring\n");
776 return -ENOMEM;
777 }
778 memset(rxdr->buffer_info, 0, size);
779
780 /* Round up to nearest 4K */
781
782 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
783 rxdr->size = ALIGN(rxdr->size, 4096);
784
785 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
786
787 if(!rxdr->desc) {
788 vfree(rxdr->buffer_info);
789 DPRINTK(PROBE, ERR,
790 "Unable to allocate receive descriptors\n");
791 return -ENOMEM;
792 }
793 memset(rxdr->desc, 0, rxdr->size);
794
795 rxdr->next_to_clean = 0;
796 rxdr->next_to_use = 0;
797
798 return 0;
799 }
800
801 /**
802 * ixgb_setup_rctl - configure the receive control register
803 * @adapter: Board private structure
804 **/
805
806 static void
807 ixgb_setup_rctl(struct ixgb_adapter *adapter)
808 {
809 uint32_t rctl;
810
811 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
812
813 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
814
815 rctl |=
816 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
817 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
818 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
819
820 rctl |= IXGB_RCTL_SECRC;
821
822 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
823 rctl |= IXGB_RCTL_BSIZE_2048;
824 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
825 rctl |= IXGB_RCTL_BSIZE_4096;
826 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
827 rctl |= IXGB_RCTL_BSIZE_8192;
828 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
829 rctl |= IXGB_RCTL_BSIZE_16384;
830
831 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
832 }
833
834 /**
835 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
836 * @adapter: board private structure
837 *
838 * Configure the Rx unit of the MAC after a reset.
839 **/
840
841 static void
842 ixgb_configure_rx(struct ixgb_adapter *adapter)
843 {
844 uint64_t rdba = adapter->rx_ring.dma;
845 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
846 struct ixgb_hw *hw = &adapter->hw;
847 uint32_t rctl;
848 uint32_t rxcsum;
849 uint32_t rxdctl;
850
851 /* make sure receives are disabled while setting up the descriptors */
852
853 rctl = IXGB_READ_REG(hw, RCTL);
854 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
855
856 /* set the Receive Delay Timer Register */
857
858 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
859
860 /* Setup the Base and Length of the Rx Descriptor Ring */
861
862 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
863 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
864
865 IXGB_WRITE_REG(hw, RDLEN, rdlen);
866
867 /* Setup the HW Rx Head and Tail Descriptor Pointers */
868 IXGB_WRITE_REG(hw, RDH, 0);
869 IXGB_WRITE_REG(hw, RDT, 0);
870
871 /* set up pre-fetching of receive buffers so we get some before we
872 * run out (default hardware behavior is to run out before fetching
873 * more). This sets up to fetch if HTHRESH rx descriptors are avail
874 * and the descriptors in hw cache are below PTHRESH. This avoids
875 * the hardware behavior of fetching <=512 descriptors in a single
876 * burst that pre-empts all other activity, usually causing fifo
877 * overflows. */
878 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
879 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
880 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
881 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
882 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
883
884 /* Enable Receive Checksum Offload for TCP and UDP */
885 if (adapter->rx_csum) {
886 rxcsum = IXGB_READ_REG(hw, RXCSUM);
887 rxcsum |= IXGB_RXCSUM_TUOFL;
888 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
889 }
890
891 /* Enable Receives */
892
893 IXGB_WRITE_REG(hw, RCTL, rctl);
894 }
895
896 /**
897 * ixgb_free_tx_resources - Free Tx Resources
898 * @adapter: board private structure
899 *
900 * Free all transmit software resources
901 **/
902
903 void
904 ixgb_free_tx_resources(struct ixgb_adapter *adapter)
905 {
906 struct pci_dev *pdev = adapter->pdev;
907
908 ixgb_clean_tx_ring(adapter);
909
910 vfree(adapter->tx_ring.buffer_info);
911 adapter->tx_ring.buffer_info = NULL;
912
913 pci_free_consistent(pdev, adapter->tx_ring.size,
914 adapter->tx_ring.desc, adapter->tx_ring.dma);
915
916 adapter->tx_ring.desc = NULL;
917 }
918
919 static void
920 ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
921 struct ixgb_buffer *buffer_info)
922 {
923 struct pci_dev *pdev = adapter->pdev;
924
925 if (buffer_info->dma)
926 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
927 PCI_DMA_TODEVICE);
928
929 if (buffer_info->skb)
930 dev_kfree_skb_any(buffer_info->skb);
931
932 buffer_info->skb = NULL;
933 buffer_info->dma = 0;
934 buffer_info->time_stamp = 0;
935 /* these fields must always be initialized in tx
936 * buffer_info->length = 0;
937 * buffer_info->next_to_watch = 0; */
938 }
939
940 /**
941 * ixgb_clean_tx_ring - Free Tx Buffers
942 * @adapter: board private structure
943 **/
944
945 static void
946 ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
947 {
948 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
949 struct ixgb_buffer *buffer_info;
950 unsigned long size;
951 unsigned int i;
952
953 /* Free all the Tx ring sk_buffs */
954
955 for(i = 0; i < tx_ring->count; i++) {
956 buffer_info = &tx_ring->buffer_info[i];
957 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
958 }
959
960 size = sizeof(struct ixgb_buffer) * tx_ring->count;
961 memset(tx_ring->buffer_info, 0, size);
962
963 /* Zero out the descriptor ring */
964
965 memset(tx_ring->desc, 0, tx_ring->size);
966
967 tx_ring->next_to_use = 0;
968 tx_ring->next_to_clean = 0;
969
970 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
971 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
972 }
973
974 /**
975 * ixgb_free_rx_resources - Free Rx Resources
976 * @adapter: board private structure
977 *
978 * Free all receive software resources
979 **/
980
981 void
982 ixgb_free_rx_resources(struct ixgb_adapter *adapter)
983 {
984 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
985 struct pci_dev *pdev = adapter->pdev;
986
987 ixgb_clean_rx_ring(adapter);
988
989 vfree(rx_ring->buffer_info);
990 rx_ring->buffer_info = NULL;
991
992 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
993
994 rx_ring->desc = NULL;
995 }
996
997 /**
998 * ixgb_clean_rx_ring - Free Rx Buffers
999 * @adapter: board private structure
1000 **/
1001
1002 static void
1003 ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1004 {
1005 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1006 struct ixgb_buffer *buffer_info;
1007 struct pci_dev *pdev = adapter->pdev;
1008 unsigned long size;
1009 unsigned int i;
1010
1011 /* Free all the Rx ring sk_buffs */
1012
1013 for(i = 0; i < rx_ring->count; i++) {
1014 buffer_info = &rx_ring->buffer_info[i];
1015 if(buffer_info->skb) {
1016
1017 pci_unmap_single(pdev,
1018 buffer_info->dma,
1019 buffer_info->length,
1020 PCI_DMA_FROMDEVICE);
1021
1022 dev_kfree_skb(buffer_info->skb);
1023
1024 buffer_info->skb = NULL;
1025 }
1026 }
1027
1028 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1029 memset(rx_ring->buffer_info, 0, size);
1030
1031 /* Zero out the descriptor ring */
1032
1033 memset(rx_ring->desc, 0, rx_ring->size);
1034
1035 rx_ring->next_to_clean = 0;
1036 rx_ring->next_to_use = 0;
1037
1038 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1039 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1040 }
1041
1042 /**
1043 * ixgb_set_mac - Change the Ethernet Address of the NIC
1044 * @netdev: network interface device structure
1045 * @p: pointer to an address structure
1046 *
1047 * Returns 0 on success, negative on failure
1048 **/
1049
1050 static int
1051 ixgb_set_mac(struct net_device *netdev, void *p)
1052 {
1053 struct ixgb_adapter *adapter = netdev_priv(netdev);
1054 struct sockaddr *addr = p;
1055
1056 if(!is_valid_ether_addr(addr->sa_data))
1057 return -EADDRNOTAVAIL;
1058
1059 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1060
1061 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1062
1063 return 0;
1064 }
1065
1066 /**
1067 * ixgb_set_multi - Multicast and Promiscuous mode set
1068 * @netdev: network interface device structure
1069 *
1070 * The set_multi entry point is called whenever the multicast address
1071 * list or the network interface flags are updated. This routine is
1072 * responsible for configuring the hardware for proper multicast,
1073 * promiscuous mode, and all-multi behavior.
1074 **/
1075
1076 static void
1077 ixgb_set_multi(struct net_device *netdev)
1078 {
1079 struct ixgb_adapter *adapter = netdev_priv(netdev);
1080 struct ixgb_hw *hw = &adapter->hw;
1081 struct dev_mc_list *mc_ptr;
1082 uint32_t rctl;
1083 int i;
1084
1085 /* Check for Promiscuous and All Multicast modes */
1086
1087 rctl = IXGB_READ_REG(hw, RCTL);
1088
1089 if(netdev->flags & IFF_PROMISC) {
1090 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1091 } else if(netdev->flags & IFF_ALLMULTI) {
1092 rctl |= IXGB_RCTL_MPE;
1093 rctl &= ~IXGB_RCTL_UPE;
1094 } else {
1095 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1096 }
1097
1098 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1099 rctl |= IXGB_RCTL_MPE;
1100 IXGB_WRITE_REG(hw, RCTL, rctl);
1101 } else {
1102 uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
1103 IXGB_ETH_LENGTH_OF_ADDRESS];
1104
1105 IXGB_WRITE_REG(hw, RCTL, rctl);
1106
1107 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1108 i++, mc_ptr = mc_ptr->next)
1109 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1110 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1111
1112 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1113 }
1114 }
1115
1116 /**
1117 * ixgb_watchdog - Timer Call-back
1118 * @data: pointer to netdev cast into an unsigned long
1119 **/
1120
1121 static void
1122 ixgb_watchdog(unsigned long data)
1123 {
1124 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1125 struct net_device *netdev = adapter->netdev;
1126 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1127
1128 ixgb_check_for_link(&adapter->hw);
1129
1130 if (ixgb_check_for_bad_link(&adapter->hw)) {
1131 /* force the reset path */
1132 netif_stop_queue(netdev);
1133 }
1134
1135 if(adapter->hw.link_up) {
1136 if(!netif_carrier_ok(netdev)) {
1137 DPRINTK(LINK, INFO,
1138 "NIC Link is Up 10000 Mbps Full Duplex\n");
1139 adapter->link_speed = 10000;
1140 adapter->link_duplex = FULL_DUPLEX;
1141 netif_carrier_on(netdev);
1142 netif_wake_queue(netdev);
1143 }
1144 } else {
1145 if(netif_carrier_ok(netdev)) {
1146 adapter->link_speed = 0;
1147 adapter->link_duplex = 0;
1148 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1149 netif_carrier_off(netdev);
1150 netif_stop_queue(netdev);
1151
1152 }
1153 }
1154
1155 ixgb_update_stats(adapter);
1156
1157 if(!netif_carrier_ok(netdev)) {
1158 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1159 /* We've lost link, so the controller stops DMA,
1160 * but we've got queued Tx work that's never going
1161 * to get done, so reset controller to flush Tx.
1162 * (Do the reset outside of interrupt context). */
1163 schedule_work(&adapter->tx_timeout_task);
1164 }
1165 }
1166
1167 /* Force detection of hung controller every watchdog period */
1168 adapter->detect_tx_hung = true;
1169
1170 /* generate an interrupt to force clean up of any stragglers */
1171 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1172
1173 /* Reset the timer */
1174 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1175 }
1176
1177 #define IXGB_TX_FLAGS_CSUM 0x00000001
1178 #define IXGB_TX_FLAGS_VLAN 0x00000002
1179 #define IXGB_TX_FLAGS_TSO 0x00000004
1180
1181 static int
1182 ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1183 {
1184 struct ixgb_context_desc *context_desc;
1185 unsigned int i;
1186 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1187 uint16_t ipcse, tucse, mss;
1188 int err;
1189
1190 if (likely(skb_is_gso(skb))) {
1191 struct ixgb_buffer *buffer_info;
1192 struct iphdr *iph;
1193
1194 if (skb_header_cloned(skb)) {
1195 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1196 if (err)
1197 return err;
1198 }
1199
1200 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1201 mss = skb_shinfo(skb)->gso_size;
1202 iph = ip_hdr(skb);
1203 iph->tot_len = 0;
1204 iph->check = 0;
1205 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1206 iph->daddr, 0,
1207 IPPROTO_TCP, 0);
1208 ipcss = skb_network_offset(skb);
1209 ipcso = (void *)&(iph->check) - (void *)skb->data;
1210 ipcse = skb_transport_offset(skb) - 1;
1211 tucss = skb_transport_offset(skb);
1212 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1213 tucse = 0;
1214
1215 i = adapter->tx_ring.next_to_use;
1216 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1217 buffer_info = &adapter->tx_ring.buffer_info[i];
1218 WARN_ON(buffer_info->dma != 0);
1219
1220 context_desc->ipcss = ipcss;
1221 context_desc->ipcso = ipcso;
1222 context_desc->ipcse = cpu_to_le16(ipcse);
1223 context_desc->tucss = tucss;
1224 context_desc->tucso = tucso;
1225 context_desc->tucse = cpu_to_le16(tucse);
1226 context_desc->mss = cpu_to_le16(mss);
1227 context_desc->hdr_len = hdr_len;
1228 context_desc->status = 0;
1229 context_desc->cmd_type_len = cpu_to_le32(
1230 IXGB_CONTEXT_DESC_TYPE
1231 | IXGB_CONTEXT_DESC_CMD_TSE
1232 | IXGB_CONTEXT_DESC_CMD_IP
1233 | IXGB_CONTEXT_DESC_CMD_TCP
1234 | IXGB_CONTEXT_DESC_CMD_IDE
1235 | (skb->len - (hdr_len)));
1236
1237
1238 if(++i == adapter->tx_ring.count) i = 0;
1239 adapter->tx_ring.next_to_use = i;
1240
1241 return 1;
1242 }
1243
1244 return 0;
1245 }
1246
1247 static bool
1248 ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1249 {
1250 struct ixgb_context_desc *context_desc;
1251 unsigned int i;
1252 uint8_t css, cso;
1253
1254 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1255 struct ixgb_buffer *buffer_info;
1256 css = skb_transport_offset(skb);
1257 cso = css + skb->csum_offset;
1258
1259 i = adapter->tx_ring.next_to_use;
1260 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1261 buffer_info = &adapter->tx_ring.buffer_info[i];
1262 WARN_ON(buffer_info->dma != 0);
1263
1264 context_desc->tucss = css;
1265 context_desc->tucso = cso;
1266 context_desc->tucse = 0;
1267 /* zero out any previously existing data in one instruction */
1268 *(uint32_t *)&(context_desc->ipcss) = 0;
1269 context_desc->status = 0;
1270 context_desc->hdr_len = 0;
1271 context_desc->mss = 0;
1272 context_desc->cmd_type_len =
1273 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
1274 | IXGB_TX_DESC_CMD_IDE);
1275
1276 if(++i == adapter->tx_ring.count) i = 0;
1277 adapter->tx_ring.next_to_use = i;
1278
1279 return true;
1280 }
1281
1282 return false;
1283 }
1284
1285 #define IXGB_MAX_TXD_PWR 14
1286 #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1287
1288 static int
1289 ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1290 unsigned int first)
1291 {
1292 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1293 struct ixgb_buffer *buffer_info;
1294 int len = skb->len;
1295 unsigned int offset = 0, size, count = 0, i;
1296 unsigned int mss = skb_shinfo(skb)->gso_size;
1297
1298 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1299 unsigned int f;
1300
1301 len -= skb->data_len;
1302
1303 i = tx_ring->next_to_use;
1304
1305 while(len) {
1306 buffer_info = &tx_ring->buffer_info[i];
1307 size = min(len, IXGB_MAX_DATA_PER_TXD);
1308 /* Workaround for premature desc write-backs
1309 * in TSO mode. Append 4-byte sentinel desc */
1310 if (unlikely(mss && !nr_frags && size == len && size > 8))
1311 size -= 4;
1312
1313 buffer_info->length = size;
1314 WARN_ON(buffer_info->dma != 0);
1315 buffer_info->dma =
1316 pci_map_single(adapter->pdev,
1317 skb->data + offset,
1318 size,
1319 PCI_DMA_TODEVICE);
1320 buffer_info->time_stamp = jiffies;
1321 buffer_info->next_to_watch = 0;
1322
1323 len -= size;
1324 offset += size;
1325 count++;
1326 if(++i == tx_ring->count) i = 0;
1327 }
1328
1329 for(f = 0; f < nr_frags; f++) {
1330 struct skb_frag_struct *frag;
1331
1332 frag = &skb_shinfo(skb)->frags[f];
1333 len = frag->size;
1334 offset = 0;
1335
1336 while(len) {
1337 buffer_info = &tx_ring->buffer_info[i];
1338 size = min(len, IXGB_MAX_DATA_PER_TXD);
1339
1340 /* Workaround for premature desc write-backs
1341 * in TSO mode. Append 4-byte sentinel desc */
1342 if (unlikely(mss && (f == (nr_frags - 1))
1343 && size == len && size > 8))
1344 size -= 4;
1345
1346 buffer_info->length = size;
1347 buffer_info->dma =
1348 pci_map_page(adapter->pdev,
1349 frag->page,
1350 frag->page_offset + offset,
1351 size,
1352 PCI_DMA_TODEVICE);
1353 buffer_info->time_stamp = jiffies;
1354 buffer_info->next_to_watch = 0;
1355
1356 len -= size;
1357 offset += size;
1358 count++;
1359 if(++i == tx_ring->count) i = 0;
1360 }
1361 }
1362 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1363 tx_ring->buffer_info[i].skb = skb;
1364 tx_ring->buffer_info[first].next_to_watch = i;
1365
1366 return count;
1367 }
1368
1369 static void
1370 ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1371 {
1372 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1373 struct ixgb_tx_desc *tx_desc = NULL;
1374 struct ixgb_buffer *buffer_info;
1375 uint32_t cmd_type_len = adapter->tx_cmd_type;
1376 uint8_t status = 0;
1377 uint8_t popts = 0;
1378 unsigned int i;
1379
1380 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1381 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1382 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1383 }
1384
1385 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1386 popts |= IXGB_TX_DESC_POPTS_TXSM;
1387
1388 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1389 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1390 }
1391
1392 i = tx_ring->next_to_use;
1393
1394 while(count--) {
1395 buffer_info = &tx_ring->buffer_info[i];
1396 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1397 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1398 tx_desc->cmd_type_len =
1399 cpu_to_le32(cmd_type_len | buffer_info->length);
1400 tx_desc->status = status;
1401 tx_desc->popts = popts;
1402 tx_desc->vlan = cpu_to_le16(vlan_id);
1403
1404 if(++i == tx_ring->count) i = 0;
1405 }
1406
1407 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1408 | IXGB_TX_DESC_CMD_RS );
1409
1410 /* Force memory writes to complete before letting h/w
1411 * know there are new descriptors to fetch. (Only
1412 * applicable for weak-ordered memory model archs,
1413 * such as IA-64). */
1414 wmb();
1415
1416 tx_ring->next_to_use = i;
1417 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1418 }
1419
1420 static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1421 {
1422 struct ixgb_adapter *adapter = netdev_priv(netdev);
1423 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1424
1425 netif_stop_queue(netdev);
1426 /* Herbert's original patch had:
1427 * smp_mb__after_netif_stop_queue();
1428 * but since that doesn't exist yet, just open code it. */
1429 smp_mb();
1430
1431 /* We need to check again in a case another CPU has just
1432 * made room available. */
1433 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1434 return -EBUSY;
1435
1436 /* A reprieve! */
1437 netif_start_queue(netdev);
1438 ++adapter->restart_queue;
1439 return 0;
1440 }
1441
1442 static int ixgb_maybe_stop_tx(struct net_device *netdev,
1443 struct ixgb_desc_ring *tx_ring, int size)
1444 {
1445 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1446 return 0;
1447 return __ixgb_maybe_stop_tx(netdev, size);
1448 }
1449
1450
1451 /* Tx Descriptors needed, worst case */
1452 #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1453 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1454 #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1455 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1456 + 1 /* one more needed for sentinel TSO workaround */
1457
1458 static int
1459 ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1460 {
1461 struct ixgb_adapter *adapter = netdev_priv(netdev);
1462 unsigned int first;
1463 unsigned int tx_flags = 0;
1464 unsigned long flags;
1465 int vlan_id = 0;
1466 int tso;
1467
1468 if (test_bit(__IXGB_DOWN, &adapter->flags)) {
1469 dev_kfree_skb(skb);
1470 return NETDEV_TX_OK;
1471 }
1472
1473 if(skb->len <= 0) {
1474 dev_kfree_skb_any(skb);
1475 return 0;
1476 }
1477
1478 #ifdef NETIF_F_LLTX
1479 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
1480 /* Collision - tell upper layer to requeue */
1481 local_irq_restore(flags);
1482 return NETDEV_TX_LOCKED;
1483 }
1484 #else
1485 spin_lock_irqsave(&adapter->tx_lock, flags);
1486 #endif
1487
1488 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1489 DESC_NEEDED))) {
1490 netif_stop_queue(netdev);
1491 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1492 return NETDEV_TX_BUSY;
1493 }
1494
1495 #ifndef NETIF_F_LLTX
1496 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1497 #endif
1498
1499 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1500 tx_flags |= IXGB_TX_FLAGS_VLAN;
1501 vlan_id = vlan_tx_tag_get(skb);
1502 }
1503
1504 first = adapter->tx_ring.next_to_use;
1505
1506 tso = ixgb_tso(adapter, skb);
1507 if (tso < 0) {
1508 dev_kfree_skb_any(skb);
1509 #ifdef NETIF_F_LLTX
1510 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1511 #endif
1512 return NETDEV_TX_OK;
1513 }
1514
1515 if (likely(tso))
1516 tx_flags |= IXGB_TX_FLAGS_TSO;
1517 else if(ixgb_tx_csum(adapter, skb))
1518 tx_flags |= IXGB_TX_FLAGS_CSUM;
1519
1520 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1521 tx_flags);
1522
1523 netdev->trans_start = jiffies;
1524
1525 #ifdef NETIF_F_LLTX
1526 /* Make sure there is space in the ring for the next send. */
1527 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
1528
1529 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1530
1531 #endif
1532 return NETDEV_TX_OK;
1533 }
1534
1535 /**
1536 * ixgb_tx_timeout - Respond to a Tx Hang
1537 * @netdev: network interface device structure
1538 **/
1539
1540 static void
1541 ixgb_tx_timeout(struct net_device *netdev)
1542 {
1543 struct ixgb_adapter *adapter = netdev_priv(netdev);
1544
1545 /* Do the reset outside of interrupt context */
1546 schedule_work(&adapter->tx_timeout_task);
1547 }
1548
1549 static void
1550 ixgb_tx_timeout_task(struct work_struct *work)
1551 {
1552 struct ixgb_adapter *adapter =
1553 container_of(work, struct ixgb_adapter, tx_timeout_task);
1554
1555 adapter->tx_timeout_count++;
1556 ixgb_down(adapter, true);
1557 ixgb_up(adapter);
1558 }
1559
1560 /**
1561 * ixgb_get_stats - Get System Network Statistics
1562 * @netdev: network interface device structure
1563 *
1564 * Returns the address of the device statistics structure.
1565 * The statistics are actually updated from the timer callback.
1566 **/
1567
1568 static struct net_device_stats *
1569 ixgb_get_stats(struct net_device *netdev)
1570 {
1571 struct ixgb_adapter *adapter = netdev_priv(netdev);
1572
1573 return &adapter->net_stats;
1574 }
1575
1576 /**
1577 * ixgb_change_mtu - Change the Maximum Transfer Unit
1578 * @netdev: network interface device structure
1579 * @new_mtu: new value for maximum frame size
1580 *
1581 * Returns 0 on success, negative on failure
1582 **/
1583
1584 static int
1585 ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1586 {
1587 struct ixgb_adapter *adapter = netdev_priv(netdev);
1588 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1589 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1590
1591
1592 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1593 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1594 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1595 return -EINVAL;
1596 }
1597
1598 adapter->rx_buffer_len = max_frame;
1599
1600 netdev->mtu = new_mtu;
1601
1602 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1603 ixgb_down(adapter, true);
1604 ixgb_up(adapter);
1605 }
1606
1607 return 0;
1608 }
1609
1610 /**
1611 * ixgb_update_stats - Update the board statistics counters.
1612 * @adapter: board private structure
1613 **/
1614
1615 void
1616 ixgb_update_stats(struct ixgb_adapter *adapter)
1617 {
1618 struct net_device *netdev = adapter->netdev;
1619 struct pci_dev *pdev = adapter->pdev;
1620
1621 /* Prevent stats update while adapter is being reset */
1622 if (pci_channel_offline(pdev))
1623 return;
1624
1625 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1626 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1627 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1628 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1629 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1630 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1631
1632 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1633 /* fix up multicast stats by removing broadcasts */
1634 if(multi >= bcast)
1635 multi -= bcast;
1636
1637 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1638 adapter->stats.mprch += (multi >> 32);
1639 adapter->stats.bprcl += bcast_l;
1640 adapter->stats.bprch += bcast_h;
1641 } else {
1642 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1643 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1644 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1645 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1646 }
1647 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1648 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1649 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1650 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1651 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1652 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1653 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1654 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1655 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1656 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1657 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1658 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1659 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1660 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1661 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1662 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1663 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1664 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1665 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1666 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1667 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1668 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1669 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1670 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1671 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1672 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1673 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1674 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1675 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1676 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1677 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1678 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1679 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1680 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1681 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1682 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1683 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1684 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1685 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1686 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1687 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1688 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1689 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1690 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1691 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1692 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1693 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1694 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1695 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1696 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1697 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1698 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1699 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1700 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1701 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1702 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1703
1704 /* Fill out the OS statistics structure */
1705
1706 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1707 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1708 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1709 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1710 adapter->net_stats.multicast = adapter->stats.mprcl;
1711 adapter->net_stats.collisions = 0;
1712
1713 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1714 * with a length in the type/len field */
1715 adapter->net_stats.rx_errors =
1716 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1717 adapter->stats.ruc +
1718 adapter->stats.roc /*+ adapter->stats.rlec */ +
1719 adapter->stats.icbc +
1720 adapter->stats.ecbc + adapter->stats.mpc;
1721
1722 /* see above
1723 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1724 */
1725
1726 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1727 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1728 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1729 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1730
1731 adapter->net_stats.tx_errors = 0;
1732 adapter->net_stats.rx_frame_errors = 0;
1733 adapter->net_stats.tx_aborted_errors = 0;
1734 adapter->net_stats.tx_carrier_errors = 0;
1735 adapter->net_stats.tx_fifo_errors = 0;
1736 adapter->net_stats.tx_heartbeat_errors = 0;
1737 adapter->net_stats.tx_window_errors = 0;
1738 }
1739
1740 #define IXGB_MAX_INTR 10
1741 /**
1742 * ixgb_intr - Interrupt Handler
1743 * @irq: interrupt number
1744 * @data: pointer to a network interface device structure
1745 **/
1746
1747 static irqreturn_t
1748 ixgb_intr(int irq, void *data)
1749 {
1750 struct net_device *netdev = data;
1751 struct ixgb_adapter *adapter = netdev_priv(netdev);
1752 struct ixgb_hw *hw = &adapter->hw;
1753 uint32_t icr = IXGB_READ_REG(hw, ICR);
1754 #ifndef CONFIG_IXGB_NAPI
1755 unsigned int i;
1756 #endif
1757
1758 if(unlikely(!icr))
1759 return IRQ_NONE; /* Not our interrupt */
1760
1761 if (unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)))
1762 if (!test_bit(__IXGB_DOWN, &adapter->flags))
1763 mod_timer(&adapter->watchdog_timer, jiffies);
1764
1765 #ifdef CONFIG_IXGB_NAPI
1766 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1767
1768 /* Disable interrupts and register for poll. The flush
1769 of the posted write is intentionally left out.
1770 */
1771
1772 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1773 __netif_rx_schedule(netdev, &adapter->napi);
1774 }
1775 #else
1776 /* yes, that is actually a & and it is meant to make sure that
1777 * every pass through this for loop checks both receive and
1778 * transmit queues for completed descriptors, intended to
1779 * avoid starvation issues and assist tx/rx fairness. */
1780 for(i = 0; i < IXGB_MAX_INTR; i++)
1781 if(!ixgb_clean_rx_irq(adapter) &
1782 !ixgb_clean_tx_irq(adapter))
1783 break;
1784 #endif
1785 return IRQ_HANDLED;
1786 }
1787
1788 #ifdef CONFIG_IXGB_NAPI
1789 /**
1790 * ixgb_clean - NAPI Rx polling callback
1791 * @adapter: board private structure
1792 **/
1793
1794 static int
1795 ixgb_clean(struct napi_struct *napi, int budget)
1796 {
1797 struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1798 struct net_device *netdev = adapter->netdev;
1799 int work_done = 0;
1800
1801 ixgb_clean_tx_irq(adapter);
1802 ixgb_clean_rx_irq(adapter, &work_done, budget);
1803
1804 /* If budget not fully consumed, exit the polling mode */
1805 if (work_done < budget) {
1806 netif_rx_complete(netdev, napi);
1807 ixgb_irq_enable(adapter);
1808 }
1809
1810 return work_done;
1811 }
1812 #endif
1813
1814 /**
1815 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1816 * @adapter: board private structure
1817 **/
1818
1819 static bool
1820 ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1821 {
1822 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1823 struct net_device *netdev = adapter->netdev;
1824 struct ixgb_tx_desc *tx_desc, *eop_desc;
1825 struct ixgb_buffer *buffer_info;
1826 unsigned int i, eop;
1827 bool cleaned = false;
1828
1829 i = tx_ring->next_to_clean;
1830 eop = tx_ring->buffer_info[i].next_to_watch;
1831 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1832
1833 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1834
1835 for (cleaned = false; !cleaned; ) {
1836 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1837 buffer_info = &tx_ring->buffer_info[i];
1838
1839 if (tx_desc->popts
1840 & (IXGB_TX_DESC_POPTS_TXSM |
1841 IXGB_TX_DESC_POPTS_IXSM))
1842 adapter->hw_csum_tx_good++;
1843
1844 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1845
1846 *(uint32_t *)&(tx_desc->status) = 0;
1847
1848 cleaned = (i == eop);
1849 if(++i == tx_ring->count) i = 0;
1850 }
1851
1852 eop = tx_ring->buffer_info[i].next_to_watch;
1853 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1854 }
1855
1856 tx_ring->next_to_clean = i;
1857
1858 if (unlikely(netif_queue_stopped(netdev))) {
1859 spin_lock(&adapter->tx_lock);
1860 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1861 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
1862 netif_wake_queue(netdev);
1863 spin_unlock(&adapter->tx_lock);
1864 }
1865
1866 if(adapter->detect_tx_hung) {
1867 /* detect a transmit hang in hardware, this serializes the
1868 * check with the clearing of time_stamp and movement of i */
1869 adapter->detect_tx_hung = false;
1870 if (tx_ring->buffer_info[eop].dma &&
1871 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1872 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1873 IXGB_STATUS_TXOFF)) {
1874 /* detected Tx unit hang */
1875 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1876 " TDH <%x>\n"
1877 " TDT <%x>\n"
1878 " next_to_use <%x>\n"
1879 " next_to_clean <%x>\n"
1880 "buffer_info[next_to_clean]\n"
1881 " time_stamp <%lx>\n"
1882 " next_to_watch <%x>\n"
1883 " jiffies <%lx>\n"
1884 " next_to_watch.status <%x>\n",
1885 IXGB_READ_REG(&adapter->hw, TDH),
1886 IXGB_READ_REG(&adapter->hw, TDT),
1887 tx_ring->next_to_use,
1888 tx_ring->next_to_clean,
1889 tx_ring->buffer_info[eop].time_stamp,
1890 eop,
1891 jiffies,
1892 eop_desc->status);
1893 netif_stop_queue(netdev);
1894 }
1895 }
1896
1897 return cleaned;
1898 }
1899
1900 /**
1901 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1902 * @adapter: board private structure
1903 * @rx_desc: receive descriptor
1904 * @sk_buff: socket buffer with received data
1905 **/
1906
1907 static void
1908 ixgb_rx_checksum(struct ixgb_adapter *adapter,
1909 struct ixgb_rx_desc *rx_desc,
1910 struct sk_buff *skb)
1911 {
1912 /* Ignore Checksum bit is set OR
1913 * TCP Checksum has not been calculated
1914 */
1915 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1916 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1917 skb->ip_summed = CHECKSUM_NONE;
1918 return;
1919 }
1920
1921 /* At this point we know the hardware did the TCP checksum */
1922 /* now look at the TCP checksum error bit */
1923 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1924 /* let the stack verify checksum errors */
1925 skb->ip_summed = CHECKSUM_NONE;
1926 adapter->hw_csum_rx_error++;
1927 } else {
1928 /* TCP checksum is good */
1929 skb->ip_summed = CHECKSUM_UNNECESSARY;
1930 adapter->hw_csum_rx_good++;
1931 }
1932 }
1933
1934 /**
1935 * ixgb_clean_rx_irq - Send received data up the network stack,
1936 * @adapter: board private structure
1937 **/
1938
1939 static bool
1940 #ifdef CONFIG_IXGB_NAPI
1941 ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1942 #else
1943 ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1944 #endif
1945 {
1946 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1947 struct net_device *netdev = adapter->netdev;
1948 struct pci_dev *pdev = adapter->pdev;
1949 struct ixgb_rx_desc *rx_desc, *next_rxd;
1950 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1951 uint32_t length;
1952 unsigned int i, j;
1953 bool cleaned = false;
1954
1955 i = rx_ring->next_to_clean;
1956 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1957 buffer_info = &rx_ring->buffer_info[i];
1958
1959 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
1960 struct sk_buff *skb, *next_skb;
1961 u8 status;
1962
1963 #ifdef CONFIG_IXGB_NAPI
1964 if(*work_done >= work_to_do)
1965 break;
1966
1967 (*work_done)++;
1968 #endif
1969 status = rx_desc->status;
1970 skb = buffer_info->skb;
1971 buffer_info->skb = NULL;
1972
1973 prefetch(skb->data);
1974
1975 if(++i == rx_ring->count) i = 0;
1976 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1977 prefetch(next_rxd);
1978
1979 if((j = i + 1) == rx_ring->count) j = 0;
1980 next2_buffer = &rx_ring->buffer_info[j];
1981 prefetch(next2_buffer);
1982
1983 next_buffer = &rx_ring->buffer_info[i];
1984 next_skb = next_buffer->skb;
1985 prefetch(next_skb);
1986
1987 cleaned = true;
1988
1989 pci_unmap_single(pdev,
1990 buffer_info->dma,
1991 buffer_info->length,
1992 PCI_DMA_FROMDEVICE);
1993
1994 length = le16_to_cpu(rx_desc->length);
1995
1996 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1997
1998 /* All receives must fit into a single buffer */
1999
2000 IXGB_DBG("Receive packet consumed multiple buffers "
2001 "length<%x>\n", length);
2002
2003 dev_kfree_skb_irq(skb);
2004 goto rxdesc_done;
2005 }
2006
2007 if (unlikely(rx_desc->errors
2008 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
2009 | IXGB_RX_DESC_ERRORS_P |
2010 IXGB_RX_DESC_ERRORS_RXE))) {
2011
2012 dev_kfree_skb_irq(skb);
2013 goto rxdesc_done;
2014 }
2015
2016 /* code added for copybreak, this should improve
2017 * performance for small packets with large amounts
2018 * of reassembly being done in the stack */
2019 #define IXGB_CB_LENGTH 256
2020 if (length < IXGB_CB_LENGTH) {
2021 struct sk_buff *new_skb =
2022 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
2023 if (new_skb) {
2024 skb_reserve(new_skb, NET_IP_ALIGN);
2025 skb_copy_to_linear_data_offset(new_skb,
2026 -NET_IP_ALIGN,
2027 (skb->data -
2028 NET_IP_ALIGN),
2029 (length +
2030 NET_IP_ALIGN));
2031 /* save the skb in buffer_info as good */
2032 buffer_info->skb = skb;
2033 skb = new_skb;
2034 }
2035 }
2036 /* end copybreak code */
2037
2038 /* Good Receive */
2039 skb_put(skb, length);
2040
2041 /* Receive Checksum Offload */
2042 ixgb_rx_checksum(adapter, rx_desc, skb);
2043
2044 skb->protocol = eth_type_trans(skb, netdev);
2045 #ifdef CONFIG_IXGB_NAPI
2046 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
2047 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2048 le16_to_cpu(rx_desc->special) &
2049 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2050 } else {
2051 netif_receive_skb(skb);
2052 }
2053 #else /* CONFIG_IXGB_NAPI */
2054 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
2055 vlan_hwaccel_rx(skb, adapter->vlgrp,
2056 le16_to_cpu(rx_desc->special) &
2057 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2058 } else {
2059 netif_rx(skb);
2060 }
2061 #endif /* CONFIG_IXGB_NAPI */
2062 netdev->last_rx = jiffies;
2063
2064 rxdesc_done:
2065 /* clean up descriptor, might be written over by hw */
2066 rx_desc->status = 0;
2067
2068 /* use prefetched values */
2069 rx_desc = next_rxd;
2070 buffer_info = next_buffer;
2071 }
2072
2073 rx_ring->next_to_clean = i;
2074
2075 ixgb_alloc_rx_buffers(adapter);
2076
2077 return cleaned;
2078 }
2079
2080 /**
2081 * ixgb_alloc_rx_buffers - Replace used receive buffers
2082 * @adapter: address of board private structure
2083 **/
2084
2085 static void
2086 ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2087 {
2088 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2089 struct net_device *netdev = adapter->netdev;
2090 struct pci_dev *pdev = adapter->pdev;
2091 struct ixgb_rx_desc *rx_desc;
2092 struct ixgb_buffer *buffer_info;
2093 struct sk_buff *skb;
2094 unsigned int i;
2095 int num_group_tail_writes;
2096 long cleancount;
2097
2098 i = rx_ring->next_to_use;
2099 buffer_info = &rx_ring->buffer_info[i];
2100 cleancount = IXGB_DESC_UNUSED(rx_ring);
2101
2102 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2103
2104 /* leave three descriptors unused */
2105 while(--cleancount > 2) {
2106 /* recycle! its good for you */
2107 skb = buffer_info->skb;
2108 if (skb) {
2109 skb_trim(skb, 0);
2110 goto map_skb;
2111 }
2112
2113 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2114 + NET_IP_ALIGN);
2115 if (unlikely(!skb)) {
2116 /* Better luck next round */
2117 adapter->alloc_rx_buff_failed++;
2118 break;
2119 }
2120
2121 /* Make buffer alignment 2 beyond a 16 byte boundary
2122 * this will result in a 16 byte aligned IP header after
2123 * the 14 byte MAC header is removed
2124 */
2125 skb_reserve(skb, NET_IP_ALIGN);
2126
2127 buffer_info->skb = skb;
2128 buffer_info->length = adapter->rx_buffer_len;
2129 map_skb:
2130 buffer_info->dma = pci_map_single(pdev,
2131 skb->data,
2132 adapter->rx_buffer_len,
2133 PCI_DMA_FROMDEVICE);
2134
2135 rx_desc = IXGB_RX_DESC(*rx_ring, i);
2136 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
2137 /* guarantee DD bit not set now before h/w gets descriptor
2138 * this is the rest of the workaround for h/w double
2139 * writeback. */
2140 rx_desc->status = 0;
2141
2142
2143 if(++i == rx_ring->count) i = 0;
2144 buffer_info = &rx_ring->buffer_info[i];
2145 }
2146
2147 if (likely(rx_ring->next_to_use != i)) {
2148 rx_ring->next_to_use = i;
2149 if (unlikely(i-- == 0))
2150 i = (rx_ring->count - 1);
2151
2152 /* Force memory writes to complete before letting h/w
2153 * know there are new descriptors to fetch. (Only
2154 * applicable for weak-ordered memory model archs, such
2155 * as IA-64). */
2156 wmb();
2157 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2158 }
2159 }
2160
2161 /**
2162 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2163 *
2164 * @param netdev network interface device structure
2165 * @param grp indicates to enable or disable tagging/stripping
2166 **/
2167 static void
2168 ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2169 {
2170 struct ixgb_adapter *adapter = netdev_priv(netdev);
2171 uint32_t ctrl, rctl;
2172
2173 ixgb_irq_disable(adapter);
2174 adapter->vlgrp = grp;
2175
2176 if(grp) {
2177 /* enable VLAN tag insert/strip */
2178 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2179 ctrl |= IXGB_CTRL0_VME;
2180 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2181
2182 /* enable VLAN receive filtering */
2183
2184 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2185 rctl |= IXGB_RCTL_VFE;
2186 rctl &= ~IXGB_RCTL_CFIEN;
2187 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2188 } else {
2189 /* disable VLAN tag insert/strip */
2190
2191 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2192 ctrl &= ~IXGB_CTRL0_VME;
2193 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2194
2195 /* disable VLAN filtering */
2196
2197 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2198 rctl &= ~IXGB_RCTL_VFE;
2199 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2200 }
2201
2202 /* don't enable interrupts unless we are UP */
2203 if (adapter->netdev->flags & IFF_UP)
2204 ixgb_irq_enable(adapter);
2205 }
2206
2207 static void
2208 ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2209 {
2210 struct ixgb_adapter *adapter = netdev_priv(netdev);
2211 uint32_t vfta, index;
2212
2213 /* add VID to filter table */
2214
2215 index = (vid >> 5) & 0x7F;
2216 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2217 vfta |= (1 << (vid & 0x1F));
2218 ixgb_write_vfta(&adapter->hw, index, vfta);
2219 }
2220
2221 static void
2222 ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2223 {
2224 struct ixgb_adapter *adapter = netdev_priv(netdev);
2225 uint32_t vfta, index;
2226
2227 ixgb_irq_disable(adapter);
2228
2229 vlan_group_set_device(adapter->vlgrp, vid, NULL);
2230
2231 /* don't enable interrupts unless we are UP */
2232 if (adapter->netdev->flags & IFF_UP)
2233 ixgb_irq_enable(adapter);
2234
2235 /* remove VID from filter table */
2236
2237 index = (vid >> 5) & 0x7F;
2238 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2239 vfta &= ~(1 << (vid & 0x1F));
2240 ixgb_write_vfta(&adapter->hw, index, vfta);
2241 }
2242
2243 static void
2244 ixgb_restore_vlan(struct ixgb_adapter *adapter)
2245 {
2246 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2247
2248 if(adapter->vlgrp) {
2249 uint16_t vid;
2250 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2251 if(!vlan_group_get_device(adapter->vlgrp, vid))
2252 continue;
2253 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2254 }
2255 }
2256 }
2257
2258 #ifdef CONFIG_NET_POLL_CONTROLLER
2259 /*
2260 * Polling 'interrupt' - used by things like netconsole to send skbs
2261 * without having to re-enable interrupts. It's not called while
2262 * the interrupt routine is executing.
2263 */
2264
2265 static void ixgb_netpoll(struct net_device *dev)
2266 {
2267 struct ixgb_adapter *adapter = netdev_priv(dev);
2268
2269 disable_irq(adapter->pdev->irq);
2270 ixgb_intr(adapter->pdev->irq, dev);
2271 enable_irq(adapter->pdev->irq);
2272 }
2273 #endif
2274
2275 /**
2276 * ixgb_io_error_detected() - called when PCI error is detected
2277 * @pdev pointer to pci device with error
2278 * @state pci channel state after error
2279 *
2280 * This callback is called by the PCI subsystem whenever
2281 * a PCI bus error is detected.
2282 */
2283 static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2284 enum pci_channel_state state)
2285 {
2286 struct net_device *netdev = pci_get_drvdata(pdev);
2287 struct ixgb_adapter *adapter = netdev_priv(netdev);
2288
2289 if(netif_running(netdev))
2290 ixgb_down(adapter, true);
2291
2292 pci_disable_device(pdev);
2293
2294 /* Request a slot reset. */
2295 return PCI_ERS_RESULT_NEED_RESET;
2296 }
2297
2298 /**
2299 * ixgb_io_slot_reset - called after the pci bus has been reset.
2300 * @pdev pointer to pci device with error
2301 *
2302 * This callback is called after the PCI buss has been reset.
2303 * Basically, this tries to restart the card from scratch.
2304 * This is a shortened version of the device probe/discovery code,
2305 * it resembles the first-half of the ixgb_probe() routine.
2306 */
2307 static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2308 {
2309 struct net_device *netdev = pci_get_drvdata(pdev);
2310 struct ixgb_adapter *adapter = netdev_priv(netdev);
2311
2312 if(pci_enable_device(pdev)) {
2313 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2314 return PCI_ERS_RESULT_DISCONNECT;
2315 }
2316
2317 /* Perform card reset only on one instance of the card */
2318 if (0 != PCI_FUNC (pdev->devfn))
2319 return PCI_ERS_RESULT_RECOVERED;
2320
2321 pci_set_master(pdev);
2322
2323 netif_carrier_off(netdev);
2324 netif_stop_queue(netdev);
2325 ixgb_reset(adapter);
2326
2327 /* Make sure the EEPROM is good */
2328 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2329 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2330 return PCI_ERS_RESULT_DISCONNECT;
2331 }
2332 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2333 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2334
2335 if(!is_valid_ether_addr(netdev->perm_addr)) {
2336 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2337 return PCI_ERS_RESULT_DISCONNECT;
2338 }
2339
2340 return PCI_ERS_RESULT_RECOVERED;
2341 }
2342
2343 /**
2344 * ixgb_io_resume - called when its OK to resume normal operations
2345 * @pdev pointer to pci device with error
2346 *
2347 * The error recovery driver tells us that its OK to resume
2348 * normal operation. Implementation resembles the second-half
2349 * of the ixgb_probe() routine.
2350 */
2351 static void ixgb_io_resume (struct pci_dev *pdev)
2352 {
2353 struct net_device *netdev = pci_get_drvdata(pdev);
2354 struct ixgb_adapter *adapter = netdev_priv(netdev);
2355
2356 pci_set_master(pdev);
2357
2358 if(netif_running(netdev)) {
2359 if(ixgb_up(adapter)) {
2360 printk ("ixgb: can't bring device back up after reset\n");
2361 return;
2362 }
2363 }
2364
2365 netif_device_attach(netdev);
2366 mod_timer(&adapter->watchdog_timer, jiffies);
2367 }
2368
2369 /* ixgb_main.c */
AMDTP streaming driver for the Linux FireWire stack (Juju)