Add Documentation/sysctl/ctl_unnumbered.txt
[firewire-audio.git] / arch / arm / plat-omap / devices.c
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1 /*
2 * linux/arch/arm/plat-omap/devices.c
4 * Common platform device setup/initialization for OMAP1 and OMAP2
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <asm/hardware.h>
18 #include <asm/io.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
22 #include <asm/arch/tc.h>
23 #include <asm/arch/board.h>
24 #include <asm/arch/mux.h>
25 #include <asm/arch/gpio.h>
26 #include <asm/arch/menelaus.h>
28 #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
30 #include "../plat-omap/dsp/dsp_common.h"
32 static struct dsp_platform_data dsp_pdata = {
33 .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
36 static struct resource omap_dsp_resources[] = {
38 .name = "dsp_mmu",
39 .start = -1,
40 .flags = IORESOURCE_IRQ,
44 static struct platform_device omap_dsp_device = {
45 .name = "dsp",
46 .id = -1,
47 .num_resources = ARRAY_SIZE(omap_dsp_resources),
48 .resource = omap_dsp_resources,
49 .dev = {
50 .platform_data = &dsp_pdata,
54 static inline void omap_init_dsp(void)
56 struct resource *res;
57 int irq;
59 if (cpu_is_omap15xx())
60 irq = INT_1510_DSP_MMU;
61 else if (cpu_is_omap16xx())
62 irq = INT_1610_DSP_MMU;
63 else if (cpu_is_omap24xx())
64 irq = INT_24XX_DSP_MMU;
66 res = platform_get_resource_byname(&omap_dsp_device,
67 IORESOURCE_IRQ, "dsp_mmu");
68 res->start = irq;
70 platform_device_register(&omap_dsp_device);
73 int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
75 static DEFINE_MUTEX(dsp_pdata_lock);
77 mutex_init(&kdev->lock);
79 mutex_lock(&dsp_pdata_lock);
80 list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
81 mutex_unlock(&dsp_pdata_lock);
83 return 0;
85 EXPORT_SYMBOL(dsp_kfunc_device_register);
87 #else
88 static inline void omap_init_dsp(void) { }
89 #endif /* CONFIG_OMAP_DSP */
91 /*-------------------------------------------------------------------------*/
92 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
94 #define OMAP1_I2C_BASE 0xfffb3800
95 #define OMAP2_I2C_BASE1 0x48070000
96 #define OMAP_I2C_SIZE 0x3f
97 #define OMAP1_I2C_INT INT_I2C
98 #define OMAP2_I2C_INT1 56
100 static struct resource i2c_resources1[] = {
102 .start = 0,
103 .end = 0,
104 .flags = IORESOURCE_MEM,
107 .start = 0,
108 .flags = IORESOURCE_IRQ,
112 /* DMA not used; works around erratum writing to non-empty i2c fifo */
114 static struct platform_device omap_i2c_device1 = {
115 .name = "i2c_omap",
116 .id = 1,
117 .num_resources = ARRAY_SIZE(i2c_resources1),
118 .resource = i2c_resources1,
121 /* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
122 static void omap_init_i2c(void)
124 if (cpu_is_omap24xx()) {
125 i2c_resources1[0].start = OMAP2_I2C_BASE1;
126 i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
127 i2c_resources1[1].start = OMAP2_I2C_INT1;
128 } else {
129 i2c_resources1[0].start = OMAP1_I2C_BASE;
130 i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
131 i2c_resources1[1].start = OMAP1_I2C_INT;
134 /* FIXME define and use a boot tag, in case of boards that
135 * either don't wire up I2C, or chips that mux it differently...
136 * it can include clocking and address info, maybe more.
138 if (cpu_is_omap24xx()) {
139 omap_cfg_reg(M19_24XX_I2C1_SCL);
140 omap_cfg_reg(L15_24XX_I2C1_SDA);
141 } else {
142 omap_cfg_reg(I2C_SCL);
143 omap_cfg_reg(I2C_SDA);
146 (void) platform_device_register(&omap_i2c_device1);
149 #else
150 static inline void omap_init_i2c(void) {}
151 #endif
153 /*-------------------------------------------------------------------------*/
154 #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
156 static void omap_init_kp(void)
158 if (machine_is_omap_h2() || machine_is_omap_h3()) {
159 omap_cfg_reg(F18_1610_KBC0);
160 omap_cfg_reg(D20_1610_KBC1);
161 omap_cfg_reg(D19_1610_KBC2);
162 omap_cfg_reg(E18_1610_KBC3);
163 omap_cfg_reg(C21_1610_KBC4);
165 omap_cfg_reg(G18_1610_KBR0);
166 omap_cfg_reg(F19_1610_KBR1);
167 omap_cfg_reg(H14_1610_KBR2);
168 omap_cfg_reg(E20_1610_KBR3);
169 omap_cfg_reg(E19_1610_KBR4);
170 omap_cfg_reg(N19_1610_KBR5);
171 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
172 omap_cfg_reg(E2_730_KBR0);
173 omap_cfg_reg(J7_730_KBR1);
174 omap_cfg_reg(E1_730_KBR2);
175 omap_cfg_reg(F3_730_KBR3);
176 omap_cfg_reg(D2_730_KBR4);
178 omap_cfg_reg(C2_730_KBC0);
179 omap_cfg_reg(D3_730_KBC1);
180 omap_cfg_reg(E4_730_KBC2);
181 omap_cfg_reg(F4_730_KBC3);
182 omap_cfg_reg(E3_730_KBC4);
183 } else if (machine_is_omap_h4()) {
184 omap_cfg_reg(T19_24XX_KBR0);
185 omap_cfg_reg(R19_24XX_KBR1);
186 omap_cfg_reg(V18_24XX_KBR2);
187 omap_cfg_reg(M21_24XX_KBR3);
188 omap_cfg_reg(E5__24XX_KBR4);
189 if (omap_has_menelaus()) {
190 omap_cfg_reg(B3__24XX_KBR5);
191 omap_cfg_reg(AA4_24XX_KBC2);
192 omap_cfg_reg(B13_24XX_KBC6);
193 } else {
194 omap_cfg_reg(M18_24XX_KBR5);
195 omap_cfg_reg(H19_24XX_KBC2);
196 omap_cfg_reg(N19_24XX_KBC6);
198 omap_cfg_reg(R20_24XX_KBC0);
199 omap_cfg_reg(M14_24XX_KBC1);
200 omap_cfg_reg(V17_24XX_KBC3);
201 omap_cfg_reg(P21_24XX_KBC4);
202 omap_cfg_reg(L14_24XX_KBC5);
205 #else
206 static inline void omap_init_kp(void) {}
207 #endif
209 /*-------------------------------------------------------------------------*/
211 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
213 #ifdef CONFIG_ARCH_OMAP24XX
214 #define OMAP_MMC1_BASE 0x4809c000
215 #define OMAP_MMC1_INT INT_24XX_MMC_IRQ
216 #else
217 #define OMAP_MMC1_BASE 0xfffb7800
218 #define OMAP_MMC1_INT INT_MMC
219 #endif
220 #define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
222 static struct omap_mmc_conf mmc1_conf;
224 static u64 mmc1_dmamask = 0xffffffff;
226 static struct resource mmc1_resources[] = {
228 .start = OMAP_MMC1_BASE,
229 .end = OMAP_MMC1_BASE + 0x7f,
230 .flags = IORESOURCE_MEM,
233 .start = OMAP_MMC1_INT,
234 .flags = IORESOURCE_IRQ,
238 static struct platform_device mmc_omap_device1 = {
239 .name = "mmci-omap",
240 .id = 1,
241 .dev = {
242 .dma_mask = &mmc1_dmamask,
243 .platform_data = &mmc1_conf,
245 .num_resources = ARRAY_SIZE(mmc1_resources),
246 .resource = mmc1_resources,
249 #ifdef CONFIG_ARCH_OMAP16XX
251 static struct omap_mmc_conf mmc2_conf;
253 static u64 mmc2_dmamask = 0xffffffff;
255 static struct resource mmc2_resources[] = {
257 .start = OMAP_MMC2_BASE,
258 .end = OMAP_MMC2_BASE + 0x7f,
259 .flags = IORESOURCE_MEM,
262 .start = INT_1610_MMC2,
263 .flags = IORESOURCE_IRQ,
267 static struct platform_device mmc_omap_device2 = {
268 .name = "mmci-omap",
269 .id = 2,
270 .dev = {
271 .dma_mask = &mmc2_dmamask,
272 .platform_data = &mmc2_conf,
274 .num_resources = ARRAY_SIZE(mmc2_resources),
275 .resource = mmc2_resources,
277 #endif
279 static void __init omap_init_mmc(void)
281 const struct omap_mmc_config *mmc_conf;
282 const struct omap_mmc_conf *mmc;
284 /* NOTE: assumes MMC was never (wrongly) enabled */
285 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
286 if (!mmc_conf)
287 return;
289 /* block 1 is always available and has just one pinout option */
290 mmc = &mmc_conf->mmc[0];
291 if (mmc->enabled) {
292 if (cpu_is_omap24xx()) {
293 omap_cfg_reg(H18_24XX_MMC_CMD);
294 omap_cfg_reg(H15_24XX_MMC_CLKI);
295 omap_cfg_reg(G19_24XX_MMC_CLKO);
296 omap_cfg_reg(F20_24XX_MMC_DAT0);
297 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
298 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
299 } else {
300 omap_cfg_reg(MMC_CMD);
301 omap_cfg_reg(MMC_CLK);
302 omap_cfg_reg(MMC_DAT0);
303 if (cpu_is_omap1710()) {
304 omap_cfg_reg(M15_1710_MMC_CLKI);
305 omap_cfg_reg(P19_1710_MMC_CMDDIR);
306 omap_cfg_reg(P20_1710_MMC_DATDIR0);
309 if (mmc->wire4) {
310 if (cpu_is_omap24xx()) {
311 omap_cfg_reg(H14_24XX_MMC_DAT1);
312 omap_cfg_reg(E19_24XX_MMC_DAT2);
313 omap_cfg_reg(D19_24XX_MMC_DAT3);
314 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
315 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
316 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
317 } else {
318 omap_cfg_reg(MMC_DAT1);
319 /* NOTE: DAT2 can be on W10 (here) or M15 */
320 if (!mmc->nomux)
321 omap_cfg_reg(MMC_DAT2);
322 omap_cfg_reg(MMC_DAT3);
325 mmc1_conf = *mmc;
326 (void) platform_device_register(&mmc_omap_device1);
329 #ifdef CONFIG_ARCH_OMAP16XX
330 /* block 2 is on newer chips, and has many pinout options */
331 mmc = &mmc_conf->mmc[1];
332 if (mmc->enabled) {
333 if (!mmc->nomux) {
334 omap_cfg_reg(Y8_1610_MMC2_CMD);
335 omap_cfg_reg(Y10_1610_MMC2_CLK);
336 omap_cfg_reg(R18_1610_MMC2_CLKIN);
337 omap_cfg_reg(W8_1610_MMC2_DAT0);
338 if (mmc->wire4) {
339 omap_cfg_reg(V8_1610_MMC2_DAT1);
340 omap_cfg_reg(W15_1610_MMC2_DAT2);
341 omap_cfg_reg(R10_1610_MMC2_DAT3);
344 /* These are needed for the level shifter */
345 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
346 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
347 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
350 /* Feedback clock must be set on OMAP-1710 MMC2 */
351 if (cpu_is_omap1710())
352 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
353 MOD_CONF_CTRL_1);
354 mmc2_conf = *mmc;
355 (void) platform_device_register(&mmc_omap_device2);
357 #endif
358 return;
360 #else
361 static inline void omap_init_mmc(void) {}
362 #endif
364 /*-------------------------------------------------------------------------*/
366 /* Numbering for the SPI-capable controllers when used for SPI:
367 * spi = 1
368 * uwire = 2
369 * mmc1..2 = 3..4
370 * mcbsp1..3 = 5..7
373 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
375 #define OMAP_UWIRE_BASE 0xfffb3000
377 static struct resource uwire_resources[] = {
379 .start = OMAP_UWIRE_BASE,
380 .end = OMAP_UWIRE_BASE + 0x20,
381 .flags = IORESOURCE_MEM,
385 static struct platform_device omap_uwire_device = {
386 .name = "omap_uwire",
387 .id = -1,
388 .num_resources = ARRAY_SIZE(uwire_resources),
389 .resource = uwire_resources,
392 static void omap_init_uwire(void)
394 /* FIXME define and use a boot tag; not all boards will be hooking
395 * up devices to the microwire controller, and multi-board configs
396 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
399 /* board-specific code must configure chipselects (only a few
400 * are normally used) and SCLK/SDI/SDO (each has two choices).
402 (void) platform_device_register(&omap_uwire_device);
404 #else
405 static inline void omap_init_uwire(void) {}
406 #endif
408 /*-------------------------------------------------------------------------*/
410 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
412 #ifdef CONFIG_ARCH_OMAP24XX
413 #define OMAP_WDT_BASE 0x48022000
414 #else
415 #define OMAP_WDT_BASE 0xfffeb000
416 #endif
418 static struct resource wdt_resources[] = {
420 .start = OMAP_WDT_BASE,
421 .end = OMAP_WDT_BASE + 0x4f,
422 .flags = IORESOURCE_MEM,
426 static struct platform_device omap_wdt_device = {
427 .name = "omap_wdt",
428 .id = -1,
429 .num_resources = ARRAY_SIZE(wdt_resources),
430 .resource = wdt_resources,
433 static void omap_init_wdt(void)
435 (void) platform_device_register(&omap_wdt_device);
437 #else
438 static inline void omap_init_wdt(void) {}
439 #endif
441 /*-------------------------------------------------------------------------*/
443 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
445 #ifdef CONFIG_ARCH_OMAP24XX
446 #define OMAP_RNG_BASE 0x480A0000
447 #else
448 #define OMAP_RNG_BASE 0xfffe5000
449 #endif
451 static struct resource rng_resources[] = {
453 .start = OMAP_RNG_BASE,
454 .end = OMAP_RNG_BASE + 0x4f,
455 .flags = IORESOURCE_MEM,
459 static struct platform_device omap_rng_device = {
460 .name = "omap_rng",
461 .id = -1,
462 .num_resources = ARRAY_SIZE(rng_resources),
463 .resource = rng_resources,
466 static void omap_init_rng(void)
468 (void) platform_device_register(&omap_rng_device);
470 #else
471 static inline void omap_init_rng(void) {}
472 #endif
475 * This gets called after board-specific INIT_MACHINE, and initializes most
476 * on-chip peripherals accessible on this board (except for few like USB):
478 * (a) Does any "standard config" pin muxing needed. Board-specific
479 * code will have muxed GPIO pins and done "nonstandard" setup;
480 * that code could live in the boot loader.
481 * (b) Populating board-specific platform_data with the data drivers
482 * rely on to handle wiring variations.
483 * (c) Creating platform devices as meaningful on this board and
484 * with this kernel configuration.
486 * Claiming GPIOs, and setting their direction and initial values, is the
487 * responsibility of the device drivers. So is responding to probe().
489 * Board-specific knowlege like creating devices or pin setup is to be
490 * kept out of drivers as much as possible. In particular, pin setup
491 * may be handled by the boot loader, and drivers should expect it will
492 * normally have been done by the time they're probed.
494 static int __init omap_init_devices(void)
497 * Need to enable relevant once for 2430 SDP
499 #ifndef CONFIG_MACH_OMAP_2430SDP
500 /* please keep these calls, and their implementations above,
501 * in alphabetical order so they're easier to sort through.
503 omap_init_dsp();
504 omap_init_i2c();
505 omap_init_kp();
506 omap_init_mmc();
507 omap_init_uwire();
508 omap_init_wdt();
509 omap_init_rng();
510 #endif
511 return 0;
513 arch_initcall(omap_init_devices);