include/asm-powerpc/pgtable.h

   1 #ifndef _ASM_POWERPC_PGTABLE_H
   2 #define _ASM_POWERPC_PGTABLE_H
   3 #ifdef __KERNEL__
   4
   5 #ifndef CONFIG_PPC64
   6 #include <asm-ppc/pgtable.h>
   7 #else
   8
   9 /*
  10  * This file contains the functions and defines necessary to modify and use
  11  * the ppc64 hashed page table.
  12  */
  13
  14 #ifndef __ASSEMBLY__
  15 #include <linux/stddef.h>
  16 #include <asm/processor.h>              /* For TASK_SIZE */
  17 #include <asm/mmu.h>
  18 #include <asm/page.h>
  19 #include <asm/tlbflush.h>
  20 struct mm_struct;
  21 #endif /* __ASSEMBLY__ */
  22
  23 #ifdef CONFIG_PPC_64K_PAGES
  24 #include <asm/pgtable-64k.h>
  25 #else
  26 #include <asm/pgtable-4k.h>
  27 #endif
  28
  29 #define FIRST_USER_ADDRESS      0
  30
  31 /*
  32  * Size of EA range mapped by our pagetables.
  33  */
  34 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
  35                             PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
  36 #define PGTABLE_RANGE (1UL << PGTABLE_EADDR_SIZE)
  37
  38 #if TASK_SIZE_USER64 > PGTABLE_RANGE
  39 #error TASK_SIZE_USER64 exceeds pagetable range
  40 #endif
  41
  42 #if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
  43 #error TASK_SIZE_USER64 exceeds user VSID range
  44 #endif
  45
  46 /*
  47  * Define the address range of the vmalloc VM area.
  48  */
  49 #define VMALLOC_START ASM_CONST(0xD000000000000000)
  50 #define VMALLOC_SIZE  ASM_CONST(0x80000000000)
  51 #define VMALLOC_END   (VMALLOC_START + VMALLOC_SIZE)
  52
  53 /*
  54  * Define the address range of the imalloc VM area.
  55  */
  56 #define PHBS_IO_BASE    VMALLOC_END
  57 #define IMALLOC_BASE    (PHBS_IO_BASE + 0x80000000ul)   /* Reserve 2 gigs for PHBs */
  58 #define IMALLOC_END     (VMALLOC_START + PGTABLE_RANGE)
  59
  60 /*
  61  * Region IDs
  62  */
  63 #define REGION_SHIFT            60UL
  64 #define REGION_MASK             (0xfUL << REGION_SHIFT)
  65 #define REGION_ID(ea)           (((unsigned long)(ea)) >> REGION_SHIFT)
  66
  67 #define VMALLOC_REGION_ID       (REGION_ID(VMALLOC_START))
  68 #define KERNEL_REGION_ID        (REGION_ID(PAGE_OFFSET))
  69 #define USER_REGION_ID          (0UL)
  70
  71 /*
  72  * Common bits in a linux-style PTE.  These match the bits in the
  73  * (hardware-defined) PowerPC PTE as closely as possible. Additional
  74  * bits may be defined in pgtable-*.h
  75  */
  76 #define _PAGE_PRESENT   0x0001 /* software: pte contains a translation */
  77 #define _PAGE_USER      0x0002 /* matches one of the PP bits */
  78 #define _PAGE_FILE      0x0002 /* (!present only) software: pte holds file offset */
  79 #define _PAGE_EXEC      0x0004 /* No execute on POWER4 and newer (we invert) */
  80 #define _PAGE_GUARDED   0x0008
  81 #define _PAGE_COHERENT  0x0010 /* M: enforce memory coherence (SMP systems) */
  82 #define _PAGE_NO_CACHE  0x0020 /* I: cache inhibit */
  83 #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
  84 #define _PAGE_DIRTY     0x0080 /* C: page changed */
  85 #define _PAGE_ACCESSED  0x0100 /* R: page referenced */
  86 #define _PAGE_RW        0x0200 /* software: user write access allowed */
  87 #define _PAGE_HASHPTE   0x0400 /* software: pte has an associated HPTE */
  88 #define _PAGE_BUSY      0x0800 /* software: PTE & hash are busy */
  89
  90 #define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
  91
  92 #define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY)
  93
  94 /* __pgprot defined in asm-powerpc/page.h */
  95 #define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
  96
  97 #define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
  98 #define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
  99 #define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
 100 #define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
 101 #define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
 102 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
 103 #define PAGE_KERNEL     __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
 104 #define PAGE_KERNEL_CI  __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
 105                                _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
 106 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
 107
 108 #define PAGE_AGP        __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
 109 #define HAVE_PAGE_AGP
 110
 111 /* PTEIDX nibble */
 112 #define _PTEIDX_SECONDARY       0x8
 113 #define _PTEIDX_GROUP_IX        0x7
 114
 115
 116 /*
 117  * POWER4 and newer have per page execute protection, older chips can only
 118  * do this on a segment (256MB) basis.
 119  *
 120  * Also, write permissions imply read permissions.
 121  * This is the closest we can get..
 122  *
 123  * Note due to the way vm flags are laid out, the bits are XWR
 124  */
 125 #define __P000  PAGE_NONE
 126 #define __P001  PAGE_READONLY
 127 #define __P010  PAGE_COPY
 128 #define __P011  PAGE_COPY
 129 #define __P100  PAGE_READONLY_X
 130 #define __P101  PAGE_READONLY_X
 131 #define __P110  PAGE_COPY_X
 132 #define __P111  PAGE_COPY_X
 133
 134 #define __S000  PAGE_NONE
 135 #define __S001  PAGE_READONLY
 136 #define __S010  PAGE_SHARED
 137 #define __S011  PAGE_SHARED
 138 #define __S100  PAGE_READONLY_X
 139 #define __S101  PAGE_READONLY_X
 140 #define __S110  PAGE_SHARED_X
 141 #define __S111  PAGE_SHARED_X
 142
 143 #ifndef __ASSEMBLY__
 144
 145 /*
 146  * ZERO_PAGE is a global shared page that is always zero: used
 147  * for zero-mapped memory areas etc..
 148  */
 149 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
 150 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
 151 #endif /* __ASSEMBLY__ */
 152
 153 #ifdef CONFIG_HUGETLB_PAGE
 154
 155 #define HAVE_ARCH_UNMAPPED_AREA
 156 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 157
 158 #endif
 159
 160 #ifndef __ASSEMBLY__
 161
 162 /*
 163  * Conversion functions: convert a page and protection to a page entry,
 164  * and a page entry and page directory to the page they refer to.
 165  *
 166  * mk_pte takes a (struct page *) as input
 167  */
 168 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 169
 170 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
 171 {
 172         pte_t pte;
 173
 174
 175         pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
 176         return pte;
 177 }
 178
 179 #define pte_modify(_pte, newprot) \
 180   (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
 181
 182 #define pte_none(pte)           ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
 183 #define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
 184
 185 /* pte_clear moved to later in this file */
 186
 187 #define pte_pfn(x)              ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
 188 #define pte_page(x)             pfn_to_page(pte_pfn(x))
 189
 190 #define PMD_BAD_BITS            (PTE_TABLE_SIZE-1)
 191 #define PUD_BAD_BITS            (PMD_TABLE_SIZE-1)
 192
 193 #define pmd_set(pmdp, pmdval)   (pmd_val(*(pmdp)) = (pmdval))
 194 #define pmd_none(pmd)           (!pmd_val(pmd))
 195 #define pmd_bad(pmd)            (!is_kernel_addr(pmd_val(pmd)) \
 196                                  || (pmd_val(pmd) & PMD_BAD_BITS))
 197 #define pmd_present(pmd)        (pmd_val(pmd) != 0)
 198 #define pmd_clear(pmdp)         (pmd_val(*(pmdp)) = 0)
 199 #define pmd_page_kernel(pmd)    (pmd_val(pmd) & ~PMD_MASKED_BITS)
 200 #define pmd_page(pmd)           virt_to_page(pmd_page_kernel(pmd))
 201
 202 #define pud_set(pudp, pudval)   (pud_val(*(pudp)) = (pudval))
 203 #define pud_none(pud)           (!pud_val(pud))
 204 #define pud_bad(pud)            (!is_kernel_addr(pud_val(pud)) \
 205                                  || (pud_val(pud) & PUD_BAD_BITS))
 206 #define pud_present(pud)        (pud_val(pud) != 0)
 207 #define pud_clear(pudp)         (pud_val(*(pudp)) = 0)
 208 #define pud_page(pud)           (pud_val(pud) & ~PUD_MASKED_BITS)
 209
 210 #define pgd_set(pgdp, pudp)     ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
 211
 212 /*
 213  * Find an entry in a page-table-directory.  We combine the address region
 214  * (the high order N bits) and the pgd portion of the address.
 215  */
 216 /* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
 217 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
 218
 219 #define pgd_offset(mm, address)  ((mm)->pgd + pgd_index(address))
 220
 221 #define pmd_offset(pudp,addr) \
 222   (((pmd_t *) pud_page(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
 223
 224 #define pte_offset_kernel(dir,addr) \
 225   (((pte_t *) pmd_page_kernel(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
 226
 227 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 228 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
 229 #define pte_unmap(pte)                  do { } while(0)
 230 #define pte_unmap_nested(pte)           do { } while(0)
 231
 232 /* to find an entry in a kernel page-table-directory */
 233 /* This now only contains the vmalloc pages */
 234 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 235
 236 /*
 237  * The following only work if pte_present() is true.
 238  * Undefined behaviour if not..
 239  */
 240 static inline int pte_read(pte_t pte)  { return pte_val(pte) & _PAGE_USER;}
 241 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
 242 static inline int pte_exec(pte_t pte)  { return pte_val(pte) & _PAGE_EXEC;}
 243 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
 244 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
 245 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
 246
 247 static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
 248 static inline void pte_cache(pte_t pte)   { pte_val(pte) &= ~_PAGE_NO_CACHE; }
 249
 250 static inline pte_t pte_rdprotect(pte_t pte) {
 251         pte_val(pte) &= ~_PAGE_USER; return pte; }
 252 static inline pte_t pte_exprotect(pte_t pte) {
 253         pte_val(pte) &= ~_PAGE_EXEC; return pte; }
 254 static inline pte_t pte_wrprotect(pte_t pte) {
 255         pte_val(pte) &= ~(_PAGE_RW); return pte; }
 256 static inline pte_t pte_mkclean(pte_t pte) {
 257         pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
 258 static inline pte_t pte_mkold(pte_t pte) {
 259         pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
 260 static inline pte_t pte_mkread(pte_t pte) {
 261         pte_val(pte) |= _PAGE_USER; return pte; }
 262 static inline pte_t pte_mkexec(pte_t pte) {
 263         pte_val(pte) |= _PAGE_USER | _PAGE_EXEC; return pte; }
 264 static inline pte_t pte_mkwrite(pte_t pte) {
 265         pte_val(pte) |= _PAGE_RW; return pte; }
 266 static inline pte_t pte_mkdirty(pte_t pte) {
 267         pte_val(pte) |= _PAGE_DIRTY; return pte; }
 268 static inline pte_t pte_mkyoung(pte_t pte) {
 269         pte_val(pte) |= _PAGE_ACCESSED; return pte; }
 270 static inline pte_t pte_mkhuge(pte_t pte) {
 271         return pte; }
 272
 273 /* Atomic PTE updates */
 274 static inline unsigned long pte_update(pte_t *p, unsigned long clr)
 275 {
 276         unsigned long old, tmp;
 277
 278         __asm__ __volatile__(
 279         "1:     ldarx   %0,0,%3         # pte_update\n\
 280         andi.   %1,%0,%6\n\
 281         bne-    1b \n\
 282         andc    %1,%0,%4 \n\
 283         stdcx.  %1,0,%3 \n\
 284         bne-    1b"
 285         : "=&r" (old), "=&r" (tmp), "=m" (*p)
 286         : "r" (p), "r" (clr), "m" (*p), "i" (_PAGE_BUSY)
 287         : "cc" );
 288         return old;
 289 }
 290
 291 /* PTE updating functions, this function puts the PTE in the
 292  * batch, doesn't actually triggers the hash flush immediately,
 293  * you need to call flush_tlb_pending() to do that.
 294  * Pass -1 for "normal" size (4K or 64K)
 295  */
 296 extern void hpte_update(struct mm_struct *mm, unsigned long addr,
 297                         pte_t *ptep, unsigned long pte, int huge);
 298
 299 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 300                                               unsigned long addr, pte_t *ptep)
 301 {
 302         unsigned long old;
 303
 304         if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
 305                 return 0;
 306         old = pte_update(ptep, _PAGE_ACCESSED);
 307         if (old & _PAGE_HASHPTE) {
 308                 hpte_update(mm, addr, ptep, old, 0);
 309                 flush_tlb_pending();
 310         }
 311         return (old & _PAGE_ACCESSED) != 0;
 312 }
 313 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 314 #define ptep_test_and_clear_young(__vma, __addr, __ptep)                   \
 315 ({                                                                         \
 316         int __r;                                                           \
 317         __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
 318         __r;                                                               \
 319 })
 320
 321 /*
 322  * On RW/DIRTY bit transitions we can avoid flushing the hpte. For the
 323  * moment we always flush but we need to fix hpte_update and test if the
 324  * optimisation is worth it.
 325  */
 326 static inline int __ptep_test_and_clear_dirty(struct mm_struct *mm,
 327                                               unsigned long addr, pte_t *ptep)
 328 {
 329         unsigned long old;
 330
 331         if ((pte_val(*ptep) & _PAGE_DIRTY) == 0)
 332                 return 0;
 333         old = pte_update(ptep, _PAGE_DIRTY);
 334         if (old & _PAGE_HASHPTE)
 335                 hpte_update(mm, addr, ptep, old, 0);
 336         return (old & _PAGE_DIRTY) != 0;
 337 }
 338 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
 339 #define ptep_test_and_clear_dirty(__vma, __addr, __ptep)                   \
 340 ({                                                                         \
 341         int __r;                                                           \
 342         __r = __ptep_test_and_clear_dirty((__vma)->vm_mm, __addr, __ptep); \
 343         __r;                                                               \
 344 })
 345
 346 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 347 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
 348                                       pte_t *ptep)
 349 {
 350         unsigned long old;
 351
 352         if ((pte_val(*ptep) & _PAGE_RW) == 0)
 353                 return;
 354         old = pte_update(ptep, _PAGE_RW);
 355         if (old & _PAGE_HASHPTE)
 356                 hpte_update(mm, addr, ptep, old, 0);
 357 }
 358
 359 /*
 360  * We currently remove entries from the hashtable regardless of whether
 361  * the entry was young or dirty. The generic routines only flush if the
 362  * entry was young or dirty which is not good enough.
 363  *
 364  * We should be more intelligent about this but for the moment we override
 365  * these functions and force a tlb flush unconditionally
 366  */
 367 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 368 #define ptep_clear_flush_young(__vma, __address, __ptep)                \
 369 ({                                                                      \
 370         int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
 371                                                   __ptep);              \
 372         __young;                                                        \
 373 })
 374
 375 #define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
 376 #define ptep_clear_flush_dirty(__vma, __address, __ptep)                \
 377 ({                                                                      \
 378         int __dirty = __ptep_test_and_clear_dirty((__vma)->vm_mm, __address, \
 379                                                   __ptep);              \
 380         flush_tlb_page(__vma, __address);                               \
 381         __dirty;                                                        \
 382 })
 383
 384 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 385 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 386                                        unsigned long addr, pte_t *ptep)
 387 {
 388         unsigned long old = pte_update(ptep, ~0UL);
 389
 390         if (old & _PAGE_HASHPTE)
 391                 hpte_update(mm, addr, ptep, old, 0);
 392         return __pte(old);
 393 }
 394
 395 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 396                              pte_t * ptep)
 397 {
 398         unsigned long old = pte_update(ptep, ~0UL);
 399
 400         if (old & _PAGE_HASHPTE)
 401                 hpte_update(mm, addr, ptep, old, 0);
 402 }
 403
 404 /*
 405  * set_pte stores a linux PTE into the linux page table.
 406  */
 407 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 408                               pte_t *ptep, pte_t pte)
 409 {
 410         if (pte_present(*ptep)) {
 411                 pte_clear(mm, addr, ptep);
 412                 flush_tlb_pending();
 413         }
 414         pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
 415         *ptep = pte;
 416 }
 417
 418 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
 419  * function doesn't need to flush the hash entry
 420  */
 421 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 422 static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
 423 {
 424         unsigned long bits = pte_val(entry) &
 425                 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
 426         unsigned long old, tmp;
 427
 428         __asm__ __volatile__(
 429         "1:     ldarx   %0,0,%4\n\
 430                 andi.   %1,%0,%6\n\
 431                 bne-    1b \n\
 432                 or      %0,%3,%0\n\
 433                 stdcx.  %0,0,%4\n\
 434                 bne-    1b"
 435         :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
 436         :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
 437         :"cc");
 438 }
 439 #define  ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
 440         do {                                                               \
 441                 __ptep_set_access_flags(__ptep, __entry, __dirty);         \
 442                 flush_tlb_page_nohash(__vma, __address);                   \
 443         } while(0)
 444
 445 /*
 446  * Macro to mark a page protection value as "uncacheable".
 447  */
 448 #define pgprot_noncached(prot)  (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
 449
 450 struct file;
 451 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 452                                      unsigned long size, pgprot_t vma_prot);
 453 #define __HAVE_PHYS_MEM_ACCESS_PROT
 454
 455 #define __HAVE_ARCH_PTE_SAME
 456 #define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
 457
 458 #define pte_ERROR(e) \
 459         printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
 460 #define pmd_ERROR(e) \
 461         printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
 462 #define pgd_ERROR(e) \
 463         printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
 464
 465 extern pgd_t swapper_pg_dir[];
 466
 467 extern void paging_init(void);
 468
 469 /*
 470  * This gets called at the end of handling a page fault, when
 471  * the kernel has put a new PTE into the page table for the process.
 472  * We use it to put a corresponding HPTE into the hash table
 473  * ahead of time, instead of waiting for the inevitable extra
 474  * hash-table miss exception.
 475  */
 476 struct vm_area_struct;
 477 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
 478
 479 /* Encode and de-code a swap entry */
 480 #define __swp_type(entry)       (((entry).val >> 1) & 0x3f)
 481 #define __swp_offset(entry)     ((entry).val >> 8)
 482 #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
 483 #define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
 484 #define __swp_entry_to_pte(x)   ((pte_t) { (x).val << PTE_RPN_SHIFT })
 485 #define pte_to_pgoff(pte)       (pte_val(pte) >> PTE_RPN_SHIFT)
 486 #define pgoff_to_pte(off)       ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
 487 #define PTE_FILE_MAX_BITS       (BITS_PER_LONG - PTE_RPN_SHIFT)
 488
 489 /*
 490  * kern_addr_valid is intended to indicate whether an address is a valid
 491  * kernel address.  Most 32-bit archs define it as always true (like this)
 492  * but most 64-bit archs actually perform a test.  What should we do here?
 493  * The only use is in fs/ncpfs/dir.c
 494  */
 495 #define kern_addr_valid(addr)   (1)
 496
 497 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
 498                 remap_pfn_range(vma, vaddr, pfn, size, prot)
 499
 500 void pgtable_cache_init(void);
 501
 502 /*
 503  * find_linux_pte returns the address of a linux pte for a given
 504  * effective address and directory.  If not found, it returns zero.
 505  */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
 506 {
 507         pgd_t *pg;
 508         pud_t *pu;
 509         pmd_t *pm;
 510         pte_t *pt = NULL;
 511
 512         pg = pgdir + pgd_index(ea);
 513         if (!pgd_none(*pg)) {
 514                 pu = pud_offset(pg, ea);
 515                 if (!pud_none(*pu)) {
 516                         pm = pmd_offset(pu, ea);
 517                         if (pmd_present(*pm))
 518                                 pt = pte_offset_kernel(pm, ea);
 519                 }
 520         }
 521         return pt;
 522 }
 523
 524 #include <asm-generic/pgtable.h>
 525
 526 #endif /* __ASSEMBLY__ */
 527
 528 #endif /* CONFIG_PPC64 */
 529 #endif /* __KERNEL__ */
 530 #endif /* _ASM_POWERPC_PGTABLE_H */