drivers/scsi/aic7xxx/aic79xx_inline.h

   1 /*
   2  * Inline routines shareable across OS platforms.
   3  *
   4  * Copyright (c) 1994-2001 Justin T. Gibbs.
   5  * Copyright (c) 2000-2003 Adaptec Inc.
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions, and the following disclaimer,
  13  *    without modification.
  14  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  15  *    substantially similar to the "NO WARRANTY" disclaimer below
  16  *    ("Disclaimer") and any redistribution must be conditioned upon
  17  *    including a substantially similar Disclaimer requirement for further
  18  *    binary redistribution.
  19  * 3. Neither the names of the above-listed copyright holders nor the names
  20  *    of any contributors may be used to endorse or promote products derived
  21  *    from this software without specific prior written permission.
  22  *
  23  * Alternatively, this software may be distributed under the terms of the
  24  * GNU General Public License ("GPL") version 2 as published by the Free
  25  * Software Foundation.
  26  *
  27  * NO WARRANTY
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  37  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38  * POSSIBILITY OF SUCH DAMAGES.
  39  *
  40  * $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#59 $
  41  *
  42  * $FreeBSD$
  43  */
  44
  45 #ifndef _AIC79XX_INLINE_H_
  46 #define _AIC79XX_INLINE_H_
  47
  48 /******************************** Debugging ***********************************/
  49 static __inline char *ahd_name(struct ahd_softc *ahd);
  50
  51 static __inline char *
  52 ahd_name(struct ahd_softc *ahd)
  53 {
  54         return (ahd->name);
  55 }
  56
  57 /************************ Sequencer Execution Control *************************/
  58 static __inline void ahd_known_modes(struct ahd_softc *ahd,
  59                                      ahd_mode src, ahd_mode dst);
  60 static __inline ahd_mode_state ahd_build_mode_state(struct ahd_softc *ahd,
  61                                                     ahd_mode src,
  62                                                     ahd_mode dst);
  63 static __inline void ahd_extract_mode_state(struct ahd_softc *ahd,
  64                                             ahd_mode_state state,
  65                                             ahd_mode *src, ahd_mode *dst);
  66 static __inline void ahd_set_modes(struct ahd_softc *ahd, ahd_mode src,
  67                                    ahd_mode dst);
  68 static __inline void ahd_update_modes(struct ahd_softc *ahd);
  69 static __inline void ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
  70                                       ahd_mode dstmode, const char *file,
  71                                       int line);
  72 static __inline ahd_mode_state ahd_save_modes(struct ahd_softc *ahd);
  73 static __inline void ahd_restore_modes(struct ahd_softc *ahd,
  74                                        ahd_mode_state state);
  75 static __inline int  ahd_is_paused(struct ahd_softc *ahd);
  76 static __inline void ahd_pause(struct ahd_softc *ahd);
  77 static __inline void ahd_unpause(struct ahd_softc *ahd);
  78
  79 static __inline void
  80 ahd_known_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
  81 {
  82         ahd->src_mode = src;
  83         ahd->dst_mode = dst;
  84         ahd->saved_src_mode = src;
  85         ahd->saved_dst_mode = dst;
  86 }
  87
  88 static __inline ahd_mode_state
  89 ahd_build_mode_state(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
  90 {
  91         return ((src << SRC_MODE_SHIFT) | (dst << DST_MODE_SHIFT));
  92 }
  93
  94 static __inline void
  95 ahd_extract_mode_state(struct ahd_softc *ahd, ahd_mode_state state,
  96                        ahd_mode *src, ahd_mode *dst)
  97 {
  98         *src = (state & SRC_MODE) >> SRC_MODE_SHIFT;
  99         *dst = (state & DST_MODE) >> DST_MODE_SHIFT;
 100 }
 101
 102 static __inline void
 103 ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
 104 {
 105         if (ahd->src_mode == src && ahd->dst_mode == dst)
 106                 return;
 107 #ifdef AHD_DEBUG
 108         if (ahd->src_mode == AHD_MODE_UNKNOWN
 109          || ahd->dst_mode == AHD_MODE_UNKNOWN)
 110                 panic("Setting mode prior to saving it.\n");
 111         if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
 112                 printf("%s: Setting mode 0x%x\n", ahd_name(ahd),
 113                        ahd_build_mode_state(ahd, src, dst));
 114 #endif
 115         ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst));
 116         ahd->src_mode = src;
 117         ahd->dst_mode = dst;
 118 }
 119
 120 static __inline void
 121 ahd_update_modes(struct ahd_softc *ahd)
 122 {
 123         ahd_mode_state mode_ptr;
 124         ahd_mode src;
 125         ahd_mode dst;
 126
 127         mode_ptr = ahd_inb(ahd, MODE_PTR);
 128 #ifdef AHD_DEBUG
 129         if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
 130                 printf("Reading mode 0x%x\n", mode_ptr);
 131 #endif
 132         ahd_extract_mode_state(ahd, mode_ptr, &src, &dst);
 133         ahd_known_modes(ahd, src, dst);
 134 }
 135
 136 static __inline void
 137 ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
 138                  ahd_mode dstmode, const char *file, int line)
 139 {
 140 #ifdef AHD_DEBUG
 141         if ((srcmode & AHD_MK_MSK(ahd->src_mode)) == 0
 142          || (dstmode & AHD_MK_MSK(ahd->dst_mode)) == 0) {
 143                 panic("%s:%s:%d: Mode assertion failed.\n",
 144                        ahd_name(ahd), file, line);
 145         }
 146 #endif
 147 }
 148
 149 static __inline ahd_mode_state
 150 ahd_save_modes(struct ahd_softc *ahd)
 151 {
 152         if (ahd->src_mode == AHD_MODE_UNKNOWN
 153          || ahd->dst_mode == AHD_MODE_UNKNOWN)
 154                 ahd_update_modes(ahd);
 155
 156         return (ahd_build_mode_state(ahd, ahd->src_mode, ahd->dst_mode));
 157 }
 158
 159 static __inline void
 160 ahd_restore_modes(struct ahd_softc *ahd, ahd_mode_state state)
 161 {
 162         ahd_mode src;
 163         ahd_mode dst;
 164
 165         ahd_extract_mode_state(ahd, state, &src, &dst);
 166         ahd_set_modes(ahd, src, dst);
 167 }
 168
 169 #define AHD_ASSERT_MODES(ahd, source, dest) \
 170         ahd_assert_modes(ahd, source, dest, __FILE__, __LINE__);
 171
 172 /*
 173  * Determine whether the sequencer has halted code execution.
 174  * Returns non-zero status if the sequencer is stopped.
 175  */
 176 static __inline int
 177 ahd_is_paused(struct ahd_softc *ahd)
 178 {
 179         return ((ahd_inb(ahd, HCNTRL) & PAUSE) != 0);
 180 }
 181
 182 /*
 183  * Request that the sequencer stop and wait, indefinitely, for it
 184  * to stop.  The sequencer will only acknowledge that it is paused
 185  * once it has reached an instruction boundary and PAUSEDIS is
 186  * cleared in the SEQCTL register.  The sequencer may use PAUSEDIS
 187  * for critical sections.
 188  */
 189 static __inline void
 190 ahd_pause(struct ahd_softc *ahd)
 191 {
 192         ahd_outb(ahd, HCNTRL, ahd->pause);
 193
 194         /*
 195          * Since the sequencer can disable pausing in a critical section, we
 196          * must loop until it actually stops.
 197          */
 198         while (ahd_is_paused(ahd) == 0)
 199                 ;
 200 }
 201
 202 /*
 203  * Allow the sequencer to continue program execution.
 204  * We check here to ensure that no additional interrupt
 205  * sources that would cause the sequencer to halt have been
 206  * asserted.  If, for example, a SCSI bus reset is detected
 207  * while we are fielding a different, pausing, interrupt type,
 208  * we don't want to release the sequencer before going back
 209  * into our interrupt handler and dealing with this new
 210  * condition.
 211  */
 212 static __inline void
 213 ahd_unpause(struct ahd_softc *ahd)
 214 {
 215         /*
 216          * Automatically restore our modes to those saved
 217          * prior to the first change of the mode.
 218          */
 219         if (ahd->saved_src_mode != AHD_MODE_UNKNOWN
 220          && ahd->saved_dst_mode != AHD_MODE_UNKNOWN) {
 221                 if ((ahd->flags & AHD_UPDATE_PEND_CMDS) != 0)
 222                         ahd_reset_cmds_pending(ahd);
 223                 ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode);
 224         }
 225
 226         if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0)
 227                 ahd_outb(ahd, HCNTRL, ahd->unpause);
 228
 229         ahd_known_modes(ahd, AHD_MODE_UNKNOWN, AHD_MODE_UNKNOWN);
 230 }
 231
 232 /*********************** Scatter Gather List Handling *************************/
 233 static __inline void    *ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
 234                                       void *sgptr, dma_addr_t addr,
 235                                       bus_size_t len, int last);
 236 static __inline void     ahd_setup_scb_common(struct ahd_softc *ahd,
 237                                               struct scb *scb);
 238 static __inline void     ahd_setup_data_scb(struct ahd_softc *ahd,
 239                                             struct scb *scb);
 240 static __inline void     ahd_setup_noxfer_scb(struct ahd_softc *ahd,
 241                                               struct scb *scb);
 242
 243 static __inline void *
 244 ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
 245              void *sgptr, dma_addr_t addr, bus_size_t len, int last)
 246 {
 247         scb->sg_count++;
 248         if (sizeof(dma_addr_t) > 4
 249          && (ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
 250                 struct ahd_dma64_seg *sg;
 251
 252                 sg = (struct ahd_dma64_seg *)sgptr;
 253                 sg->addr = ahd_htole64(addr);
 254                 sg->len = ahd_htole32(len | (last ? AHD_DMA_LAST_SEG : 0));
 255                 return (sg + 1);
 256         } else {
 257                 struct ahd_dma_seg *sg;
 258
 259                 sg = (struct ahd_dma_seg *)sgptr;
 260                 sg->addr = ahd_htole32(addr & 0xFFFFFFFF);
 261                 sg->len = ahd_htole32(len | ((addr >> 8) & 0x7F000000)
 262                                     | (last ? AHD_DMA_LAST_SEG : 0));
 263                 return (sg + 1);
 264         }
 265 }
 266
 267 static __inline void
 268 ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb)
 269 {
 270         /* XXX Handle target mode SCBs. */
 271         scb->crc_retry_count = 0;
 272         if ((scb->flags & SCB_PACKETIZED) != 0) {
 273                 /* XXX what about ACA??  It is type 4, but TAG_TYPE == 0x3. */
 274                 scb->hscb->task_attribute = scb->hscb->control & SCB_TAG_TYPE;
 275         } else {
 276                 if (ahd_get_transfer_length(scb) & 0x01)
 277                         scb->hscb->task_attribute = SCB_XFERLEN_ODD;
 278                 else
 279                         scb->hscb->task_attribute = 0;
 280         }
 281
 282         if (scb->hscb->cdb_len <= MAX_CDB_LEN_WITH_SENSE_ADDR
 283          || (scb->hscb->cdb_len & SCB_CDB_LEN_PTR) != 0)
 284                 scb->hscb->shared_data.idata.cdb_plus_saddr.sense_addr =
 285                     ahd_htole32(scb->sense_busaddr);
 286 }
 287
 288 static __inline void
 289 ahd_setup_data_scb(struct ahd_softc *ahd, struct scb *scb)
 290 {
 291         /*
 292          * Copy the first SG into the "current" data ponter area.
 293          */
 294         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
 295                 struct ahd_dma64_seg *sg;
 296
 297                 sg = (struct ahd_dma64_seg *)scb->sg_list;
 298                 scb->hscb->dataptr = sg->addr;
 299                 scb->hscb->datacnt = sg->len;
 300         } else {
 301                 struct ahd_dma_seg *sg;
 302                 uint32_t *dataptr_words;
 303
 304                 sg = (struct ahd_dma_seg *)scb->sg_list;
 305                 dataptr_words = (uint32_t*)&scb->hscb->dataptr;
 306                 dataptr_words[0] = sg->addr;
 307                 dataptr_words[1] = 0;
 308                 if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) {
 309                         uint64_t high_addr;
 310
 311                         high_addr = ahd_le32toh(sg->len) & 0x7F000000;
 312                         scb->hscb->dataptr |= ahd_htole64(high_addr << 8);
 313                 }
 314                 scb->hscb->datacnt = sg->len;
 315         }
 316         /*
 317          * Note where to find the SG entries in bus space.
 318          * We also set the full residual flag which the
 319          * sequencer will clear as soon as a data transfer
 320          * occurs.
 321          */
 322         scb->hscb->sgptr = ahd_htole32(scb->sg_list_busaddr|SG_FULL_RESID);
 323 }
 324
 325 static __inline void
 326 ahd_setup_noxfer_scb(struct ahd_softc *ahd, struct scb *scb)
 327 {
 328         scb->hscb->sgptr = ahd_htole32(SG_LIST_NULL);
 329         scb->hscb->dataptr = 0;
 330         scb->hscb->datacnt = 0;
 331 }
 332
 333 /************************** Memory mapping routines ***************************/
 334 static __inline size_t  ahd_sg_size(struct ahd_softc *ahd);
 335 static __inline void *
 336                         ahd_sg_bus_to_virt(struct ahd_softc *ahd,
 337                                            struct scb *scb,
 338                                            uint32_t sg_busaddr);
 339 static __inline uint32_t
 340                         ahd_sg_virt_to_bus(struct ahd_softc *ahd,
 341                                            struct scb *scb,
 342                                            void *sg);
 343 static __inline void    ahd_sync_scb(struct ahd_softc *ahd,
 344                                      struct scb *scb, int op);
 345 static __inline void    ahd_sync_sglist(struct ahd_softc *ahd,
 346                                         struct scb *scb, int op);
 347 static __inline void    ahd_sync_sense(struct ahd_softc *ahd,
 348                                        struct scb *scb, int op);
 349 static __inline uint32_t
 350                         ahd_targetcmd_offset(struct ahd_softc *ahd,
 351                                              u_int index);
 352
 353 static __inline size_t
 354 ahd_sg_size(struct ahd_softc *ahd)
 355 {
 356         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0)
 357                 return (sizeof(struct ahd_dma64_seg));
 358         return (sizeof(struct ahd_dma_seg));
 359 }
 360
 361 static __inline void *
 362 ahd_sg_bus_to_virt(struct ahd_softc *ahd, struct scb *scb, uint32_t sg_busaddr)
 363 {
 364         dma_addr_t sg_offset;
 365
 366         /* sg_list_phys points to entry 1, not 0 */
 367         sg_offset = sg_busaddr - (scb->sg_list_busaddr - ahd_sg_size(ahd));
 368         return ((uint8_t *)scb->sg_list + sg_offset);
 369 }
 370
 371 static __inline uint32_t
 372 ahd_sg_virt_to_bus(struct ahd_softc *ahd, struct scb *scb, void *sg)
 373 {
 374         dma_addr_t sg_offset;
 375
 376         /* sg_list_phys points to entry 1, not 0 */
 377         sg_offset = ((uint8_t *)sg - (uint8_t *)scb->sg_list)
 378                   - ahd_sg_size(ahd);
 379
 380         return (scb->sg_list_busaddr + sg_offset);
 381 }
 382
 383 static __inline void
 384 ahd_sync_scb(struct ahd_softc *ahd, struct scb *scb, int op)
 385 {
 386         ahd_dmamap_sync(ahd, ahd->scb_data.hscb_dmat,
 387                         scb->hscb_map->dmamap,
 388                         /*offset*/(uint8_t*)scb->hscb - scb->hscb_map->vaddr,
 389                         /*len*/sizeof(*scb->hscb), op);
 390 }
 391
 392 static __inline void
 393 ahd_sync_sglist(struct ahd_softc *ahd, struct scb *scb, int op)
 394 {
 395         if (scb->sg_count == 0)
 396                 return;
 397
 398         ahd_dmamap_sync(ahd, ahd->scb_data.sg_dmat,
 399                         scb->sg_map->dmamap,
 400                         /*offset*/scb->sg_list_busaddr - ahd_sg_size(ahd),
 401                         /*len*/ahd_sg_size(ahd) * scb->sg_count, op);
 402 }
 403
 404 static __inline void
 405 ahd_sync_sense(struct ahd_softc *ahd, struct scb *scb, int op)
 406 {
 407         ahd_dmamap_sync(ahd, ahd->scb_data.sense_dmat,
 408                         scb->sense_map->dmamap,
 409                         /*offset*/scb->sense_busaddr,
 410                         /*len*/AHD_SENSE_BUFSIZE, op);
 411 }
 412
 413 static __inline uint32_t
 414 ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index)
 415 {
 416         return (((uint8_t *)&ahd->targetcmds[index])
 417                - (uint8_t *)ahd->qoutfifo);
 418 }
 419
 420 /*********************** Miscelaneous Support Functions ***********************/
 421 static __inline void    ahd_complete_scb(struct ahd_softc *ahd,
 422                                          struct scb *scb);
 423 static __inline void    ahd_update_residual(struct ahd_softc *ahd,
 424                                             struct scb *scb);
 425 static __inline struct ahd_initiator_tinfo *
 426                         ahd_fetch_transinfo(struct ahd_softc *ahd,
 427                                             char channel, u_int our_id,
 428                                             u_int remote_id,
 429                                             struct ahd_tmode_tstate **tstate);
 430 static __inline uint16_t
 431                         ahd_inw(struct ahd_softc *ahd, u_int port);
 432 static __inline void    ahd_outw(struct ahd_softc *ahd, u_int port,
 433                                  u_int value);
 434 static __inline uint32_t
 435                         ahd_inl(struct ahd_softc *ahd, u_int port);
 436 static __inline void    ahd_outl(struct ahd_softc *ahd, u_int port,
 437                                  uint32_t value);
 438 static __inline uint64_t
 439                         ahd_inq(struct ahd_softc *ahd, u_int port);
 440 static __inline void    ahd_outq(struct ahd_softc *ahd, u_int port,
 441                                  uint64_t value);
 442 static __inline u_int   ahd_get_scbptr(struct ahd_softc *ahd);
 443 static __inline void    ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr);
 444 static __inline u_int   ahd_get_hnscb_qoff(struct ahd_softc *ahd);
 445 static __inline void    ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value);
 446 static __inline u_int   ahd_get_hescb_qoff(struct ahd_softc *ahd);
 447 static __inline void    ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value);
 448 static __inline u_int   ahd_get_snscb_qoff(struct ahd_softc *ahd);
 449 static __inline void    ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value);
 450 static __inline u_int   ahd_get_sescb_qoff(struct ahd_softc *ahd);
 451 static __inline void    ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value);
 452 static __inline u_int   ahd_get_sdscb_qoff(struct ahd_softc *ahd);
 453 static __inline void    ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value);
 454 static __inline u_int   ahd_inb_scbram(struct ahd_softc *ahd, u_int offset);
 455 static __inline u_int   ahd_inw_scbram(struct ahd_softc *ahd, u_int offset);
 456 static __inline uint32_t
 457                         ahd_inl_scbram(struct ahd_softc *ahd, u_int offset);
 458 static __inline uint64_t
 459                         ahd_inq_scbram(struct ahd_softc *ahd, u_int offset);
 460 static __inline void    ahd_swap_with_next_hscb(struct ahd_softc *ahd,
 461                                                 struct scb *scb);
 462 static __inline void    ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb);
 463 static __inline uint8_t *
 464                         ahd_get_sense_buf(struct ahd_softc *ahd,
 465                                           struct scb *scb);
 466 static __inline uint32_t
 467                         ahd_get_sense_bufaddr(struct ahd_softc *ahd,
 468                                               struct scb *scb);
 469
 470 static __inline void
 471 ahd_complete_scb(struct ahd_softc *ahd, struct scb *scb)
 472 {
 473         uint32_t sgptr;
 474
 475         sgptr = ahd_le32toh(scb->hscb->sgptr);
 476         if ((sgptr & SG_STATUS_VALID) != 0)
 477                 ahd_handle_scb_status(ahd, scb);
 478         else
 479                 ahd_done(ahd, scb);
 480 }
 481
 482 /*
 483  * Determine whether the sequencer reported a residual
 484  * for this SCB/transaction.
 485  */
 486 static __inline void
 487 ahd_update_residual(struct ahd_softc *ahd, struct scb *scb)
 488 {
 489         uint32_t sgptr;
 490
 491         sgptr = ahd_le32toh(scb->hscb->sgptr);
 492         if ((sgptr & SG_STATUS_VALID) != 0)
 493                 ahd_calc_residual(ahd, scb);
 494 }
 495
 496 /*
 497  * Return pointers to the transfer negotiation information
 498  * for the specified our_id/remote_id pair.
 499  */
 500 static __inline struct ahd_initiator_tinfo *
 501 ahd_fetch_transinfo(struct ahd_softc *ahd, char channel, u_int our_id,
 502                     u_int remote_id, struct ahd_tmode_tstate **tstate)
 503 {
 504         /*
 505          * Transfer data structures are stored from the perspective
 506          * of the target role.  Since the parameters for a connection
 507          * in the initiator role to a given target are the same as
 508          * when the roles are reversed, we pretend we are the target.
 509          */
 510         if (channel == 'B')
 511                 our_id += 8;
 512         *tstate = ahd->enabled_targets[our_id];
 513         return (&(*tstate)->transinfo[remote_id]);
 514 }
 515
 516 #define AHD_COPY_COL_IDX(dst, src)                              \
 517 do {                                                            \
 518         dst->hscb->scsiid = src->hscb->scsiid;                  \
 519         dst->hscb->lun = src->hscb->lun;                        \
 520 } while (0)
 521
 522 static __inline uint16_t
 523 ahd_inw(struct ahd_softc *ahd, u_int port)
 524 {
 525         /*
 526          * Read high byte first as some registers increment
 527          * or have other side effects when the low byte is
 528          * read.
 529          */
 530         uint16_t r = ahd_inb(ahd, port+1) << 8;
 531         return r | ahd_inb(ahd, port);
 532 }
 533
 534 static __inline void
 535 ahd_outw(struct ahd_softc *ahd, u_int port, u_int value)
 536 {
 537         /*
 538          * Write low byte first to accomodate registers
 539          * such as PRGMCNT where the order maters.
 540          */
 541         ahd_outb(ahd, port, value & 0xFF);
 542         ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
 543 }
 544
 545 static __inline uint32_t
 546 ahd_inl(struct ahd_softc *ahd, u_int port)
 547 {
 548         return ((ahd_inb(ahd, port))
 549               | (ahd_inb(ahd, port+1) << 8)
 550               | (ahd_inb(ahd, port+2) << 16)
 551               | (ahd_inb(ahd, port+3) << 24));
 552 }
 553
 554 static __inline void
 555 ahd_outl(struct ahd_softc *ahd, u_int port, uint32_t value)
 556 {
 557         ahd_outb(ahd, port, (value) & 0xFF);
 558         ahd_outb(ahd, port+1, ((value) >> 8) & 0xFF);
 559         ahd_outb(ahd, port+2, ((value) >> 16) & 0xFF);
 560         ahd_outb(ahd, port+3, ((value) >> 24) & 0xFF);
 561 }
 562
 563 static __inline uint64_t
 564 ahd_inq(struct ahd_softc *ahd, u_int port)
 565 {
 566         return ((ahd_inb(ahd, port))
 567               | (ahd_inb(ahd, port+1) << 8)
 568               | (ahd_inb(ahd, port+2) << 16)
 569               | (ahd_inb(ahd, port+3) << 24)
 570               | (((uint64_t)ahd_inb(ahd, port+4)) << 32)
 571               | (((uint64_t)ahd_inb(ahd, port+5)) << 40)
 572               | (((uint64_t)ahd_inb(ahd, port+6)) << 48)
 573               | (((uint64_t)ahd_inb(ahd, port+7)) << 56));
 574 }
 575
 576 static __inline void
 577 ahd_outq(struct ahd_softc *ahd, u_int port, uint64_t value)
 578 {
 579         ahd_outb(ahd, port, value & 0xFF);
 580         ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
 581         ahd_outb(ahd, port+2, (value >> 16) & 0xFF);
 582         ahd_outb(ahd, port+3, (value >> 24) & 0xFF);
 583         ahd_outb(ahd, port+4, (value >> 32) & 0xFF);
 584         ahd_outb(ahd, port+5, (value >> 40) & 0xFF);
 585         ahd_outb(ahd, port+6, (value >> 48) & 0xFF);
 586         ahd_outb(ahd, port+7, (value >> 56) & 0xFF);
 587 }
 588
 589 static __inline u_int
 590 ahd_get_scbptr(struct ahd_softc *ahd)
 591 {
 592         AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
 593                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
 594         return (ahd_inb(ahd, SCBPTR) | (ahd_inb(ahd, SCBPTR + 1) << 8));
 595 }
 596
 597 static __inline void
 598 ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr)
 599 {
 600         AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
 601                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
 602         ahd_outb(ahd, SCBPTR, scbptr & 0xFF);
 603         ahd_outb(ahd, SCBPTR+1, (scbptr >> 8) & 0xFF);
 604 }
 605
 606 static __inline u_int
 607 ahd_get_hnscb_qoff(struct ahd_softc *ahd)
 608 {
 609         return (ahd_inw_atomic(ahd, HNSCB_QOFF));
 610 }
 611
 612 static __inline void
 613 ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value)
 614 {
 615         ahd_outw_atomic(ahd, HNSCB_QOFF, value);
 616 }
 617
 618 static __inline u_int
 619 ahd_get_hescb_qoff(struct ahd_softc *ahd)
 620 {
 621         return (ahd_inb(ahd, HESCB_QOFF));
 622 }
 623
 624 static __inline void
 625 ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value)
 626 {
 627         ahd_outb(ahd, HESCB_QOFF, value);
 628 }
 629
 630 static __inline u_int
 631 ahd_get_snscb_qoff(struct ahd_softc *ahd)
 632 {
 633         u_int oldvalue;
 634
 635         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 636         oldvalue = ahd_inw(ahd, SNSCB_QOFF);
 637         ahd_outw(ahd, SNSCB_QOFF, oldvalue);
 638         return (oldvalue);
 639 }
 640
 641 static __inline void
 642 ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value)
 643 {
 644         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 645         ahd_outw(ahd, SNSCB_QOFF, value);
 646 }
 647
 648 static __inline u_int
 649 ahd_get_sescb_qoff(struct ahd_softc *ahd)
 650 {
 651         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 652         return (ahd_inb(ahd, SESCB_QOFF));
 653 }
 654
 655 static __inline void
 656 ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value)
 657 {
 658         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 659         ahd_outb(ahd, SESCB_QOFF, value);
 660 }
 661
 662 static __inline u_int
 663 ahd_get_sdscb_qoff(struct ahd_softc *ahd)
 664 {
 665         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 666         return (ahd_inb(ahd, SDSCB_QOFF) | (ahd_inb(ahd, SDSCB_QOFF + 1) << 8));
 667 }
 668
 669 static __inline void
 670 ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value)
 671 {
 672         AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
 673         ahd_outb(ahd, SDSCB_QOFF, value & 0xFF);
 674         ahd_outb(ahd, SDSCB_QOFF+1, (value >> 8) & 0xFF);
 675 }
 676
 677 static __inline u_int
 678 ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)
 679 {
 680         u_int value;
 681
 682         /*
 683          * Workaround PCI-X Rev A. hardware bug.
 684          * After a host read of SCB memory, the chip
 685          * may become confused into thinking prefetch
 686          * was required.  This starts the discard timer
 687          * running and can cause an unexpected discard
 688          * timer interrupt.  The work around is to read
 689          * a normal register prior to the exhaustion of
 690          * the discard timer.  The mode pointer register
 691          * has no side effects and so serves well for
 692          * this purpose.
 693          *
 694          * Razor #528
 695          */
 696         value = ahd_inb(ahd, offset);
 697         if ((ahd->bugs & AHD_PCIX_SCBRAM_RD_BUG) != 0)
 698                 ahd_inb(ahd, MODE_PTR);
 699         return (value);
 700 }
 701
 702 static __inline u_int
 703 ahd_inw_scbram(struct ahd_softc *ahd, u_int offset)
 704 {
 705         return (ahd_inb_scbram(ahd, offset)
 706               | (ahd_inb_scbram(ahd, offset+1) << 8));
 707 }
 708
 709 static __inline uint32_t
 710 ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)
 711 {
 712         return (ahd_inw_scbram(ahd, offset)
 713               | (ahd_inw_scbram(ahd, offset+2) << 16));
 714 }
 715
 716 static __inline uint64_t
 717 ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)
 718 {
 719         return (ahd_inl_scbram(ahd, offset)
 720               | ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);
 721 }
 722
 723 static __inline struct scb *
 724 ahd_lookup_scb(struct ahd_softc *ahd, u_int tag)
 725 {
 726         struct scb* scb;
 727
 728         if (tag >= AHD_SCB_MAX)
 729                 return (NULL);
 730         scb = ahd->scb_data.scbindex[tag];
 731         if (scb != NULL)
 732                 ahd_sync_scb(ahd, scb,
 733                              BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
 734         return (scb);
 735 }
 736
 737 static __inline void
 738 ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
 739 {
 740         struct   hardware_scb *q_hscb;
 741         struct   map_node *q_hscb_map;
 742         uint32_t saved_hscb_busaddr;
 743
 744         /*
 745          * Our queuing method is a bit tricky.  The card
 746          * knows in advance which HSCB (by address) to download,
 747          * and we can't disappoint it.  To achieve this, the next
 748          * HSCB to download is saved off in ahd->next_queued_hscb.
 749          * When we are called to queue "an arbitrary scb",
 750          * we copy the contents of the incoming HSCB to the one
 751          * the sequencer knows about, swap HSCB pointers and
 752          * finally assign the SCB to the tag indexed location
 753          * in the scb_array.  This makes sure that we can still
 754          * locate the correct SCB by SCB_TAG.
 755          */
 756         q_hscb = ahd->next_queued_hscb;
 757         q_hscb_map = ahd->next_queued_hscb_map;
 758         saved_hscb_busaddr = q_hscb->hscb_busaddr;
 759         memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
 760         q_hscb->hscb_busaddr = saved_hscb_busaddr;
 761         q_hscb->next_hscb_busaddr = scb->hscb->hscb_busaddr;
 762
 763         /* Now swap HSCB pointers. */
 764         ahd->next_queued_hscb = scb->hscb;
 765         ahd->next_queued_hscb_map = scb->hscb_map;
 766         scb->hscb = q_hscb;
 767         scb->hscb_map = q_hscb_map;
 768
 769         /* Now define the mapping from tag to SCB in the scbindex */
 770         ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = scb;
 771 }
 772
 773 /*
 774  * Tell the sequencer about a new transaction to execute.
 775  */
 776 static __inline void
 777 ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb)
 778 {
 779         ahd_swap_with_next_hscb(ahd, scb);
 780
 781         if (SCBID_IS_NULL(SCB_GET_TAG(scb)))
 782                 panic("Attempt to queue invalid SCB tag %x\n",
 783                       SCB_GET_TAG(scb));
 784
 785         /*
 786          * Keep a history of SCBs we've downloaded in the qinfifo.
 787          */
 788         ahd->qinfifo[AHD_QIN_WRAP(ahd->qinfifonext)] = SCB_GET_TAG(scb);
 789         ahd->qinfifonext++;
 790
 791         if (scb->sg_count != 0)
 792                 ahd_setup_data_scb(ahd, scb);
 793         else
 794                 ahd_setup_noxfer_scb(ahd, scb);
 795         ahd_setup_scb_common(ahd, scb);
 796
 797         /*
 798          * Make sure our data is consistent from the
 799          * perspective of the adapter.
 800          */
 801         ahd_sync_scb(ahd, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 802
 803 #ifdef AHD_DEBUG
 804         if ((ahd_debug & AHD_SHOW_QUEUE) != 0) {
 805                 uint64_t host_dataptr;
 806
 807                 host_dataptr = ahd_le64toh(scb->hscb->dataptr);
 808                 printf("%s: Queueing SCB %d:0x%x bus addr 0x%x - 0x%x%x/0x%x\n",
 809                        ahd_name(ahd),
 810                        SCB_GET_TAG(scb), scb->hscb->scsiid,
 811                        ahd_le32toh(scb->hscb->hscb_busaddr),
 812                        (u_int)((host_dataptr >> 32) & 0xFFFFFFFF),
 813                        (u_int)(host_dataptr & 0xFFFFFFFF),
 814                        ahd_le32toh(scb->hscb->datacnt));
 815         }
 816 #endif
 817         /* Tell the adapter about the newly queued SCB */
 818         ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
 819 }
 820
 821 static __inline uint8_t *
 822 ahd_get_sense_buf(struct ahd_softc *ahd, struct scb *scb)
 823 {
 824         return (scb->sense_data);
 825 }
 826
 827 static __inline uint32_t
 828 ahd_get_sense_bufaddr(struct ahd_softc *ahd, struct scb *scb)
 829 {
 830         return (scb->sense_busaddr);
 831 }
 832
 833 /************************** Interrupt Processing ******************************/
 834 static __inline void    ahd_sync_qoutfifo(struct ahd_softc *ahd, int op);
 835 static __inline void    ahd_sync_tqinfifo(struct ahd_softc *ahd, int op);
 836 static __inline u_int   ahd_check_cmdcmpltqueues(struct ahd_softc *ahd);
 837 static __inline int     ahd_intr(struct ahd_softc *ahd);
 838
 839 static __inline void
 840 ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
 841 {
 842         ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
 843                         /*offset*/0,
 844                         /*len*/AHD_SCB_MAX * sizeof(struct ahd_completion), op);
 845 }
 846
 847 static __inline void
 848 ahd_sync_tqinfifo(struct ahd_softc *ahd, int op)
 849 {
 850 #ifdef AHD_TARGET_MODE
 851         if ((ahd->flags & AHD_TARGETROLE) != 0) {
 852                 ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
 853                                 ahd->shared_data_map.dmamap,
 854                                 ahd_targetcmd_offset(ahd, 0),
 855                                 sizeof(struct target_cmd) * AHD_TMODE_CMDS,
 856                                 op);
 857         }
 858 #endif
 859 }
 860
 861 /*
 862  * See if the firmware has posted any completed commands
 863  * into our in-core command complete fifos.
 864  */
 865 #define AHD_RUN_QOUTFIFO 0x1
 866 #define AHD_RUN_TQINFIFO 0x2
 867 static __inline u_int
 868 ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
 869 {
 870         u_int retval;
 871
 872         retval = 0;
 873         ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
 874                         /*offset*/ahd->qoutfifonext * sizeof(*ahd->qoutfifo),
 875                         /*len*/sizeof(*ahd->qoutfifo), BUS_DMASYNC_POSTREAD);
 876         if (ahd->qoutfifo[ahd->qoutfifonext].valid_tag
 877           == ahd->qoutfifonext_valid_tag)
 878                 retval |= AHD_RUN_QOUTFIFO;
 879 #ifdef AHD_TARGET_MODE
 880         if ((ahd->flags & AHD_TARGETROLE) != 0
 881          && (ahd->flags & AHD_TQINFIFO_BLOCKED) == 0) {
 882                 ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
 883                                 ahd->shared_data_map.dmamap,
 884                                 ahd_targetcmd_offset(ahd, ahd->tqinfifofnext),
 885                                 /*len*/sizeof(struct target_cmd),
 886                                 BUS_DMASYNC_POSTREAD);
 887                 if (ahd->targetcmds[ahd->tqinfifonext].cmd_valid != 0)
 888                         retval |= AHD_RUN_TQINFIFO;
 889         }
 890 #endif
 891         return (retval);
 892 }
 893
 894 /*
 895  * Catch an interrupt from the adapter
 896  */
 897 static __inline int
 898 ahd_intr(struct ahd_softc *ahd)
 899 {
 900         u_int   intstat;
 901
 902         if ((ahd->pause & INTEN) == 0) {
 903                 /*
 904                  * Our interrupt is not enabled on the chip
 905                  * and may be disabled for re-entrancy reasons,
 906                  * so just return.  This is likely just a shared
 907                  * interrupt.
 908                  */
 909                 return (0);
 910         }
 911
 912         /*
 913          * Instead of directly reading the interrupt status register,
 914          * infer the cause of the interrupt by checking our in-core
 915          * completion queues.  This avoids a costly PCI bus read in
 916          * most cases.
 917          */
 918         if ((ahd->flags & AHD_ALL_INTERRUPTS) == 0
 919          && (ahd_check_cmdcmpltqueues(ahd) != 0))
 920                 intstat = CMDCMPLT;
 921         else
 922                 intstat = ahd_inb(ahd, INTSTAT);
 923
 924         if ((intstat & INT_PEND) == 0)
 925                 return (0);
 926
 927         if (intstat & CMDCMPLT) {
 928                 ahd_outb(ahd, CLRINT, CLRCMDINT);
 929
 930                 /*
 931                  * Ensure that the chip sees that we've cleared
 932                  * this interrupt before we walk the output fifo.
 933                  * Otherwise, we may, due to posted bus writes,
 934                  * clear the interrupt after we finish the scan,
 935                  * and after the sequencer has added new entries
 936                  * and asserted the interrupt again.
 937                  */
 938                 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
 939                         if (ahd_is_paused(ahd)) {
 940                                 /*
 941                                  * Potentially lost SEQINT.
 942                                  * If SEQINTCODE is non-zero,
 943                                  * simulate the SEQINT.
 944                                  */
 945                                 if (ahd_inb(ahd, SEQINTCODE) != NO_SEQINT)
 946                                         intstat |= SEQINT;
 947                         }
 948                 } else {
 949                         ahd_flush_device_writes(ahd);
 950                 }
 951                 ahd_run_qoutfifo(ahd);
 952                 ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket]++;
 953                 ahd->cmdcmplt_total++;
 954 #ifdef AHD_TARGET_MODE
 955                 if ((ahd->flags & AHD_TARGETROLE) != 0)
 956                         ahd_run_tqinfifo(ahd, /*paused*/FALSE);
 957 #endif
 958         }
 959
 960         /*
 961          * Handle statuses that may invalidate our cached
 962          * copy of INTSTAT separately.
 963          */
 964         if (intstat == 0xFF && (ahd->features & AHD_REMOVABLE) != 0) {
 965                 /* Hot eject.  Do nothing */
 966         } else if (intstat & HWERRINT) {
 967                 ahd_handle_hwerrint(ahd);
 968         } else if ((intstat & (PCIINT|SPLTINT)) != 0) {
 969                 ahd->bus_intr(ahd);
 970         } else {
 971
 972                 if ((intstat & SEQINT) != 0)
 973                         ahd_handle_seqint(ahd, intstat);
 974
 975                 if ((intstat & SCSIINT) != 0)
 976                         ahd_handle_scsiint(ahd, intstat);
 977         }
 978         return (1);
 979 }
 980
 981 #endif  /* _AIC79XX_INLINE_H_ */