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[NETNS]: Register /proc/net/rt_cache for each namespace.
[firewire-audio.git] / arch / m68k / kernel / traps.c
blobfd4858e2dd638d456636dee4dcdc9b9134c34b3c
1 /*
2 * linux/arch/m68k/kernel/traps.c
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
15 */
16
17 /*
18 * Sets up all exception vectors
19 */
20
21 #include <linux/sched.h>
22 #include <linux/signal.h>
23 #include <linux/kernel.h>
24 #include <linux/mm.h>
25 #include <linux/module.h>
26 #include <linux/user.h>
27 #include <linux/string.h>
28 #include <linux/linkage.h>
29 #include <linux/init.h>
30 #include <linux/ptrace.h>
31 #include <linux/kallsyms.h>
32
33 #include <asm/setup.h>
34 #include <asm/fpu.h>
35 #include <asm/system.h>
36 #include <asm/uaccess.h>
37 #include <asm/traps.h>
38 #include <asm/pgalloc.h>
39 #include <asm/machdep.h>
40 #include <asm/siginfo.h>
41
42 /* assembler routines */
43 asmlinkage void system_call(void);
44 asmlinkage void buserr(void);
45 asmlinkage void trap(void);
46 asmlinkage void nmihandler(void);
47 #ifdef CONFIG_M68KFPU_EMU
48 asmlinkage void fpu_emu(void);
49 #endif
50
51 e_vector vectors[256] = {
52 [VEC_BUSERR] = buserr,
53 [VEC_SYS] = system_call,
54 };
55
56 /* nmi handler for the Amiga */
57 asm(".text\n"
58 __ALIGN_STR "\n"
59 "nmihandler: rte");
60
61 /*
62 * this must be called very early as the kernel might
63 * use some instruction that are emulated on the 060
64 */
65 void __init base_trap_init(void)
66 {
67 if(MACH_IS_SUN3X) {
68 extern e_vector *sun3x_prom_vbr;
69
70 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
71 }
72
73 /* setup the exception vector table */
74 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
75
76 if (CPU_IS_060) {
77 /* set up ISP entry points */
78 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
79
80 vectors[VEC_UNIMPII] = unimp_vec;
81 }
82 }
83
84 void __init trap_init (void)
85 {
86 int i;
87
88 for (i = VEC_SPUR; i <= VEC_INT7; i++)
89 vectors[i] = bad_inthandler;
90
91 for (i = 0; i < VEC_USER; i++)
92 if (!vectors[i])
93 vectors[i] = trap;
94
95 for (i = VEC_USER; i < 256; i++)
96 vectors[i] = bad_inthandler;
97
98 #ifdef CONFIG_M68KFPU_EMU
99 if (FPU_IS_EMU)
100 vectors[VEC_LINE11] = fpu_emu;
101 #endif
102
103 if (CPU_IS_040 && !FPU_IS_EMU) {
104 /* set up FPSP entry points */
105 asmlinkage void dz_vec(void) asm ("dz");
106 asmlinkage void inex_vec(void) asm ("inex");
107 asmlinkage void ovfl_vec(void) asm ("ovfl");
108 asmlinkage void unfl_vec(void) asm ("unfl");
109 asmlinkage void snan_vec(void) asm ("snan");
110 asmlinkage void operr_vec(void) asm ("operr");
111 asmlinkage void bsun_vec(void) asm ("bsun");
112 asmlinkage void fline_vec(void) asm ("fline");
113 asmlinkage void unsupp_vec(void) asm ("unsupp");
114
115 vectors[VEC_FPDIVZ] = dz_vec;
116 vectors[VEC_FPIR] = inex_vec;
117 vectors[VEC_FPOVER] = ovfl_vec;
118 vectors[VEC_FPUNDER] = unfl_vec;
119 vectors[VEC_FPNAN] = snan_vec;
120 vectors[VEC_FPOE] = operr_vec;
121 vectors[VEC_FPBRUC] = bsun_vec;
122 vectors[VEC_LINE11] = fline_vec;
123 vectors[VEC_FPUNSUP] = unsupp_vec;
124 }
125
126 if (CPU_IS_060 && !FPU_IS_EMU) {
127 /* set up IFPSP entry points */
128 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
129 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
130 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
131 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
132 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
133 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
134 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
135 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
136 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
137
138 vectors[VEC_FPNAN] = snan_vec6;
139 vectors[VEC_FPOE] = operr_vec6;
140 vectors[VEC_FPOVER] = ovfl_vec6;
141 vectors[VEC_FPUNDER] = unfl_vec6;
142 vectors[VEC_FPDIVZ] = dz_vec6;
143 vectors[VEC_FPIR] = inex_vec6;
144 vectors[VEC_LINE11] = fline_vec6;
145 vectors[VEC_FPUNSUP] = unsupp_vec6;
146 vectors[VEC_UNIMPEA] = effadd_vec6;
147 }
148
149 /* if running on an amiga, make the NMI interrupt do nothing */
150 if (MACH_IS_AMIGA) {
151 vectors[VEC_INT7] = nmihandler;
152 }
153 }
154
155
156 static const char *vec_names[] = {
157 [VEC_RESETSP] = "RESET SP",
158 [VEC_RESETPC] = "RESET PC",
159 [VEC_BUSERR] = "BUS ERROR",
160 [VEC_ADDRERR] = "ADDRESS ERROR",
161 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
162 [VEC_ZERODIV] = "ZERO DIVIDE",
163 [VEC_CHK] = "CHK",
164 [VEC_TRAP] = "TRAPcc",
165 [VEC_PRIV] = "PRIVILEGE VIOLATION",
166 [VEC_TRACE] = "TRACE",
167 [VEC_LINE10] = "LINE 1010",
168 [VEC_LINE11] = "LINE 1111",
169 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
170 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
171 [VEC_FORMAT] = "FORMAT ERROR",
172 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
173 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
174 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
175 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
176 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
177 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
178 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
179 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
180 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
181 [VEC_SPUR] = "SPURIOUS INTERRUPT",
182 [VEC_INT1] = "LEVEL 1 INT",
183 [VEC_INT2] = "LEVEL 2 INT",
184 [VEC_INT3] = "LEVEL 3 INT",
185 [VEC_INT4] = "LEVEL 4 INT",
186 [VEC_INT5] = "LEVEL 5 INT",
187 [VEC_INT6] = "LEVEL 6 INT",
188 [VEC_INT7] = "LEVEL 7 INT",
189 [VEC_SYS] = "SYSCALL",
190 [VEC_TRAP1] = "TRAP #1",
191 [VEC_TRAP2] = "TRAP #2",
192 [VEC_TRAP3] = "TRAP #3",
193 [VEC_TRAP4] = "TRAP #4",
194 [VEC_TRAP5] = "TRAP #5",
195 [VEC_TRAP6] = "TRAP #6",
196 [VEC_TRAP7] = "TRAP #7",
197 [VEC_TRAP8] = "TRAP #8",
198 [VEC_TRAP9] = "TRAP #9",
199 [VEC_TRAP10] = "TRAP #10",
200 [VEC_TRAP11] = "TRAP #11",
201 [VEC_TRAP12] = "TRAP #12",
202 [VEC_TRAP13] = "TRAP #13",
203 [VEC_TRAP14] = "TRAP #14",
204 [VEC_TRAP15] = "TRAP #15",
205 [VEC_FPBRUC] = "FPCP BSUN",
206 [VEC_FPIR] = "FPCP INEXACT",
207 [VEC_FPDIVZ] = "FPCP DIV BY 0",
208 [VEC_FPUNDER] = "FPCP UNDERFLOW",
209 [VEC_FPOE] = "FPCP OPERAND ERROR",
210 [VEC_FPOVER] = "FPCP OVERFLOW",
211 [VEC_FPNAN] = "FPCP SNAN",
212 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
213 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
214 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
215 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
216 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
217 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
218 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
219 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
220 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
221 };
222
223 static const char *space_names[] = {
224 [0] = "Space 0",
225 [USER_DATA] = "User Data",
226 [USER_PROGRAM] = "User Program",
227 #ifndef CONFIG_SUN3
228 [3] = "Space 3",
229 #else
230 [FC_CONTROL] = "Control",
231 #endif
232 [4] = "Space 4",
233 [SUPER_DATA] = "Super Data",
234 [SUPER_PROGRAM] = "Super Program",
235 [CPU_SPACE] = "CPU"
236 };
237
238 void die_if_kernel(char *,struct pt_regs *,int);
239 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
240 unsigned long error_code);
241 int send_fault_sig(struct pt_regs *regs);
242
243 asmlinkage void trap_c(struct frame *fp);
244
245 #if defined (CONFIG_M68060)
246 static inline void access_error060 (struct frame *fp)
247 {
248 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
249
250 #ifdef DEBUG
251 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
252 #endif
253
254 if (fslw & MMU060_BPE) {
255 /* branch prediction error -> clear branch cache */
256 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
257 "orl #0x00400000,%/d0\n\t"
258 "movec %/d0,%/cacr"
259 : : : "d0" );
260 /* return if there's no other error */
261 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
262 return;
263 }
264
265 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
266 unsigned long errorcode;
267 unsigned long addr = fp->un.fmt4.effaddr;
268
269 if (fslw & MMU060_MA)
270 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
271
272 errorcode = 1;
273 if (fslw & MMU060_DESC_ERR) {
274 __flush_tlb040_one(addr);
275 errorcode = 0;
276 }
277 if (fslw & MMU060_W)
278 errorcode |= 2;
279 #ifdef DEBUG
280 printk("errorcode = %d\n", errorcode );
281 #endif
282 do_page_fault(&fp->ptregs, addr, errorcode);
283 } else if (fslw & (MMU060_SEE)){
284 /* Software Emulation Error.
285 * fault during mem_read/mem_write in ifpsp060/os.S
286 */
287 send_fault_sig(&fp->ptregs);
288 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
289 send_fault_sig(&fp->ptregs) > 0) {
290 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
291 printk( "68060 access error, fslw=%lx\n", fslw );
292 trap_c( fp );
293 }
294 }
295 #endif /* CONFIG_M68060 */
296
297 #if defined (CONFIG_M68040)
298 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
299 {
300 unsigned long mmusr;
301 mm_segment_t old_fs = get_fs();
302
303 set_fs(MAKE_MM_SEG(wbs));
304
305 if (iswrite)
306 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
307 else
308 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
309
310 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
311
312 set_fs(old_fs);
313
314 return mmusr;
315 }
316
317 static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
318 unsigned long wbd)
319 {
320 int res = 0;
321 mm_segment_t old_fs = get_fs();
322
323 /* set_fs can not be moved, otherwise put_user() may oops */
324 set_fs(MAKE_MM_SEG(wbs));
325
326 switch (wbs & WBSIZ_040) {
327 case BA_SIZE_BYTE:
328 res = put_user(wbd & 0xff, (char __user *)wba);
329 break;
330 case BA_SIZE_WORD:
331 res = put_user(wbd & 0xffff, (short __user *)wba);
332 break;
333 case BA_SIZE_LONG:
334 res = put_user(wbd, (int __user *)wba);
335 break;
336 }
337
338 /* set_fs can not be moved, otherwise put_user() may oops */
339 set_fs(old_fs);
340
341
342 #ifdef DEBUG
343 printk("do_040writeback1, res=%d\n",res);
344 #endif
345
346 return res;
347 }
348
349 /* after an exception in a writeback the stack frame corresponding
350 * to that exception is discarded, set a few bits in the old frame
351 * to simulate what it should look like
352 */
353 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
354 {
355 fp->un.fmt7.faddr = wba;
356 fp->un.fmt7.ssw = wbs & 0xff;
357 if (wba != current->thread.faddr)
358 fp->un.fmt7.ssw |= MA_040;
359 }
360
361 static inline void do_040writebacks(struct frame *fp)
362 {
363 int res = 0;
364 #if 0
365 if (fp->un.fmt7.wb1s & WBV_040)
366 printk("access_error040: cannot handle 1st writeback. oops.\n");
367 #endif
368
369 if ((fp->un.fmt7.wb2s & WBV_040) &&
370 !(fp->un.fmt7.wb2s & WBTT_040)) {
371 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
372 fp->un.fmt7.wb2d);
373 if (res)
374 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
375 else
376 fp->un.fmt7.wb2s = 0;
377 }
378
379 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
380 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
381 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
382 fp->un.fmt7.wb3d);
383 if (res)
384 {
385 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
386
387 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
388 fp->un.fmt7.wb3s &= (~WBV_040);
389 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
390 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
391 }
392 else
393 fp->un.fmt7.wb3s = 0;
394 }
395
396 if (res)
397 send_fault_sig(&fp->ptregs);
398 }
399
400 /*
401 * called from sigreturn(), must ensure userspace code didn't
402 * manipulate exception frame to circumvent protection, then complete
403 * pending writebacks
404 * we just clear TM2 to turn it into an userspace access
405 */
406 asmlinkage void berr_040cleanup(struct frame *fp)
407 {
408 fp->un.fmt7.wb2s &= ~4;
409 fp->un.fmt7.wb3s &= ~4;
410
411 do_040writebacks(fp);
412 }
413
414 static inline void access_error040(struct frame *fp)
415 {
416 unsigned short ssw = fp->un.fmt7.ssw;
417 unsigned long mmusr;
418
419 #ifdef DEBUG
420 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
421 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
422 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
423 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
424 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
425 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
426 #endif
427
428 if (ssw & ATC_040) {
429 unsigned long addr = fp->un.fmt7.faddr;
430 unsigned long errorcode;
431
432 /*
433 * The MMU status has to be determined AFTER the address
434 * has been corrected if there was a misaligned access (MA).
435 */
436 if (ssw & MA_040)
437 addr = (addr + 7) & -8;
438
439 /* MMU error, get the MMUSR info for this access */
440 mmusr = probe040(!(ssw & RW_040), addr, ssw);
441 #ifdef DEBUG
442 printk("mmusr = %lx\n", mmusr);
443 #endif
444 errorcode = 1;
445 if (!(mmusr & MMU_R_040)) {
446 /* clear the invalid atc entry */
447 __flush_tlb040_one(addr);
448 errorcode = 0;
449 }
450
451 /* despite what documentation seems to say, RMW
452 * accesses have always both the LK and RW bits set */
453 if (!(ssw & RW_040) || (ssw & LK_040))
454 errorcode |= 2;
455
456 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
457 #ifdef DEBUG
458 printk("do_page_fault() !=0 \n");
459 #endif
460 if (user_mode(&fp->ptregs)){
461 /* delay writebacks after signal delivery */
462 #ifdef DEBUG
463 printk(".. was usermode - return\n");
464 #endif
465 return;
466 }
467 /* disable writeback into user space from kernel
468 * (if do_page_fault didn't fix the mapping,
469 * the writeback won't do good)
470 */
471 #ifdef DEBUG
472 printk(".. disabling wb2\n");
473 #endif
474 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
475 fp->un.fmt7.wb2s &= ~WBV_040;
476 }
477 } else if (send_fault_sig(&fp->ptregs) > 0) {
478 printk("68040 access error, ssw=%x\n", ssw);
479 trap_c(fp);
480 }
481
482 do_040writebacks(fp);
483 }
484 #endif /* CONFIG_M68040 */
485
486 #if defined(CONFIG_SUN3)
487 #include <asm/sun3mmu.h>
488
489 extern int mmu_emu_handle_fault (unsigned long, int, int);
490
491 /* sun3 version of bus_error030 */
492
493 static inline void bus_error030 (struct frame *fp)
494 {
495 unsigned char buserr_type = sun3_get_buserr ();
496 unsigned long addr, errorcode;
497 unsigned short ssw = fp->un.fmtb.ssw;
498 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
499
500 #ifdef DEBUG
501 if (ssw & (FC | FB))
502 printk ("Instruction fault at %#010lx\n",
503 ssw & FC ?
504 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
505 :
506 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
507 if (ssw & DF)
508 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
509 ssw & RW ? "read" : "write",
510 fp->un.fmtb.daddr,
511 space_names[ssw & DFC], fp->ptregs.pc);
512 #endif
513
514 /*
515 * Check if this page should be demand-mapped. This needs to go before
516 * the testing for a bad kernel-space access (demand-mapping applies
517 * to kernel accesses too).
518 */
519
520 if ((ssw & DF)
521 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
522 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
523 return;
524 }
525
526 /* Check for kernel-space pagefault (BAD). */
527 if (fp->ptregs.sr & PS_S) {
528 /* kernel fault must be a data fault to user space */
529 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
530 // try checking the kernel mappings before surrender
531 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
532 return;
533 /* instruction fault or kernel data fault! */
534 if (ssw & (FC | FB))
535 printk ("Instruction fault at %#010lx\n",
536 fp->ptregs.pc);
537 if (ssw & DF) {
538 /* was this fault incurred testing bus mappings? */
539 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
540 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
541 send_fault_sig(&fp->ptregs);
542 return;
543 }
544
545 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
546 ssw & RW ? "read" : "write",
547 fp->un.fmtb.daddr,
548 space_names[ssw & DFC], fp->ptregs.pc);
549 }
550 printk ("BAD KERNEL BUSERR\n");
551
552 die_if_kernel("Oops", &fp->ptregs,0);
553 force_sig(SIGKILL, current);
554 return;
555 }
556 } else {
557 /* user fault */
558 if (!(ssw & (FC | FB)) && !(ssw & DF))
559 /* not an instruction fault or data fault! BAD */
560 panic ("USER BUSERR w/o instruction or data fault");
561 }
562
563
564 /* First handle the data fault, if any. */
565 if (ssw & DF) {
566 addr = fp->un.fmtb.daddr;
567
568 // errorcode bit 0: 0 -> no page 1 -> protection fault
569 // errorcode bit 1: 0 -> read fault 1 -> write fault
570
571 // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
572 // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
573
574 if (buserr_type & SUN3_BUSERR_PROTERR)
575 errorcode = 0x01;
576 else if (buserr_type & SUN3_BUSERR_INVALID)
577 errorcode = 0x00;
578 else {
579 #ifdef DEBUG
580 printk ("*** unexpected busfault type=%#04x\n", buserr_type);
581 printk ("invalid %s access at %#lx from pc %#lx\n",
582 !(ssw & RW) ? "write" : "read", addr,
583 fp->ptregs.pc);
584 #endif
585 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
586 force_sig (SIGBUS, current);
587 return;
588 }
589
590 //todo: wtf is RM bit? --m
591 if (!(ssw & RW) || ssw & RM)
592 errorcode |= 0x02;
593
594 /* Handle page fault. */
595 do_page_fault (&fp->ptregs, addr, errorcode);
596
597 /* Retry the data fault now. */
598 return;
599 }
600
601 /* Now handle the instruction fault. */
602
603 /* Get the fault address. */
604 if (fp->ptregs.format == 0xA)
605 addr = fp->ptregs.pc + 4;
606 else
607 addr = fp->un.fmtb.baddr;
608 if (ssw & FC)
609 addr -= 2;
610
611 if (buserr_type & SUN3_BUSERR_INVALID) {
612 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
613 do_page_fault (&fp->ptregs, addr, 0);
614 } else {
615 #ifdef DEBUG
616 printk ("protection fault on insn access (segv).\n");
617 #endif
618 force_sig (SIGSEGV, current);
619 }
620 }
621 #else
622 #if defined(CPU_M68020_OR_M68030)
623 static inline void bus_error030 (struct frame *fp)
624 {
625 volatile unsigned short temp;
626 unsigned short mmusr;
627 unsigned long addr, errorcode;
628 unsigned short ssw = fp->un.fmtb.ssw;
629 #ifdef DEBUG
630 unsigned long desc;
631
632 printk ("pid = %x ", current->pid);
633 printk ("SSW=%#06x ", ssw);
634
635 if (ssw & (FC | FB))
636 printk ("Instruction fault at %#010lx\n",
637 ssw & FC ?
638 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
639 :
640 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
641 if (ssw & DF)
642 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
643 ssw & RW ? "read" : "write",
644 fp->un.fmtb.daddr,
645 space_names[ssw & DFC], fp->ptregs.pc);
646 #endif
647
648 /* ++andreas: If a data fault and an instruction fault happen
649 at the same time map in both pages. */
650
651 /* First handle the data fault, if any. */
652 if (ssw & DF) {
653 addr = fp->un.fmtb.daddr;
654
655 #ifdef DEBUG
656 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
657 "pmove %%psr,%1@"
658 : "=a&" (desc)
659 : "a" (&temp), "a" (addr), "d" (ssw));
660 #else
661 asm volatile ("ptestr %2,%1@,#7\n\t"
662 "pmove %%psr,%0@"
663 : : "a" (&temp), "a" (addr), "d" (ssw));
664 #endif
665 mmusr = temp;
666
667 #ifdef DEBUG
668 printk("mmusr is %#x for addr %#lx in task %p\n",
669 mmusr, addr, current);
670 printk("descriptor address is %#lx, contents %#lx\n",
671 __va(desc), *(unsigned long *)__va(desc));
672 #endif
673
674 errorcode = (mmusr & MMU_I) ? 0 : 1;
675 if (!(ssw & RW) || (ssw & RM))
676 errorcode |= 2;
677
678 if (mmusr & (MMU_I | MMU_WP)) {
679 if (ssw & 4) {
680 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
681 ssw & RW ? "read" : "write",
682 fp->un.fmtb.daddr,
683 space_names[ssw & DFC], fp->ptregs.pc);
684 goto buserr;
685 }
686 /* Don't try to do anything further if an exception was
687 handled. */
688 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
689 return;
690 } else if (!(mmusr & MMU_I)) {
691 /* probably a 020 cas fault */
692 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
693 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
694 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
695 printk("invalid %s access at %#lx from pc %#lx\n",
696 !(ssw & RW) ? "write" : "read", addr,
697 fp->ptregs.pc);
698 die_if_kernel("Oops",&fp->ptregs,mmusr);
699 force_sig(SIGSEGV, current);
700 return;
701 } else {
702 #if 0
703 static volatile long tlong;
704 #endif
705
706 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
707 !(ssw & RW) ? "write" : "read", addr,
708 fp->ptregs.pc, ssw);
709 asm volatile ("ptestr #1,%1@,#0\n\t"
710 "pmove %%psr,%0@"
711 : /* no outputs */
712 : "a" (&temp), "a" (addr));
713 mmusr = temp;
714
715 printk ("level 0 mmusr is %#x\n", mmusr);
716 #if 0
717 asm volatile ("pmove %%tt0,%0@"
718 : /* no outputs */
719 : "a" (&tlong));
720 printk("tt0 is %#lx, ", tlong);
721 asm volatile ("pmove %%tt1,%0@"
722 : /* no outputs */
723 : "a" (&tlong));
724 printk("tt1 is %#lx\n", tlong);
725 #endif
726 #ifdef DEBUG
727 printk("Unknown SIGSEGV - 1\n");
728 #endif
729 die_if_kernel("Oops",&fp->ptregs,mmusr);
730 force_sig(SIGSEGV, current);
731 return;
732 }
733
734 /* setup an ATC entry for the access about to be retried */
735 if (!(ssw & RW) || (ssw & RM))
736 asm volatile ("ploadw %1,%0@" : /* no outputs */
737 : "a" (addr), "d" (ssw));
738 else
739 asm volatile ("ploadr %1,%0@" : /* no outputs */
740 : "a" (addr), "d" (ssw));
741 }
742
743 /* Now handle the instruction fault. */
744
745 if (!(ssw & (FC|FB)))
746 return;
747
748 if (fp->ptregs.sr & PS_S) {
749 printk("Instruction fault at %#010lx\n",
750 fp->ptregs.pc);
751 buserr:
752 printk ("BAD KERNEL BUSERR\n");
753 die_if_kernel("Oops",&fp->ptregs,0);
754 force_sig(SIGKILL, current);
755 return;
756 }
757
758 /* get the fault address */
759 if (fp->ptregs.format == 10)
760 addr = fp->ptregs.pc + 4;
761 else
762 addr = fp->un.fmtb.baddr;
763 if (ssw & FC)
764 addr -= 2;
765
766 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
767 /* Insn fault on same page as data fault. But we
768 should still create the ATC entry. */
769 goto create_atc_entry;
770
771 #ifdef DEBUG
772 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
773 "pmove %%psr,%1@"
774 : "=a&" (desc)
775 : "a" (&temp), "a" (addr));
776 #else
777 asm volatile ("ptestr #1,%1@,#7\n\t"
778 "pmove %%psr,%0@"
779 : : "a" (&temp), "a" (addr));
780 #endif
781 mmusr = temp;
782
783 #ifdef DEBUG
784 printk ("mmusr is %#x for addr %#lx in task %p\n",
785 mmusr, addr, current);
786 printk ("descriptor address is %#lx, contents %#lx\n",
787 __va(desc), *(unsigned long *)__va(desc));
788 #endif
789
790 if (mmusr & MMU_I)
791 do_page_fault (&fp->ptregs, addr, 0);
792 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
793 printk ("invalid insn access at %#lx from pc %#lx\n",
794 addr, fp->ptregs.pc);
795 #ifdef DEBUG
796 printk("Unknown SIGSEGV - 2\n");
797 #endif
798 die_if_kernel("Oops",&fp->ptregs,mmusr);
799 force_sig(SIGSEGV, current);
800 return;
801 }
802
803 create_atc_entry:
804 /* setup an ATC entry for the access about to be retried */
805 asm volatile ("ploadr #2,%0@" : /* no outputs */
806 : "a" (addr));
807 }
808 #endif /* CPU_M68020_OR_M68030 */
809 #endif /* !CONFIG_SUN3 */
810
811 asmlinkage void buserr_c(struct frame *fp)
812 {
813 /* Only set esp0 if coming from user mode */
814 if (user_mode(&fp->ptregs))
815 current->thread.esp0 = (unsigned long) fp;
816
817 #ifdef DEBUG
818 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
819 #endif
820
821 switch (fp->ptregs.format) {
822 #if defined (CONFIG_M68060)
823 case 4: /* 68060 access error */
824 access_error060 (fp);
825 break;
826 #endif
827 #if defined (CONFIG_M68040)
828 case 0x7: /* 68040 access error */
829 access_error040 (fp);
830 break;
831 #endif
832 #if defined (CPU_M68020_OR_M68030)
833 case 0xa:
834 case 0xb:
835 bus_error030 (fp);
836 break;
837 #endif
838 default:
839 die_if_kernel("bad frame format",&fp->ptregs,0);
840 #ifdef DEBUG
841 printk("Unknown SIGSEGV - 4\n");
842 #endif
843 force_sig(SIGSEGV, current);
844 }
845 }
846
847
848 static int kstack_depth_to_print = 48;
849
850 void show_trace(unsigned long *stack)
851 {
852 unsigned long *endstack;
853 unsigned long addr;
854 int i;
855
856 printk("Call Trace:");
857 addr = (unsigned long)stack + THREAD_SIZE - 1;
858 endstack = (unsigned long *)(addr & -THREAD_SIZE);
859 i = 0;
860 while (stack + 1 <= endstack) {
861 addr = *stack++;
862 /*
863 * If the address is either in the text segment of the
864 * kernel, or in the region which contains vmalloc'ed
865 * memory, it *may* be the address of a calling
866 * routine; if so, print it so that someone tracing
867 * down the cause of the crash will be able to figure
868 * out the call path that was taken.
869 */
870 if (__kernel_text_address(addr)) {
871 #ifndef CONFIG_KALLSYMS
872 if (i % 5 == 0)
873 printk("\n ");
874 #endif
875 printk(" [<%08lx>]", addr);
876 print_symbol(" %s\n", addr);
877 i++;
878 }
879 }
880 printk("\n");
881 }
882
883 void show_registers(struct pt_regs *regs)
884 {
885 struct frame *fp = (struct frame *)regs;
886 mm_segment_t old_fs = get_fs();
887 u16 c, *cp;
888 unsigned long addr;
889 int i;
890
891 print_modules();
892 printk("PC: [<%08lx>]",regs->pc);
893 print_symbol(" %s", regs->pc);
894 printk("\nSR: %04x SP: %p a2: %08lx\n",
895 regs->sr, regs, regs->a2);
896 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
897 regs->d0, regs->d1, regs->d2, regs->d3);
898 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
899 regs->d4, regs->d5, regs->a0, regs->a1);
900
901 printk("Process %s (pid: %d, task=%p)\n",
902 current->comm, task_pid_nr(current), current);
903 addr = (unsigned long)&fp->un;
904 printk("Frame format=%X ", regs->format);
905 switch (regs->format) {
906 case 0x2:
907 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
908 addr += sizeof(fp->un.fmt2);
909 break;
910 case 0x3:
911 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
912 addr += sizeof(fp->un.fmt3);
913 break;
914 case 0x4:
915 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
916 : "eff addr=%08lx pc=%08lx\n"),
917 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
918 addr += sizeof(fp->un.fmt4);
919 break;
920 case 0x7:
921 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
922 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
923 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
924 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
925 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
926 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
927 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
928 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
929 printk("push data: %08lx %08lx %08lx %08lx\n",
930 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
931 fp->un.fmt7.pd3);
932 addr += sizeof(fp->un.fmt7);
933 break;
934 case 0x9:
935 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
936 addr += sizeof(fp->un.fmt9);
937 break;
938 case 0xa:
939 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
940 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
941 fp->un.fmta.daddr, fp->un.fmta.dobuf);
942 addr += sizeof(fp->un.fmta);
943 break;
944 case 0xb:
945 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
946 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
947 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
948 printk("baddr=%08lx dibuf=%08lx ver=%x\n",
949 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
950 addr += sizeof(fp->un.fmtb);
951 break;
952 default:
953 printk("\n");
954 }
955 show_stack(NULL, (unsigned long *)addr);
956
957 printk("Code:");
958 set_fs(KERNEL_DS);
959 cp = (u16 *)regs->pc;
960 for (i = -8; i < 16; i++) {
961 if (get_user(c, cp + i) && i >= 0) {
962 printk(" Bad PC value.");
963 break;
964 }
965 printk(i ? " %04x" : " <%04x>", c);
966 }
967 set_fs(old_fs);
968 printk ("\n");
969 }
970
971 void show_stack(struct task_struct *task, unsigned long *stack)
972 {
973 unsigned long *p;
974 unsigned long *endstack;
975 int i;
976
977 if (!stack) {
978 if (task)
979 stack = (unsigned long *)task->thread.esp0;
980 else
981 stack = (unsigned long *)&stack;
982 }
983 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
984
985 printk("Stack from %08lx:", (unsigned long)stack);
986 p = stack;
987 for (i = 0; i < kstack_depth_to_print; i++) {
988 if (p + 1 > endstack)
989 break;
990 if (i % 8 == 0)
991 printk("\n ");
992 printk(" %08lx", *p++);
993 }
994 printk("\n");
995 show_trace(stack);
996 }
997
998 /*
999 * The architecture-independent backtrace generator
1000 */
1001 void dump_stack(void)
1002 {
1003 unsigned long stack;
1004
1005 show_trace(&stack);
1006 }
1007
1008 EXPORT_SYMBOL(dump_stack);
1009
1010 void bad_super_trap (struct frame *fp)
1011 {
1012 console_verbose();
1013 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
1014 printk ("*** %s *** FORMAT=%X\n",
1015 vec_names[(fp->ptregs.vector) >> 2],
1016 fp->ptregs.format);
1017 else
1018 printk ("*** Exception %d *** FORMAT=%X\n",
1019 (fp->ptregs.vector) >> 2,
1020 fp->ptregs.format);
1021 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
1022 unsigned short ssw = fp->un.fmtb.ssw;
1023
1024 printk ("SSW=%#06x ", ssw);
1025
1026 if (ssw & RC)
1027 printk ("Pipe stage C instruction fault at %#010lx\n",
1028 (fp->ptregs.format) == 0xA ?
1029 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1030 if (ssw & RB)
1031 printk ("Pipe stage B instruction fault at %#010lx\n",
1032 (fp->ptregs.format) == 0xA ?
1033 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1034 if (ssw & DF)
1035 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1036 ssw & RW ? "read" : "write",
1037 fp->un.fmtb.daddr, space_names[ssw & DFC],
1038 fp->ptregs.pc);
1039 }
1040 printk ("Current process id is %d\n", task_pid_nr(current));
1041 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1042 }
1043
1044 asmlinkage void trap_c(struct frame *fp)
1045 {
1046 int sig;
1047 siginfo_t info;
1048
1049 if (fp->ptregs.sr & PS_S) {
1050 if ((fp->ptregs.vector >> 2) == VEC_TRACE) {
1051 /* traced a trapping instruction */
1052 current->ptrace |= PT_DTRACE;
1053 } else
1054 bad_super_trap(fp);
1055 return;
1056 }
1057
1058 /* send the appropriate signal to the user program */
1059 switch ((fp->ptregs.vector) >> 2) {
1060 case VEC_ADDRERR:
1061 info.si_code = BUS_ADRALN;
1062 sig = SIGBUS;
1063 break;
1064 case VEC_ILLEGAL:
1065 case VEC_LINE10:
1066 case VEC_LINE11:
1067 info.si_code = ILL_ILLOPC;
1068 sig = SIGILL;
1069 break;
1070 case VEC_PRIV:
1071 info.si_code = ILL_PRVOPC;
1072 sig = SIGILL;
1073 break;
1074 case VEC_COPROC:
1075 info.si_code = ILL_COPROC;
1076 sig = SIGILL;
1077 break;
1078 case VEC_TRAP1:
1079 case VEC_TRAP2:
1080 case VEC_TRAP3:
1081 case VEC_TRAP4:
1082 case VEC_TRAP5:
1083 case VEC_TRAP6:
1084 case VEC_TRAP7:
1085 case VEC_TRAP8:
1086 case VEC_TRAP9:
1087 case VEC_TRAP10:
1088 case VEC_TRAP11:
1089 case VEC_TRAP12:
1090 case VEC_TRAP13:
1091 case VEC_TRAP14:
1092 info.si_code = ILL_ILLTRP;
1093 sig = SIGILL;
1094 break;
1095 case VEC_FPBRUC:
1096 case VEC_FPOE:
1097 case VEC_FPNAN:
1098 info.si_code = FPE_FLTINV;
1099 sig = SIGFPE;
1100 break;
1101 case VEC_FPIR:
1102 info.si_code = FPE_FLTRES;
1103 sig = SIGFPE;
1104 break;
1105 case VEC_FPDIVZ:
1106 info.si_code = FPE_FLTDIV;
1107 sig = SIGFPE;
1108 break;
1109 case VEC_FPUNDER:
1110 info.si_code = FPE_FLTUND;
1111 sig = SIGFPE;
1112 break;
1113 case VEC_FPOVER:
1114 info.si_code = FPE_FLTOVF;
1115 sig = SIGFPE;
1116 break;
1117 case VEC_ZERODIV:
1118 info.si_code = FPE_INTDIV;
1119 sig = SIGFPE;
1120 break;
1121 case VEC_CHK:
1122 case VEC_TRAP:
1123 info.si_code = FPE_INTOVF;
1124 sig = SIGFPE;
1125 break;
1126 case VEC_TRACE: /* ptrace single step */
1127 info.si_code = TRAP_TRACE;
1128 sig = SIGTRAP;
1129 break;
1130 case VEC_TRAP15: /* breakpoint */
1131 info.si_code = TRAP_BRKPT;
1132 sig = SIGTRAP;
1133 break;
1134 default:
1135 info.si_code = ILL_ILLOPC;
1136 sig = SIGILL;
1137 break;
1138 }
1139 info.si_signo = sig;
1140 info.si_errno = 0;
1141 switch (fp->ptregs.format) {
1142 default:
1143 info.si_addr = (void *) fp->ptregs.pc;
1144 break;
1145 case 2:
1146 info.si_addr = (void *) fp->un.fmt2.iaddr;
1147 break;
1148 case 7:
1149 info.si_addr = (void *) fp->un.fmt7.effaddr;
1150 break;
1151 case 9:
1152 info.si_addr = (void *) fp->un.fmt9.iaddr;
1153 break;
1154 case 10:
1155 info.si_addr = (void *) fp->un.fmta.daddr;
1156 break;
1157 case 11:
1158 info.si_addr = (void *) fp->un.fmtb.daddr;
1159 break;
1160 }
1161 force_sig_info (sig, &info, current);
1162 }
1163
1164 void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1165 {
1166 if (!(fp->sr & PS_S))
1167 return;
1168
1169 console_verbose();
1170 printk("%s: %08x\n",str,nr);
1171 show_registers(fp);
1172 add_taint(TAINT_DIE);
1173 do_exit(SIGSEGV);
1174 }
1175
1176 /*
1177 * This function is called if an error occur while accessing
1178 * user-space from the fpsp040 code.
1179 */
1180 asmlinkage void fpsp040_die(void)
1181 {
1182 do_exit(SIGSEGV);
1183 }
1184
1185 #ifdef CONFIG_M68KFPU_EMU
1186 asmlinkage void fpemu_signal(int signal, int code, void *addr)
1187 {
1188 siginfo_t info;
1189
1190 info.si_signo = signal;
1191 info.si_errno = 0;
1192 info.si_code = code;
1193 info.si_addr = addr;
1194 force_sig_info(signal, &info, current);
1195 }
1196 #endif
AMDTP streaming driver for the Linux FireWire stack (Juju)