cpumask: Replace cpumask_of_cpu with cpumask_of_cpu_ptr
[firewire-audio.git] / arch / x86 / kernel / cpu / cpufreq / speedstep-ich.c
blob2f3728dc24f60cc41db81e0066927a4ff15f409f
1 /*
2 * (C) 2001 Dave Jones, Arjan van de ven.
3 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
5 * Licensed under the terms of the GNU GPL License version 2.
6 * Based upon reverse engineered information, and on Intel documentation
7 * for chipsets ICH2-M and ICH3-M.
9 * Many thanks to Ducrot Bruno for finding and fixing the last
10 * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
11 * for extensive testing.
13 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
17 /*********************************************************************
18 * SPEEDSTEP - DEFINITIONS *
19 *********************************************************************/
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/cpufreq.h>
25 #include <linux/pci.h>
26 #include <linux/slab.h>
27 #include <linux/sched.h>
29 #include "speedstep-lib.h"
32 /* speedstep_chipset:
33 * It is necessary to know which chipset is used. As accesses to
34 * this device occur at various places in this module, we need a
35 * static struct pci_dev * pointing to that device.
37 static struct pci_dev *speedstep_chipset_dev;
40 /* speedstep_processor
42 static unsigned int speedstep_processor = 0;
44 static u32 pmbase;
47 * There are only two frequency states for each processor. Values
48 * are in kHz for the time being.
50 static struct cpufreq_frequency_table speedstep_freqs[] = {
51 {SPEEDSTEP_HIGH, 0},
52 {SPEEDSTEP_LOW, 0},
53 {0, CPUFREQ_TABLE_END},
57 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg)
60 /**
61 * speedstep_find_register - read the PMBASE address
63 * Returns: -ENODEV if no register could be found
65 static int speedstep_find_register (void)
67 if (!speedstep_chipset_dev)
68 return -ENODEV;
70 /* get PMBASE */
71 pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
72 if (!(pmbase & 0x01)) {
73 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
74 return -ENODEV;
77 pmbase &= 0xFFFFFFFE;
78 if (!pmbase) {
79 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
80 return -ENODEV;
83 dprintk("pmbase is 0x%x\n", pmbase);
84 return 0;
87 /**
88 * speedstep_set_state - set the SpeedStep state
89 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
91 * Tries to change the SpeedStep state.
93 static void speedstep_set_state (unsigned int state)
95 u8 pm2_blk;
96 u8 value;
97 unsigned long flags;
99 if (state > 0x1)
100 return;
102 /* Disable IRQs */
103 local_irq_save(flags);
105 /* read state */
106 value = inb(pmbase + 0x50);
108 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
110 /* write new state */
111 value &= 0xFE;
112 value |= state;
114 dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
116 /* Disable bus master arbitration */
117 pm2_blk = inb(pmbase + 0x20);
118 pm2_blk |= 0x01;
119 outb(pm2_blk, (pmbase + 0x20));
121 /* Actual transition */
122 outb(value, (pmbase + 0x50));
124 /* Restore bus master arbitration */
125 pm2_blk &= 0xfe;
126 outb(pm2_blk, (pmbase + 0x20));
128 /* check if transition was successful */
129 value = inb(pmbase + 0x50);
131 /* Enable IRQs */
132 local_irq_restore(flags);
134 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
136 if (state == (value & 0x1)) {
137 dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
138 } else {
139 printk (KERN_ERR "cpufreq: change failed - I/O error\n");
142 return;
147 * speedstep_activate - activate SpeedStep control in the chipset
149 * Tries to activate the SpeedStep status and control registers.
150 * Returns -EINVAL on an unsupported chipset, and zero on success.
152 static int speedstep_activate (void)
154 u16 value = 0;
156 if (!speedstep_chipset_dev)
157 return -EINVAL;
159 pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
160 if (!(value & 0x08)) {
161 value |= 0x08;
162 dprintk("activating SpeedStep (TM) registers\n");
163 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
166 return 0;
171 * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
173 * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
174 * the LPC bridge / PM module which contains all power-management
175 * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
176 * chipset, or zero on failure.
178 static unsigned int speedstep_detect_chipset (void)
180 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
181 PCI_DEVICE_ID_INTEL_82801DB_12,
182 PCI_ANY_ID,
183 PCI_ANY_ID,
184 NULL);
185 if (speedstep_chipset_dev)
186 return 4; /* 4-M */
188 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
189 PCI_DEVICE_ID_INTEL_82801CA_12,
190 PCI_ANY_ID,
191 PCI_ANY_ID,
192 NULL);
193 if (speedstep_chipset_dev)
194 return 3; /* 3-M */
197 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
198 PCI_DEVICE_ID_INTEL_82801BA_10,
199 PCI_ANY_ID,
200 PCI_ANY_ID,
201 NULL);
202 if (speedstep_chipset_dev) {
203 /* speedstep.c causes lockups on Dell Inspirons 8000 and
204 * 8100 which use a pretty old revision of the 82815
205 * host brige. Abort on these systems.
207 static struct pci_dev *hostbridge;
209 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
210 PCI_DEVICE_ID_INTEL_82815_MC,
211 PCI_ANY_ID,
212 PCI_ANY_ID,
213 NULL);
215 if (!hostbridge)
216 return 2; /* 2-M */
218 if (hostbridge->revision < 5) {
219 dprintk("hostbridge does not support speedstep\n");
220 speedstep_chipset_dev = NULL;
221 pci_dev_put(hostbridge);
222 return 0;
225 pci_dev_put(hostbridge);
226 return 2; /* 2-M */
229 return 0;
232 static unsigned int _speedstep_get(const cpumask_t *cpus)
234 unsigned int speed;
235 cpumask_t cpus_allowed;
237 cpus_allowed = current->cpus_allowed;
238 set_cpus_allowed_ptr(current, cpus);
239 speed = speedstep_get_processor_frequency(speedstep_processor);
240 set_cpus_allowed_ptr(current, &cpus_allowed);
241 dprintk("detected %u kHz as current frequency\n", speed);
242 return speed;
245 static unsigned int speedstep_get(unsigned int cpu)
247 cpumask_of_cpu_ptr(newmask, cpu);
248 return _speedstep_get(newmask);
252 * speedstep_target - set a new CPUFreq policy
253 * @policy: new policy
254 * @target_freq: the target frequency
255 * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
257 * Sets a new CPUFreq policy.
259 static int speedstep_target (struct cpufreq_policy *policy,
260 unsigned int target_freq,
261 unsigned int relation)
263 unsigned int newstate = 0;
264 struct cpufreq_freqs freqs;
265 cpumask_t cpus_allowed;
266 int i;
268 if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
269 return -EINVAL;
271 freqs.old = _speedstep_get(&policy->cpus);
272 freqs.new = speedstep_freqs[newstate].frequency;
273 freqs.cpu = policy->cpu;
275 dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
277 /* no transition necessary */
278 if (freqs.old == freqs.new)
279 return 0;
281 cpus_allowed = current->cpus_allowed;
283 for_each_cpu_mask_nr(i, policy->cpus) {
284 freqs.cpu = i;
285 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
288 /* switch to physical CPU where state is to be changed */
289 set_cpus_allowed_ptr(current, &policy->cpus);
291 speedstep_set_state(newstate);
293 /* allow to be run on all CPUs */
294 set_cpus_allowed_ptr(current, &cpus_allowed);
296 for_each_cpu_mask_nr(i, policy->cpus) {
297 freqs.cpu = i;
298 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
301 return 0;
306 * speedstep_verify - verifies a new CPUFreq policy
307 * @policy: new policy
309 * Limit must be within speedstep_low_freq and speedstep_high_freq, with
310 * at least one border included.
312 static int speedstep_verify (struct cpufreq_policy *policy)
314 return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
318 static int speedstep_cpu_init(struct cpufreq_policy *policy)
320 int result = 0;
321 unsigned int speed;
322 cpumask_t cpus_allowed;
324 /* only run on CPU to be set, or on its sibling */
325 #ifdef CONFIG_SMP
326 policy->cpus = per_cpu(cpu_sibling_map, policy->cpu);
327 #endif
329 cpus_allowed = current->cpus_allowed;
330 set_cpus_allowed_ptr(current, &policy->cpus);
332 /* detect low and high frequency and transition latency */
333 result = speedstep_get_freqs(speedstep_processor,
334 &speedstep_freqs[SPEEDSTEP_LOW].frequency,
335 &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
336 &policy->cpuinfo.transition_latency,
337 &speedstep_set_state);
338 set_cpus_allowed_ptr(current, &cpus_allowed);
339 if (result)
340 return result;
342 /* get current speed setting */
343 speed = _speedstep_get(&policy->cpus);
344 if (!speed)
345 return -EIO;
347 dprintk("currently at %s speed setting - %i MHz\n",
348 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
349 (speed / 1000));
351 /* cpuinfo and default policy values */
352 policy->cur = speed;
354 result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
355 if (result)
356 return (result);
358 cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
360 return 0;
364 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
366 cpufreq_frequency_table_put_attr(policy->cpu);
367 return 0;
370 static struct freq_attr* speedstep_attr[] = {
371 &cpufreq_freq_attr_scaling_available_freqs,
372 NULL,
376 static struct cpufreq_driver speedstep_driver = {
377 .name = "speedstep-ich",
378 .verify = speedstep_verify,
379 .target = speedstep_target,
380 .init = speedstep_cpu_init,
381 .exit = speedstep_cpu_exit,
382 .get = speedstep_get,
383 .owner = THIS_MODULE,
384 .attr = speedstep_attr,
389 * speedstep_init - initializes the SpeedStep CPUFreq driver
391 * Initializes the SpeedStep support. Returns -ENODEV on unsupported
392 * devices, -EINVAL on problems during initiatization, and zero on
393 * success.
395 static int __init speedstep_init(void)
397 /* detect processor */
398 speedstep_processor = speedstep_detect_processor();
399 if (!speedstep_processor) {
400 dprintk("Intel(R) SpeedStep(TM) capable processor not found\n");
401 return -ENODEV;
404 /* detect chipset */
405 if (!speedstep_detect_chipset()) {
406 dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n");
407 return -ENODEV;
410 /* activate speedstep support */
411 if (speedstep_activate()) {
412 pci_dev_put(speedstep_chipset_dev);
413 return -EINVAL;
416 if (speedstep_find_register())
417 return -ENODEV;
419 return cpufreq_register_driver(&speedstep_driver);
424 * speedstep_exit - unregisters SpeedStep support
426 * Unregisters SpeedStep support.
428 static void __exit speedstep_exit(void)
430 pci_dev_put(speedstep_chipset_dev);
431 cpufreq_unregister_driver(&speedstep_driver);
435 MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>");
436 MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
437 MODULE_LICENSE ("GPL");
439 module_init(speedstep_init);
440 module_exit(speedstep_exit);