[PATCH] ipmi: add full sysfs support
[firewire-audio.git] / include / asm-i386 / pgtable.h
blobee056c41a9fb725e52137e151a525274512413ca
1 #ifndef _I386_PGTABLE_H
2 #define _I386_PGTABLE_H
4 #include <linux/config.h>
6 /*
7 * The Linux memory management assumes a three-level page table setup. On
8 * the i386, we use that, but "fold" the mid level into the top-level page
9 * table, so that we physically have the same two-level page table as the
10 * i386 mmu expects.
12 * This file contains the functions and defines necessary to modify and use
13 * the i386 page table tree.
15 #ifndef __ASSEMBLY__
16 #include <asm/processor.h>
17 #include <asm/fixmap.h>
18 #include <linux/threads.h>
20 #ifndef _I386_BITOPS_H
21 #include <asm/bitops.h>
22 #endif
24 #include <linux/slab.h>
25 #include <linux/list.h>
26 #include <linux/spinlock.h>
28 struct mm_struct;
29 struct vm_area_struct;
32 * ZERO_PAGE is a global shared page that is always zero: used
33 * for zero-mapped memory areas etc..
35 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
36 extern unsigned long empty_zero_page[1024];
37 extern pgd_t swapper_pg_dir[1024];
38 extern kmem_cache_t *pgd_cache;
39 extern kmem_cache_t *pmd_cache;
40 extern spinlock_t pgd_lock;
41 extern struct page *pgd_list;
43 void pmd_ctor(void *, kmem_cache_t *, unsigned long);
44 void pgd_ctor(void *, kmem_cache_t *, unsigned long);
45 void pgd_dtor(void *, kmem_cache_t *, unsigned long);
46 void pgtable_cache_init(void);
47 void paging_init(void);
50 * The Linux x86 paging architecture is 'compile-time dual-mode', it
51 * implements both the traditional 2-level x86 page tables and the
52 * newer 3-level PAE-mode page tables.
54 #ifdef CONFIG_X86_PAE
55 # include <asm/pgtable-3level-defs.h>
56 # define PMD_SIZE (1UL << PMD_SHIFT)
57 # define PMD_MASK (~(PMD_SIZE-1))
58 #else
59 # include <asm/pgtable-2level-defs.h>
60 #endif
62 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
63 #define PGDIR_MASK (~(PGDIR_SIZE-1))
65 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
66 #define FIRST_USER_ADDRESS 0
68 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
69 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
71 #define TWOLEVEL_PGDIR_SHIFT 22
72 #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
73 #define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS)
75 /* Just any arbitrary offset to the start of the vmalloc VM area: the
76 * current 8MB value just means that there will be a 8MB "hole" after the
77 * physical memory until the kernel virtual memory starts. That means that
78 * any out-of-bounds memory accesses will hopefully be caught.
79 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
80 * area for the same reason. ;)
82 #define VMALLOC_OFFSET (8*1024*1024)
83 #define VMALLOC_START (((unsigned long) high_memory + vmalloc_earlyreserve + \
84 2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
85 #ifdef CONFIG_HIGHMEM
86 # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
87 #else
88 # define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
89 #endif
92 * _PAGE_PSE set in the page directory entry just means that
93 * the page directory entry points directly to a 4MB-aligned block of
94 * memory.
96 #define _PAGE_BIT_PRESENT 0
97 #define _PAGE_BIT_RW 1
98 #define _PAGE_BIT_USER 2
99 #define _PAGE_BIT_PWT 3
100 #define _PAGE_BIT_PCD 4
101 #define _PAGE_BIT_ACCESSED 5
102 #define _PAGE_BIT_DIRTY 6
103 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page, Pentium+, if present.. */
104 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
105 #define _PAGE_BIT_UNUSED1 9 /* available for programmer */
106 #define _PAGE_BIT_UNUSED2 10
107 #define _PAGE_BIT_UNUSED3 11
108 #define _PAGE_BIT_NX 63
110 #define _PAGE_PRESENT 0x001
111 #define _PAGE_RW 0x002
112 #define _PAGE_USER 0x004
113 #define _PAGE_PWT 0x008
114 #define _PAGE_PCD 0x010
115 #define _PAGE_ACCESSED 0x020
116 #define _PAGE_DIRTY 0x040
117 #define _PAGE_PSE 0x080 /* 4 MB (or 2MB) page, Pentium+, if present.. */
118 #define _PAGE_GLOBAL 0x100 /* Global TLB entry PPro+ */
119 #define _PAGE_UNUSED1 0x200 /* available for programmer */
120 #define _PAGE_UNUSED2 0x400
121 #define _PAGE_UNUSED3 0x800
123 /* If _PAGE_PRESENT is clear, we use these: */
124 #define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
125 #define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
126 pte_present gives true */
127 #ifdef CONFIG_X86_PAE
128 #define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
129 #else
130 #define _PAGE_NX 0
131 #endif
133 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
134 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
135 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
137 #define PAGE_NONE \
138 __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
139 #define PAGE_SHARED \
140 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
142 #define PAGE_SHARED_EXEC \
143 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
144 #define PAGE_COPY_NOEXEC \
145 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
146 #define PAGE_COPY_EXEC \
147 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
148 #define PAGE_COPY \
149 PAGE_COPY_NOEXEC
150 #define PAGE_READONLY \
151 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
152 #define PAGE_READONLY_EXEC \
153 __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
155 #define _PAGE_KERNEL \
156 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
157 #define _PAGE_KERNEL_EXEC \
158 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
160 extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
161 #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
162 #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD)
163 #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
164 #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
166 #define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
167 #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
168 #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
169 #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
170 #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
171 #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
174 * The i386 can't do page protection for execute, and considers that
175 * the same are read. Also, write permissions imply read permissions.
176 * This is the closest we can get..
178 #define __P000 PAGE_NONE
179 #define __P001 PAGE_READONLY
180 #define __P010 PAGE_COPY
181 #define __P011 PAGE_COPY
182 #define __P100 PAGE_READONLY_EXEC
183 #define __P101 PAGE_READONLY_EXEC
184 #define __P110 PAGE_COPY_EXEC
185 #define __P111 PAGE_COPY_EXEC
187 #define __S000 PAGE_NONE
188 #define __S001 PAGE_READONLY
189 #define __S010 PAGE_SHARED
190 #define __S011 PAGE_SHARED
191 #define __S100 PAGE_READONLY_EXEC
192 #define __S101 PAGE_READONLY_EXEC
193 #define __S110 PAGE_SHARED_EXEC
194 #define __S111 PAGE_SHARED_EXEC
197 * Define this if things work differently on an i386 and an i486:
198 * it will (on an i486) warn about kernel memory accesses that are
199 * done without a 'access_ok(VERIFY_WRITE,..)'
201 #undef TEST_ACCESS_OK
203 /* The boot page tables (all created as a single array) */
204 extern unsigned long pg0[];
206 #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
207 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
209 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
210 #define pmd_none(x) (!(unsigned long)pmd_val(x))
211 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
212 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
213 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
216 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
219 * The following only work if pte_present() is true.
220 * Undefined behaviour if not..
222 static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
223 static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
224 static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
225 static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
226 static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
227 static inline int pte_huge(pte_t pte) { return (pte).pte_low & _PAGE_PSE; }
230 * The following only works if pte_present() is not true.
232 static inline int pte_file(pte_t pte) { return (pte).pte_low & _PAGE_FILE; }
234 static inline pte_t pte_rdprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
235 static inline pte_t pte_exprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_USER; return pte; }
236 static inline pte_t pte_mkclean(pte_t pte) { (pte).pte_low &= ~_PAGE_DIRTY; return pte; }
237 static inline pte_t pte_mkold(pte_t pte) { (pte).pte_low &= ~_PAGE_ACCESSED; return pte; }
238 static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte_low &= ~_PAGE_RW; return pte; }
239 static inline pte_t pte_mkread(pte_t pte) { (pte).pte_low |= _PAGE_USER; return pte; }
240 static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return pte; }
241 static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
242 static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
243 static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
244 static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PSE; return pte; }
246 #ifdef CONFIG_X86_PAE
247 # include <asm/pgtable-3level.h>
248 #else
249 # include <asm/pgtable-2level.h>
250 #endif
252 static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
254 if (!pte_dirty(*ptep))
255 return 0;
256 return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte_low);
259 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
261 if (!pte_young(*ptep))
262 return 0;
263 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
266 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
268 pte_t pte;
269 if (full) {
270 pte = *ptep;
271 *ptep = __pte(0);
272 } else {
273 pte = ptep_get_and_clear(mm, addr, ptep);
275 return pte;
278 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
280 clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
284 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
286 * dst - pointer to pgd range anwhere on a pgd page
287 * src - ""
288 * count - the number of pgds to copy.
290 * dst and src can be on the same page, but the range must not overlap,
291 * and must not cross a page boundary.
293 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
295 memcpy(dst, src, count * sizeof(pgd_t));
299 * Macro to mark a page protection value as "uncacheable". On processors which do not support
300 * it, this is a no-op.
302 #define pgprot_noncached(prot) ((boot_cpu_data.x86 > 3) \
303 ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))
306 * Conversion functions: convert a page and protection to a page entry,
307 * and a page entry and page directory to the page they refer to.
310 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
312 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
314 pte.pte_low &= _PAGE_CHG_MASK;
315 pte.pte_low |= pgprot_val(newprot);
316 #ifdef CONFIG_X86_PAE
318 * Chop off the NX bit (if present), and add the NX portion of
319 * the newprot (if present):
321 pte.pte_high &= ~(1 << (_PAGE_BIT_NX - 32));
322 pte.pte_high |= (pgprot_val(newprot) >> 32) & \
323 (__supported_pte_mask >> 32);
324 #endif
325 return pte;
328 #define pmd_large(pmd) \
329 ((pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT))
332 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
334 * this macro returns the index of the entry in the pgd page which would
335 * control the given virtual address
337 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
338 #define pgd_index_k(addr) pgd_index(addr)
341 * pgd_offset() returns a (pgd_t *)
342 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
344 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
347 * a shortcut which implies the use of the kernel's pgd, instead
348 * of a process's
350 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
353 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
355 * this macro returns the index of the entry in the pmd page which would
356 * control the given virtual address
358 #define pmd_index(address) \
359 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
362 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
364 * this macro returns the index of the entry in the pte page which would
365 * control the given virtual address
367 #define pte_index(address) \
368 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
369 #define pte_offset_kernel(dir, address) \
370 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
372 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
374 #define pmd_page_kernel(pmd) \
375 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
378 * Helper function that returns the kernel pagetable entry controlling
379 * the virtual address 'address'. NULL means no pagetable entry present.
380 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
381 * as a pte too.
383 extern pte_t *lookup_address(unsigned long address);
386 * Make a given kernel text page executable/non-executable.
387 * Returns the previous executability setting of that page (which
388 * is used to restore the previous state). Used by the SMP bootup code.
389 * NOTE: this is an __init function for security reasons.
391 #ifdef CONFIG_X86_PAE
392 extern int set_kernel_exec(unsigned long vaddr, int enable);
393 #else
394 static inline int set_kernel_exec(unsigned long vaddr, int enable) { return 0;}
395 #endif
397 extern void noexec_setup(const char *str);
399 #if defined(CONFIG_HIGHPTE)
400 #define pte_offset_map(dir, address) \
401 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
402 #define pte_offset_map_nested(dir, address) \
403 ((pte_t *)kmap_atomic(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
404 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
405 #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
406 #else
407 #define pte_offset_map(dir, address) \
408 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
409 #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
410 #define pte_unmap(pte) do { } while (0)
411 #define pte_unmap_nested(pte) do { } while (0)
412 #endif
415 * The i386 doesn't have any external MMU info: the kernel page
416 * tables contain all the necessary information.
418 * Also, we only update the dirty/accessed state if we set
419 * the dirty bit by hand in the kernel, since the hardware
420 * will do the accessed bit for us, and we don't want to
421 * race with other CPU's that might be updating the dirty
422 * bit at the same time.
424 #define update_mmu_cache(vma,address,pte) do { } while (0)
425 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
426 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
427 do { \
428 if (__dirty) { \
429 (__ptep)->pte_low = (__entry).pte_low; \
430 flush_tlb_page(__vma, __address); \
432 } while (0)
434 #endif /* !__ASSEMBLY__ */
436 #ifdef CONFIG_FLATMEM
437 #define kern_addr_valid(addr) (1)
438 #endif /* CONFIG_FLATMEM */
440 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
441 remap_pfn_range(vma, vaddr, pfn, size, prot)
443 #define MK_IOSPACE_PFN(space, pfn) (pfn)
444 #define GET_IOSPACE(pfn) 0
445 #define GET_PFN(pfn) (pfn)
447 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
448 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
449 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
450 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
451 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
452 #define __HAVE_ARCH_PTE_SAME
453 #include <asm-generic/pgtable.h>
455 #endif /* _I386_PGTABLE_H */