1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2007 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
52 #include <linux/inet.h>
54 #include <linux/ethtool.h>
55 #include <linux/firmware.h>
56 #include <linux/delay.h>
57 #include <linux/version.h>
58 #include <linux/timer.h>
59 #include <linux/vmalloc.h>
60 #include <linux/crc32.h>
61 #include <linux/moduleparam.h>
63 #include <net/checksum.h>
64 #include <asm/byteorder.h>
66 #include <asm/processor.h>
71 #include "myri10ge_mcp.h"
72 #include "myri10ge_mcp_gen_header.h"
74 #define MYRI10GE_VERSION_STR "1.2.0"
76 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77 MODULE_AUTHOR("Maintainer: help@myri.com");
78 MODULE_VERSION(MYRI10GE_VERSION_STR
);
79 MODULE_LICENSE("Dual BSD/GPL");
81 #define MYRI10GE_MAX_ETHER_MTU 9014
83 #define MYRI10GE_ETH_STOPPED 0
84 #define MYRI10GE_ETH_STOPPING 1
85 #define MYRI10GE_ETH_STARTING 2
86 #define MYRI10GE_ETH_RUNNING 3
87 #define MYRI10GE_ETH_OPEN_FAILED 4
89 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
90 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
92 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
93 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
95 #define MYRI10GE_ALLOC_ORDER 0
96 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
97 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
99 struct myri10ge_rx_buffer_state
{
102 DECLARE_PCI_UNMAP_ADDR(bus
)
103 DECLARE_PCI_UNMAP_LEN(len
)
106 struct myri10ge_tx_buffer_state
{
109 DECLARE_PCI_UNMAP_ADDR(bus
)
110 DECLARE_PCI_UNMAP_LEN(len
)
113 struct myri10ge_cmd
{
119 struct myri10ge_rx_buf
{
120 struct mcp_kreq_ether_recv __iomem
*lanai
; /* lanai ptr for recv ring */
121 u8 __iomem
*wc_fifo
; /* w/c rx dma addr fifo address */
122 struct mcp_kreq_ether_recv
*shadow
; /* host shadow of recv ring */
123 struct myri10ge_rx_buffer_state
*info
;
130 int mask
; /* number of rx slots -1 */
134 struct myri10ge_tx_buf
{
135 struct mcp_kreq_ether_send __iomem
*lanai
; /* lanai ptr for sendq */
136 u8 __iomem
*wc_fifo
; /* w/c send fifo address */
137 struct mcp_kreq_ether_send
*req_list
; /* host shadow of sendq */
139 struct myri10ge_tx_buffer_state
*info
;
140 int mask
; /* number of transmit slots -1 */
141 int boundary
; /* boundary transmits cannot cross */
142 int req ____cacheline_aligned
; /* transmit slots submitted */
143 int pkt_start
; /* packets started */
144 int done ____cacheline_aligned
; /* transmit slots completed */
145 int pkt_done
; /* packets completed */
148 struct myri10ge_rx_done
{
149 struct mcp_slot
*entry
;
155 struct myri10ge_priv
{
156 int running
; /* running? */
157 int csum_flag
; /* rx_csums? */
158 struct myri10ge_tx_buf tx
; /* transmit ring */
159 struct myri10ge_rx_buf rx_small
;
160 struct myri10ge_rx_buf rx_big
;
161 struct myri10ge_rx_done rx_done
;
164 struct net_device
*dev
;
165 struct net_device_stats stats
;
168 unsigned long board_span
;
169 unsigned long iomem_base
;
170 __be32 __iomem
*irq_claim
;
171 __be32 __iomem
*irq_deassert
;
172 char *mac_addr_string
;
173 struct mcp_cmd_response
*cmd
;
175 struct mcp_irq_data
*fw_stats
;
176 dma_addr_t fw_stats_bus
;
177 struct pci_dev
*pdev
;
180 unsigned int rdma_tags_available
;
182 __be32 __iomem
*intr_coal_delay_ptr
;
187 wait_queue_head_t down_wq
;
188 struct work_struct watchdog_work
;
189 struct timer_list watchdog_timer
;
190 int watchdog_tx_done
;
196 char eeprom_strings
[MYRI10GE_EEPROM_STRINGS_SIZE
];
197 char fw_version
[128];
201 int adopted_rx_filter_bug
;
202 u8 mac_addr
[6]; /* eeprom mac address */
203 unsigned long serial_number
;
204 int vendor_specific_offset
;
205 int fw_multicast_support
;
213 static char *myri10ge_fw_unaligned
= "myri10ge_ethp_z8e.dat";
214 static char *myri10ge_fw_aligned
= "myri10ge_eth_z8e.dat";
216 static char *myri10ge_fw_name
= NULL
;
217 module_param(myri10ge_fw_name
, charp
, S_IRUGO
| S_IWUSR
);
218 MODULE_PARM_DESC(myri10ge_fw_name
, "Firmware image name\n");
220 static int myri10ge_ecrc_enable
= 1;
221 module_param(myri10ge_ecrc_enable
, int, S_IRUGO
);
222 MODULE_PARM_DESC(myri10ge_ecrc_enable
, "Enable Extended CRC on PCI-E\n");
224 static int myri10ge_max_intr_slots
= 1024;
225 module_param(myri10ge_max_intr_slots
, int, S_IRUGO
);
226 MODULE_PARM_DESC(myri10ge_max_intr_slots
, "Interrupt queue slots\n");
228 static int myri10ge_small_bytes
= -1; /* -1 == auto */
229 module_param(myri10ge_small_bytes
, int, S_IRUGO
| S_IWUSR
);
230 MODULE_PARM_DESC(myri10ge_small_bytes
, "Threshold of small packets\n");
232 static int myri10ge_msi
= 1; /* enable msi by default */
233 module_param(myri10ge_msi
, int, S_IRUGO
| S_IWUSR
);
234 MODULE_PARM_DESC(myri10ge_msi
, "Enable Message Signalled Interrupts\n");
236 static int myri10ge_intr_coal_delay
= 25;
237 module_param(myri10ge_intr_coal_delay
, int, S_IRUGO
);
238 MODULE_PARM_DESC(myri10ge_intr_coal_delay
, "Interrupt coalescing delay\n");
240 static int myri10ge_flow_control
= 1;
241 module_param(myri10ge_flow_control
, int, S_IRUGO
);
242 MODULE_PARM_DESC(myri10ge_flow_control
, "Pause parameter\n");
244 static int myri10ge_deassert_wait
= 1;
245 module_param(myri10ge_deassert_wait
, int, S_IRUGO
| S_IWUSR
);
246 MODULE_PARM_DESC(myri10ge_deassert_wait
,
247 "Wait when deasserting legacy interrupts\n");
249 static int myri10ge_force_firmware
= 0;
250 module_param(myri10ge_force_firmware
, int, S_IRUGO
);
251 MODULE_PARM_DESC(myri10ge_force_firmware
,
252 "Force firmware to assume aligned completions\n");
254 static int myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
255 module_param(myri10ge_initial_mtu
, int, S_IRUGO
);
256 MODULE_PARM_DESC(myri10ge_initial_mtu
, "Initial MTU\n");
258 static int myri10ge_napi_weight
= 64;
259 module_param(myri10ge_napi_weight
, int, S_IRUGO
);
260 MODULE_PARM_DESC(myri10ge_napi_weight
, "Set NAPI weight\n");
262 static int myri10ge_watchdog_timeout
= 1;
263 module_param(myri10ge_watchdog_timeout
, int, S_IRUGO
);
264 MODULE_PARM_DESC(myri10ge_watchdog_timeout
, "Set watchdog timeout\n");
266 static int myri10ge_max_irq_loops
= 1048576;
267 module_param(myri10ge_max_irq_loops
, int, S_IRUGO
);
268 MODULE_PARM_DESC(myri10ge_max_irq_loops
,
269 "Set stuck legacy IRQ detection threshold\n");
271 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
273 static int myri10ge_debug
= -1; /* defaults above */
274 module_param(myri10ge_debug
, int, 0);
275 MODULE_PARM_DESC(myri10ge_debug
, "Debug level (0=none,...,16=all)");
277 static int myri10ge_fill_thresh
= 256;
278 module_param(myri10ge_fill_thresh
, int, S_IRUGO
| S_IWUSR
);
279 MODULE_PARM_DESC(myri10ge_fill_thresh
, "Number of empty rx slots allowed\n");
281 static int myri10ge_wcfifo
= 1;
282 module_param(myri10ge_wcfifo
, int, S_IRUGO
);
283 MODULE_PARM_DESC(myri10ge_wcfifo
, "Enable WC Fifo when WC is enabled\n");
285 #define MYRI10GE_FW_OFFSET 1024*1024
286 #define MYRI10GE_HIGHPART_TO_U32(X) \
287 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
288 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
290 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
292 static inline void put_be32(__be32 val
, __be32 __iomem
* p
)
294 __raw_writel((__force __u32
) val
, (__force
void __iomem
*)p
);
298 myri10ge_send_cmd(struct myri10ge_priv
*mgp
, u32 cmd
,
299 struct myri10ge_cmd
*data
, int atomic
)
302 char buf_bytes
[sizeof(*buf
) + 8];
303 struct mcp_cmd_response
*response
= mgp
->cmd
;
304 char __iomem
*cmd_addr
= mgp
->sram
+ MXGEFW_ETH_CMD
;
305 u32 dma_low
, dma_high
, result
, value
;
308 /* ensure buf is aligned to 8 bytes */
309 buf
= (struct mcp_cmd
*)ALIGN((unsigned long)buf_bytes
, 8);
311 buf
->data0
= htonl(data
->data0
);
312 buf
->data1
= htonl(data
->data1
);
313 buf
->data2
= htonl(data
->data2
);
314 buf
->cmd
= htonl(cmd
);
315 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
316 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
318 buf
->response_addr
.low
= htonl(dma_low
);
319 buf
->response_addr
.high
= htonl(dma_high
);
320 response
->result
= htonl(MYRI10GE_NO_RESPONSE_RESULT
);
322 myri10ge_pio_copy(cmd_addr
, buf
, sizeof(*buf
));
324 /* wait up to 15ms. Longest command is the DMA benchmark,
325 * which is capped at 5ms, but runs from a timeout handler
326 * that runs every 7.8ms. So a 15ms timeout leaves us with
330 /* if atomic is set, do not sleep,
331 * and try to get the completion quickly
332 * (1ms will be enough for those commands) */
333 for (sleep_total
= 0;
335 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
339 /* use msleep for most command */
340 for (sleep_total
= 0;
342 && response
->result
== htonl(MYRI10GE_NO_RESPONSE_RESULT
);
347 result
= ntohl(response
->result
);
348 value
= ntohl(response
->data
);
349 if (result
!= MYRI10GE_NO_RESPONSE_RESULT
) {
353 } else if (result
== MXGEFW_CMD_UNKNOWN
) {
356 dev_err(&mgp
->pdev
->dev
,
357 "command %d failed, result = %d\n",
363 dev_err(&mgp
->pdev
->dev
, "command %d timed out, result = %d\n",
369 * The eeprom strings on the lanaiX have the format
372 * PT:ddd mmm xx xx:xx:xx xx\0
373 * PV:ddd mmm xx xx:xx:xx xx\0
375 static int myri10ge_read_mac_addr(struct myri10ge_priv
*mgp
)
380 ptr
= mgp
->eeprom_strings
;
381 limit
= mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
;
383 while (*ptr
!= '\0' && ptr
< limit
) {
384 if (memcmp(ptr
, "MAC=", 4) == 0) {
386 mgp
->mac_addr_string
= ptr
;
387 for (i
= 0; i
< 6; i
++) {
388 if ((ptr
+ 2) > limit
)
391 simple_strtoul(ptr
, &ptr
, 16);
395 if (memcmp((const void *)ptr
, "SN=", 3) == 0) {
397 mgp
->serial_number
= simple_strtoul(ptr
, &ptr
, 10);
399 while (ptr
< limit
&& *ptr
++) ;
405 dev_err(&mgp
->pdev
->dev
, "failed to parse eeprom_strings\n");
410 * Enable or disable periodic RDMAs from the host to make certain
411 * chipsets resend dropped PCIe messages
414 static void myri10ge_dummy_rdma(struct myri10ge_priv
*mgp
, int enable
)
416 char __iomem
*submit
;
418 u32 dma_low
, dma_high
;
421 /* clear confirmation addr */
425 /* send a rdma command to the PCIe engine, and wait for the
426 * response in the confirmation address. The firmware should
427 * write a -1 there to indicate it is alive and well
429 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
430 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
432 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
433 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
434 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
435 buf
[3] = htonl(dma_high
); /* dummy addr MSW */
436 buf
[4] = htonl(dma_low
); /* dummy addr LSW */
437 buf
[5] = htonl(enable
); /* enable? */
439 submit
= mgp
->sram
+ MXGEFW_BOOT_DUMMY_RDMA
;
441 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
442 for (i
= 0; mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20; i
++)
444 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
)
445 dev_err(&mgp
->pdev
->dev
, "dummy rdma %s failed\n",
446 (enable
? "enable" : "disable"));
450 myri10ge_validate_firmware(struct myri10ge_priv
*mgp
,
451 struct mcp_gen_header
*hdr
)
453 struct device
*dev
= &mgp
->pdev
->dev
;
455 /* check firmware type */
456 if (ntohl(hdr
->mcp_type
) != MCP_TYPE_ETH
) {
457 dev_err(dev
, "Bad firmware type: 0x%x\n", ntohl(hdr
->mcp_type
));
461 /* save firmware version for ethtool */
462 strncpy(mgp
->fw_version
, hdr
->version
, sizeof(mgp
->fw_version
));
464 sscanf(mgp
->fw_version
, "%d.%d.%d", &mgp
->fw_ver_major
,
465 &mgp
->fw_ver_minor
, &mgp
->fw_ver_tiny
);
467 if (!(mgp
->fw_ver_major
== MXGEFW_VERSION_MAJOR
468 && mgp
->fw_ver_minor
== MXGEFW_VERSION_MINOR
)) {
469 dev_err(dev
, "Found firmware version %s\n", mgp
->fw_version
);
470 dev_err(dev
, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR
,
471 MXGEFW_VERSION_MINOR
);
477 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv
*mgp
, u32
* size
)
479 unsigned crc
, reread_crc
;
480 const struct firmware
*fw
;
481 struct device
*dev
= &mgp
->pdev
->dev
;
482 struct mcp_gen_header
*hdr
;
487 if ((status
= request_firmware(&fw
, mgp
->fw_name
, dev
)) < 0) {
488 dev_err(dev
, "Unable to load %s firmware image via hotplug\n",
491 goto abort_with_nothing
;
496 if (fw
->size
>= mgp
->sram_size
- MYRI10GE_FW_OFFSET
||
497 fw
->size
< MCP_HEADER_PTR_OFFSET
+ 4) {
498 dev_err(dev
, "Firmware size invalid:%d\n", (int)fw
->size
);
504 hdr_offset
= ntohl(*(__be32
*) (fw
->data
+ MCP_HEADER_PTR_OFFSET
));
505 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > fw
->size
) {
506 dev_err(dev
, "Bad firmware file\n");
510 hdr
= (void *)(fw
->data
+ hdr_offset
);
512 status
= myri10ge_validate_firmware(mgp
, hdr
);
516 crc
= crc32(~0, fw
->data
, fw
->size
);
517 for (i
= 0; i
< fw
->size
; i
+= 256) {
518 myri10ge_pio_copy(mgp
->sram
+ MYRI10GE_FW_OFFSET
+ i
,
520 min(256U, (unsigned)(fw
->size
- i
)));
524 /* corruption checking is good for parity recovery and buggy chipset */
525 memcpy_fromio(fw
->data
, mgp
->sram
+ MYRI10GE_FW_OFFSET
, fw
->size
);
526 reread_crc
= crc32(~0, fw
->data
, fw
->size
);
527 if (crc
!= reread_crc
) {
528 dev_err(dev
, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
529 (unsigned)fw
->size
, reread_crc
, crc
);
533 *size
= (u32
) fw
->size
;
536 release_firmware(fw
);
542 static int myri10ge_adopt_running_firmware(struct myri10ge_priv
*mgp
)
544 struct mcp_gen_header
*hdr
;
545 struct device
*dev
= &mgp
->pdev
->dev
;
546 const size_t bytes
= sizeof(struct mcp_gen_header
);
550 /* find running firmware header */
551 hdr_offset
= ntohl(__raw_readl(mgp
->sram
+ MCP_HEADER_PTR_OFFSET
));
553 if ((hdr_offset
& 3) || hdr_offset
+ sizeof(*hdr
) > mgp
->sram_size
) {
554 dev_err(dev
, "Running firmware has bad header offset (%d)\n",
559 /* copy header of running firmware from SRAM to host memory to
560 * validate firmware */
561 hdr
= kmalloc(bytes
, GFP_KERNEL
);
563 dev_err(dev
, "could not malloc firmware hdr\n");
566 memcpy_fromio(hdr
, mgp
->sram
+ hdr_offset
, bytes
);
567 status
= myri10ge_validate_firmware(mgp
, hdr
);
570 /* check to see if adopted firmware has bug where adopting
571 * it will cause broadcasts to be filtered unless the NIC
572 * is kept in ALLMULTI mode */
573 if (mgp
->fw_ver_major
== 1 && mgp
->fw_ver_minor
== 4 &&
574 mgp
->fw_ver_tiny
>= 4 && mgp
->fw_ver_tiny
<= 11) {
575 mgp
->adopted_rx_filter_bug
= 1;
576 dev_warn(dev
, "Adopting fw %d.%d.%d: "
577 "working around rx filter bug\n",
578 mgp
->fw_ver_major
, mgp
->fw_ver_minor
,
584 static int myri10ge_load_firmware(struct myri10ge_priv
*mgp
)
586 char __iomem
*submit
;
588 u32 dma_low
, dma_high
, size
;
592 status
= myri10ge_load_hotplug_firmware(mgp
, &size
);
594 dev_warn(&mgp
->pdev
->dev
, "hotplug firmware loading failed\n");
596 /* Do not attempt to adopt firmware if there
601 status
= myri10ge_adopt_running_firmware(mgp
);
603 dev_err(&mgp
->pdev
->dev
,
604 "failed to adopt running firmware\n");
607 dev_info(&mgp
->pdev
->dev
,
608 "Successfully adopted running firmware\n");
609 if (mgp
->tx
.boundary
== 4096) {
610 dev_warn(&mgp
->pdev
->dev
,
611 "Using firmware currently running on NIC"
613 dev_warn(&mgp
->pdev
->dev
,
614 "performance consider loading optimized "
616 dev_warn(&mgp
->pdev
->dev
, "via hotplug\n");
619 mgp
->fw_name
= "adopted";
620 mgp
->tx
.boundary
= 2048;
624 /* clear confirmation addr */
628 /* send a reload command to the bootstrap MCP, and wait for the
629 * response in the confirmation address. The firmware should
630 * write a -1 there to indicate it is alive and well
632 dma_low
= MYRI10GE_LOWPART_TO_U32(mgp
->cmd_bus
);
633 dma_high
= MYRI10GE_HIGHPART_TO_U32(mgp
->cmd_bus
);
635 buf
[0] = htonl(dma_high
); /* confirm addr MSW */
636 buf
[1] = htonl(dma_low
); /* confirm addr LSW */
637 buf
[2] = MYRI10GE_NO_CONFIRM_DATA
; /* confirm data */
639 /* FIX: All newest firmware should un-protect the bottom of
640 * the sram before handoff. However, the very first interfaces
641 * do not. Therefore the handoff copy must skip the first 8 bytes
643 buf
[3] = htonl(MYRI10GE_FW_OFFSET
+ 8); /* where the code starts */
644 buf
[4] = htonl(size
- 8); /* length of code */
645 buf
[5] = htonl(8); /* where to copy to */
646 buf
[6] = htonl(0); /* where to jump to */
648 submit
= mgp
->sram
+ MXGEFW_BOOT_HANDOFF
;
650 myri10ge_pio_copy(submit
, &buf
, sizeof(buf
));
655 while (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
&& i
< 20) {
659 if (mgp
->cmd
->data
!= MYRI10GE_NO_CONFIRM_DATA
) {
660 dev_err(&mgp
->pdev
->dev
, "handoff failed\n");
663 dev_info(&mgp
->pdev
->dev
, "handoff confirmed\n");
664 myri10ge_dummy_rdma(mgp
, 1);
669 static int myri10ge_update_mac_address(struct myri10ge_priv
*mgp
, u8
* addr
)
671 struct myri10ge_cmd cmd
;
674 cmd
.data0
= ((addr
[0] << 24) | (addr
[1] << 16)
675 | (addr
[2] << 8) | addr
[3]);
677 cmd
.data1
= ((addr
[4] << 8) | (addr
[5]));
679 status
= myri10ge_send_cmd(mgp
, MXGEFW_SET_MAC_ADDRESS
, &cmd
, 0);
683 static int myri10ge_change_pause(struct myri10ge_priv
*mgp
, int pause
)
685 struct myri10ge_cmd cmd
;
688 ctl
= pause
? MXGEFW_ENABLE_FLOW_CONTROL
: MXGEFW_DISABLE_FLOW_CONTROL
;
689 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, 0);
693 "myri10ge: %s: Failed to set flow control mode\n",
702 myri10ge_change_promisc(struct myri10ge_priv
*mgp
, int promisc
, int atomic
)
704 struct myri10ge_cmd cmd
;
707 ctl
= promisc
? MXGEFW_ENABLE_PROMISC
: MXGEFW_DISABLE_PROMISC
;
708 status
= myri10ge_send_cmd(mgp
, ctl
, &cmd
, atomic
);
710 printk(KERN_ERR
"myri10ge: %s: Failed to set promisc mode\n",
714 static int myri10ge_reset(struct myri10ge_priv
*mgp
)
716 struct myri10ge_cmd cmd
;
721 /* try to send a reset command to the card to see if it
723 memset(&cmd
, 0, sizeof(cmd
));
724 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_RESET
, &cmd
, 0);
726 dev_err(&mgp
->pdev
->dev
, "failed reset\n");
730 /* Now exchange information about interrupts */
732 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
733 memset(mgp
->rx_done
.entry
, 0, bytes
);
734 cmd
.data0
= (u32
) bytes
;
735 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_SIZE
, &cmd
, 0);
736 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
737 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
738 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_INTRQ_DMA
, &cmd
, 0);
741 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_ACK_OFFSET
, &cmd
, 0);
742 mgp
->irq_claim
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
743 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET
,
745 mgp
->irq_deassert
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
747 status
|= myri10ge_send_cmd
748 (mgp
, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET
, &cmd
, 0);
749 mgp
->intr_coal_delay_ptr
= (__iomem __be32
*) (mgp
->sram
+ cmd
.data0
);
751 dev_err(&mgp
->pdev
->dev
, "failed set interrupt parameters\n");
754 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
756 /* Run a small DMA test.
757 * The magic multipliers to the length tell the firmware
758 * to do DMA read, write, or read+write tests. The
759 * results are returned in cmd.data0. The upper 16
760 * bits or the return is the number of transfers completed.
761 * The lower 16 bits is the time in 0.5us ticks that the
762 * transfers took to complete.
765 len
= mgp
->tx
.boundary
;
767 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
768 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
769 cmd
.data2
= len
* 0x10000;
770 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
772 mgp
->read_dma
= ((cmd
.data0
>> 16) * len
* 2) /
773 (cmd
.data0
& 0xffff);
775 dev_warn(&mgp
->pdev
->dev
, "DMA read benchmark failed: %d\n",
777 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
778 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
779 cmd
.data2
= len
* 0x1;
780 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
782 mgp
->write_dma
= ((cmd
.data0
>> 16) * len
* 2) /
783 (cmd
.data0
& 0xffff);
785 dev_warn(&mgp
->pdev
->dev
, "DMA write benchmark failed: %d\n",
788 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->rx_done
.bus
);
789 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->rx_done
.bus
);
790 cmd
.data2
= len
* 0x10001;
791 status
= myri10ge_send_cmd(mgp
, MXGEFW_DMA_TEST
, &cmd
, 0);
793 mgp
->read_write_dma
= ((cmd
.data0
>> 16) * len
* 2 * 2) /
794 (cmd
.data0
& 0xffff);
796 dev_warn(&mgp
->pdev
->dev
,
797 "DMA read/write benchmark failed: %d\n", status
);
799 memset(mgp
->rx_done
.entry
, 0, bytes
);
801 /* reset mcp/driver shared state back to 0 */
804 mgp
->tx
.pkt_start
= 0;
805 mgp
->tx
.pkt_done
= 0;
807 mgp
->rx_small
.cnt
= 0;
808 mgp
->rx_done
.idx
= 0;
809 mgp
->rx_done
.cnt
= 0;
810 mgp
->link_changes
= 0;
811 status
= myri10ge_update_mac_address(mgp
, mgp
->dev
->dev_addr
);
812 myri10ge_change_promisc(mgp
, 0, 0);
813 myri10ge_change_pause(mgp
, mgp
->pause
);
814 if (mgp
->adopted_rx_filter_bug
)
815 (void)myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
820 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem
* dst
,
821 struct mcp_kreq_ether_recv
*src
)
826 src
->addr_low
= htonl(DMA_32BIT_MASK
);
827 myri10ge_pio_copy(dst
, src
, 4 * sizeof(*src
));
829 myri10ge_pio_copy(dst
+ 4, src
+ 4, 4 * sizeof(*src
));
832 put_be32(low
, &dst
->addr_low
);
836 static inline void myri10ge_vlan_ip_csum(struct sk_buff
*skb
, __wsum hw_csum
)
838 struct vlan_hdr
*vh
= (struct vlan_hdr
*)(skb
->data
);
840 if ((skb
->protocol
== htons(ETH_P_8021Q
)) &&
841 (vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IP
) ||
842 vh
->h_vlan_encapsulated_proto
== htons(ETH_P_IPV6
))) {
844 skb
->ip_summed
= CHECKSUM_COMPLETE
;
849 myri10ge_rx_skb_build(struct sk_buff
*skb
, u8
* va
,
850 struct skb_frag_struct
*rx_frags
, int len
, int hlen
)
852 struct skb_frag_struct
*skb_frags
;
854 skb
->len
= skb
->data_len
= len
;
855 skb
->truesize
= len
+ sizeof(struct sk_buff
);
856 /* attach the page(s) */
858 skb_frags
= skb_shinfo(skb
)->frags
;
860 memcpy(skb_frags
, rx_frags
, sizeof(*skb_frags
));
861 len
-= rx_frags
->size
;
864 skb_shinfo(skb
)->nr_frags
++;
867 /* pskb_may_pull is not available in irq context, but
868 * skb_pull() (for ether_pad and eth_type_trans()) requires
869 * the beginning of the packet in skb_headlen(), move it
871 memcpy(skb
->data
, va
, hlen
);
872 skb_shinfo(skb
)->frags
[0].page_offset
+= hlen
;
873 skb_shinfo(skb
)->frags
[0].size
-= hlen
;
874 skb
->data_len
-= hlen
;
876 skb_pull(skb
, MXGEFW_PAD
);
880 myri10ge_alloc_rx_pages(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
881 int bytes
, int watchdog
)
886 if (unlikely(rx
->watchdog_needed
&& !watchdog
))
889 /* try to refill entire ring */
890 while (rx
->fill_cnt
!= (rx
->cnt
+ rx
->mask
+ 1)) {
891 idx
= rx
->fill_cnt
& rx
->mask
;
893 if ((bytes
< MYRI10GE_ALLOC_SIZE
/ 2) &&
894 (rx
->page_offset
+ bytes
<= MYRI10GE_ALLOC_SIZE
)) {
895 /* we can use part of previous page */
898 /* we need a new page */
900 alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
901 MYRI10GE_ALLOC_ORDER
);
902 if (unlikely(page
== NULL
)) {
903 if (rx
->fill_cnt
- rx
->cnt
< 16)
904 rx
->watchdog_needed
= 1;
909 rx
->bus
= pci_map_page(mgp
->pdev
, page
, 0,
913 rx
->info
[idx
].page
= rx
->page
;
914 rx
->info
[idx
].page_offset
= rx
->page_offset
;
915 /* note that this is the address of the start of the
917 pci_unmap_addr_set(&rx
->info
[idx
], bus
, rx
->bus
);
918 rx
->shadow
[idx
].addr_low
=
919 htonl(MYRI10GE_LOWPART_TO_U32(rx
->bus
) + rx
->page_offset
);
920 rx
->shadow
[idx
].addr_high
=
921 htonl(MYRI10GE_HIGHPART_TO_U32(rx
->bus
));
923 /* start next packet on a cacheline boundary */
924 rx
->page_offset
+= SKB_DATA_ALIGN(bytes
);
927 /* copy 8 descriptors to the firmware at a time */
928 if ((idx
& 7) == 7) {
929 if (rx
->wc_fifo
== NULL
)
930 myri10ge_submit_8rx(&rx
->lanai
[idx
- 7],
931 &rx
->shadow
[idx
- 7]);
934 myri10ge_pio_copy(rx
->wc_fifo
,
935 &rx
->shadow
[idx
- 7], 64);
942 myri10ge_unmap_rx_page(struct pci_dev
*pdev
,
943 struct myri10ge_rx_buffer_state
*info
, int bytes
)
945 /* unmap the recvd page if we're the only or last user of it */
946 if (bytes
>= MYRI10GE_ALLOC_SIZE
/ 2 ||
947 (info
->page_offset
+ 2 * bytes
) > MYRI10GE_ALLOC_SIZE
) {
948 pci_unmap_page(pdev
, (pci_unmap_addr(info
, bus
)
949 & ~(MYRI10GE_ALLOC_SIZE
- 1)),
950 MYRI10GE_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
954 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
955 * page into an skb */
958 myri10ge_rx_done(struct myri10ge_priv
*mgp
, struct myri10ge_rx_buf
*rx
,
959 int bytes
, int len
, __wsum csum
)
962 struct skb_frag_struct rx_frags
[MYRI10GE_MAX_FRAGS_PER_FRAME
];
963 int i
, idx
, hlen
, remainder
;
964 struct pci_dev
*pdev
= mgp
->pdev
;
965 struct net_device
*dev
= mgp
->dev
;
969 idx
= rx
->cnt
& rx
->mask
;
970 va
= page_address(rx
->info
[idx
].page
) + rx
->info
[idx
].page_offset
;
972 /* Fill skb_frag_struct(s) with data from our receive */
973 for (i
= 0, remainder
= len
; remainder
> 0; i
++) {
974 myri10ge_unmap_rx_page(pdev
, &rx
->info
[idx
], bytes
);
975 rx_frags
[i
].page
= rx
->info
[idx
].page
;
976 rx_frags
[i
].page_offset
= rx
->info
[idx
].page_offset
;
977 if (remainder
< MYRI10GE_ALLOC_SIZE
)
978 rx_frags
[i
].size
= remainder
;
980 rx_frags
[i
].size
= MYRI10GE_ALLOC_SIZE
;
982 idx
= rx
->cnt
& rx
->mask
;
983 remainder
-= MYRI10GE_ALLOC_SIZE
;
986 hlen
= MYRI10GE_HLEN
> len
? len
: MYRI10GE_HLEN
;
988 /* allocate an skb to attach the page(s) to. */
990 skb
= netdev_alloc_skb(dev
, MYRI10GE_HLEN
+ 16);
991 if (unlikely(skb
== NULL
)) {
992 mgp
->stats
.rx_dropped
++;
995 put_page(rx_frags
[i
].page
);
1000 /* Attach the pages to the skb, and trim off any padding */
1001 myri10ge_rx_skb_build(skb
, va
, rx_frags
, len
, hlen
);
1002 if (skb_shinfo(skb
)->frags
[0].size
<= 0) {
1003 put_page(skb_shinfo(skb
)->frags
[0].page
);
1004 skb_shinfo(skb
)->nr_frags
= 0;
1006 skb
->protocol
= eth_type_trans(skb
, dev
);
1009 if (mgp
->csum_flag
) {
1010 if ((skb
->protocol
== htons(ETH_P_IP
)) ||
1011 (skb
->protocol
== htons(ETH_P_IPV6
))) {
1013 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1015 myri10ge_vlan_ip_csum(skb
, csum
);
1017 netif_receive_skb(skb
);
1018 dev
->last_rx
= jiffies
;
1022 static inline void myri10ge_tx_done(struct myri10ge_priv
*mgp
, int mcp_index
)
1024 struct pci_dev
*pdev
= mgp
->pdev
;
1025 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1026 struct sk_buff
*skb
;
1030 while (tx
->pkt_done
!= mcp_index
) {
1031 idx
= tx
->done
& tx
->mask
;
1032 skb
= tx
->info
[idx
].skb
;
1035 tx
->info
[idx
].skb
= NULL
;
1036 if (tx
->info
[idx
].last
) {
1038 tx
->info
[idx
].last
= 0;
1041 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1042 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1044 mgp
->stats
.tx_bytes
+= skb
->len
;
1045 mgp
->stats
.tx_packets
++;
1046 dev_kfree_skb_irq(skb
);
1048 pci_unmap_single(pdev
,
1049 pci_unmap_addr(&tx
->info
[idx
],
1054 pci_unmap_page(pdev
,
1055 pci_unmap_addr(&tx
->info
[idx
],
1060 /* limit potential for livelock by only handling
1061 * 2 full tx rings per call */
1062 if (unlikely(++limit
> 2 * tx
->mask
))
1065 /* start the queue if we've stopped it */
1066 if (netif_queue_stopped(mgp
->dev
)
1067 && tx
->req
- tx
->done
< (tx
->mask
>> 1)) {
1069 netif_wake_queue(mgp
->dev
);
1073 static inline void myri10ge_clean_rx_done(struct myri10ge_priv
*mgp
, int *limit
)
1075 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1076 unsigned long rx_bytes
= 0;
1077 unsigned long rx_packets
= 0;
1078 unsigned long rx_ok
;
1080 int idx
= rx_done
->idx
;
1081 int cnt
= rx_done
->cnt
;
1085 while (rx_done
->entry
[idx
].length
!= 0 && *limit
!= 0) {
1086 length
= ntohs(rx_done
->entry
[idx
].length
);
1087 rx_done
->entry
[idx
].length
= 0;
1088 checksum
= csum_unfold(rx_done
->entry
[idx
].checksum
);
1089 if (length
<= mgp
->small_bytes
)
1090 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_small
,
1094 rx_ok
= myri10ge_rx_done(mgp
, &mgp
->rx_big
,
1097 rx_packets
+= rx_ok
;
1098 rx_bytes
+= rx_ok
* (unsigned long)length
;
1100 idx
= cnt
& (myri10ge_max_intr_slots
- 1);
1102 /* limit potential for livelock by only handling a
1103 * limited number of frames. */
1108 mgp
->stats
.rx_packets
+= rx_packets
;
1109 mgp
->stats
.rx_bytes
+= rx_bytes
;
1111 /* restock receive rings if needed */
1112 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
< myri10ge_fill_thresh
)
1113 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1114 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1115 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
< myri10ge_fill_thresh
)
1116 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1120 static inline void myri10ge_check_statblock(struct myri10ge_priv
*mgp
)
1122 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1124 if (unlikely(stats
->stats_updated
)) {
1125 if (mgp
->link_state
!= stats
->link_up
) {
1126 mgp
->link_state
= stats
->link_up
;
1127 if (mgp
->link_state
) {
1128 if (netif_msg_link(mgp
))
1130 "myri10ge: %s: link up\n",
1132 netif_carrier_on(mgp
->dev
);
1133 mgp
->link_changes
++;
1135 if (netif_msg_link(mgp
))
1137 "myri10ge: %s: link down\n",
1139 netif_carrier_off(mgp
->dev
);
1140 mgp
->link_changes
++;
1143 if (mgp
->rdma_tags_available
!=
1144 ntohl(mgp
->fw_stats
->rdma_tags_available
)) {
1145 mgp
->rdma_tags_available
=
1146 ntohl(mgp
->fw_stats
->rdma_tags_available
);
1147 printk(KERN_WARNING
"myri10ge: %s: RDMA timed out! "
1148 "%d tags left\n", mgp
->dev
->name
,
1149 mgp
->rdma_tags_available
);
1151 mgp
->down_cnt
+= stats
->link_down
;
1152 if (stats
->link_down
)
1153 wake_up(&mgp
->down_wq
);
1157 static int myri10ge_poll(struct net_device
*netdev
, int *budget
)
1159 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1160 struct myri10ge_rx_done
*rx_done
= &mgp
->rx_done
;
1161 int limit
, orig_limit
, work_done
;
1163 /* process as many rx events as NAPI will allow */
1164 limit
= min(*budget
, netdev
->quota
);
1166 myri10ge_clean_rx_done(mgp
, &limit
);
1167 work_done
= orig_limit
- limit
;
1168 *budget
-= work_done
;
1169 netdev
->quota
-= work_done
;
1171 if (rx_done
->entry
[rx_done
->idx
].length
== 0 || !netif_running(netdev
)) {
1172 netif_rx_complete(netdev
);
1173 put_be32(htonl(3), mgp
->irq_claim
);
1179 static irqreturn_t
myri10ge_intr(int irq
, void *arg
)
1181 struct myri10ge_priv
*mgp
= arg
;
1182 struct mcp_irq_data
*stats
= mgp
->fw_stats
;
1183 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1184 u32 send_done_count
;
1187 /* make sure it is our IRQ, and that the DMA has finished */
1188 if (unlikely(!stats
->valid
))
1191 /* low bit indicates receives are present, so schedule
1192 * napi poll handler */
1193 if (stats
->valid
& 1)
1194 netif_rx_schedule(mgp
->dev
);
1196 if (!mgp
->msi_enabled
) {
1197 put_be32(0, mgp
->irq_deassert
);
1198 if (!myri10ge_deassert_wait
)
1204 /* Wait for IRQ line to go low, if using INTx */
1208 /* check for transmit completes and receives */
1209 send_done_count
= ntohl(stats
->send_done_count
);
1210 if (send_done_count
!= tx
->pkt_done
)
1211 myri10ge_tx_done(mgp
, (int)send_done_count
);
1212 if (unlikely(i
> myri10ge_max_irq_loops
)) {
1213 printk(KERN_WARNING
"myri10ge: %s: irq stuck?\n",
1216 schedule_work(&mgp
->watchdog_work
);
1218 if (likely(stats
->valid
== 0))
1224 myri10ge_check_statblock(mgp
);
1226 put_be32(htonl(3), mgp
->irq_claim
+ 1);
1227 return (IRQ_HANDLED
);
1231 myri10ge_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
1233 cmd
->autoneg
= AUTONEG_DISABLE
;
1234 cmd
->speed
= SPEED_10000
;
1235 cmd
->duplex
= DUPLEX_FULL
;
1240 myri10ge_get_drvinfo(struct net_device
*netdev
, struct ethtool_drvinfo
*info
)
1242 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1244 strlcpy(info
->driver
, "myri10ge", sizeof(info
->driver
));
1245 strlcpy(info
->version
, MYRI10GE_VERSION_STR
, sizeof(info
->version
));
1246 strlcpy(info
->fw_version
, mgp
->fw_version
, sizeof(info
->fw_version
));
1247 strlcpy(info
->bus_info
, pci_name(mgp
->pdev
), sizeof(info
->bus_info
));
1251 myri10ge_get_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1253 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1254 coal
->rx_coalesce_usecs
= mgp
->intr_coal_delay
;
1259 myri10ge_set_coalesce(struct net_device
*netdev
, struct ethtool_coalesce
*coal
)
1261 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1263 mgp
->intr_coal_delay
= coal
->rx_coalesce_usecs
;
1264 put_be32(htonl(mgp
->intr_coal_delay
), mgp
->intr_coal_delay_ptr
);
1269 myri10ge_get_pauseparam(struct net_device
*netdev
,
1270 struct ethtool_pauseparam
*pause
)
1272 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1275 pause
->rx_pause
= mgp
->pause
;
1276 pause
->tx_pause
= mgp
->pause
;
1280 myri10ge_set_pauseparam(struct net_device
*netdev
,
1281 struct ethtool_pauseparam
*pause
)
1283 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1285 if (pause
->tx_pause
!= mgp
->pause
)
1286 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1287 if (pause
->rx_pause
!= mgp
->pause
)
1288 return myri10ge_change_pause(mgp
, pause
->tx_pause
);
1289 if (pause
->autoneg
!= 0)
1295 myri10ge_get_ringparam(struct net_device
*netdev
,
1296 struct ethtool_ringparam
*ring
)
1298 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1300 ring
->rx_mini_max_pending
= mgp
->rx_small
.mask
+ 1;
1301 ring
->rx_max_pending
= mgp
->rx_big
.mask
+ 1;
1302 ring
->rx_jumbo_max_pending
= 0;
1303 ring
->tx_max_pending
= mgp
->rx_small
.mask
+ 1;
1304 ring
->rx_mini_pending
= ring
->rx_mini_max_pending
;
1305 ring
->rx_pending
= ring
->rx_max_pending
;
1306 ring
->rx_jumbo_pending
= ring
->rx_jumbo_max_pending
;
1307 ring
->tx_pending
= ring
->tx_max_pending
;
1310 static u32
myri10ge_get_rx_csum(struct net_device
*netdev
)
1312 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1319 static int myri10ge_set_rx_csum(struct net_device
*netdev
, u32 csum_enabled
)
1321 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1323 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
1329 static const char myri10ge_gstrings_stats
[][ETH_GSTRING_LEN
] = {
1330 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1331 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1332 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1333 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1334 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1335 "tx_heartbeat_errors", "tx_window_errors",
1336 /* device-specific stats */
1337 "tx_boundary", "WC", "irq", "MSI",
1338 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1339 "serial_number", "tx_pkt_start", "tx_pkt_done",
1340 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1341 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1342 "link_changes", "link_up", "dropped_link_overflow",
1343 "dropped_link_error_or_filtered", "dropped_multicast_filtered",
1344 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1345 "dropped_no_big_buffer"
1348 #define MYRI10GE_NET_STATS_LEN 21
1349 #define MYRI10GE_STATS_LEN sizeof(myri10ge_gstrings_stats) / ETH_GSTRING_LEN
1352 myri10ge_get_strings(struct net_device
*netdev
, u32 stringset
, u8
* data
)
1354 switch (stringset
) {
1356 memcpy(data
, *myri10ge_gstrings_stats
,
1357 sizeof(myri10ge_gstrings_stats
));
1362 static int myri10ge_get_stats_count(struct net_device
*netdev
)
1364 return MYRI10GE_STATS_LEN
;
1368 myri10ge_get_ethtool_stats(struct net_device
*netdev
,
1369 struct ethtool_stats
*stats
, u64
* data
)
1371 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1374 for (i
= 0; i
< MYRI10GE_NET_STATS_LEN
; i
++)
1375 data
[i
] = ((unsigned long *)&mgp
->stats
)[i
];
1377 data
[i
++] = (unsigned int)mgp
->tx
.boundary
;
1378 data
[i
++] = (unsigned int)(mgp
->mtrr
>= 0);
1379 data
[i
++] = (unsigned int)mgp
->pdev
->irq
;
1380 data
[i
++] = (unsigned int)mgp
->msi_enabled
;
1381 data
[i
++] = (unsigned int)mgp
->read_dma
;
1382 data
[i
++] = (unsigned int)mgp
->write_dma
;
1383 data
[i
++] = (unsigned int)mgp
->read_write_dma
;
1384 data
[i
++] = (unsigned int)mgp
->serial_number
;
1385 data
[i
++] = (unsigned int)mgp
->tx
.pkt_start
;
1386 data
[i
++] = (unsigned int)mgp
->tx
.pkt_done
;
1387 data
[i
++] = (unsigned int)mgp
->tx
.req
;
1388 data
[i
++] = (unsigned int)mgp
->tx
.done
;
1389 data
[i
++] = (unsigned int)mgp
->rx_small
.cnt
;
1390 data
[i
++] = (unsigned int)mgp
->rx_big
.cnt
;
1391 data
[i
++] = (unsigned int)mgp
->wake_queue
;
1392 data
[i
++] = (unsigned int)mgp
->stop_queue
;
1393 data
[i
++] = (unsigned int)mgp
->watchdog_resets
;
1394 data
[i
++] = (unsigned int)mgp
->tx_linearized
;
1395 data
[i
++] = (unsigned int)mgp
->link_changes
;
1396 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->link_up
);
1397 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_overflow
);
1399 (unsigned int)ntohl(mgp
->fw_stats
->dropped_link_error_or_filtered
);
1401 (unsigned int)ntohl(mgp
->fw_stats
->dropped_multicast_filtered
);
1402 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_runt
);
1403 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_overrun
);
1404 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_small_buffer
);
1405 data
[i
++] = (unsigned int)ntohl(mgp
->fw_stats
->dropped_no_big_buffer
);
1408 static void myri10ge_set_msglevel(struct net_device
*netdev
, u32 value
)
1410 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1411 mgp
->msg_enable
= value
;
1414 static u32
myri10ge_get_msglevel(struct net_device
*netdev
)
1416 struct myri10ge_priv
*mgp
= netdev_priv(netdev
);
1417 return mgp
->msg_enable
;
1420 static const struct ethtool_ops myri10ge_ethtool_ops
= {
1421 .get_settings
= myri10ge_get_settings
,
1422 .get_drvinfo
= myri10ge_get_drvinfo
,
1423 .get_coalesce
= myri10ge_get_coalesce
,
1424 .set_coalesce
= myri10ge_set_coalesce
,
1425 .get_pauseparam
= myri10ge_get_pauseparam
,
1426 .set_pauseparam
= myri10ge_set_pauseparam
,
1427 .get_ringparam
= myri10ge_get_ringparam
,
1428 .get_rx_csum
= myri10ge_get_rx_csum
,
1429 .set_rx_csum
= myri10ge_set_rx_csum
,
1430 .get_tx_csum
= ethtool_op_get_tx_csum
,
1431 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
1432 .get_sg
= ethtool_op_get_sg
,
1433 .set_sg
= ethtool_op_set_sg
,
1434 .get_tso
= ethtool_op_get_tso
,
1435 .set_tso
= ethtool_op_set_tso
,
1436 .get_strings
= myri10ge_get_strings
,
1437 .get_stats_count
= myri10ge_get_stats_count
,
1438 .get_ethtool_stats
= myri10ge_get_ethtool_stats
,
1439 .set_msglevel
= myri10ge_set_msglevel
,
1440 .get_msglevel
= myri10ge_get_msglevel
1443 static int myri10ge_allocate_rings(struct net_device
*dev
)
1445 struct myri10ge_priv
*mgp
;
1446 struct myri10ge_cmd cmd
;
1447 int tx_ring_size
, rx_ring_size
;
1448 int tx_ring_entries
, rx_ring_entries
;
1452 mgp
= netdev_priv(dev
);
1454 /* get ring sizes */
1456 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_RING_SIZE
, &cmd
, 0);
1457 tx_ring_size
= cmd
.data0
;
1458 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_RX_RING_SIZE
, &cmd
, 0);
1459 rx_ring_size
= cmd
.data0
;
1461 tx_ring_entries
= tx_ring_size
/ sizeof(struct mcp_kreq_ether_send
);
1462 rx_ring_entries
= rx_ring_size
/ sizeof(struct mcp_dma_addr
);
1463 mgp
->tx
.mask
= tx_ring_entries
- 1;
1464 mgp
->rx_small
.mask
= mgp
->rx_big
.mask
= rx_ring_entries
- 1;
1466 /* allocate the host shadow rings */
1468 bytes
= 8 + (MYRI10GE_MAX_SEND_DESC_TSO
+ 4)
1469 * sizeof(*mgp
->tx
.req_list
);
1470 mgp
->tx
.req_bytes
= kzalloc(bytes
, GFP_KERNEL
);
1471 if (mgp
->tx
.req_bytes
== NULL
)
1472 goto abort_with_nothing
;
1474 /* ensure req_list entries are aligned to 8 bytes */
1475 mgp
->tx
.req_list
= (struct mcp_kreq_ether_send
*)
1476 ALIGN((unsigned long)mgp
->tx
.req_bytes
, 8);
1478 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.shadow
);
1479 mgp
->rx_small
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1480 if (mgp
->rx_small
.shadow
== NULL
)
1481 goto abort_with_tx_req_bytes
;
1483 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.shadow
);
1484 mgp
->rx_big
.shadow
= kzalloc(bytes
, GFP_KERNEL
);
1485 if (mgp
->rx_big
.shadow
== NULL
)
1486 goto abort_with_rx_small_shadow
;
1488 /* allocate the host info rings */
1490 bytes
= tx_ring_entries
* sizeof(*mgp
->tx
.info
);
1491 mgp
->tx
.info
= kzalloc(bytes
, GFP_KERNEL
);
1492 if (mgp
->tx
.info
== NULL
)
1493 goto abort_with_rx_big_shadow
;
1495 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_small
.info
);
1496 mgp
->rx_small
.info
= kzalloc(bytes
, GFP_KERNEL
);
1497 if (mgp
->rx_small
.info
== NULL
)
1498 goto abort_with_tx_info
;
1500 bytes
= rx_ring_entries
* sizeof(*mgp
->rx_big
.info
);
1501 mgp
->rx_big
.info
= kzalloc(bytes
, GFP_KERNEL
);
1502 if (mgp
->rx_big
.info
== NULL
)
1503 goto abort_with_rx_small_info
;
1505 /* Fill the receive rings */
1506 mgp
->rx_big
.cnt
= 0;
1507 mgp
->rx_small
.cnt
= 0;
1508 mgp
->rx_big
.fill_cnt
= 0;
1509 mgp
->rx_small
.fill_cnt
= 0;
1510 mgp
->rx_small
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1511 mgp
->rx_big
.page_offset
= MYRI10GE_ALLOC_SIZE
;
1512 mgp
->rx_small
.watchdog_needed
= 0;
1513 mgp
->rx_big
.watchdog_needed
= 0;
1514 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
1515 mgp
->small_bytes
+ MXGEFW_PAD
, 0);
1517 if (mgp
->rx_small
.fill_cnt
< mgp
->rx_small
.mask
+ 1) {
1518 printk(KERN_ERR
"myri10ge: %s: alloced only %d small bufs\n",
1519 dev
->name
, mgp
->rx_small
.fill_cnt
);
1520 goto abort_with_rx_small_ring
;
1523 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 0);
1524 if (mgp
->rx_big
.fill_cnt
< mgp
->rx_big
.mask
+ 1) {
1525 printk(KERN_ERR
"myri10ge: %s: alloced only %d big bufs\n",
1526 dev
->name
, mgp
->rx_big
.fill_cnt
);
1527 goto abort_with_rx_big_ring
;
1532 abort_with_rx_big_ring
:
1533 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1534 int idx
= i
& mgp
->rx_big
.mask
;
1535 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1537 put_page(mgp
->rx_big
.info
[idx
].page
);
1540 abort_with_rx_small_ring
:
1541 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1542 int idx
= i
& mgp
->rx_small
.mask
;
1543 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1544 mgp
->small_bytes
+ MXGEFW_PAD
);
1545 put_page(mgp
->rx_small
.info
[idx
].page
);
1548 kfree(mgp
->rx_big
.info
);
1550 abort_with_rx_small_info
:
1551 kfree(mgp
->rx_small
.info
);
1554 kfree(mgp
->tx
.info
);
1556 abort_with_rx_big_shadow
:
1557 kfree(mgp
->rx_big
.shadow
);
1559 abort_with_rx_small_shadow
:
1560 kfree(mgp
->rx_small
.shadow
);
1562 abort_with_tx_req_bytes
:
1563 kfree(mgp
->tx
.req_bytes
);
1564 mgp
->tx
.req_bytes
= NULL
;
1565 mgp
->tx
.req_list
= NULL
;
1571 static void myri10ge_free_rings(struct net_device
*dev
)
1573 struct myri10ge_priv
*mgp
;
1574 struct sk_buff
*skb
;
1575 struct myri10ge_tx_buf
*tx
;
1578 mgp
= netdev_priv(dev
);
1580 for (i
= mgp
->rx_big
.cnt
; i
< mgp
->rx_big
.fill_cnt
; i
++) {
1581 idx
= i
& mgp
->rx_big
.mask
;
1582 if (i
== mgp
->rx_big
.fill_cnt
- 1)
1583 mgp
->rx_big
.info
[idx
].page_offset
= MYRI10GE_ALLOC_SIZE
;
1584 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_big
.info
[idx
],
1586 put_page(mgp
->rx_big
.info
[idx
].page
);
1589 for (i
= mgp
->rx_small
.cnt
; i
< mgp
->rx_small
.fill_cnt
; i
++) {
1590 idx
= i
& mgp
->rx_small
.mask
;
1591 if (i
== mgp
->rx_small
.fill_cnt
- 1)
1592 mgp
->rx_small
.info
[idx
].page_offset
=
1593 MYRI10GE_ALLOC_SIZE
;
1594 myri10ge_unmap_rx_page(mgp
->pdev
, &mgp
->rx_small
.info
[idx
],
1595 mgp
->small_bytes
+ MXGEFW_PAD
);
1596 put_page(mgp
->rx_small
.info
[idx
].page
);
1599 while (tx
->done
!= tx
->req
) {
1600 idx
= tx
->done
& tx
->mask
;
1601 skb
= tx
->info
[idx
].skb
;
1604 tx
->info
[idx
].skb
= NULL
;
1606 len
= pci_unmap_len(&tx
->info
[idx
], len
);
1607 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
1609 mgp
->stats
.tx_dropped
++;
1610 dev_kfree_skb_any(skb
);
1612 pci_unmap_single(mgp
->pdev
,
1613 pci_unmap_addr(&tx
->info
[idx
],
1618 pci_unmap_page(mgp
->pdev
,
1619 pci_unmap_addr(&tx
->info
[idx
],
1624 kfree(mgp
->rx_big
.info
);
1626 kfree(mgp
->rx_small
.info
);
1628 kfree(mgp
->tx
.info
);
1630 kfree(mgp
->rx_big
.shadow
);
1632 kfree(mgp
->rx_small
.shadow
);
1634 kfree(mgp
->tx
.req_bytes
);
1635 mgp
->tx
.req_bytes
= NULL
;
1636 mgp
->tx
.req_list
= NULL
;
1639 static int myri10ge_request_irq(struct myri10ge_priv
*mgp
)
1641 struct pci_dev
*pdev
= mgp
->pdev
;
1645 status
= pci_enable_msi(pdev
);
1648 "Error %d setting up MSI; falling back to xPIC\n",
1651 mgp
->msi_enabled
= 1;
1653 mgp
->msi_enabled
= 0;
1655 status
= request_irq(pdev
->irq
, myri10ge_intr
, IRQF_SHARED
,
1656 mgp
->dev
->name
, mgp
);
1658 dev_err(&pdev
->dev
, "failed to allocate IRQ\n");
1659 if (mgp
->msi_enabled
)
1660 pci_disable_msi(pdev
);
1665 static void myri10ge_free_irq(struct myri10ge_priv
*mgp
)
1667 struct pci_dev
*pdev
= mgp
->pdev
;
1669 free_irq(pdev
->irq
, mgp
);
1670 if (mgp
->msi_enabled
)
1671 pci_disable_msi(pdev
);
1674 static int myri10ge_open(struct net_device
*dev
)
1676 struct myri10ge_priv
*mgp
;
1677 struct myri10ge_cmd cmd
;
1678 int status
, big_pow2
;
1680 mgp
= netdev_priv(dev
);
1682 if (mgp
->running
!= MYRI10GE_ETH_STOPPED
)
1685 mgp
->running
= MYRI10GE_ETH_STARTING
;
1686 status
= myri10ge_reset(mgp
);
1688 printk(KERN_ERR
"myri10ge: %s: failed reset\n", dev
->name
);
1689 goto abort_with_nothing
;
1692 status
= myri10ge_request_irq(mgp
);
1694 goto abort_with_nothing
;
1696 /* decide what small buffer size to use. For good TCP rx
1697 * performance, it is important to not receive 1514 byte
1698 * frames into jumbo buffers, as it confuses the socket buffer
1699 * accounting code, leading to drops and erratic performance.
1702 if (dev
->mtu
<= ETH_DATA_LEN
)
1703 /* enough for a TCP header */
1704 mgp
->small_bytes
= (128 > SMP_CACHE_BYTES
)
1705 ? (128 - MXGEFW_PAD
)
1706 : (SMP_CACHE_BYTES
- MXGEFW_PAD
);
1708 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1709 mgp
->small_bytes
= VLAN_ETH_FRAME_LEN
;
1711 /* Override the small buffer size? */
1712 if (myri10ge_small_bytes
> 0)
1713 mgp
->small_bytes
= myri10ge_small_bytes
;
1715 /* get the lanai pointers to the send and receive rings */
1717 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SEND_OFFSET
, &cmd
, 0);
1719 (struct mcp_kreq_ether_send __iomem
*)(mgp
->sram
+ cmd
.data0
);
1722 myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_SMALL_RX_OFFSET
, &cmd
, 0);
1723 mgp
->rx_small
.lanai
=
1724 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1726 status
|= myri10ge_send_cmd(mgp
, MXGEFW_CMD_GET_BIG_RX_OFFSET
, &cmd
, 0);
1728 (struct mcp_kreq_ether_recv __iomem
*)(mgp
->sram
+ cmd
.data0
);
1732 "myri10ge: %s: failed to get ring sizes or locations\n",
1734 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1735 goto abort_with_irq
;
1738 if (myri10ge_wcfifo
&& mgp
->mtrr
>= 0) {
1739 mgp
->tx
.wc_fifo
= (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_SEND_4
;
1740 mgp
->rx_small
.wc_fifo
=
1741 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_SMALL
;
1742 mgp
->rx_big
.wc_fifo
=
1743 (u8 __iomem
*) mgp
->sram
+ MXGEFW_ETH_RECV_BIG
;
1745 mgp
->tx
.wc_fifo
= NULL
;
1746 mgp
->rx_small
.wc_fifo
= NULL
;
1747 mgp
->rx_big
.wc_fifo
= NULL
;
1750 /* Firmware needs the big buff size as a power of 2. Lie and
1751 * tell him the buffer is larger, because we only use 1
1752 * buffer/pkt, and the mtu will prevent overruns.
1754 big_pow2
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1755 if (big_pow2
< MYRI10GE_ALLOC_SIZE
/ 2) {
1756 while ((big_pow2
& (big_pow2
- 1)) != 0)
1758 mgp
->big_bytes
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ MXGEFW_PAD
;
1760 big_pow2
= MYRI10GE_ALLOC_SIZE
;
1761 mgp
->big_bytes
= big_pow2
;
1764 status
= myri10ge_allocate_rings(dev
);
1766 goto abort_with_irq
;
1768 /* now give firmware buffers sizes, and MTU */
1769 cmd
.data0
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
;
1770 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_MTU
, &cmd
, 0);
1771 cmd
.data0
= mgp
->small_bytes
;
1773 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE
, &cmd
, 0);
1774 cmd
.data0
= big_pow2
;
1776 myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_BIG_BUFFER_SIZE
, &cmd
, 0);
1778 printk(KERN_ERR
"myri10ge: %s: Couldn't set buffer sizes\n",
1780 goto abort_with_rings
;
1783 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(mgp
->fw_stats_bus
);
1784 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(mgp
->fw_stats_bus
);
1785 cmd
.data2
= sizeof(struct mcp_irq_data
);
1786 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_SET_STATS_DMA_V2
, &cmd
, 0);
1787 if (status
== -ENOSYS
) {
1788 dma_addr_t bus
= mgp
->fw_stats_bus
;
1789 bus
+= offsetof(struct mcp_irq_data
, send_done_count
);
1790 cmd
.data0
= MYRI10GE_LOWPART_TO_U32(bus
);
1791 cmd
.data1
= MYRI10GE_HIGHPART_TO_U32(bus
);
1792 status
= myri10ge_send_cmd(mgp
,
1793 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE
,
1795 /* Firmware cannot support multicast without STATS_DMA_V2 */
1796 mgp
->fw_multicast_support
= 0;
1798 mgp
->fw_multicast_support
= 1;
1801 printk(KERN_ERR
"myri10ge: %s: Couldn't set stats DMA\n",
1803 goto abort_with_rings
;
1806 mgp
->link_state
= htonl(~0U);
1807 mgp
->rdma_tags_available
= 15;
1809 netif_poll_enable(mgp
->dev
); /* must happen prior to any irq */
1811 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_UP
, &cmd
, 0);
1813 printk(KERN_ERR
"myri10ge: %s: Couldn't bring up link\n",
1815 goto abort_with_rings
;
1818 mgp
->wake_queue
= 0;
1819 mgp
->stop_queue
= 0;
1820 mgp
->running
= MYRI10GE_ETH_RUNNING
;
1821 mgp
->watchdog_timer
.expires
= jiffies
+ myri10ge_watchdog_timeout
* HZ
;
1822 add_timer(&mgp
->watchdog_timer
);
1823 netif_wake_queue(dev
);
1827 myri10ge_free_rings(dev
);
1830 myri10ge_free_irq(mgp
);
1833 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1837 static int myri10ge_close(struct net_device
*dev
)
1839 struct myri10ge_priv
*mgp
;
1840 struct myri10ge_cmd cmd
;
1841 int status
, old_down_cnt
;
1843 mgp
= netdev_priv(dev
);
1845 if (mgp
->running
!= MYRI10GE_ETH_RUNNING
)
1848 if (mgp
->tx
.req_bytes
== NULL
)
1851 del_timer_sync(&mgp
->watchdog_timer
);
1852 mgp
->running
= MYRI10GE_ETH_STOPPING
;
1853 netif_poll_disable(mgp
->dev
);
1854 netif_carrier_off(dev
);
1855 netif_stop_queue(dev
);
1856 old_down_cnt
= mgp
->down_cnt
;
1858 status
= myri10ge_send_cmd(mgp
, MXGEFW_CMD_ETHERNET_DOWN
, &cmd
, 0);
1860 printk(KERN_ERR
"myri10ge: %s: Couldn't bring down link\n",
1863 wait_event_timeout(mgp
->down_wq
, old_down_cnt
!= mgp
->down_cnt
, HZ
);
1864 if (old_down_cnt
== mgp
->down_cnt
)
1865 printk(KERN_ERR
"myri10ge: %s never got down irq\n", dev
->name
);
1867 netif_tx_disable(dev
);
1868 myri10ge_free_irq(mgp
);
1869 myri10ge_free_rings(dev
);
1871 mgp
->running
= MYRI10GE_ETH_STOPPED
;
1875 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1876 * backwards one at a time and handle ring wraps */
1879 myri10ge_submit_req_backwards(struct myri10ge_tx_buf
*tx
,
1880 struct mcp_kreq_ether_send
*src
, int cnt
)
1882 int idx
, starting_slot
;
1883 starting_slot
= tx
->req
;
1886 idx
= (starting_slot
+ cnt
) & tx
->mask
;
1887 myri10ge_pio_copy(&tx
->lanai
[idx
], &src
[cnt
], sizeof(*src
));
1893 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
1894 * at most 32 bytes at a time, so as to avoid involving the software
1895 * pio handler in the nic. We re-write the first segment's flags
1896 * to mark them valid only after writing the entire chain.
1900 myri10ge_submit_req(struct myri10ge_tx_buf
*tx
, struct mcp_kreq_ether_send
*src
,
1904 struct mcp_kreq_ether_send __iomem
*dstp
, *dst
;
1905 struct mcp_kreq_ether_send
*srcp
;
1908 idx
= tx
->req
& tx
->mask
;
1910 last_flags
= src
->flags
;
1913 dst
= dstp
= &tx
->lanai
[idx
];
1916 if ((idx
+ cnt
) < tx
->mask
) {
1917 for (i
= 0; i
< (cnt
- 1); i
+= 2) {
1918 myri10ge_pio_copy(dstp
, srcp
, 2 * sizeof(*src
));
1919 mb(); /* force write every 32 bytes */
1924 /* submit all but the first request, and ensure
1925 * that it is submitted below */
1926 myri10ge_submit_req_backwards(tx
, src
, cnt
);
1930 /* submit the first request */
1931 myri10ge_pio_copy(dstp
, srcp
, sizeof(*src
));
1932 mb(); /* barrier before setting valid flag */
1935 /* re-write the last 32-bits with the valid flags */
1936 src
->flags
= last_flags
;
1937 put_be32(*((__be32
*) src
+ 3), (__be32 __iomem
*) dst
+ 3);
1943 myri10ge_submit_req_wc(struct myri10ge_tx_buf
*tx
,
1944 struct mcp_kreq_ether_send
*src
, int cnt
)
1949 myri10ge_pio_copy(tx
->wc_fifo
, src
, 64);
1955 /* pad it to 64 bytes. The src is 64 bytes bigger than it
1956 * needs to be so that we don't overrun it */
1957 myri10ge_pio_copy(tx
->wc_fifo
+ MXGEFW_ETH_SEND_OFFSET(cnt
),
1964 * Transmit a packet. We need to split the packet so that a single
1965 * segment does not cross myri10ge->tx.boundary, so this makes segment
1966 * counting tricky. So rather than try to count segments up front, we
1967 * just give up if there are too few segments to hold a reasonably
1968 * fragmented packet currently available. If we run
1969 * out of segments while preparing a packet for DMA, we just linearize
1973 static int myri10ge_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1975 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
1976 struct mcp_kreq_ether_send
*req
;
1977 struct myri10ge_tx_buf
*tx
= &mgp
->tx
;
1978 struct skb_frag_struct
*frag
;
1981 __be32 high_swapped
;
1983 int idx
, last_idx
, avail
, frag_cnt
, frag_idx
, count
, mss
, max_segments
;
1984 u16 pseudo_hdr_offset
, cksum_offset
;
1985 int cum_len
, seglen
, boundary
, rdma_count
;
1990 avail
= tx
->mask
- 1 - (tx
->req
- tx
->done
);
1993 max_segments
= MXGEFW_MAX_SEND_DESC
;
1995 if (skb
->len
> (dev
->mtu
+ ETH_HLEN
)) {
1996 mss
= skb_shinfo(skb
)->gso_size
;
1998 max_segments
= MYRI10GE_MAX_SEND_DESC_TSO
;
2001 if ((unlikely(avail
< max_segments
))) {
2002 /* we are out of transmit resources */
2004 netif_stop_queue(dev
);
2008 /* Setup checksum offloading, if needed */
2010 pseudo_hdr_offset
= 0;
2012 flags
= (MXGEFW_FLAGS_NO_TSO
| MXGEFW_FLAGS_FIRST
);
2013 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2014 cksum_offset
= (skb
->h
.raw
- skb
->data
);
2015 pseudo_hdr_offset
= cksum_offset
+ skb
->csum_offset
;
2016 /* If the headers are excessively large, then we must
2017 * fall back to a software checksum */
2018 if (unlikely(cksum_offset
> 255 || pseudo_hdr_offset
> 127)) {
2019 if (skb_checksum_help(skb
))
2022 pseudo_hdr_offset
= 0;
2024 odd_flag
= MXGEFW_FLAGS_ALIGN_ODD
;
2025 flags
|= MXGEFW_FLAGS_CKSUM
;
2031 if (mss
) { /* TSO */
2032 /* this removes any CKSUM flag from before */
2033 flags
= (MXGEFW_FLAGS_TSO_HDR
| MXGEFW_FLAGS_FIRST
);
2035 /* negative cum_len signifies to the
2036 * send loop that we are still in the
2037 * header portion of the TSO packet.
2038 * TSO header must be at most 134 bytes long */
2039 cum_len
= -((skb
->h
.raw
- skb
->data
) + (skb
->h
.th
->doff
<< 2));
2041 /* for TSO, pseudo_hdr_offset holds mss.
2042 * The firmware figures out where to put
2043 * the checksum by parsing the header. */
2044 pseudo_hdr_offset
= mss
;
2046 /* Mark small packets, and pad out tiny packets */
2047 if (skb
->len
<= MXGEFW_SEND_SMALL_SIZE
) {
2048 flags
|= MXGEFW_FLAGS_SMALL
;
2050 /* pad frames to at least ETH_ZLEN bytes */
2051 if (unlikely(skb
->len
< ETH_ZLEN
)) {
2052 if (skb_padto(skb
, ETH_ZLEN
)) {
2053 /* The packet is gone, so we must
2055 mgp
->stats
.tx_dropped
+= 1;
2058 /* adjust the len to account for the zero pad
2059 * so that the nic can know how long it is */
2060 skb
->len
= ETH_ZLEN
;
2064 /* map the skb for DMA */
2065 len
= skb
->len
- skb
->data_len
;
2066 idx
= tx
->req
& tx
->mask
;
2067 tx
->info
[idx
].skb
= skb
;
2068 bus
= pci_map_single(mgp
->pdev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2069 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2070 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2072 frag_cnt
= skb_shinfo(skb
)->nr_frags
;
2077 /* "rdma_count" is the number of RDMAs belonging to the
2078 * current packet BEFORE the current send request. For
2079 * non-TSO packets, this is equal to "count".
2080 * For TSO packets, rdma_count needs to be reset
2081 * to 0 after a segment cut.
2083 * The rdma_count field of the send request is
2084 * the number of RDMAs of the packet starting at
2085 * that request. For TSO send requests with one ore more cuts
2086 * in the middle, this is the number of RDMAs starting
2087 * after the last cut in the request. All previous
2088 * segments before the last cut implicitly have 1 RDMA.
2090 * Since the number of RDMAs is not known beforehand,
2091 * it must be filled-in retroactively - after each
2092 * segmentation cut or at the end of the entire packet.
2096 /* Break the SKB or Fragment up into pieces which
2097 * do not cross mgp->tx.boundary */
2098 low
= MYRI10GE_LOWPART_TO_U32(bus
);
2099 high_swapped
= htonl(MYRI10GE_HIGHPART_TO_U32(bus
));
2104 if (unlikely(count
== max_segments
))
2105 goto abort_linearize
;
2107 boundary
= (low
+ tx
->boundary
) & ~(tx
->boundary
- 1);
2108 seglen
= boundary
- low
;
2111 flags_next
= flags
& ~MXGEFW_FLAGS_FIRST
;
2112 cum_len_next
= cum_len
+ seglen
;
2113 if (mss
) { /* TSO */
2114 (req
- rdma_count
)->rdma_count
= rdma_count
+ 1;
2116 if (likely(cum_len
>= 0)) { /* payload */
2117 int next_is_first
, chop
;
2119 chop
= (cum_len_next
> mss
);
2120 cum_len_next
= cum_len_next
% mss
;
2121 next_is_first
= (cum_len_next
== 0);
2122 flags
|= chop
* MXGEFW_FLAGS_TSO_CHOP
;
2123 flags_next
|= next_is_first
*
2125 rdma_count
|= -(chop
| next_is_first
);
2126 rdma_count
+= chop
& !next_is_first
;
2127 } else if (likely(cum_len_next
>= 0)) { /* header ends */
2133 small
= (mss
<= MXGEFW_SEND_SMALL_SIZE
);
2134 flags_next
= MXGEFW_FLAGS_TSO_PLD
|
2135 MXGEFW_FLAGS_FIRST
|
2136 (small
* MXGEFW_FLAGS_SMALL
);
2139 req
->addr_high
= high_swapped
;
2140 req
->addr_low
= htonl(low
);
2141 req
->pseudo_hdr_offset
= htons(pseudo_hdr_offset
);
2142 req
->pad
= 0; /* complete solid 16-byte block; does this matter? */
2143 req
->rdma_count
= 1;
2144 req
->length
= htons(seglen
);
2145 req
->cksum_offset
= cksum_offset
;
2146 req
->flags
= flags
| ((cum_len
& 1) * odd_flag
);
2150 cum_len
= cum_len_next
;
2155 if (unlikely(cksum_offset
> seglen
))
2156 cksum_offset
-= seglen
;
2160 if (frag_idx
== frag_cnt
)
2163 /* map next fragment for DMA */
2164 idx
= (count
+ tx
->req
) & tx
->mask
;
2165 frag
= &skb_shinfo(skb
)->frags
[frag_idx
];
2168 bus
= pci_map_page(mgp
->pdev
, frag
->page
, frag
->page_offset
,
2169 len
, PCI_DMA_TODEVICE
);
2170 pci_unmap_addr_set(&tx
->info
[idx
], bus
, bus
);
2171 pci_unmap_len_set(&tx
->info
[idx
], len
, len
);
2174 (req
- rdma_count
)->rdma_count
= rdma_count
;
2178 req
->flags
|= MXGEFW_FLAGS_TSO_LAST
;
2179 } while (!(req
->flags
& (MXGEFW_FLAGS_TSO_CHOP
|
2180 MXGEFW_FLAGS_FIRST
)));
2181 idx
= ((count
- 1) + tx
->req
) & tx
->mask
;
2182 tx
->info
[idx
].last
= 1;
2183 if (tx
->wc_fifo
== NULL
)
2184 myri10ge_submit_req(tx
, tx
->req_list
, count
);
2186 myri10ge_submit_req_wc(tx
, tx
->req_list
, count
);
2188 if ((avail
- count
) < MXGEFW_MAX_SEND_DESC
) {
2190 netif_stop_queue(dev
);
2192 dev
->trans_start
= jiffies
;
2196 /* Free any DMA resources we've alloced and clear out the skb
2197 * slot so as to not trip up assertions, and to avoid a
2198 * double-free if linearizing fails */
2200 last_idx
= (idx
+ 1) & tx
->mask
;
2201 idx
= tx
->req
& tx
->mask
;
2202 tx
->info
[idx
].skb
= NULL
;
2204 len
= pci_unmap_len(&tx
->info
[idx
], len
);
2206 if (tx
->info
[idx
].skb
!= NULL
)
2207 pci_unmap_single(mgp
->pdev
,
2208 pci_unmap_addr(&tx
->info
[idx
],
2212 pci_unmap_page(mgp
->pdev
,
2213 pci_unmap_addr(&tx
->info
[idx
],
2216 pci_unmap_len_set(&tx
->info
[idx
], len
, 0);
2217 tx
->info
[idx
].skb
= NULL
;
2219 idx
= (idx
+ 1) & tx
->mask
;
2220 } while (idx
!= last_idx
);
2221 if (skb_is_gso(skb
)) {
2223 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2228 if (skb_linearize(skb
))
2231 mgp
->tx_linearized
++;
2235 dev_kfree_skb_any(skb
);
2236 mgp
->stats
.tx_dropped
+= 1;
2241 static struct net_device_stats
*myri10ge_get_stats(struct net_device
*dev
)
2243 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2247 static void myri10ge_set_multicast_list(struct net_device
*dev
)
2249 struct myri10ge_cmd cmd
;
2250 struct myri10ge_priv
*mgp
;
2251 struct dev_mc_list
*mc_list
;
2252 __be32 data
[2] = { 0, 0 };
2255 mgp
= netdev_priv(dev
);
2256 /* can be called from atomic contexts,
2257 * pass 1 to force atomicity in myri10ge_send_cmd() */
2258 myri10ge_change_promisc(mgp
, dev
->flags
& IFF_PROMISC
, 1);
2260 /* This firmware is known to not support multicast */
2261 if (!mgp
->fw_multicast_support
|| mgp
->adopted_rx_filter_bug
)
2264 /* Disable multicast filtering */
2266 err
= myri10ge_send_cmd(mgp
, MXGEFW_ENABLE_ALLMULTI
, &cmd
, 1);
2268 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2269 " error status: %d\n", dev
->name
, err
);
2273 if (dev
->flags
& IFF_ALLMULTI
) {
2274 /* request to disable multicast filtering, so quit here */
2278 /* Flush the filters */
2280 err
= myri10ge_send_cmd(mgp
, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS
,
2284 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2285 ", error status: %d\n", dev
->name
, err
);
2289 /* Walk the multicast list, and add each address */
2290 for (mc_list
= dev
->mc_list
; mc_list
!= NULL
; mc_list
= mc_list
->next
) {
2291 memcpy(data
, &mc_list
->dmi_addr
, 6);
2292 cmd
.data0
= ntohl(data
[0]);
2293 cmd
.data1
= ntohl(data
[1]);
2294 err
= myri10ge_send_cmd(mgp
, MXGEFW_JOIN_MULTICAST_GROUP
,
2298 printk(KERN_ERR
"myri10ge: %s: Failed "
2299 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2300 "%d\t", dev
->name
, err
);
2301 printk(KERN_ERR
"MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
2302 ((unsigned char *)&mc_list
->dmi_addr
)[0],
2303 ((unsigned char *)&mc_list
->dmi_addr
)[1],
2304 ((unsigned char *)&mc_list
->dmi_addr
)[2],
2305 ((unsigned char *)&mc_list
->dmi_addr
)[3],
2306 ((unsigned char *)&mc_list
->dmi_addr
)[4],
2307 ((unsigned char *)&mc_list
->dmi_addr
)[5]
2312 /* Enable multicast filtering */
2313 err
= myri10ge_send_cmd(mgp
, MXGEFW_DISABLE_ALLMULTI
, &cmd
, 1);
2315 printk(KERN_ERR
"myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2316 "error status: %d\n", dev
->name
, err
);
2326 static int myri10ge_set_mac_address(struct net_device
*dev
, void *addr
)
2328 struct sockaddr
*sa
= addr
;
2329 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2332 if (!is_valid_ether_addr(sa
->sa_data
))
2333 return -EADDRNOTAVAIL
;
2335 status
= myri10ge_update_mac_address(mgp
, sa
->sa_data
);
2338 "myri10ge: %s: changing mac address failed with %d\n",
2343 /* change the dev structure */
2344 memcpy(dev
->dev_addr
, sa
->sa_data
, 6);
2348 static int myri10ge_change_mtu(struct net_device
*dev
, int new_mtu
)
2350 struct myri10ge_priv
*mgp
= netdev_priv(dev
);
2353 if ((new_mtu
< 68) || (ETH_HLEN
+ new_mtu
> MYRI10GE_MAX_ETHER_MTU
)) {
2354 printk(KERN_ERR
"myri10ge: %s: new mtu (%d) is not valid\n",
2355 dev
->name
, new_mtu
);
2358 printk(KERN_INFO
"%s: changing mtu from %d to %d\n",
2359 dev
->name
, dev
->mtu
, new_mtu
);
2361 /* if we change the mtu on an active device, we must
2362 * reset the device so the firmware sees the change */
2363 myri10ge_close(dev
);
2373 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2374 * Only do it if the bridge is a root port since we don't want to disturb
2375 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2378 static void myri10ge_enable_ecrc(struct myri10ge_priv
*mgp
)
2380 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2381 struct device
*dev
= &mgp
->pdev
->dev
;
2388 if (!myri10ge_ecrc_enable
|| !bridge
)
2391 /* check that the bridge is a root port */
2392 cap
= pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2393 pci_read_config_word(bridge
, cap
+ PCI_CAP_FLAGS
, &val
);
2394 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2395 if (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
) {
2396 if (myri10ge_ecrc_enable
> 1) {
2397 struct pci_dev
*old_bridge
= bridge
;
2399 /* Walk the hierarchy up to the root port
2400 * where ECRC has to be enabled */
2402 bridge
= bridge
->bus
->self
;
2405 "Failed to find root port"
2406 " to force ECRC\n");
2410 pci_find_capability(bridge
, PCI_CAP_ID_EXP
);
2411 pci_read_config_word(bridge
,
2412 cap
+ PCI_CAP_FLAGS
, &val
);
2413 ext_type
= (val
& PCI_EXP_FLAGS_TYPE
) >> 4;
2414 } while (ext_type
!= PCI_EXP_TYPE_ROOT_PORT
);
2417 "Forcing ECRC on non-root port %s"
2418 " (enabling on root port %s)\n",
2419 pci_name(old_bridge
), pci_name(bridge
));
2422 "Not enabling ECRC on non-root port %s\n",
2428 cap
= pci_find_ext_capability(bridge
, PCI_EXT_CAP_ID_ERR
);
2432 ret
= pci_read_config_dword(bridge
, cap
+ PCI_ERR_CAP
, &err_cap
);
2434 dev_err(dev
, "failed reading ext-conf-space of %s\n",
2436 dev_err(dev
, "\t pci=nommconf in use? "
2437 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2440 if (!(err_cap
& PCI_ERR_CAP_ECRC_GENC
))
2443 err_cap
|= PCI_ERR_CAP_ECRC_GENE
;
2444 pci_write_config_dword(bridge
, cap
+ PCI_ERR_CAP
, err_cap
);
2445 dev_info(dev
, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge
));
2446 mgp
->tx
.boundary
= 4096;
2447 mgp
->fw_name
= myri10ge_fw_aligned
;
2451 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2452 * when the PCI-E Completion packets are aligned on an 8-byte
2453 * boundary. Some PCI-E chip sets always align Completion packets; on
2454 * the ones that do not, the alignment can be enforced by enabling
2455 * ECRC generation (if supported).
2457 * When PCI-E Completion packets are not aligned, it is actually more
2458 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2460 * If the driver can neither enable ECRC nor verify that it has
2461 * already been enabled, then it must use a firmware image which works
2462 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2463 * should also ensure that it never gives the device a Read-DMA which is
2464 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2465 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2466 * firmware image, and set tx.boundary to 4KB.
2469 #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2470 #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2472 static void myri10ge_select_firmware(struct myri10ge_priv
*mgp
)
2474 struct pci_dev
*bridge
= mgp
->pdev
->bus
->self
;
2476 mgp
->tx
.boundary
= 2048;
2477 mgp
->fw_name
= myri10ge_fw_unaligned
;
2479 if (myri10ge_force_firmware
== 0) {
2480 int link_width
, exp_cap
;
2483 exp_cap
= pci_find_capability(mgp
->pdev
, PCI_CAP_ID_EXP
);
2484 pci_read_config_word(mgp
->pdev
, exp_cap
+ PCI_EXP_LNKSTA
, &lnk
);
2485 link_width
= (lnk
>> 4) & 0x3f;
2487 myri10ge_enable_ecrc(mgp
);
2489 /* Check to see if Link is less than 8 or if the
2490 * upstream bridge is known to provide aligned
2492 if (link_width
< 8) {
2493 dev_info(&mgp
->pdev
->dev
, "PCIE x%d Link\n",
2495 mgp
->tx
.boundary
= 4096;
2496 mgp
->fw_name
= myri10ge_fw_aligned
;
2497 } else if (bridge
&&
2498 /* ServerWorks HT2000/HT1000 */
2499 ((bridge
->vendor
== PCI_VENDOR_ID_SERVERWORKS
2500 && bridge
->device
==
2501 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE
)
2502 /* All Intel E5000 PCIE ports */
2503 || (bridge
->vendor
== PCI_VENDOR_ID_INTEL
2504 && bridge
->device
>=
2505 PCI_DEVICE_ID_INTEL_E5000_PCIE23
2506 && bridge
->device
<=
2507 PCI_DEVICE_ID_INTEL_E5000_PCIE47
))) {
2508 dev_info(&mgp
->pdev
->dev
,
2509 "Assuming aligned completions (0x%x:0x%x)\n",
2510 bridge
->vendor
, bridge
->device
);
2511 mgp
->tx
.boundary
= 4096;
2512 mgp
->fw_name
= myri10ge_fw_aligned
;
2515 if (myri10ge_force_firmware
== 1) {
2516 dev_info(&mgp
->pdev
->dev
,
2517 "Assuming aligned completions (forced)\n");
2518 mgp
->tx
.boundary
= 4096;
2519 mgp
->fw_name
= myri10ge_fw_aligned
;
2521 dev_info(&mgp
->pdev
->dev
,
2522 "Assuming unaligned completions (forced)\n");
2523 mgp
->tx
.boundary
= 2048;
2524 mgp
->fw_name
= myri10ge_fw_unaligned
;
2527 if (myri10ge_fw_name
!= NULL
) {
2528 dev_info(&mgp
->pdev
->dev
, "overriding firmware to %s\n",
2530 mgp
->fw_name
= myri10ge_fw_name
;
2536 static int myri10ge_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2538 struct myri10ge_priv
*mgp
;
2539 struct net_device
*netdev
;
2541 mgp
= pci_get_drvdata(pdev
);
2546 netif_device_detach(netdev
);
2547 if (netif_running(netdev
)) {
2548 printk(KERN_INFO
"myri10ge: closing %s\n", netdev
->name
);
2550 myri10ge_close(netdev
);
2553 myri10ge_dummy_rdma(mgp
, 0);
2554 pci_save_state(pdev
);
2555 pci_disable_device(pdev
);
2557 return pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2560 static int myri10ge_resume(struct pci_dev
*pdev
)
2562 struct myri10ge_priv
*mgp
;
2563 struct net_device
*netdev
;
2567 mgp
= pci_get_drvdata(pdev
);
2571 pci_set_power_state(pdev
, 0); /* zeros conf space as a side effect */
2572 msleep(5); /* give card time to respond */
2573 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2574 if (vendor
== 0xffff) {
2575 printk(KERN_ERR
"myri10ge: %s: device disappeared!\n",
2580 status
= pci_restore_state(pdev
);
2584 status
= pci_enable_device(pdev
);
2586 dev_err(&pdev
->dev
, "failed to enable device\n");
2590 pci_set_master(pdev
);
2592 myri10ge_reset(mgp
);
2593 myri10ge_dummy_rdma(mgp
, 1);
2595 /* Save configuration space to be restored if the
2596 * nic resets due to a parity error */
2597 pci_save_state(pdev
);
2599 if (netif_running(netdev
)) {
2601 status
= myri10ge_open(netdev
);
2604 goto abort_with_enabled
;
2607 netif_device_attach(netdev
);
2612 pci_disable_device(pdev
);
2617 #endif /* CONFIG_PM */
2619 static u32
myri10ge_read_reboot(struct myri10ge_priv
*mgp
)
2621 struct pci_dev
*pdev
= mgp
->pdev
;
2622 int vs
= mgp
->vendor_specific_offset
;
2625 /*enter read32 mode */
2626 pci_write_config_byte(pdev
, vs
+ 0x10, 0x3);
2628 /*read REBOOT_STATUS (0xfffffff0) */
2629 pci_write_config_dword(pdev
, vs
+ 0x18, 0xfffffff0);
2630 pci_read_config_dword(pdev
, vs
+ 0x14, &reboot
);
2635 * This watchdog is used to check whether the board has suffered
2636 * from a parity error and needs to be recovered.
2638 static void myri10ge_watchdog(struct work_struct
*work
)
2640 struct myri10ge_priv
*mgp
=
2641 container_of(work
, struct myri10ge_priv
, watchdog_work
);
2646 mgp
->watchdog_resets
++;
2647 pci_read_config_word(mgp
->pdev
, PCI_COMMAND
, &cmd
);
2648 if ((cmd
& PCI_COMMAND_MASTER
) == 0) {
2649 /* Bus master DMA disabled? Check to see
2650 * if the card rebooted due to a parity error
2651 * For now, just report it */
2652 reboot
= myri10ge_read_reboot(mgp
);
2654 "myri10ge: %s: NIC rebooted (0x%x), resetting\n",
2655 mgp
->dev
->name
, reboot
);
2657 * A rebooted nic will come back with config space as
2658 * it was after power was applied to PCIe bus.
2659 * Attempt to restore config space which was saved
2660 * when the driver was loaded, or the last time the
2661 * nic was resumed from power saving mode.
2663 pci_restore_state(mgp
->pdev
);
2665 /* save state again for accounting reasons */
2666 pci_save_state(mgp
->pdev
);
2669 /* if we get back -1's from our slot, perhaps somebody
2670 * powered off our card. Don't try to reset it in
2672 if (cmd
== 0xffff) {
2673 pci_read_config_word(mgp
->pdev
, PCI_VENDOR_ID
, &vendor
);
2674 if (vendor
== 0xffff) {
2676 "myri10ge: %s: device disappeared!\n",
2681 /* Perhaps it is a software error. Try to reset */
2683 printk(KERN_ERR
"myri10ge: %s: device timeout, resetting\n",
2685 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2686 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2687 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2688 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2690 printk(KERN_INFO
"myri10ge: %s: %d %d %d %d %d\n",
2691 mgp
->dev
->name
, mgp
->tx
.req
, mgp
->tx
.done
,
2692 mgp
->tx
.pkt_start
, mgp
->tx
.pkt_done
,
2693 (int)ntohl(mgp
->fw_stats
->send_done_count
));
2696 myri10ge_close(mgp
->dev
);
2697 status
= myri10ge_load_firmware(mgp
);
2699 printk(KERN_ERR
"myri10ge: %s: failed to load firmware\n",
2702 myri10ge_open(mgp
->dev
);
2707 * We use our own timer routine rather than relying upon
2708 * netdev->tx_timeout because we have a very large hardware transmit
2709 * queue. Due to the large queue, the netdev->tx_timeout function
2710 * cannot detect a NIC with a parity error in a timely fashion if the
2711 * NIC is lightly loaded.
2713 static void myri10ge_watchdog_timer(unsigned long arg
)
2715 struct myri10ge_priv
*mgp
;
2717 mgp
= (struct myri10ge_priv
*)arg
;
2719 if (mgp
->rx_small
.watchdog_needed
) {
2720 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_small
,
2721 mgp
->small_bytes
+ MXGEFW_PAD
, 1);
2722 if (mgp
->rx_small
.fill_cnt
- mgp
->rx_small
.cnt
>=
2723 myri10ge_fill_thresh
)
2724 mgp
->rx_small
.watchdog_needed
= 0;
2726 if (mgp
->rx_big
.watchdog_needed
) {
2727 myri10ge_alloc_rx_pages(mgp
, &mgp
->rx_big
, mgp
->big_bytes
, 1);
2728 if (mgp
->rx_big
.fill_cnt
- mgp
->rx_big
.cnt
>=
2729 myri10ge_fill_thresh
)
2730 mgp
->rx_big
.watchdog_needed
= 0;
2733 if (mgp
->tx
.req
!= mgp
->tx
.done
&&
2734 mgp
->tx
.done
== mgp
->watchdog_tx_done
&&
2735 mgp
->watchdog_tx_req
!= mgp
->watchdog_tx_done
)
2736 /* nic seems like it might be stuck.. */
2737 schedule_work(&mgp
->watchdog_work
);
2740 mod_timer(&mgp
->watchdog_timer
,
2741 jiffies
+ myri10ge_watchdog_timeout
* HZ
);
2743 mgp
->watchdog_tx_done
= mgp
->tx
.done
;
2744 mgp
->watchdog_tx_req
= mgp
->tx
.req
;
2747 static int myri10ge_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2749 struct net_device
*netdev
;
2750 struct myri10ge_priv
*mgp
;
2751 struct device
*dev
= &pdev
->dev
;
2754 int status
= -ENXIO
;
2759 netdev
= alloc_etherdev(sizeof(*mgp
));
2760 if (netdev
== NULL
) {
2761 dev_err(dev
, "Could not allocate ethernet device\n");
2765 mgp
= netdev_priv(netdev
);
2766 memset(mgp
, 0, sizeof(*mgp
));
2769 mgp
->csum_flag
= MXGEFW_FLAGS_CKSUM
;
2770 mgp
->pause
= myri10ge_flow_control
;
2771 mgp
->intr_coal_delay
= myri10ge_intr_coal_delay
;
2772 mgp
->msg_enable
= netif_msg_init(myri10ge_debug
, MYRI10GE_MSG_DEFAULT
);
2773 init_waitqueue_head(&mgp
->down_wq
);
2775 if (pci_enable_device(pdev
)) {
2776 dev_err(&pdev
->dev
, "pci_enable_device call failed\n");
2778 goto abort_with_netdev
;
2780 myri10ge_select_firmware(mgp
);
2782 /* Find the vendor-specific cap so we can check
2783 * the reboot register later on */
2784 mgp
->vendor_specific_offset
2785 = pci_find_capability(pdev
, PCI_CAP_ID_VNDR
);
2787 /* Set our max read request to 4KB */
2788 cap
= pci_find_capability(pdev
, PCI_CAP_ID_EXP
);
2790 dev_err(&pdev
->dev
, "Bad PCI_CAP_ID_EXP location %d\n", cap
);
2791 goto abort_with_netdev
;
2793 status
= pci_read_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, &val
);
2795 dev_err(&pdev
->dev
, "Error %d reading PCI_EXP_DEVCTL\n",
2797 goto abort_with_netdev
;
2799 val
= (val
& ~PCI_EXP_DEVCTL_READRQ
) | (5 << 12);
2800 status
= pci_write_config_word(pdev
, cap
+ PCI_EXP_DEVCTL
, val
);
2802 dev_err(&pdev
->dev
, "Error %d writing PCI_EXP_DEVCTL\n",
2804 goto abort_with_netdev
;
2807 pci_set_master(pdev
);
2809 status
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
2813 "64-bit pci address mask was refused, trying 32-bit");
2814 status
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2817 dev_err(&pdev
->dev
, "Error %d setting DMA mask\n", status
);
2818 goto abort_with_netdev
;
2820 mgp
->cmd
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2821 &mgp
->cmd_bus
, GFP_KERNEL
);
2822 if (mgp
->cmd
== NULL
)
2823 goto abort_with_netdev
;
2825 mgp
->fw_stats
= dma_alloc_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2826 &mgp
->fw_stats_bus
, GFP_KERNEL
);
2827 if (mgp
->fw_stats
== NULL
)
2828 goto abort_with_cmd
;
2830 mgp
->board_span
= pci_resource_len(pdev
, 0);
2831 mgp
->iomem_base
= pci_resource_start(pdev
, 0);
2834 mgp
->mtrr
= mtrr_add(mgp
->iomem_base
, mgp
->board_span
,
2835 MTRR_TYPE_WRCOMB
, 1);
2837 /* Hack. need to get rid of these magic numbers */
2839 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
2840 if (mgp
->sram_size
> mgp
->board_span
) {
2841 dev_err(&pdev
->dev
, "board span %ld bytes too small\n",
2845 mgp
->sram
= ioremap(mgp
->iomem_base
, mgp
->board_span
);
2846 if (mgp
->sram
== NULL
) {
2847 dev_err(&pdev
->dev
, "ioremap failed for %ld bytes at 0x%lx\n",
2848 mgp
->board_span
, mgp
->iomem_base
);
2852 memcpy_fromio(mgp
->eeprom_strings
,
2853 mgp
->sram
+ mgp
->sram_size
- MYRI10GE_EEPROM_STRINGS_SIZE
,
2854 MYRI10GE_EEPROM_STRINGS_SIZE
);
2855 memset(mgp
->eeprom_strings
+ MYRI10GE_EEPROM_STRINGS_SIZE
- 2, 0, 2);
2856 status
= myri10ge_read_mac_addr(mgp
);
2858 goto abort_with_ioremap
;
2860 for (i
= 0; i
< ETH_ALEN
; i
++)
2861 netdev
->dev_addr
[i
] = mgp
->mac_addr
[i
];
2863 /* allocate rx done ring */
2864 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2865 mgp
->rx_done
.entry
= dma_alloc_coherent(&pdev
->dev
, bytes
,
2866 &mgp
->rx_done
.bus
, GFP_KERNEL
);
2867 if (mgp
->rx_done
.entry
== NULL
)
2868 goto abort_with_ioremap
;
2869 memset(mgp
->rx_done
.entry
, 0, bytes
);
2871 status
= myri10ge_load_firmware(mgp
);
2873 dev_err(&pdev
->dev
, "failed to load firmware\n");
2874 goto abort_with_rx_done
;
2877 status
= myri10ge_reset(mgp
);
2879 dev_err(&pdev
->dev
, "failed reset\n");
2880 goto abort_with_firmware
;
2883 pci_set_drvdata(pdev
, mgp
);
2884 if ((myri10ge_initial_mtu
+ ETH_HLEN
) > MYRI10GE_MAX_ETHER_MTU
)
2885 myri10ge_initial_mtu
= MYRI10GE_MAX_ETHER_MTU
- ETH_HLEN
;
2886 if ((myri10ge_initial_mtu
+ ETH_HLEN
) < 68)
2887 myri10ge_initial_mtu
= 68;
2888 netdev
->mtu
= myri10ge_initial_mtu
;
2889 netdev
->open
= myri10ge_open
;
2890 netdev
->stop
= myri10ge_close
;
2891 netdev
->hard_start_xmit
= myri10ge_xmit
;
2892 netdev
->get_stats
= myri10ge_get_stats
;
2893 netdev
->base_addr
= mgp
->iomem_base
;
2894 netdev
->change_mtu
= myri10ge_change_mtu
;
2895 netdev
->set_multicast_list
= myri10ge_set_multicast_list
;
2896 netdev
->set_mac_address
= myri10ge_set_mac_address
;
2897 netdev
->features
= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_TSO
;
2899 netdev
->features
|= NETIF_F_HIGHDMA
;
2900 netdev
->poll
= myri10ge_poll
;
2901 netdev
->weight
= myri10ge_napi_weight
;
2903 /* make sure we can get an irq, and that MSI can be
2904 * setup (if available). Also ensure netdev->irq
2905 * is set to correct value if MSI is enabled */
2906 status
= myri10ge_request_irq(mgp
);
2908 goto abort_with_firmware
;
2909 netdev
->irq
= pdev
->irq
;
2910 myri10ge_free_irq(mgp
);
2912 /* Save configuration space to be restored if the
2913 * nic resets due to a parity error */
2914 pci_save_state(pdev
);
2916 /* Setup the watchdog timer */
2917 setup_timer(&mgp
->watchdog_timer
, myri10ge_watchdog_timer
,
2918 (unsigned long)mgp
);
2920 SET_ETHTOOL_OPS(netdev
, &myri10ge_ethtool_ops
);
2921 INIT_WORK(&mgp
->watchdog_work
, myri10ge_watchdog
);
2922 status
= register_netdev(netdev
);
2924 dev_err(&pdev
->dev
, "register_netdev failed: %d\n", status
);
2925 goto abort_with_state
;
2927 dev_info(dev
, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2928 (mgp
->msi_enabled
? "MSI" : "xPIC"),
2929 netdev
->irq
, mgp
->tx
.boundary
, mgp
->fw_name
,
2930 (mgp
->mtrr
>= 0 ? "Enabled" : "Disabled"));
2935 pci_restore_state(pdev
);
2937 abort_with_firmware
:
2938 myri10ge_dummy_rdma(mgp
, 0);
2941 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2942 dma_free_coherent(&pdev
->dev
, bytes
,
2943 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
2951 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
2953 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
2954 mgp
->fw_stats
, mgp
->fw_stats_bus
);
2957 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
2958 mgp
->cmd
, mgp
->cmd_bus
);
2962 free_netdev(netdev
);
2969 * Does what is necessary to shutdown one Myrinet device. Called
2970 * once for each Myrinet card by the kernel when a module is
2973 static void myri10ge_remove(struct pci_dev
*pdev
)
2975 struct myri10ge_priv
*mgp
;
2976 struct net_device
*netdev
;
2979 mgp
= pci_get_drvdata(pdev
);
2983 flush_scheduled_work();
2985 unregister_netdev(netdev
);
2987 myri10ge_dummy_rdma(mgp
, 0);
2989 /* avoid a memory leak */
2990 pci_restore_state(pdev
);
2992 bytes
= myri10ge_max_intr_slots
* sizeof(*mgp
->rx_done
.entry
);
2993 dma_free_coherent(&pdev
->dev
, bytes
,
2994 mgp
->rx_done
.entry
, mgp
->rx_done
.bus
);
3000 mtrr_del(mgp
->mtrr
, mgp
->iomem_base
, mgp
->board_span
);
3002 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->fw_stats
),
3003 mgp
->fw_stats
, mgp
->fw_stats_bus
);
3005 dma_free_coherent(&pdev
->dev
, sizeof(*mgp
->cmd
),
3006 mgp
->cmd
, mgp
->cmd_bus
);
3008 free_netdev(netdev
);
3009 pci_set_drvdata(pdev
, NULL
);
3012 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3014 static struct pci_device_id myri10ge_pci_tbl
[] = {
3015 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM
, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E
)},
3019 static struct pci_driver myri10ge_driver
= {
3021 .probe
= myri10ge_probe
,
3022 .remove
= myri10ge_remove
,
3023 .id_table
= myri10ge_pci_tbl
,
3025 .suspend
= myri10ge_suspend
,
3026 .resume
= myri10ge_resume
,
3030 static __init
int myri10ge_init_module(void)
3032 printk(KERN_INFO
"%s: Version %s\n", myri10ge_driver
.name
,
3033 MYRI10GE_VERSION_STR
);
3034 return pci_register_driver(&myri10ge_driver
);
3037 module_init(myri10ge_init_module
);
3039 static __exit
void myri10ge_cleanup_module(void)
3041 pci_unregister_driver(&myri10ge_driver
);
3044 module_exit(myri10ge_cleanup_module
);