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netxen: improve msi support
[firewire-audio.git] / drivers / net / netxen / netxen_nic_init.c
blob43eb1f65152d9594eec0813b2780b4046c749e78
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
39
40 struct crb_addr_pair {
41 u32 addr;
42 u32 data;
43 };
44
45 unsigned long last_schedule_time;
46
47 #define NETXEN_MAX_CRB_XFORM 60
48 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
49 #define NETXEN_ADDR_ERROR (0xffffffff)
50
51 #define crb_addr_transform(name) \
52 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
53 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
54
55 #define NETXEN_NIC_XDMA_RESET 0x8000ff
56
57 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
58 uint32_t ctx, uint32_t ringid);
59
60 #if 0
61 static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
62 unsigned long off, int *data)
63 {
64 void __iomem *addr = pci_base_offset(adapter, off);
65 writel(*data, addr);
66 }
67 #endif /* 0 */
68
69 static void crb_addr_transform_setup(void)
70 {
71 crb_addr_transform(XDMA);
72 crb_addr_transform(TIMR);
73 crb_addr_transform(SRE);
74 crb_addr_transform(SQN3);
75 crb_addr_transform(SQN2);
76 crb_addr_transform(SQN1);
77 crb_addr_transform(SQN0);
78 crb_addr_transform(SQS3);
79 crb_addr_transform(SQS2);
80 crb_addr_transform(SQS1);
81 crb_addr_transform(SQS0);
82 crb_addr_transform(RPMX7);
83 crb_addr_transform(RPMX6);
84 crb_addr_transform(RPMX5);
85 crb_addr_transform(RPMX4);
86 crb_addr_transform(RPMX3);
87 crb_addr_transform(RPMX2);
88 crb_addr_transform(RPMX1);
89 crb_addr_transform(RPMX0);
90 crb_addr_transform(ROMUSB);
91 crb_addr_transform(SN);
92 crb_addr_transform(QMN);
93 crb_addr_transform(QMS);
94 crb_addr_transform(PGNI);
95 crb_addr_transform(PGND);
96 crb_addr_transform(PGN3);
97 crb_addr_transform(PGN2);
98 crb_addr_transform(PGN1);
99 crb_addr_transform(PGN0);
100 crb_addr_transform(PGSI);
101 crb_addr_transform(PGSD);
102 crb_addr_transform(PGS3);
103 crb_addr_transform(PGS2);
104 crb_addr_transform(PGS1);
105 crb_addr_transform(PGS0);
106 crb_addr_transform(PS);
107 crb_addr_transform(PH);
108 crb_addr_transform(NIU);
109 crb_addr_transform(I2Q);
110 crb_addr_transform(EG);
111 crb_addr_transform(MN);
112 crb_addr_transform(MS);
113 crb_addr_transform(CAS2);
114 crb_addr_transform(CAS1);
115 crb_addr_transform(CAS0);
116 crb_addr_transform(CAM);
117 crb_addr_transform(C2C1);
118 crb_addr_transform(C2C0);
119 crb_addr_transform(SMB);
120 }
121
122 int netxen_init_firmware(struct netxen_adapter *adapter)
123 {
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
127 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
133 udelay(100);
134 /* Window 1 call */
135 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
146 writel(INTR_SCHEME_PERPORT,
147 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
148 writel(MSI_MODE_MULTIFUNC,
149 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_HOST));
150 writel(MPORT_MULTI_FUNCTION_MODE,
151 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
152 writel(PHAN_INITIALIZE_ACK,
153 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
154
155 return err;
156 }
157
158 #define NETXEN_ADDR_LIMIT 0xffffffffULL
159
160 void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
161 struct pci_dev **used_dev)
162 {
163 void *addr;
164
165 addr = pci_alloc_consistent(pdev, sz, ptr);
166 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
167 *used_dev = pdev;
168 return addr;
169 }
170 pci_free_consistent(pdev, sz, addr, *ptr);
171 addr = pci_alloc_consistent(NULL, sz, ptr);
172 *used_dev = NULL;
173 return addr;
174 }
175
176 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
177 {
178 int ctxid, ring;
179 u32 i;
180 u32 num_rx_bufs = 0;
181 struct netxen_rcv_desc_ctx *rcv_desc;
182
183 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
184 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
185 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
186 struct netxen_rx_buffer *rx_buf;
187 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
188 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
189 rcv_desc->begin_alloc = 0;
190 rx_buf = rcv_desc->rx_buf_arr;
191 num_rx_bufs = rcv_desc->max_rx_desc_count;
192 /*
193 * Now go through all of them, set reference handles
194 * and put them in the queues.
195 */
196 for (i = 0; i < num_rx_bufs; i++) {
197 rx_buf->ref_handle = i;
198 rx_buf->state = NETXEN_BUFFER_FREE;
199 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
200 "%p\n", ctxid, i, rx_buf);
201 rx_buf++;
202 }
203 }
204 }
205 }
206
207 void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
208 {
209 int ports = 0;
210 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
211
212 if (netxen_nic_get_board_info(adapter) != 0)
213 printk("%s: Error getting board config info.\n",
214 netxen_nic_driver_name);
215 get_brd_port_by_type(board_info->board_type, &ports);
216 if (ports == 0)
217 printk(KERN_ERR "%s: Unknown board type\n",
218 netxen_nic_driver_name);
219 adapter->ahw.max_ports = ports;
220 }
221
222 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
223 {
224 switch (adapter->ahw.board_type) {
225 case NETXEN_NIC_GBE:
226 adapter->enable_phy_interrupts =
227 netxen_niu_gbe_enable_phy_interrupts;
228 adapter->disable_phy_interrupts =
229 netxen_niu_gbe_disable_phy_interrupts;
230 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
231 adapter->macaddr_set = netxen_niu_macaddr_set;
232 adapter->set_mtu = netxen_nic_set_mtu_gb;
233 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
234 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
235 adapter->phy_read = netxen_niu_gbe_phy_read;
236 adapter->phy_write = netxen_niu_gbe_phy_write;
237 adapter->init_niu = netxen_nic_init_niu_gb;
238 adapter->stop_port = netxen_niu_disable_gbe_port;
239 break;
240
241 case NETXEN_NIC_XGBE:
242 adapter->enable_phy_interrupts =
243 netxen_niu_xgbe_enable_phy_interrupts;
244 adapter->disable_phy_interrupts =
245 netxen_niu_xgbe_disable_phy_interrupts;
246 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
247 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
248 adapter->set_mtu = netxen_nic_set_mtu_xgb;
249 adapter->init_port = netxen_niu_xg_init_port;
250 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
251 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
252 adapter->stop_port = netxen_niu_disable_xg_port;
253 break;
254
255 default:
256 break;
257 }
258 }
259
260 /*
261 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
262 * address to external PCI CRB address.
263 */
264 static u32 netxen_decode_crb_addr(u32 addr)
265 {
266 int i;
267 u32 base_addr, offset, pci_base;
268
269 crb_addr_transform_setup();
270
271 pci_base = NETXEN_ADDR_ERROR;
272 base_addr = addr & 0xfff00000;
273 offset = addr & 0x000fffff;
274
275 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
276 if (crb_addr_xform[i] == base_addr) {
277 pci_base = i << 20;
278 break;
279 }
280 }
281 if (pci_base == NETXEN_ADDR_ERROR)
282 return pci_base;
283 else
284 return (pci_base + offset);
285 }
286
287 static long rom_max_timeout = 100;
288 static long rom_lock_timeout = 10000;
289 static long rom_write_timeout = 700;
290
291 static int rom_lock(struct netxen_adapter *adapter)
292 {
293 int iter;
294 u32 done = 0;
295 int timeout = 0;
296
297 while (!done) {
298 /* acquire semaphore2 from PCI HW block */
299 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
300 &done);
301 if (done == 1)
302 break;
303 if (timeout >= rom_lock_timeout)
304 return -EIO;
305
306 timeout++;
307 /*
308 * Yield CPU
309 */
310 if (!in_atomic())
311 schedule();
312 else {
313 for (iter = 0; iter < 20; iter++)
314 cpu_relax(); /*This a nop instr on i386 */
315 }
316 }
317 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
318 return 0;
319 }
320
321 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
322 {
323 long timeout = 0;
324 long done = 0;
325
326 while (done == 0) {
327 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
328 done &= 2;
329 timeout++;
330 if (timeout >= rom_max_timeout) {
331 printk("Timeout reached waiting for rom done");
332 return -EIO;
333 }
334 }
335 return 0;
336 }
337
338 static int netxen_rom_wren(struct netxen_adapter *adapter)
339 {
340 /* Set write enable latch in ROM status register */
341 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
342 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
343 M25P_INSTR_WREN);
344 if (netxen_wait_rom_done(adapter)) {
345 return -1;
346 }
347 return 0;
348 }
349
350 static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
351 unsigned int addr)
352 {
353 unsigned int data = 0xdeaddead;
354 data = netxen_nic_reg_read(adapter, addr);
355 return data;
356 }
357
358 static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
359 {
360 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
361 M25P_INSTR_RDSR);
362 if (netxen_wait_rom_done(adapter)) {
363 return -1;
364 }
365 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
366 }
367
368 static void netxen_rom_unlock(struct netxen_adapter *adapter)
369 {
370 u32 val;
371
372 /* release semaphore2 */
373 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
374
375 }
376
377 static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
378 {
379 long timeout = 0;
380 long wip = 1;
381 int val;
382 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
383 while (wip != 0) {
384 val = netxen_do_rom_rdsr(adapter);
385 wip = val & 1;
386 timeout++;
387 if (timeout > rom_max_timeout) {
388 return -1;
389 }
390 }
391 return 0;
392 }
393
394 static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
395 int data)
396 {
397 if (netxen_rom_wren(adapter)) {
398 return -1;
399 }
400 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
401 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
402 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
403 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
404 M25P_INSTR_PP);
405 if (netxen_wait_rom_done(adapter)) {
406 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
407 return -1;
408 }
409
410 return netxen_rom_wip_poll(adapter);
411 }
412
413 static int do_rom_fast_read(struct netxen_adapter *adapter,
414 int addr, int *valp)
415 {
416 cond_resched();
417
418 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
419 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
420 udelay(100); /* prevent bursting on CRB */
421 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
422 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
423 if (netxen_wait_rom_done(adapter)) {
424 printk("Error waiting for rom done\n");
425 return -EIO;
426 }
427 /* reset abyte_cnt and dummy_byte_cnt */
428 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
429 udelay(100); /* prevent bursting on CRB */
430 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
431
432 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
433 return 0;
434 }
435
436 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
437 u8 *bytes, size_t size)
438 {
439 int addridx;
440 int ret = 0;
441
442 for (addridx = addr; addridx < (addr + size); addridx += 4) {
443 int v;
444 ret = do_rom_fast_read(adapter, addridx, &v);
445 if (ret != 0)
446 break;
447 *(__le32 *)bytes = cpu_to_le32(v);
448 bytes += 4;
449 }
450
451 return ret;
452 }
453
454 int
455 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
456 u8 *bytes, size_t size)
457 {
458 int ret;
459
460 ret = rom_lock(adapter);
461 if (ret < 0)
462 return ret;
463
464 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
465
466 netxen_rom_unlock(adapter);
467 return ret;
468 }
469
470 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
471 {
472 int ret;
473
474 if (rom_lock(adapter) != 0)
475 return -EIO;
476
477 ret = do_rom_fast_read(adapter, addr, valp);
478 netxen_rom_unlock(adapter);
479 return ret;
480 }
481
482 #if 0
483 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
484 {
485 int ret = 0;
486
487 if (rom_lock(adapter) != 0) {
488 return -1;
489 }
490 ret = do_rom_fast_write(adapter, addr, data);
491 netxen_rom_unlock(adapter);
492 return ret;
493 }
494 #endif /* 0 */
495
496 static int do_rom_fast_write_words(struct netxen_adapter *adapter,
497 int addr, u8 *bytes, size_t size)
498 {
499 int addridx = addr;
500 int ret = 0;
501
502 while (addridx < (addr + size)) {
503 int last_attempt = 0;
504 int timeout = 0;
505 int data;
506
507 data = le32_to_cpu((*(__le32*)bytes));
508 ret = do_rom_fast_write(adapter, addridx, data);
509 if (ret < 0)
510 return ret;
511
512 while(1) {
513 int data1;
514
515 ret = do_rom_fast_read(adapter, addridx, &data1);
516 if (ret < 0)
517 return ret;
518
519 if (data1 == data)
520 break;
521
522 if (timeout++ >= rom_write_timeout) {
523 if (last_attempt++ < 4) {
524 ret = do_rom_fast_write(adapter,
525 addridx, data);
526 if (ret < 0)
527 return ret;
528 }
529 else {
530 printk(KERN_INFO "Data write did not "
531 "succeed at address 0x%x\n", addridx);
532 break;
533 }
534 }
535 }
536
537 bytes += 4;
538 addridx += 4;
539 }
540
541 return ret;
542 }
543
544 int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
545 u8 *bytes, size_t size)
546 {
547 int ret = 0;
548
549 ret = rom_lock(adapter);
550 if (ret < 0)
551 return ret;
552
553 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
554 netxen_rom_unlock(adapter);
555
556 return ret;
557 }
558
559 static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
560 {
561 int ret;
562
563 ret = netxen_rom_wren(adapter);
564 if (ret < 0)
565 return ret;
566
567 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
568 netxen_crb_writelit_adapter(adapter,
569 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
570
571 ret = netxen_wait_rom_done(adapter);
572 if (ret < 0)
573 return ret;
574
575 return netxen_rom_wip_poll(adapter);
576 }
577
578 static int netxen_rom_rdsr(struct netxen_adapter *adapter)
579 {
580 int ret;
581
582 ret = rom_lock(adapter);
583 if (ret < 0)
584 return ret;
585
586 ret = netxen_do_rom_rdsr(adapter);
587 netxen_rom_unlock(adapter);
588 return ret;
589 }
590
591 int netxen_backup_crbinit(struct netxen_adapter *adapter)
592 {
593 int ret = FLASH_SUCCESS;
594 int val;
595 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
596
597 if (!buffer)
598 return -ENOMEM;
599 /* unlock sector 63 */
600 val = netxen_rom_rdsr(adapter);
601 val = val & 0xe3;
602 ret = netxen_rom_wrsr(adapter, val);
603 if (ret != FLASH_SUCCESS)
604 goto out_kfree;
605
606 ret = netxen_rom_wip_poll(adapter);
607 if (ret != FLASH_SUCCESS)
608 goto out_kfree;
609
610 /* copy sector 0 to sector 63 */
611 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
612 buffer, NETXEN_FLASH_SECTOR_SIZE);
613 if (ret != FLASH_SUCCESS)
614 goto out_kfree;
615
616 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
617 buffer, NETXEN_FLASH_SECTOR_SIZE);
618 if (ret != FLASH_SUCCESS)
619 goto out_kfree;
620
621 /* lock sector 63 */
622 val = netxen_rom_rdsr(adapter);
623 if (!(val & 0x8)) {
624 val |= (0x1 << 2);
625 /* lock sector 63 */
626 if (netxen_rom_wrsr(adapter, val) == 0) {
627 ret = netxen_rom_wip_poll(adapter);
628 if (ret != FLASH_SUCCESS)
629 goto out_kfree;
630
631 /* lock SR writes */
632 ret = netxen_rom_wip_poll(adapter);
633 if (ret != FLASH_SUCCESS)
634 goto out_kfree;
635 }
636 }
637
638 out_kfree:
639 kfree(buffer);
640 return ret;
641 }
642
643 static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
644 {
645 netxen_rom_wren(adapter);
646 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
647 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
648 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
649 M25P_INSTR_SE);
650 if (netxen_wait_rom_done(adapter)) {
651 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
652 return -1;
653 }
654 return netxen_rom_wip_poll(adapter);
655 }
656
657 static void check_erased_flash(struct netxen_adapter *adapter, int addr)
658 {
659 int i;
660 int val;
661 int count = 0, erased_errors = 0;
662 int range;
663
664 range = (addr == NETXEN_USER_START) ?
665 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
666
667 for (i = addr; i < range; i += 4) {
668 netxen_rom_fast_read(adapter, i, &val);
669 if (val != 0xffffffff)
670 erased_errors++;
671 count++;
672 }
673
674 if (erased_errors)
675 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
676 "for sector address: %x\n", erased_errors, count, addr);
677 }
678
679 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
680 {
681 int ret = 0;
682 if (rom_lock(adapter) != 0) {
683 return -1;
684 }
685 ret = netxen_do_rom_se(adapter, addr);
686 netxen_rom_unlock(adapter);
687 msleep(30);
688 check_erased_flash(adapter, addr);
689
690 return ret;
691 }
692
693 static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
694 int start, int end)
695 {
696 int ret = FLASH_SUCCESS;
697 int i;
698
699 for (i = start; i < end; i++) {
700 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
701 if (ret)
702 break;
703 ret = netxen_rom_wip_poll(adapter);
704 if (ret < 0)
705 return ret;
706 }
707
708 return ret;
709 }
710
711 int
712 netxen_flash_erase_secondary(struct netxen_adapter *adapter)
713 {
714 int ret = FLASH_SUCCESS;
715 int start, end;
716
717 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
718 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
719 ret = netxen_flash_erase_sections(adapter, start, end);
720
721 return ret;
722 }
723
724 int
725 netxen_flash_erase_primary(struct netxen_adapter *adapter)
726 {
727 int ret = FLASH_SUCCESS;
728 int start, end;
729
730 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
731 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
732 ret = netxen_flash_erase_sections(adapter, start, end);
733
734 return ret;
735 }
736
737 void netxen_halt_pegs(struct netxen_adapter *adapter)
738 {
739 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
740 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
741 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
742 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
743 }
744
745 int netxen_flash_unlock(struct netxen_adapter *adapter)
746 {
747 int ret = 0;
748
749 ret = netxen_rom_wrsr(adapter, 0);
750 if (ret < 0)
751 return ret;
752
753 ret = netxen_rom_wren(adapter);
754 if (ret < 0)
755 return ret;
756
757 return ret;
758 }
759
760 #define NETXEN_BOARDTYPE 0x4008
761 #define NETXEN_BOARDNUM 0x400c
762 #define NETXEN_CHIPNUM 0x4010
763 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
764 #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
765 #define NETXEN_ROM_FOUND_INIT 0x400
766
767 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
768 {
769 int addr, val, status;
770 int n, i;
771 int init_delay = 0;
772 struct crb_addr_pair *buf;
773 u32 off;
774
775 /* resetall */
776 status = netxen_nic_get_board_info(adapter);
777 if (status)
778 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
779 netxen_nic_driver_name);
780
781 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
782 NETXEN_ROMBUS_RESET);
783
784 if (verbose) {
785 int val;
786 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
787 printk("P2 ROM board type: 0x%08x\n", val);
788 else
789 printk("Could not read board type\n");
790 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
791 printk("P2 ROM board num: 0x%08x\n", val);
792 else
793 printk("Could not read board number\n");
794 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
795 printk("P2 ROM chip num: 0x%08x\n", val);
796 else
797 printk("Could not read chip number\n");
798 }
799
800 if (netxen_rom_fast_read(adapter, 0, &n) == 0
801 && (n & NETXEN_ROM_FIRST_BARRIER)) {
802 n &= ~NETXEN_ROM_ROUNDUP;
803 if (n < NETXEN_ROM_FOUND_INIT) {
804 if (verbose)
805 printk("%s: %d CRB init values found"
806 " in ROM.\n", netxen_nic_driver_name, n);
807 } else {
808 printk("%s:n=0x%x Error! NetXen card flash not"
809 " initialized.\n", __FUNCTION__, n);
810 return -EIO;
811 }
812 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
813 if (buf == NULL) {
814 printk("%s: netxen_pinit_from_rom: Unable to calloc "
815 "memory.\n", netxen_nic_driver_name);
816 return -ENOMEM;
817 }
818 for (i = 0; i < n; i++) {
819 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
820 || netxen_rom_fast_read(adapter, 8 * i + 8,
821 &addr) != 0)
822 return -EIO;
823
824 buf[i].addr = addr;
825 buf[i].data = val;
826
827 if (verbose)
828 printk("%s: PCI: 0x%08x == 0x%08x\n",
829 netxen_nic_driver_name, (unsigned int)
830 netxen_decode_crb_addr(addr), val);
831 }
832 for (i = 0; i < n; i++) {
833
834 off = netxen_decode_crb_addr(buf[i].addr);
835 if (off == NETXEN_ADDR_ERROR) {
836 printk(KERN_ERR"CRB init value out of range %x\n",
837 buf[i].addr);
838 continue;
839 }
840 off += NETXEN_PCI_CRBSPACE;
841 /* skipping cold reboot MAGIC */
842 if (off == NETXEN_CAM_RAM(0x1fc))
843 continue;
844
845 /* After writing this register, HW needs time for CRB */
846 /* to quiet down (else crb_window returns 0xffffffff) */
847 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
848 init_delay = 1;
849 /* hold xdma in reset also */
850 buf[i].data = NETXEN_NIC_XDMA_RESET;
851 }
852
853 if (ADDR_IN_WINDOW1(off)) {
854 writel(buf[i].data,
855 NETXEN_CRB_NORMALIZE(adapter, off));
856 } else {
857 netxen_nic_pci_change_crbwindow(adapter, 0);
858 writel(buf[i].data,
859 pci_base_offset(adapter, off));
860
861 netxen_nic_pci_change_crbwindow(adapter, 1);
862 }
863 if (init_delay == 1) {
864 msleep(2000);
865 init_delay = 0;
866 }
867 msleep(20);
868 }
869 kfree(buf);
870
871 /* disable_peg_cache_all */
872
873 /* unreset_net_cache */
874 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
875 4);
876 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
877 (val & 0xffffff0f));
878 /* p2dn replyCount */
879 netxen_crb_writelit_adapter(adapter,
880 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
881 /* disable_peg_cache 0 */
882 netxen_crb_writelit_adapter(adapter,
883 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
884 /* disable_peg_cache 1 */
885 netxen_crb_writelit_adapter(adapter,
886 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
887
888 /* peg_clr_all */
889
890 /* peg_clr 0 */
891 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
892 0);
893 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
894 0);
895 /* peg_clr 1 */
896 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
897 0);
898 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
899 0);
900 /* peg_clr 2 */
901 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
902 0);
903 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
904 0);
905 /* peg_clr 3 */
906 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
907 0);
908 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
909 0);
910 }
911 return 0;
912 }
913
914 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
915 {
916 uint64_t addr;
917 uint32_t hi;
918 uint32_t lo;
919
920 adapter->dummy_dma.addr =
921 pci_alloc_consistent(adapter->ahw.pdev,
922 NETXEN_HOST_DUMMY_DMA_SIZE,
923 &adapter->dummy_dma.phys_addr);
924 if (adapter->dummy_dma.addr == NULL) {
925 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
926 __FUNCTION__);
927 return -ENOMEM;
928 }
929
930 addr = (uint64_t) adapter->dummy_dma.phys_addr;
931 hi = (addr >> 32) & 0xffffffff;
932 lo = addr & 0xffffffff;
933
934 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
935 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
936
937 return 0;
938 }
939
940 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
941 {
942 if (adapter->dummy_dma.addr) {
943 pci_free_consistent(adapter->ahw.pdev,
944 NETXEN_HOST_DUMMY_DMA_SIZE,
945 adapter->dummy_dma.addr,
946 adapter->dummy_dma.phys_addr);
947 adapter->dummy_dma.addr = NULL;
948 }
949 }
950
951 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
952 {
953 u32 val = 0;
954 int retries = 30;
955
956 if (!pegtune_val) {
957 do {
958 val = readl(NETXEN_CRB_NORMALIZE
959 (adapter, CRB_CMDPEG_STATE));
960 pegtune_val = readl(NETXEN_CRB_NORMALIZE
961 (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
962
963 if (val == PHAN_INITIALIZE_COMPLETE ||
964 val == PHAN_INITIALIZE_ACK)
965 return 0;
966
967 msleep(1000);
968 } while (--retries);
969 if (!retries) {
970 printk(KERN_WARNING "netxen_phantom_init: init failed, "
971 "pegtune_val=%x\n", pegtune_val);
972 return -1;
973 }
974 }
975
976 return 0;
977 }
978
979 int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
980 {
981 int ctx;
982
983 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
984 struct netxen_recv_context *recv_ctx =
985 &(adapter->recv_ctx[ctx]);
986 u32 consumer;
987 struct status_desc *desc_head;
988 struct status_desc *desc;
989
990 consumer = recv_ctx->status_rx_consumer;
991 desc_head = recv_ctx->rcv_status_desc_head;
992 desc = &desc_head[consumer];
993
994 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
995 return 1;
996 }
997
998 return 0;
999 }
1000
1001 static int netxen_nic_check_temp(struct netxen_adapter *adapter)
1002 {
1003 struct net_device *netdev = adapter->netdev;
1004 uint32_t temp, temp_state, temp_val;
1005 int rv = 0;
1006
1007 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
1008
1009 temp_state = nx_get_temp_state(temp);
1010 temp_val = nx_get_temp_val(temp);
1011
1012 if (temp_state == NX_TEMP_PANIC) {
1013 printk(KERN_ALERT
1014 "%s: Device temperature %d degrees C exceeds"
1015 " maximum allowed. Hardware has been shut down.\n",
1016 netxen_nic_driver_name, temp_val);
1017
1018 netif_carrier_off(netdev);
1019 netif_stop_queue(netdev);
1020 rv = 1;
1021 } else if (temp_state == NX_TEMP_WARN) {
1022 if (adapter->temp == NX_TEMP_NORMAL) {
1023 printk(KERN_ALERT
1024 "%s: Device temperature %d degrees C "
1025 "exceeds operating range."
1026 " Immediate action needed.\n",
1027 netxen_nic_driver_name, temp_val);
1028 }
1029 } else {
1030 if (adapter->temp == NX_TEMP_WARN) {
1031 printk(KERN_INFO
1032 "%s: Device temperature is now %d degrees C"
1033 " in normal range.\n", netxen_nic_driver_name,
1034 temp_val);
1035 }
1036 }
1037 adapter->temp = temp_state;
1038 return rv;
1039 }
1040
1041 void netxen_watchdog_task(struct work_struct *work)
1042 {
1043 struct net_device *netdev;
1044 struct netxen_adapter *adapter =
1045 container_of(work, struct netxen_adapter, watchdog_task);
1046
1047 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
1048 return;
1049
1050 if (adapter->handle_phy_intr)
1051 adapter->handle_phy_intr(adapter);
1052
1053 netdev = adapter->netdev;
1054 if ((netif_running(netdev)) && !netif_carrier_ok(netdev) &&
1055 netxen_nic_link_ok(adapter) ) {
1056 printk(KERN_INFO "%s %s (port %d), Link is up\n",
1057 netxen_nic_driver_name, netdev->name, adapter->portnum);
1058 netif_carrier_on(netdev);
1059 netif_wake_queue(netdev);
1060 } else if(!(netif_running(netdev)) && netif_carrier_ok(netdev)) {
1061 printk(KERN_ERR "%s %s Link is Down\n",
1062 netxen_nic_driver_name, netdev->name);
1063 netif_carrier_off(netdev);
1064 netif_stop_queue(netdev);
1065 }
1066
1067 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1068 }
1069
1070 /*
1071 * netxen_process_rcv() send the received packet to the protocol stack.
1072 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1073 * invoke the routine to send more rx buffers to the Phantom...
1074 */
1075 static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1076 struct status_desc *desc)
1077 {
1078 struct pci_dev *pdev = adapter->pdev;
1079 struct net_device *netdev = adapter->netdev;
1080 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1081 int index = netxen_get_sts_refhandle(sts_data);
1082 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1083 struct netxen_rx_buffer *buffer;
1084 struct sk_buff *skb;
1085 u32 length = netxen_get_sts_totallength(sts_data);
1086 u32 desc_ctx;
1087 struct netxen_rcv_desc_ctx *rcv_desc;
1088 int ret;
1089
1090 desc_ctx = netxen_get_sts_type(sts_data);
1091 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1092 printk("%s: %s Bad Rcv descriptor ring\n",
1093 netxen_nic_driver_name, netdev->name);
1094 return;
1095 }
1096
1097 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
1098 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1099 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1100 index, rcv_desc->max_rx_desc_count);
1101 return;
1102 }
1103 buffer = &rcv_desc->rx_buf_arr[index];
1104 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1105 buffer->lro_current_frags++;
1106 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1107 buffer->lro_expected_frags =
1108 netxen_get_sts_desc_lro_cnt(desc);
1109 buffer->lro_length = length;
1110 }
1111 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1112 if (buffer->lro_expected_frags != 0) {
1113 printk("LRO: (refhandle:%x) recv frag. "
1114 "wait for last. flags: %x expected:%d "
1115 "have:%d\n", index,
1116 netxen_get_sts_desc_lro_last_frag(desc),
1117 buffer->lro_expected_frags,
1118 buffer->lro_current_frags);
1119 }
1120 return;
1121 }
1122 }
1123
1124 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1125 PCI_DMA_FROMDEVICE);
1126
1127 skb = (struct sk_buff *)buffer->skb;
1128
1129 if (likely(adapter->rx_csum &&
1130 netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
1131 adapter->stats.csummed++;
1132 skb->ip_summed = CHECKSUM_UNNECESSARY;
1133 } else
1134 skb->ip_summed = CHECKSUM_NONE;
1135
1136 skb->dev = netdev;
1137 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1138 /* True length was only available on the last pkt */
1139 skb_put(skb, buffer->lro_length);
1140 } else {
1141 skb_put(skb, length);
1142 }
1143
1144 skb->protocol = eth_type_trans(skb, netdev);
1145
1146 ret = netif_receive_skb(skb);
1147
1148 /*
1149 * RH: Do we need these stats on a regular basis. Can we get it from
1150 * Linux stats.
1151 */
1152 switch (ret) {
1153 case NET_RX_SUCCESS:
1154 adapter->stats.uphappy++;
1155 break;
1156
1157 case NET_RX_CN_LOW:
1158 adapter->stats.uplcong++;
1159 break;
1160
1161 case NET_RX_CN_MOD:
1162 adapter->stats.upmcong++;
1163 break;
1164
1165 case NET_RX_CN_HIGH:
1166 adapter->stats.uphcong++;
1167 break;
1168
1169 case NET_RX_DROP:
1170 adapter->stats.updropped++;
1171 break;
1172
1173 default:
1174 adapter->stats.updunno++;
1175 break;
1176 }
1177
1178 netdev->last_rx = jiffies;
1179
1180 rcv_desc->rcv_free++;
1181 rcv_desc->rcv_pending--;
1182
1183 /*
1184 * We just consumed one buffer so post a buffer.
1185 */
1186 buffer->skb = NULL;
1187 buffer->state = NETXEN_BUFFER_FREE;
1188 buffer->lro_current_frags = 0;
1189 buffer->lro_expected_frags = 0;
1190
1191 adapter->stats.no_rcv++;
1192 adapter->stats.rxbytes += length;
1193 }
1194
1195 /* Process Receive status ring */
1196 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1197 {
1198 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1199 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1200 struct status_desc *desc; /* used to read status desc here */
1201 u32 consumer = recv_ctx->status_rx_consumer;
1202 u32 producer = 0;
1203 int count = 0, ring;
1204
1205 DPRINTK(INFO, "procesing receive\n");
1206 /*
1207 * we assume in this case that there is only one port and that is
1208 * port #1...changes need to be done in firmware to indicate port
1209 * number as part of the descriptor. This way we will be able to get
1210 * the netdev which is associated with that device.
1211 */
1212 while (count < max) {
1213 desc = &desc_head[consumer];
1214 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
1215 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1216 netxen_get_sts_owner(desc));
1217 break;
1218 }
1219 netxen_process_rcv(adapter, ctxid, desc);
1220 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1221 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1222 count++;
1223 }
1224 if (count) {
1225 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
1226 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1227 }
1228 }
1229
1230 /* update the consumer index in phantom */
1231 if (count) {
1232 recv_ctx->status_rx_consumer = consumer;
1233 recv_ctx->status_rx_producer = producer;
1234
1235 /* Window = 1 */
1236 writel(consumer,
1237 NETXEN_CRB_NORMALIZE(adapter,
1238 recv_crb_registers[adapter->portnum].
1239 crb_rcv_status_consumer));
1240 wmb();
1241 }
1242
1243 return count;
1244 }
1245
1246 /* Process Command status ring */
1247 int netxen_process_cmd_ring(unsigned long data)
1248 {
1249 u32 last_consumer;
1250 u32 consumer;
1251 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
1252 int count1 = 0;
1253 int count2 = 0;
1254 struct netxen_cmd_buffer *buffer;
1255 struct pci_dev *pdev;
1256 struct netxen_skb_frag *frag;
1257 u32 i;
1258 int done;
1259
1260 spin_lock(&adapter->tx_lock);
1261 last_consumer = adapter->last_cmd_consumer;
1262 DPRINTK(INFO, "procesing xmit complete\n");
1263 /* we assume in this case that there is only one port and that is
1264 * port #1...changes need to be done in firmware to indicate port
1265 * number as part of the descriptor. This way we will be able to get
1266 * the netdev which is associated with that device.
1267 */
1268
1269 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1270 if (last_consumer == consumer) { /* Ring is empty */
1271 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
1272 last_consumer, consumer);
1273 spin_unlock(&adapter->tx_lock);
1274 return 1;
1275 }
1276
1277 adapter->proc_cmd_buf_counter++;
1278 /*
1279 * Not needed - does not seem to be used anywhere.
1280 * adapter->cmd_consumer = consumer;
1281 */
1282 spin_unlock(&adapter->tx_lock);
1283
1284 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
1285 buffer = &adapter->cmd_buf_arr[last_consumer];
1286 pdev = adapter->pdev;
1287 if (buffer->skb) {
1288 frag = &buffer->frag_array[0];
1289 pci_unmap_single(pdev, frag->dma, frag->length,
1290 PCI_DMA_TODEVICE);
1291 frag->dma = 0ULL;
1292 for (i = 1; i < buffer->frag_count; i++) {
1293 DPRINTK(INFO, "getting fragment no %d\n", i);
1294 frag++; /* Get the next frag */
1295 pci_unmap_page(pdev, frag->dma, frag->length,
1296 PCI_DMA_TODEVICE);
1297 frag->dma = 0ULL;
1298 }
1299
1300 adapter->stats.skbfreed++;
1301 dev_kfree_skb_any(buffer->skb);
1302 buffer->skb = NULL;
1303 } else if (adapter->proc_cmd_buf_counter == 1) {
1304 adapter->stats.txnullskb++;
1305 }
1306 if (unlikely(netif_queue_stopped(adapter->netdev)
1307 && netif_carrier_ok(adapter->netdev))
1308 && ((jiffies - adapter->netdev->trans_start) >
1309 adapter->netdev->watchdog_timeo)) {
1310 SCHEDULE_WORK(&adapter->tx_timeout_task);
1311 }
1312
1313 last_consumer = get_next_index(last_consumer,
1314 adapter->max_tx_desc_count);
1315 count1++;
1316 }
1317
1318 count2 = 0;
1319 spin_lock(&adapter->tx_lock);
1320 if ((--adapter->proc_cmd_buf_counter) == 0) {
1321 adapter->last_cmd_consumer = last_consumer;
1322 while ((adapter->last_cmd_consumer != consumer)
1323 && (count2 < MAX_STATUS_HANDLE)) {
1324 buffer =
1325 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
1326 count2++;
1327 if (buffer->skb)
1328 break;
1329 else
1330 adapter->last_cmd_consumer =
1331 get_next_index(adapter->last_cmd_consumer,
1332 adapter->max_tx_desc_count);
1333 }
1334 }
1335 if (count1 || count2) {
1336 if (netif_queue_stopped(adapter->netdev)
1337 && (adapter->flags & NETXEN_NETDEV_STATUS)) {
1338 netif_wake_queue(adapter->netdev);
1339 adapter->flags &= ~NETXEN_NETDEV_STATUS;
1340 }
1341 }
1342 /*
1343 * If everything is freed up to consumer then check if the ring is full
1344 * If the ring is full then check if more needs to be freed and
1345 * schedule the call back again.
1346 *
1347 * This happens when there are 2 CPUs. One could be freeing and the
1348 * other filling it. If the ring is full when we get out of here and
1349 * the card has already interrupted the host then the host can miss the
1350 * interrupt.
1351 *
1352 * There is still a possible race condition and the host could miss an
1353 * interrupt. The card has to take care of this.
1354 */
1355 if (adapter->last_cmd_consumer == consumer &&
1356 (((adapter->cmd_producer + 1) %
1357 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
1358 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1359 }
1360 done = (adapter->last_cmd_consumer == consumer);
1361
1362 spin_unlock(&adapter->tx_lock);
1363 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1364 __FUNCTION__);
1365 return (done);
1366 }
1367
1368 /*
1369 * netxen_post_rx_buffers puts buffer in the Phantom memory
1370 */
1371 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1372 {
1373 struct pci_dev *pdev = adapter->ahw.pdev;
1374 struct sk_buff *skb;
1375 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1376 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1377 uint producer;
1378 struct rcv_desc *pdesc;
1379 struct netxen_rx_buffer *buffer;
1380 int count = 0;
1381 int index = 0;
1382 netxen_ctx_msg msg = 0;
1383 dma_addr_t dma;
1384
1385 rcv_desc = &recv_ctx->rcv_desc[ringid];
1386
1387 producer = rcv_desc->producer;
1388 index = rcv_desc->begin_alloc;
1389 buffer = &rcv_desc->rx_buf_arr[index];
1390 /* We can start writing rx descriptors into the phantom memory. */
1391 while (buffer->state == NETXEN_BUFFER_FREE) {
1392 skb = dev_alloc_skb(rcv_desc->skb_size);
1393 if (unlikely(!skb)) {
1394 /*
1395 * TODO
1396 * We need to schedule the posting of buffers to the pegs.
1397 */
1398 rcv_desc->begin_alloc = index;
1399 DPRINTK(ERR, "netxen_post_rx_buffers: "
1400 " allocated only %d buffers\n", count);
1401 break;
1402 }
1403
1404 count++; /* now there should be no failure */
1405 pdesc = &rcv_desc->desc_head[producer];
1406
1407 #if defined(XGB_DEBUG)
1408 *(unsigned long *)(skb->head) = 0xc0debabe;
1409 if (skb_is_nonlinear(skb)) {
1410 printk("Allocated SKB @%p is nonlinear\n");
1411 }
1412 #endif
1413 skb_reserve(skb, 2);
1414 /* This will be setup when we receive the
1415 * buffer after it has been filled FSL TBD TBD
1416 * skb->dev = netdev;
1417 */
1418 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1419 PCI_DMA_FROMDEVICE);
1420 pdesc->addr_buffer = cpu_to_le64(dma);
1421 buffer->skb = skb;
1422 buffer->state = NETXEN_BUFFER_BUSY;
1423 buffer->dma = dma;
1424 /* make a rcv descriptor */
1425 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1426 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1427 DPRINTK(INFO, "done writing descripter\n");
1428 producer =
1429 get_next_index(producer, rcv_desc->max_rx_desc_count);
1430 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1431 buffer = &rcv_desc->rx_buf_arr[index];
1432 }
1433 /* if we did allocate buffers, then write the count to Phantom */
1434 if (count) {
1435 rcv_desc->begin_alloc = index;
1436 rcv_desc->rcv_pending += count;
1437 rcv_desc->producer = producer;
1438 if (rcv_desc->rcv_free >= 32) {
1439 rcv_desc->rcv_free = 0;
1440 /* Window = 1 */
1441 writel((producer - 1) &
1442 (rcv_desc->max_rx_desc_count - 1),
1443 NETXEN_CRB_NORMALIZE(adapter,
1444 recv_crb_registers[
1445 adapter->portnum].
1446 rcv_desc_crb[ringid].
1447 crb_rcv_producer_offset));
1448 /*
1449 * Write a doorbell msg to tell phanmon of change in
1450 * receive ring producer
1451 */
1452 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1453 netxen_set_msg_privid(msg);
1454 netxen_set_msg_count(msg,
1455 ((producer -
1456 1) & (rcv_desc->
1457 max_rx_desc_count - 1)));
1458 netxen_set_msg_ctxid(msg, adapter->portnum);
1459 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1460 writel(msg,
1461 DB_NORMALIZE(adapter,
1462 NETXEN_RCV_PRODUCER_OFFSET));
1463 wmb();
1464 }
1465 }
1466 }
1467
1468 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1469 uint32_t ctx, uint32_t ringid)
1470 {
1471 struct pci_dev *pdev = adapter->ahw.pdev;
1472 struct sk_buff *skb;
1473 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1474 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1475 u32 producer;
1476 struct rcv_desc *pdesc;
1477 struct netxen_rx_buffer *buffer;
1478 int count = 0;
1479 int index = 0;
1480
1481 rcv_desc = &recv_ctx->rcv_desc[ringid];
1482
1483 producer = rcv_desc->producer;
1484 index = rcv_desc->begin_alloc;
1485 buffer = &rcv_desc->rx_buf_arr[index];
1486 /* We can start writing rx descriptors into the phantom memory. */
1487 while (buffer->state == NETXEN_BUFFER_FREE) {
1488 skb = dev_alloc_skb(rcv_desc->skb_size);
1489 if (unlikely(!skb)) {
1490 /*
1491 * We need to schedule the posting of buffers to the pegs.
1492 */
1493 rcv_desc->begin_alloc = index;
1494 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1495 " allocated only %d buffers\n", count);
1496 break;
1497 }
1498 count++; /* now there should be no failure */
1499 pdesc = &rcv_desc->desc_head[producer];
1500 skb_reserve(skb, 2);
1501 /*
1502 * This will be setup when we receive the
1503 * buffer after it has been filled
1504 * skb->dev = netdev;
1505 */
1506 buffer->skb = skb;
1507 buffer->state = NETXEN_BUFFER_BUSY;
1508 buffer->dma = pci_map_single(pdev, skb->data,
1509 rcv_desc->dma_size,
1510 PCI_DMA_FROMDEVICE);
1511
1512 /* make a rcv descriptor */
1513 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1514 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1515 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1516 DPRINTK(INFO, "done writing descripter\n");
1517 producer =
1518 get_next_index(producer, rcv_desc->max_rx_desc_count);
1519 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1520 buffer = &rcv_desc->rx_buf_arr[index];
1521 }
1522
1523 /* if we did allocate buffers, then write the count to Phantom */
1524 if (count) {
1525 rcv_desc->begin_alloc = index;
1526 rcv_desc->rcv_pending += count;
1527 rcv_desc->producer = producer;
1528 if (rcv_desc->rcv_free >= 32) {
1529 rcv_desc->rcv_free = 0;
1530 /* Window = 1 */
1531 writel((producer - 1) &
1532 (rcv_desc->max_rx_desc_count - 1),
1533 NETXEN_CRB_NORMALIZE(adapter,
1534 recv_crb_registers[
1535 adapter->portnum].
1536 rcv_desc_crb[ringid].
1537 crb_rcv_producer_offset));
1538 wmb();
1539 }
1540 }
1541 }
1542
1543 int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1544 {
1545 if (find_diff_among(adapter->last_cmd_consumer,
1546 adapter->cmd_producer,
1547 adapter->max_tx_desc_count) > 0)
1548 return 1;
1549
1550 return 0;
1551 }
1552
1553
1554 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1555 {
1556 memset(&adapter->stats, 0, sizeof(adapter->stats));
1557 return;
1558 }
1559
AMDTP streaming driver for the Linux FireWire stack (Juju)