2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
4 * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
5 * Copyright (C) 2007 Secret Lab Technologies Ltd.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <linux/platform_device.h>
13 #include <linux/module.h>
14 #include <linux/console.h>
15 #include <linux/serial.h>
16 #include <linux/serial_core.h>
17 #include <linux/tty.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
22 #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
24 #include <linux/of_address.h>
25 #include <linux/of_device.h>
26 #include <linux/of_platform.h>
28 /* Match table for of_platform binding */
29 static struct of_device_id ulite_of_match
[] __devinitdata
= {
30 { .compatible
= "xlnx,opb-uartlite-1.00.b", },
31 { .compatible
= "xlnx,xps-uartlite-1.00.a", },
34 MODULE_DEVICE_TABLE(of
, ulite_of_match
);
38 #define ULITE_NAME "ttyUL"
39 #define ULITE_MAJOR 204
40 #define ULITE_MINOR 187
41 #define ULITE_NR_UARTS 4
43 /* ---------------------------------------------------------------------
44 * Register definitions
46 * For register details see datasheet:
47 * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
52 #define ULITE_STATUS 0x08
53 #define ULITE_CONTROL 0x0c
55 #define ULITE_REGION 16
57 #define ULITE_STATUS_RXVALID 0x01
58 #define ULITE_STATUS_RXFULL 0x02
59 #define ULITE_STATUS_TXEMPTY 0x04
60 #define ULITE_STATUS_TXFULL 0x08
61 #define ULITE_STATUS_IE 0x10
62 #define ULITE_STATUS_OVERRUN 0x20
63 #define ULITE_STATUS_FRAME 0x40
64 #define ULITE_STATUS_PARITY 0x80
66 #define ULITE_CONTROL_RST_TX 0x01
67 #define ULITE_CONTROL_RST_RX 0x02
68 #define ULITE_CONTROL_IE 0x10
71 static struct uart_port ulite_ports
[ULITE_NR_UARTS
];
73 /* ---------------------------------------------------------------------
74 * Core UART driver operations
77 static int ulite_receive(struct uart_port
*port
, int stat
)
79 struct tty_struct
*tty
= port
->state
->port
.tty
;
81 char flag
= TTY_NORMAL
;
83 if ((stat
& (ULITE_STATUS_RXVALID
| ULITE_STATUS_OVERRUN
84 | ULITE_STATUS_FRAME
)) == 0)
88 if (stat
& ULITE_STATUS_RXVALID
) {
90 ch
= ioread32be(port
->membase
+ ULITE_RX
);
92 if (stat
& ULITE_STATUS_PARITY
)
93 port
->icount
.parity
++;
96 if (stat
& ULITE_STATUS_OVERRUN
)
97 port
->icount
.overrun
++;
99 if (stat
& ULITE_STATUS_FRAME
)
100 port
->icount
.frame
++;
103 /* drop byte with parity error if IGNPAR specificed */
104 if (stat
& port
->ignore_status_mask
& ULITE_STATUS_PARITY
)
105 stat
&= ~ULITE_STATUS_RXVALID
;
107 stat
&= port
->read_status_mask
;
109 if (stat
& ULITE_STATUS_PARITY
)
113 stat
&= ~port
->ignore_status_mask
;
115 if (stat
& ULITE_STATUS_RXVALID
)
116 tty_insert_flip_char(tty
, ch
, flag
);
118 if (stat
& ULITE_STATUS_FRAME
)
119 tty_insert_flip_char(tty
, 0, TTY_FRAME
);
121 if (stat
& ULITE_STATUS_OVERRUN
)
122 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
127 static int ulite_transmit(struct uart_port
*port
, int stat
)
129 struct circ_buf
*xmit
= &port
->state
->xmit
;
131 if (stat
& ULITE_STATUS_TXFULL
)
135 iowrite32be(port
->x_char
, port
->membase
+ ULITE_TX
);
141 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
))
144 iowrite32be(xmit
->buf
[xmit
->tail
], port
->membase
+ ULITE_TX
);
145 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
-1);
149 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
150 uart_write_wakeup(port
);
155 static irqreturn_t
ulite_isr(int irq
, void *dev_id
)
157 struct uart_port
*port
= dev_id
;
161 int stat
= ioread32be(port
->membase
+ ULITE_STATUS
);
162 busy
= ulite_receive(port
, stat
);
163 busy
|= ulite_transmit(port
, stat
);
169 tty_flip_buffer_push(port
->state
->port
.tty
);
176 static unsigned int ulite_tx_empty(struct uart_port
*port
)
181 spin_lock_irqsave(&port
->lock
, flags
);
182 ret
= ioread32be(port
->membase
+ ULITE_STATUS
);
183 spin_unlock_irqrestore(&port
->lock
, flags
);
185 return ret
& ULITE_STATUS_TXEMPTY
? TIOCSER_TEMT
: 0;
188 static unsigned int ulite_get_mctrl(struct uart_port
*port
)
190 return TIOCM_CTS
| TIOCM_DSR
| TIOCM_CAR
;
193 static void ulite_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
198 static void ulite_stop_tx(struct uart_port
*port
)
203 static void ulite_start_tx(struct uart_port
*port
)
205 ulite_transmit(port
, ioread32be(port
->membase
+ ULITE_STATUS
));
208 static void ulite_stop_rx(struct uart_port
*port
)
210 /* don't forward any more data (like !CREAD) */
211 port
->ignore_status_mask
= ULITE_STATUS_RXVALID
| ULITE_STATUS_PARITY
212 | ULITE_STATUS_FRAME
| ULITE_STATUS_OVERRUN
;
215 static void ulite_enable_ms(struct uart_port
*port
)
220 static void ulite_break_ctl(struct uart_port
*port
, int ctl
)
225 static int ulite_startup(struct uart_port
*port
)
229 ret
= request_irq(port
->irq
, ulite_isr
,
230 IRQF_SHARED
| IRQF_SAMPLE_RANDOM
, "uartlite", port
);
234 iowrite32be(ULITE_CONTROL_RST_RX
| ULITE_CONTROL_RST_TX
,
235 port
->membase
+ ULITE_CONTROL
);
236 iowrite32be(ULITE_CONTROL_IE
, port
->membase
+ ULITE_CONTROL
);
241 static void ulite_shutdown(struct uart_port
*port
)
243 iowrite32be(0, port
->membase
+ ULITE_CONTROL
);
244 ioread32be(port
->membase
+ ULITE_CONTROL
); /* dummy */
245 free_irq(port
->irq
, port
);
248 static void ulite_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
249 struct ktermios
*old
)
254 spin_lock_irqsave(&port
->lock
, flags
);
256 port
->read_status_mask
= ULITE_STATUS_RXVALID
| ULITE_STATUS_OVERRUN
257 | ULITE_STATUS_TXFULL
;
259 if (termios
->c_iflag
& INPCK
)
260 port
->read_status_mask
|=
261 ULITE_STATUS_PARITY
| ULITE_STATUS_FRAME
;
263 port
->ignore_status_mask
= 0;
264 if (termios
->c_iflag
& IGNPAR
)
265 port
->ignore_status_mask
|= ULITE_STATUS_PARITY
266 | ULITE_STATUS_FRAME
| ULITE_STATUS_OVERRUN
;
268 /* ignore all characters if CREAD is not set */
269 if ((termios
->c_cflag
& CREAD
) == 0)
270 port
->ignore_status_mask
|=
271 ULITE_STATUS_RXVALID
| ULITE_STATUS_PARITY
272 | ULITE_STATUS_FRAME
| ULITE_STATUS_OVERRUN
;
275 baud
= uart_get_baud_rate(port
, termios
, old
, 0, 460800);
276 uart_update_timeout(port
, termios
->c_cflag
, baud
);
278 spin_unlock_irqrestore(&port
->lock
, flags
);
281 static const char *ulite_type(struct uart_port
*port
)
283 return port
->type
== PORT_UARTLITE
? "uartlite" : NULL
;
286 static void ulite_release_port(struct uart_port
*port
)
288 release_mem_region(port
->mapbase
, ULITE_REGION
);
289 iounmap(port
->membase
);
290 port
->membase
= NULL
;
293 static int ulite_request_port(struct uart_port
*port
)
295 pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
296 port
, (unsigned long long) port
->mapbase
);
298 if (!request_mem_region(port
->mapbase
, ULITE_REGION
, "uartlite")) {
299 dev_err(port
->dev
, "Memory region busy\n");
303 port
->membase
= ioremap(port
->mapbase
, ULITE_REGION
);
304 if (!port
->membase
) {
305 dev_err(port
->dev
, "Unable to map registers\n");
306 release_mem_region(port
->mapbase
, ULITE_REGION
);
313 static void ulite_config_port(struct uart_port
*port
, int flags
)
315 if (!ulite_request_port(port
))
316 port
->type
= PORT_UARTLITE
;
319 static int ulite_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
321 /* we don't want the core code to modify any port params */
325 static struct uart_ops ulite_ops
= {
326 .tx_empty
= ulite_tx_empty
,
327 .set_mctrl
= ulite_set_mctrl
,
328 .get_mctrl
= ulite_get_mctrl
,
329 .stop_tx
= ulite_stop_tx
,
330 .start_tx
= ulite_start_tx
,
331 .stop_rx
= ulite_stop_rx
,
332 .enable_ms
= ulite_enable_ms
,
333 .break_ctl
= ulite_break_ctl
,
334 .startup
= ulite_startup
,
335 .shutdown
= ulite_shutdown
,
336 .set_termios
= ulite_set_termios
,
338 .release_port
= ulite_release_port
,
339 .request_port
= ulite_request_port
,
340 .config_port
= ulite_config_port
,
341 .verify_port
= ulite_verify_port
344 /* ---------------------------------------------------------------------
345 * Console driver operations
348 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
349 static void ulite_console_wait_tx(struct uart_port
*port
)
354 /* Spin waiting for TX fifo to have space available */
355 for (i
= 0; i
< 100000; i
++) {
356 val
= ioread32be(port
->membase
+ ULITE_STATUS
);
357 if ((val
& ULITE_STATUS_TXFULL
) == 0)
363 static void ulite_console_putchar(struct uart_port
*port
, int ch
)
365 ulite_console_wait_tx(port
);
366 iowrite32be(ch
, port
->membase
+ ULITE_TX
);
369 static void ulite_console_write(struct console
*co
, const char *s
,
372 struct uart_port
*port
= &ulite_ports
[co
->index
];
377 if (oops_in_progress
) {
378 locked
= spin_trylock_irqsave(&port
->lock
, flags
);
380 spin_lock_irqsave(&port
->lock
, flags
);
382 /* save and disable interrupt */
383 ier
= ioread32be(port
->membase
+ ULITE_STATUS
) & ULITE_STATUS_IE
;
384 iowrite32be(0, port
->membase
+ ULITE_CONTROL
);
386 uart_console_write(port
, s
, count
, ulite_console_putchar
);
388 ulite_console_wait_tx(port
);
390 /* restore interrupt state */
392 iowrite32be(ULITE_CONTROL_IE
, port
->membase
+ ULITE_CONTROL
);
395 spin_unlock_irqrestore(&port
->lock
, flags
);
398 static int __devinit
ulite_console_setup(struct console
*co
, char *options
)
400 struct uart_port
*port
;
406 if (co
->index
< 0 || co
->index
>= ULITE_NR_UARTS
)
409 port
= &ulite_ports
[co
->index
];
411 /* Has the device been initialized yet? */
412 if (!port
->mapbase
) {
413 pr_debug("console on ttyUL%i not present\n", co
->index
);
417 /* not initialized yet? */
418 if (!port
->membase
) {
419 if (ulite_request_port(port
))
424 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
426 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
429 static struct uart_driver ulite_uart_driver
;
431 static struct console ulite_console
= {
433 .write
= ulite_console_write
,
434 .device
= uart_console_device
,
435 .setup
= ulite_console_setup
,
436 .flags
= CON_PRINTBUFFER
,
437 .index
= -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
438 .data
= &ulite_uart_driver
,
441 static int __init
ulite_console_init(void)
443 register_console(&ulite_console
);
447 console_initcall(ulite_console_init
);
449 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
451 static struct uart_driver ulite_uart_driver
= {
452 .owner
= THIS_MODULE
,
453 .driver_name
= "uartlite",
454 .dev_name
= ULITE_NAME
,
455 .major
= ULITE_MAJOR
,
456 .minor
= ULITE_MINOR
,
457 .nr
= ULITE_NR_UARTS
,
458 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
459 .cons
= &ulite_console
,
463 /* ---------------------------------------------------------------------
464 * Port assignment functions (mapping devices to uart_port structures)
467 /** ulite_assign: register a uartlite device with the driver
469 * @dev: pointer to device structure
470 * @id: requested id number. Pass -1 for automatic port assignment
471 * @base: base address of uartlite registers
472 * @irq: irq number for uartlite
474 * Returns: 0 on success, <0 otherwise
476 static int __devinit
ulite_assign(struct device
*dev
, int id
, u32 base
, int irq
)
478 struct uart_port
*port
;
481 /* if id = -1; then scan for a free id and use that */
483 for (id
= 0; id
< ULITE_NR_UARTS
; id
++)
484 if (ulite_ports
[id
].mapbase
== 0)
487 if (id
< 0 || id
>= ULITE_NR_UARTS
) {
488 dev_err(dev
, "%s%i too large\n", ULITE_NAME
, id
);
492 if ((ulite_ports
[id
].mapbase
) && (ulite_ports
[id
].mapbase
!= base
)) {
493 dev_err(dev
, "cannot assign to %s%i; it is already in use\n",
498 port
= &ulite_ports
[id
];
500 spin_lock_init(&port
->lock
);
503 port
->iotype
= UPIO_MEM
;
504 port
->iobase
= 1; /* mark port in use */
505 port
->mapbase
= base
;
506 port
->membase
= NULL
;
507 port
->ops
= &ulite_ops
;
509 port
->flags
= UPF_BOOT_AUTOCONF
;
511 port
->type
= PORT_UNKNOWN
;
514 dev_set_drvdata(dev
, port
);
516 /* Register the port */
517 rc
= uart_add_one_port(&ulite_uart_driver
, port
);
519 dev_err(dev
, "uart_add_one_port() failed; err=%i\n", rc
);
521 dev_set_drvdata(dev
, NULL
);
528 /** ulite_release: register a uartlite device with the driver
530 * @dev: pointer to device structure
532 static int __devexit
ulite_release(struct device
*dev
)
534 struct uart_port
*port
= dev_get_drvdata(dev
);
538 rc
= uart_remove_one_port(&ulite_uart_driver
, port
);
539 dev_set_drvdata(dev
, NULL
);
546 /* ---------------------------------------------------------------------
547 * Platform bus binding
550 static int __devinit
ulite_probe(struct platform_device
*pdev
)
552 struct resource
*res
, *res2
;
554 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
558 res2
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
562 return ulite_assign(&pdev
->dev
, pdev
->id
, res
->start
, res2
->start
);
565 static int __devexit
ulite_remove(struct platform_device
*pdev
)
567 return ulite_release(&pdev
->dev
);
570 /* work with hotplug and coldplug */
571 MODULE_ALIAS("platform:uartlite");
573 static struct platform_driver ulite_platform_driver
= {
574 .probe
= ulite_probe
,
575 .remove
= __devexit_p(ulite_remove
),
577 .owner
= THIS_MODULE
,
582 /* ---------------------------------------------------------------------
585 #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE))
587 ulite_of_probe(struct platform_device
*op
, const struct of_device_id
*match
)
590 const unsigned int *id
;
593 dev_dbg(&op
->dev
, "%s(%p, %p)\n", __func__
, op
, match
);
595 rc
= of_address_to_resource(op
->dev
.of_node
, 0, &res
);
597 dev_err(&op
->dev
, "invalid address\n");
601 irq
= irq_of_parse_and_map(op
->dev
.of_node
, 0);
603 id
= of_get_property(op
->dev
.of_node
, "port-number", NULL
);
605 return ulite_assign(&op
->dev
, id
? *id
: -1, res
.start
, irq
);
608 static int __devexit
ulite_of_remove(struct platform_device
*op
)
610 return ulite_release(&op
->dev
);
613 static struct of_platform_driver ulite_of_driver
= {
614 .probe
= ulite_of_probe
,
615 .remove
= __devexit_p(ulite_of_remove
),
618 .owner
= THIS_MODULE
,
619 .of_match_table
= ulite_of_match
,
623 /* Registration helpers to keep the number of #ifdefs to a minimum */
624 static inline int __init
ulite_of_register(void)
626 pr_debug("uartlite: calling of_register_platform_driver()\n");
627 return of_register_platform_driver(&ulite_of_driver
);
630 static inline void __exit
ulite_of_unregister(void)
632 of_unregister_platform_driver(&ulite_of_driver
);
634 #else /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
635 /* Appropriate config not enabled; do nothing helpers */
636 static inline int __init
ulite_of_register(void) { return 0; }
637 static inline void __exit
ulite_of_unregister(void) { }
638 #endif /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */
640 /* ---------------------------------------------------------------------
641 * Module setup/teardown
644 int __init
ulite_init(void)
648 pr_debug("uartlite: calling uart_register_driver()\n");
649 ret
= uart_register_driver(&ulite_uart_driver
);
653 ret
= ulite_of_register();
657 pr_debug("uartlite: calling platform_driver_register()\n");
658 ret
= platform_driver_register(&ulite_platform_driver
);
665 ulite_of_unregister();
667 uart_unregister_driver(&ulite_uart_driver
);
669 printk(KERN_ERR
"registering uartlite driver failed: err=%i", ret
);
673 void __exit
ulite_exit(void)
675 platform_driver_unregister(&ulite_platform_driver
);
676 ulite_of_unregister();
677 uart_unregister_driver(&ulite_uart_driver
);
680 module_init(ulite_init
);
681 module_exit(ulite_exit
);
683 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
684 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
685 MODULE_LICENSE("GPL");