2 * arch/arm/mach-at91/at91sam9260.c
4 * Copyright (C) 2006 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
16 #include <asm/mach/arch.h>
17 #include <asm/mach/map.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/at91sam9260.h>
20 #include <asm/arch/at91_pmc.h>
21 #include <asm/arch/at91_rstc.h>
22 #include <asm/arch/at91_shdwc.h>
27 static struct map_desc at91sam9260_io_desc
[] __initdata
= {
29 .virtual = AT91_VA_BASE_SYS
,
30 .pfn
= __phys_to_pfn(AT91_BASE_SYS
),
36 static struct map_desc at91sam9260_sram_desc
[] __initdata
= {
38 .virtual = AT91_IO_VIRT_BASE
- AT91SAM9260_SRAM0_SIZE
,
39 .pfn
= __phys_to_pfn(AT91SAM9260_SRAM0_BASE
),
40 .length
= AT91SAM9260_SRAM0_SIZE
,
43 .virtual = AT91_IO_VIRT_BASE
- AT91SAM9260_SRAM0_SIZE
- AT91SAM9260_SRAM1_SIZE
,
44 .pfn
= __phys_to_pfn(AT91SAM9260_SRAM1_BASE
),
45 .length
= AT91SAM9260_SRAM1_SIZE
,
50 static struct map_desc at91sam9xe_sram_desc
[] __initdata
= {
52 .pfn
= __phys_to_pfn(AT91SAM9XE_SRAM_BASE
),
57 /* --------------------------------------------------------------------
59 * -------------------------------------------------------------------- */
62 * The peripheral clocks.
64 static struct clk pioA_clk
= {
66 .pmc_mask
= 1 << AT91SAM9260_ID_PIOA
,
67 .type
= CLK_TYPE_PERIPHERAL
,
69 static struct clk pioB_clk
= {
71 .pmc_mask
= 1 << AT91SAM9260_ID_PIOB
,
72 .type
= CLK_TYPE_PERIPHERAL
,
74 static struct clk pioC_clk
= {
76 .pmc_mask
= 1 << AT91SAM9260_ID_PIOC
,
77 .type
= CLK_TYPE_PERIPHERAL
,
79 static struct clk adc_clk
= {
81 .pmc_mask
= 1 << AT91SAM9260_ID_ADC
,
82 .type
= CLK_TYPE_PERIPHERAL
,
84 static struct clk usart0_clk
= {
86 .pmc_mask
= 1 << AT91SAM9260_ID_US0
,
87 .type
= CLK_TYPE_PERIPHERAL
,
89 static struct clk usart1_clk
= {
91 .pmc_mask
= 1 << AT91SAM9260_ID_US1
,
92 .type
= CLK_TYPE_PERIPHERAL
,
94 static struct clk usart2_clk
= {
96 .pmc_mask
= 1 << AT91SAM9260_ID_US2
,
97 .type
= CLK_TYPE_PERIPHERAL
,
99 static struct clk mmc_clk
= {
101 .pmc_mask
= 1 << AT91SAM9260_ID_MCI
,
102 .type
= CLK_TYPE_PERIPHERAL
,
104 static struct clk udc_clk
= {
106 .pmc_mask
= 1 << AT91SAM9260_ID_UDP
,
107 .type
= CLK_TYPE_PERIPHERAL
,
109 static struct clk twi_clk
= {
111 .pmc_mask
= 1 << AT91SAM9260_ID_TWI
,
112 .type
= CLK_TYPE_PERIPHERAL
,
114 static struct clk spi0_clk
= {
116 .pmc_mask
= 1 << AT91SAM9260_ID_SPI0
,
117 .type
= CLK_TYPE_PERIPHERAL
,
119 static struct clk spi1_clk
= {
121 .pmc_mask
= 1 << AT91SAM9260_ID_SPI1
,
122 .type
= CLK_TYPE_PERIPHERAL
,
124 static struct clk ssc_clk
= {
126 .pmc_mask
= 1 << AT91SAM9260_ID_SSC
,
127 .type
= CLK_TYPE_PERIPHERAL
,
129 static struct clk tc0_clk
= {
131 .pmc_mask
= 1 << AT91SAM9260_ID_TC0
,
132 .type
= CLK_TYPE_PERIPHERAL
,
134 static struct clk tc1_clk
= {
136 .pmc_mask
= 1 << AT91SAM9260_ID_TC1
,
137 .type
= CLK_TYPE_PERIPHERAL
,
139 static struct clk tc2_clk
= {
141 .pmc_mask
= 1 << AT91SAM9260_ID_TC2
,
142 .type
= CLK_TYPE_PERIPHERAL
,
144 static struct clk ohci_clk
= {
146 .pmc_mask
= 1 << AT91SAM9260_ID_UHP
,
147 .type
= CLK_TYPE_PERIPHERAL
,
149 static struct clk macb_clk
= {
151 .pmc_mask
= 1 << AT91SAM9260_ID_EMAC
,
152 .type
= CLK_TYPE_PERIPHERAL
,
154 static struct clk isi_clk
= {
156 .pmc_mask
= 1 << AT91SAM9260_ID_ISI
,
157 .type
= CLK_TYPE_PERIPHERAL
,
159 static struct clk usart3_clk
= {
160 .name
= "usart3_clk",
161 .pmc_mask
= 1 << AT91SAM9260_ID_US3
,
162 .type
= CLK_TYPE_PERIPHERAL
,
164 static struct clk usart4_clk
= {
165 .name
= "usart4_clk",
166 .pmc_mask
= 1 << AT91SAM9260_ID_US4
,
167 .type
= CLK_TYPE_PERIPHERAL
,
169 static struct clk usart5_clk
= {
170 .name
= "usart5_clk",
171 .pmc_mask
= 1 << AT91SAM9260_ID_US5
,
172 .type
= CLK_TYPE_PERIPHERAL
,
174 static struct clk tc3_clk
= {
176 .pmc_mask
= 1 << AT91SAM9260_ID_TC3
,
177 .type
= CLK_TYPE_PERIPHERAL
,
179 static struct clk tc4_clk
= {
181 .pmc_mask
= 1 << AT91SAM9260_ID_TC4
,
182 .type
= CLK_TYPE_PERIPHERAL
,
184 static struct clk tc5_clk
= {
186 .pmc_mask
= 1 << AT91SAM9260_ID_TC5
,
187 .type
= CLK_TYPE_PERIPHERAL
,
190 static struct clk
*periph_clocks
[] __initdata
= {
220 * The two programmable clocks.
221 * You must configure pin multiplexing to bring these signals out.
223 static struct clk pck0
= {
225 .pmc_mask
= AT91_PMC_PCK0
,
226 .type
= CLK_TYPE_PROGRAMMABLE
,
229 static struct clk pck1
= {
231 .pmc_mask
= AT91_PMC_PCK1
,
232 .type
= CLK_TYPE_PROGRAMMABLE
,
236 static void __init
at91sam9260_register_clocks(void)
240 for (i
= 0; i
< ARRAY_SIZE(periph_clocks
); i
++)
241 clk_register(periph_clocks
[i
]);
247 /* --------------------------------------------------------------------
249 * -------------------------------------------------------------------- */
251 static struct at91_gpio_bank at91sam9260_gpio
[] = {
253 .id
= AT91SAM9260_ID_PIOA
,
257 .id
= AT91SAM9260_ID_PIOB
,
261 .id
= AT91SAM9260_ID_PIOC
,
267 static void at91sam9260_reset(void)
269 at91_sys_write(AT91_RSTC_CR
, AT91_RSTC_KEY
| AT91_RSTC_PROCRST
| AT91_RSTC_PERRST
);
272 static void at91sam9260_poweroff(void)
274 at91_sys_write(AT91_SHDW_CR
, AT91_SHDW_KEY
| AT91_SHDW_SHDW
);
278 /* --------------------------------------------------------------------
279 * AT91SAM9260 processor initialization
280 * -------------------------------------------------------------------- */
282 static void __init
at91sam9xe_initialize(void)
284 unsigned long cidr
, sram_size
;
286 cidr
= at91_sys_read(AT91_DBGU_CIDR
);
288 switch (cidr
& AT91_CIDR_SRAMSIZ
) {
289 case AT91_CIDR_SRAMSIZ_32K
:
290 sram_size
= 2 * SZ_16K
;
292 case AT91_CIDR_SRAMSIZ_16K
:
297 at91sam9xe_sram_desc
->virtual = AT91_IO_VIRT_BASE
- sram_size
;
298 at91sam9xe_sram_desc
->length
= sram_size
;
300 iotable_init(at91sam9xe_sram_desc
, ARRAY_SIZE(at91sam9xe_sram_desc
));
303 void __init
at91sam9260_initialize(unsigned long main_clock
)
305 /* Map peripherals */
306 iotable_init(at91sam9260_io_desc
, ARRAY_SIZE(at91sam9260_io_desc
));
308 if (cpu_is_at91sam9xe())
309 at91sam9xe_initialize();
311 iotable_init(at91sam9260_sram_desc
, ARRAY_SIZE(at91sam9260_sram_desc
));
313 at91_arch_reset
= at91sam9260_reset
;
314 pm_power_off
= at91sam9260_poweroff
;
315 at91_extern_irq
= (1 << AT91SAM9260_ID_IRQ0
) | (1 << AT91SAM9260_ID_IRQ1
)
316 | (1 << AT91SAM9260_ID_IRQ2
);
318 /* Init clock subsystem */
319 at91_clock_init(main_clock
);
321 /* Register the processor-specific clocks */
322 at91sam9260_register_clocks();
324 /* Register GPIO subsystem */
325 at91_gpio_init(at91sam9260_gpio
, 3);
328 /* --------------------------------------------------------------------
329 * Interrupt initialization
330 * -------------------------------------------------------------------- */
333 * The default interrupt priority levels (0 = lowest, 7 = highest).
335 static unsigned int at91sam9260_default_irq_priority
[NR_AIC_IRQS
] __initdata
= {
336 7, /* Advanced Interrupt Controller */
337 7, /* System Peripherals */
338 1, /* Parallel IO Controller A */
339 1, /* Parallel IO Controller B */
340 1, /* Parallel IO Controller C */
341 0, /* Analog-to-Digital Converter */
345 0, /* Multimedia Card Interface */
346 2, /* USB Device Port */
347 6, /* Two-Wire Interface */
348 5, /* Serial Peripheral Interface 0 */
349 5, /* Serial Peripheral Interface 1 */
350 5, /* Serial Synchronous Controller */
353 0, /* Timer Counter 0 */
354 0, /* Timer Counter 1 */
355 0, /* Timer Counter 2 */
356 2, /* USB Host port */
358 0, /* Image Sensor Interface */
362 0, /* Timer Counter 3 */
363 0, /* Timer Counter 4 */
364 0, /* Timer Counter 5 */
365 0, /* Advanced Interrupt Controller */
366 0, /* Advanced Interrupt Controller */
367 0, /* Advanced Interrupt Controller */
370 void __init
at91sam9260_init_interrupts(unsigned int priority
[NR_AIC_IRQS
])
373 priority
= at91sam9260_default_irq_priority
;
375 /* Initialize the AIC interrupt controller */
376 at91_aic_init(priority
);
378 /* Enable GPIO interrupts */
379 at91_gpio_irq_setup();