firewire: core: check for 1394a compliant IRM, fix inaccessibility of Sony camcorder
[firewire-audio.git] / drivers / net / sfc / falcon_boards.c
blobc7a933a3292e6797b6bc55e87d8499268a63976a
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007-2009 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
10 #include <linux/rtnetlink.h>
12 #include "net_driver.h"
13 #include "phy.h"
14 #include "efx.h"
15 #include "nic.h"
16 #include "regs.h"
17 #include "io.h"
18 #include "workarounds.h"
20 /* Macros for unpacking the board revision */
21 /* The revision info is in host byte order. */
22 #define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
23 #define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
24 #define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
26 /* Board types */
27 #define FALCON_BOARD_SFE4001 0x01
28 #define FALCON_BOARD_SFE4002 0x02
29 #define FALCON_BOARD_SFN4111T 0x51
30 #define FALCON_BOARD_SFN4112F 0x52
32 /* Board temperature is about 15°C above ambient when air flow is
33 * limited. */
34 #define FALCON_BOARD_TEMP_BIAS 15
36 /* SFC4000 datasheet says: 'The maximum permitted junction temperature
37 * is 125°C; the thermal design of the environment for the SFC4000
38 * should aim to keep this well below 100°C.' */
39 #define FALCON_JUNC_TEMP_MAX 90
41 /*****************************************************************************
42 * Support for LM87 sensor chip used on several boards
44 #define LM87_REG_ALARMS1 0x41
45 #define LM87_REG_ALARMS2 0x42
46 #define LM87_IN_LIMITS(nr, _min, _max) \
47 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
48 #define LM87_AIN_LIMITS(nr, _min, _max) \
49 0x3B + (nr), _max, 0x1A + (nr), _min
50 #define LM87_TEMP_INT_LIMITS(_min, _max) \
51 0x39, _max, 0x3A, _min
52 #define LM87_TEMP_EXT1_LIMITS(_min, _max) \
53 0x37, _max, 0x38, _min
55 #define LM87_ALARM_TEMP_INT 0x10
56 #define LM87_ALARM_TEMP_EXT1 0x20
58 #if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
60 static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
61 const u8 *reg_values)
63 struct falcon_board *board = falcon_board(efx);
64 struct i2c_client *client = i2c_new_device(&board->i2c_adap, info);
65 int rc;
67 if (!client)
68 return -EIO;
70 while (*reg_values) {
71 u8 reg = *reg_values++;
72 u8 value = *reg_values++;
73 rc = i2c_smbus_write_byte_data(client, reg, value);
74 if (rc)
75 goto err;
78 board->hwmon_client = client;
79 return 0;
81 err:
82 i2c_unregister_device(client);
83 return rc;
86 static void efx_fini_lm87(struct efx_nic *efx)
88 i2c_unregister_device(falcon_board(efx)->hwmon_client);
91 static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
93 struct i2c_client *client = falcon_board(efx)->hwmon_client;
94 s32 alarms1, alarms2;
96 /* If link is up then do not monitor temperature */
97 if (EFX_WORKAROUND_7884(efx) && efx->link_state.up)
98 return 0;
100 alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
101 alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
102 if (alarms1 < 0)
103 return alarms1;
104 if (alarms2 < 0)
105 return alarms2;
106 alarms1 &= mask;
107 alarms2 &= mask >> 8;
108 if (alarms1 || alarms2) {
109 EFX_ERR(efx,
110 "LM87 detected a hardware failure (status %02x:%02x)"
111 "%s%s\n",
112 alarms1, alarms2,
113 (alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
114 (alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
115 return -ERANGE;
118 return 0;
121 #else /* !CONFIG_SENSORS_LM87 */
123 static inline int
124 efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
125 const u8 *reg_values)
127 return 0;
129 static inline void efx_fini_lm87(struct efx_nic *efx)
132 static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
134 return 0;
137 #endif /* CONFIG_SENSORS_LM87 */
139 /*****************************************************************************
140 * Support for the SFE4001 and SFN4111T NICs.
142 * The SFE4001 does not power-up fully at reset due to its high power
143 * consumption. We control its power via a PCA9539 I/O expander.
144 * Both boards have a MAX6647 temperature monitor which we expose to
145 * the lm90 driver.
147 * This also provides minimal support for reflashing the PHY, which is
148 * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
149 * On SFE4001 rev A2 and later this is connected to the 3V3X output of
150 * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
151 * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
152 * exclusive with the network device being open.
155 /**************************************************************************
156 * Support for I2C IO Expander device on SFE4001
158 #define PCA9539 0x74
160 #define P0_IN 0x00
161 #define P0_OUT 0x02
162 #define P0_INVERT 0x04
163 #define P0_CONFIG 0x06
165 #define P0_EN_1V0X_LBN 0
166 #define P0_EN_1V0X_WIDTH 1
167 #define P0_EN_1V2_LBN 1
168 #define P0_EN_1V2_WIDTH 1
169 #define P0_EN_2V5_LBN 2
170 #define P0_EN_2V5_WIDTH 1
171 #define P0_EN_3V3X_LBN 3
172 #define P0_EN_3V3X_WIDTH 1
173 #define P0_EN_5V_LBN 4
174 #define P0_EN_5V_WIDTH 1
175 #define P0_SHORTEN_JTAG_LBN 5
176 #define P0_SHORTEN_JTAG_WIDTH 1
177 #define P0_X_TRST_LBN 6
178 #define P0_X_TRST_WIDTH 1
179 #define P0_DSP_RESET_LBN 7
180 #define P0_DSP_RESET_WIDTH 1
182 #define P1_IN 0x01
183 #define P1_OUT 0x03
184 #define P1_INVERT 0x05
185 #define P1_CONFIG 0x07
187 #define P1_AFE_PWD_LBN 0
188 #define P1_AFE_PWD_WIDTH 1
189 #define P1_DSP_PWD25_LBN 1
190 #define P1_DSP_PWD25_WIDTH 1
191 #define P1_RESERVED_LBN 2
192 #define P1_RESERVED_WIDTH 2
193 #define P1_SPARE_LBN 4
194 #define P1_SPARE_WIDTH 4
196 /* Temperature Sensor */
197 #define MAX664X_REG_RSL 0x02
198 #define MAX664X_REG_WLHO 0x0B
200 static void sfe4001_poweroff(struct efx_nic *efx)
202 struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
203 struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
205 /* Turn off all power rails and disable outputs */
206 i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
207 i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
208 i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
210 /* Clear any over-temperature alert */
211 i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
214 static int sfe4001_poweron(struct efx_nic *efx)
216 struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
217 struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
218 unsigned int i, j;
219 int rc;
220 u8 out;
222 /* Clear any previous over-temperature alert */
223 rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
224 if (rc < 0)
225 return rc;
227 /* Enable port 0 and port 1 outputs on IO expander */
228 rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
229 if (rc)
230 return rc;
231 rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
232 0xff & ~(1 << P1_SPARE_LBN));
233 if (rc)
234 goto fail_on;
236 /* If PHY power is on, turn it all off and wait 1 second to
237 * ensure a full reset.
239 rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
240 if (rc < 0)
241 goto fail_on;
242 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
243 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
244 (0 << P0_EN_1V0X_LBN));
245 if (rc != out) {
246 EFX_INFO(efx, "power-cycling PHY\n");
247 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
248 if (rc)
249 goto fail_on;
250 schedule_timeout_uninterruptible(HZ);
253 for (i = 0; i < 20; ++i) {
254 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
255 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
256 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
257 (1 << P0_X_TRST_LBN));
258 if (efx->phy_mode & PHY_MODE_SPECIAL)
259 out |= 1 << P0_EN_3V3X_LBN;
261 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
262 if (rc)
263 goto fail_on;
264 msleep(10);
266 /* Turn on 1V power rail */
267 out &= ~(1 << P0_EN_1V0X_LBN);
268 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
269 if (rc)
270 goto fail_on;
272 EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
274 /* In flash config mode, DSP does not turn on AFE, so
275 * just wait 1 second.
277 if (efx->phy_mode & PHY_MODE_SPECIAL) {
278 schedule_timeout_uninterruptible(HZ);
279 return 0;
282 for (j = 0; j < 10; ++j) {
283 msleep(100);
285 /* Check DSP has asserted AFE power line */
286 rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
287 if (rc < 0)
288 goto fail_on;
289 if (rc & (1 << P1_AFE_PWD_LBN))
290 return 0;
294 EFX_INFO(efx, "timed out waiting for DSP boot\n");
295 rc = -ETIMEDOUT;
296 fail_on:
297 sfe4001_poweroff(efx);
298 return rc;
301 static int sfn4111t_reset(struct efx_nic *efx)
303 struct falcon_board *board = falcon_board(efx);
304 efx_oword_t reg;
306 /* GPIO 3 and the GPIO register are shared with I2C, so block that */
307 i2c_lock_adapter(&board->i2c_adap);
309 /* Pull RST_N (GPIO 2) low then let it up again, setting the
310 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
311 * output enables; the output levels should always be 0 (low)
312 * and we rely on external pull-ups. */
313 efx_reado(efx, &reg, FR_AB_GPIO_CTL);
314 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
315 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
316 msleep(1000);
317 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
318 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
319 !!(efx->phy_mode & PHY_MODE_SPECIAL));
320 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
321 msleep(1);
323 i2c_unlock_adapter(&board->i2c_adap);
325 ssleep(1);
326 return 0;
329 static ssize_t show_phy_flash_cfg(struct device *dev,
330 struct device_attribute *attr, char *buf)
332 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
333 return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
336 static ssize_t set_phy_flash_cfg(struct device *dev,
337 struct device_attribute *attr,
338 const char *buf, size_t count)
340 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
341 enum efx_phy_mode old_mode, new_mode;
342 int err;
344 rtnl_lock();
345 old_mode = efx->phy_mode;
346 if (count == 0 || *buf == '0')
347 new_mode = old_mode & ~PHY_MODE_SPECIAL;
348 else
349 new_mode = PHY_MODE_SPECIAL;
350 if (old_mode == new_mode) {
351 err = 0;
352 } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
353 err = -EBUSY;
354 } else {
355 /* Reset the PHY, reconfigure the MAC and enable/disable
356 * MAC stats accordingly. */
357 efx->phy_mode = new_mode;
358 if (new_mode & PHY_MODE_SPECIAL)
359 falcon_stop_nic_stats(efx);
360 if (falcon_board(efx)->type->id == FALCON_BOARD_SFE4001)
361 err = sfe4001_poweron(efx);
362 else
363 err = sfn4111t_reset(efx);
364 if (!err)
365 err = efx_reconfigure_port(efx);
366 if (!(new_mode & PHY_MODE_SPECIAL))
367 falcon_start_nic_stats(efx);
369 rtnl_unlock();
371 return err ? err : count;
374 static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
376 static void sfe4001_fini(struct efx_nic *efx)
378 struct falcon_board *board = falcon_board(efx);
380 EFX_INFO(efx, "%s\n", __func__);
382 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
383 sfe4001_poweroff(efx);
384 i2c_unregister_device(board->ioexp_client);
385 i2c_unregister_device(board->hwmon_client);
388 static int sfe4001_check_hw(struct efx_nic *efx)
390 s32 status;
392 /* If XAUI link is up then do not monitor */
393 if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
394 return 0;
396 /* Check the powered status of the PHY. Lack of power implies that
397 * the MAX6647 has shut down power to it, probably due to a temp.
398 * alarm. Reading the power status rather than the MAX6647 status
399 * directly because the later is read-to-clear and would thus
400 * start to power up the PHY again when polled, causing us to blip
401 * the power undesirably.
402 * We know we can read from the IO expander because we did
403 * it during power-on. Assume failure now is bad news. */
404 status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
405 if (status >= 0 &&
406 (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
407 return 0;
409 /* Use board power control, not PHY power control */
410 sfe4001_poweroff(efx);
411 efx->phy_mode = PHY_MODE_OFF;
413 return (status < 0) ? -EIO : -ERANGE;
416 static struct i2c_board_info sfe4001_hwmon_info = {
417 I2C_BOARD_INFO("max6647", 0x4e),
420 /* This board uses an I2C expander to provider power to the PHY, which needs to
421 * be turned on before the PHY can be used.
422 * Context: Process context, rtnl lock held
424 static int sfe4001_init(struct efx_nic *efx)
426 struct falcon_board *board = falcon_board(efx);
427 int rc;
429 #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
430 board->hwmon_client =
431 i2c_new_device(&board->i2c_adap, &sfe4001_hwmon_info);
432 #else
433 board->hwmon_client =
434 i2c_new_dummy(&board->i2c_adap, sfe4001_hwmon_info.addr);
435 #endif
436 if (!board->hwmon_client)
437 return -EIO;
439 /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
440 rc = i2c_smbus_write_byte_data(board->hwmon_client,
441 MAX664X_REG_WLHO, 90);
442 if (rc)
443 goto fail_hwmon;
445 board->ioexp_client = i2c_new_dummy(&board->i2c_adap, PCA9539);
446 if (!board->ioexp_client) {
447 rc = -EIO;
448 goto fail_hwmon;
451 if (efx->phy_mode & PHY_MODE_SPECIAL) {
452 /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
453 * will fail. */
454 falcon_stop_nic_stats(efx);
456 rc = sfe4001_poweron(efx);
457 if (rc)
458 goto fail_ioexp;
460 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
461 if (rc)
462 goto fail_on;
464 EFX_INFO(efx, "PHY is powered on\n");
465 return 0;
467 fail_on:
468 sfe4001_poweroff(efx);
469 fail_ioexp:
470 i2c_unregister_device(board->ioexp_client);
471 fail_hwmon:
472 i2c_unregister_device(board->hwmon_client);
473 return rc;
476 static int sfn4111t_check_hw(struct efx_nic *efx)
478 s32 status;
480 /* If XAUI link is up then do not monitor */
481 if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
482 return 0;
484 /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
485 status = i2c_smbus_read_byte_data(falcon_board(efx)->hwmon_client,
486 MAX664X_REG_RSL);
487 if (status < 0)
488 return -EIO;
489 if (status & 0x57)
490 return -ERANGE;
491 return 0;
494 static void sfn4111t_fini(struct efx_nic *efx)
496 EFX_INFO(efx, "%s\n", __func__);
498 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
499 i2c_unregister_device(falcon_board(efx)->hwmon_client);
502 static struct i2c_board_info sfn4111t_a0_hwmon_info = {
503 I2C_BOARD_INFO("max6647", 0x4e),
506 static struct i2c_board_info sfn4111t_r5_hwmon_info = {
507 I2C_BOARD_INFO("max6646", 0x4d),
510 static void sfn4111t_init_phy(struct efx_nic *efx)
512 if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
513 if (sft9001_wait_boot(efx) != -EINVAL)
514 return;
516 efx->phy_mode = PHY_MODE_SPECIAL;
517 falcon_stop_nic_stats(efx);
520 sfn4111t_reset(efx);
521 sft9001_wait_boot(efx);
524 static int sfn4111t_init(struct efx_nic *efx)
526 struct falcon_board *board = falcon_board(efx);
527 int rc;
529 board->hwmon_client =
530 i2c_new_device(&board->i2c_adap,
531 (board->minor < 5) ?
532 &sfn4111t_a0_hwmon_info :
533 &sfn4111t_r5_hwmon_info);
534 if (!board->hwmon_client)
535 return -EIO;
537 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
538 if (rc)
539 goto fail_hwmon;
541 if (efx->phy_mode & PHY_MODE_SPECIAL)
542 /* PHY may not generate a 156.25 MHz clock and MAC
543 * stats fetch will fail. */
544 falcon_stop_nic_stats(efx);
546 return 0;
548 fail_hwmon:
549 i2c_unregister_device(board->hwmon_client);
550 return rc;
553 /*****************************************************************************
554 * Support for the SFE4002
557 static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
559 static const u8 sfe4002_lm87_regs[] = {
560 LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
561 LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
562 LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
563 LM87_IN_LIMITS(3, 0xac, 0xd4), /* 5V: 5.0V +/- 10% */
564 LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
565 LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
566 LM87_AIN_LIMITS(0, 0x98, 0xbb), /* AIN1: 1.66V +/- 10% */
567 LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
568 LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
569 LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
573 static struct i2c_board_info sfe4002_hwmon_info = {
574 I2C_BOARD_INFO("lm87", 0x2e),
575 .platform_data = &sfe4002_lm87_channel,
578 /****************************************************************************/
579 /* LED allocations. Note that on rev A0 boards the schematic and the reality
580 * differ: red and green are swapped. Below is the fixed (A1) layout (there
581 * are only 3 A0 boards in existence, so no real reason to make this
582 * conditional).
584 #define SFE4002_FAULT_LED (2) /* Red */
585 #define SFE4002_RX_LED (0) /* Green */
586 #define SFE4002_TX_LED (1) /* Amber */
588 static void sfe4002_init_phy(struct efx_nic *efx)
590 /* Set the TX and RX LEDs to reflect status and activity, and the
591 * fault LED off */
592 falcon_qt202x_set_led(efx, SFE4002_TX_LED,
593 QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
594 falcon_qt202x_set_led(efx, SFE4002_RX_LED,
595 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
596 falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
599 static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
601 falcon_qt202x_set_led(
602 efx, SFE4002_FAULT_LED,
603 (mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
606 static int sfe4002_check_hw(struct efx_nic *efx)
608 struct falcon_board *board = falcon_board(efx);
610 /* A0 board rev. 4002s report a temperature fault the whole time
611 * (bad sensor) so we mask it out. */
612 unsigned alarm_mask =
613 (board->major == 0 && board->minor == 0) ?
614 ~LM87_ALARM_TEMP_EXT1 : ~0;
616 return efx_check_lm87(efx, alarm_mask);
619 static int sfe4002_init(struct efx_nic *efx)
621 return efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
624 /*****************************************************************************
625 * Support for the SFN4112F
628 static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
630 static const u8 sfn4112f_lm87_regs[] = {
631 LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
632 LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
633 LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
634 LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
635 LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
636 LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
637 LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
638 LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
642 static struct i2c_board_info sfn4112f_hwmon_info = {
643 I2C_BOARD_INFO("lm87", 0x2e),
644 .platform_data = &sfn4112f_lm87_channel,
647 #define SFN4112F_ACT_LED 0
648 #define SFN4112F_LINK_LED 1
650 static void sfn4112f_init_phy(struct efx_nic *efx)
652 falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
653 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
654 falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
655 QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
658 static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
660 int reg;
662 switch (mode) {
663 case EFX_LED_OFF:
664 reg = QUAKE_LED_OFF;
665 break;
666 case EFX_LED_ON:
667 reg = QUAKE_LED_ON;
668 break;
669 default:
670 reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
671 break;
674 falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
677 static int sfn4112f_check_hw(struct efx_nic *efx)
679 /* Mask out unused sensors */
680 return efx_check_lm87(efx, ~0x48);
683 static int sfn4112f_init(struct efx_nic *efx)
685 return efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
688 static const struct falcon_board_type board_types[] = {
690 .id = FALCON_BOARD_SFE4001,
691 .ref_model = "SFE4001",
692 .gen_type = "10GBASE-T adapter",
693 .init = sfe4001_init,
694 .init_phy = efx_port_dummy_op_void,
695 .fini = sfe4001_fini,
696 .set_id_led = tenxpress_set_id_led,
697 .monitor = sfe4001_check_hw,
700 .id = FALCON_BOARD_SFE4002,
701 .ref_model = "SFE4002",
702 .gen_type = "XFP adapter",
703 .init = sfe4002_init,
704 .init_phy = sfe4002_init_phy,
705 .fini = efx_fini_lm87,
706 .set_id_led = sfe4002_set_id_led,
707 .monitor = sfe4002_check_hw,
710 .id = FALCON_BOARD_SFN4111T,
711 .ref_model = "SFN4111T",
712 .gen_type = "100/1000/10GBASE-T adapter",
713 .init = sfn4111t_init,
714 .init_phy = sfn4111t_init_phy,
715 .fini = sfn4111t_fini,
716 .set_id_led = tenxpress_set_id_led,
717 .monitor = sfn4111t_check_hw,
720 .id = FALCON_BOARD_SFN4112F,
721 .ref_model = "SFN4112F",
722 .gen_type = "SFP+ adapter",
723 .init = sfn4112f_init,
724 .init_phy = sfn4112f_init_phy,
725 .fini = efx_fini_lm87,
726 .set_id_led = sfn4112f_set_id_led,
727 .monitor = sfn4112f_check_hw,
731 int falcon_probe_board(struct efx_nic *efx, u16 revision_info)
733 struct falcon_board *board = falcon_board(efx);
734 u8 type_id = FALCON_BOARD_TYPE(revision_info);
735 int i;
737 board->major = FALCON_BOARD_MAJOR(revision_info);
738 board->minor = FALCON_BOARD_MINOR(revision_info);
740 for (i = 0; i < ARRAY_SIZE(board_types); i++)
741 if (board_types[i].id == type_id)
742 board->type = &board_types[i];
744 if (board->type) {
745 EFX_INFO(efx, "board is %s rev %c%d\n",
746 (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
747 ? board->type->ref_model : board->type->gen_type,
748 'A' + board->major, board->minor);
749 return 0;
750 } else {
751 EFX_ERR(efx, "unknown board type %d\n", type_id);
752 return -ENODEV;