drivers/staging/agnx/table.c

   1 #include <linux/pci.h>
   2 #include <linux/delay.h>
   3 #include "agnx.h"
   4 #include "debug.h"
   5 #include "phy.h"
   6
   7 static const u32
   8 tx_fir_table[] = { 0x19, 0x5d, 0xce, 0x151, 0x1c3, 0x1ff, 0x1ea, 0x17c, 0xcf,
   9                    0x19, 0x38e, 0x350, 0x362, 0x3ad, 0x5, 0x44, 0x59, 0x49,
  10                    0x21, 0x3f7, 0x3e0, 0x3e3, 0x3f3, 0x0 };
  11
  12 void tx_fir_table_init(struct agnx_priv *priv)
  13 {
  14         void __iomem *ctl = priv->ctl;
  15         int i;
  16
  17         for (i = 0; i < ARRAY_SIZE(tx_fir_table); i++)
  18                 iowrite32(tx_fir_table[i], ctl + AGNX_FIR_BASE + i*4);
  19 } /* fir_table_setup */
  20
  21
  22 static const u32
  23 gain_table[] = { 0x8, 0x8, 0xf, 0x13, 0x17, 0x1b, 0x1f, 0x23, 0x27, 0x2b,
  24                  0x2f, 0x33, 0x37, 0x3b, 0x3f, 0x43, 0x47, 0x4b, 0x4f,
  25                  0x53, 0x57, 0x5b, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f,
  26                  0x5f, 0x5f, 0x5f, 0x5f };
  27
  28 void gain_table_init(struct agnx_priv *priv)
  29 {
  30         void __iomem *ctl = priv->ctl;
  31         int i;
  32
  33         for (i = 0; i < ARRAY_SIZE(gain_table); i++) {
  34                 iowrite32(gain_table[i], ctl + AGNX_GAIN_TABLE + i*4);
  35                 iowrite32(gain_table[i], ctl + AGNX_GAIN_TABLE + i*4 + 0x80);
  36         }
  37 } /* gain_table_init */
  38
  39 void monitor_gain_table_init(struct agnx_priv *priv)
  40 {
  41         void __iomem *ctl = priv->ctl;
  42         unsigned int i;
  43
  44         for (i = 0; i < 0x44; i += 4) {
  45                 iowrite32(0x61, ctl + AGNX_MONGCR_BASE + i);
  46                 iowrite32(0x61, ctl + AGNX_MONGCR_BASE + 0x200 + i);
  47         }
  48         for (i = 0x44; i < 0x64; i += 4) {
  49                 iowrite32(0x6e, ctl + AGNX_MONGCR_BASE + i);
  50                 iowrite32(0x6e, ctl + AGNX_MONGCR_BASE + 0x200 + i);
  51         }
  52         for (i = 0x64; i < 0x94; i += 4) {
  53                 iowrite32(0x7a, ctl + AGNX_MONGCR_BASE + i);
  54                 iowrite32(0x7a, ctl + AGNX_MONGCR_BASE + 0x200 + i);
  55         }
  56         for (i = 0x94; i < 0xdc; i += 4) {
  57                 iowrite32(0x87, ctl + AGNX_MONGCR_BASE + i);
  58                 iowrite32(0x87, ctl + AGNX_MONGCR_BASE + 0x200 + i);
  59         }
  60         for (i = 0xdc; i < 0x148; i += 4) {
  61                 iowrite32(0x95, ctl + AGNX_MONGCR_BASE + i);
  62                 iowrite32(0x95, ctl + AGNX_MONGCR_BASE + 0x200 + i);
  63         }
  64         for (i = 0x148; i < 0x1e8; i += 4) {
  65                 iowrite32(0xa2, ctl + AGNX_MONGCR_BASE + i);
  66                 iowrite32(0xa2, ctl + AGNX_MONGCR_BASE + 0x200 + i);
  67         }
  68         for (i = 0x1e8; i <= 0x1fc; i += 4) {
  69                 iowrite32(0xb0, ctl + AGNX_MONGCR_BASE + i);
  70                 iowrite32(0xb0, ctl + AGNX_MONGCR_BASE + 0x200 + i);
  71         }
  72 } /* monitor_gain_table_init */
  73
  74
  75 void routing_table_init(struct agnx_priv *priv)
  76 {
  77         void __iomem *ctl = priv->ctl;
  78         unsigned int type, subtype;
  79         u32 reg;
  80
  81         disable_receiver(priv);
  82
  83         for ( type = 0; type < 0x3; type++ ) {
  84                 for (subtype = 0; subtype < 0x10; subtype++) {
  85                         /* 1. Set Routing table to R/W and to Return status on Read */
  86                         reg = (type << ROUTAB_TYPE_SHIFT) |
  87                                 (subtype << ROUTAB_SUBTYPE_SHIFT);
  88                         reg |= (1 << ROUTAB_RW_SHIFT) | (1 << ROUTAB_STATUS_SHIFT);
  89                         if (type == ROUTAB_TYPE_DATA) {
  90                                 /* NULL goes to RFP */
  91                                 if (subtype == ROUTAB_SUBTYPE_NULL)
  92 //                                      reg |= ROUTAB_ROUTE_RFP;
  93                                         reg |= ROUTAB_ROUTE_CPU;
  94                                 /* QOS NULL goes to CPU */
  95                                 else if (subtype == ROUTAB_SUBTYPE_QOSNULL)
  96                                         reg |= ROUTAB_ROUTE_CPU;
  97                                 /* All Data and QOS data subtypes go to Encryption */
  98                                 else if ((subtype == ROUTAB_SUBTYPE_DATA) ||
  99                                          (subtype == ROUTAB_SUBTYPE_DATAACK) ||
 100                                          (subtype == ROUTAB_SUBTYPE_DATAPOLL) ||
 101                                          (subtype == ROUTAB_SUBTYPE_DATAPOLLACK) ||
 102                                          (subtype == ROUTAB_SUBTYPE_QOSDATA) ||
 103                                          (subtype == ROUTAB_SUBTYPE_QOSDATAACK) ||
 104                                          (subtype == ROUTAB_SUBTYPE_QOSDATAPOLL) ||
 105                                          (subtype == ROUTAB_SUBTYPE_QOSDATAACKPOLL))
 106                                         reg |= ROUTAB_ROUTE_ENCRY;
 107 //                                      reg |= ROUTAB_ROUTE_CPU;
 108                                 /*Drop NULL and QOS NULL ack, poll and poll ack*/
 109                                 else if ((subtype == ROUTAB_SUBTYPE_NULLACK) ||
 110                                          (subtype == ROUTAB_SUBTYPE_QOSNULLACK) ||
 111                                          (subtype == ROUTAB_SUBTYPE_NULLPOLL) ||
 112                                          (subtype == ROUTAB_SUBTYPE_QOSNULLPOLL) ||
 113                                          (subtype == ROUTAB_SUBTYPE_NULLPOLLACK) ||
 114                                          (subtype == ROUTAB_SUBTYPE_QOSNULLPOLLACK))
 115 //                                      reg |= ROUTAB_ROUTE_DROP;
 116                                         reg |= ROUTAB_ROUTE_CPU;
 117                         }
 118                         else
 119                                 reg |= (ROUTAB_ROUTE_CPU);
 120                         iowrite32(reg, ctl + AGNX_RXM_ROUTAB);
 121                         /* Check to verify that the status bit cleared */
 122                         routing_table_delay();
 123                 }
 124         }
 125         enable_receiver(priv);
 126 } /* routing_table_init */
 127
 128 void tx_engine_lookup_tbl_init(struct agnx_priv *priv)
 129 {
 130         void __iomem *data = priv->data;
 131         unsigned int i;
 132
 133         for (i = 0; i <= 28; i += 4)
 134                 iowrite32(0xb00c, data + AGNX_ENGINE_LOOKUP_TBL + i);
 135         for (i = 32; i <= 120; i += 8) {
 136                 iowrite32(0x1e58, data + AGNX_ENGINE_LOOKUP_TBL + i);
 137                 iowrite32(0xb00c, data + AGNX_ENGINE_LOOKUP_TBL + i + 4);
 138         }
 139
 140         for (i = 128; i <= 156; i += 4)
 141                 iowrite32(0x980c, data + AGNX_ENGINE_LOOKUP_TBL + i);
 142         for (i = 160; i <= 248; i += 8) {
 143                 iowrite32(0x1858, data + AGNX_ENGINE_LOOKUP_TBL + i);
 144                 iowrite32(0x980c, data + AGNX_ENGINE_LOOKUP_TBL + i + 4);
 145         }
 146
 147         for (i = 256; i <= 284; i += 4)
 148                 iowrite32(0x980c, data + AGNX_ENGINE_LOOKUP_TBL + i);
 149         for (i = 288; i <= 376; i += 8) {
 150                 iowrite32(0x1a58, data + AGNX_ENGINE_LOOKUP_TBL + i);
 151                 iowrite32(0x1858, data + AGNX_ENGINE_LOOKUP_TBL + i + 4);
 152         }
 153
 154         for (i = 512; i <= 540; i += 4)
 155                 iowrite32(0xc00c, data + AGNX_ENGINE_LOOKUP_TBL + i);
 156         for (i = 544; i <= 632; i += 8) {
 157                 iowrite32(0x2058, data + AGNX_ENGINE_LOOKUP_TBL + i);
 158                 iowrite32(0xc00c, data + AGNX_ENGINE_LOOKUP_TBL + i + 4);
 159         }
 160
 161         for (i = 640; i <= 668; i += 4)
 162                 iowrite32(0xc80c, data + AGNX_ENGINE_LOOKUP_TBL + i);
 163         for (i = 672; i <= 764; i += 8) {
 164                 iowrite32(0x2258, data + AGNX_ENGINE_LOOKUP_TBL + i);
 165                 iowrite32(0xc80c, data + AGNX_ENGINE_LOOKUP_TBL + i + 4);
 166         }
 167 }
 168