Fix bug in recent byte-code checking hoist
[emacs.git] / lisp / progmodes / vhdl-mode.el
blob9cd84cf713b847e86a199f907e3f62aa953786da
1 ;;; vhdl-mode.el --- major mode for editing VHDL code
3 ;; Copyright (C) 1992-2020 Free Software Foundation, Inc.
5 ;; Authors: Reto Zimmermann <reto@gnu.org>
6 ;; Rodney J. Whitby <software.vhdl-mode@rwhitby.net>
7 ;; Maintainer: Reto Zimmermann <reto@gnu.org>
8 ;; Keywords: languages vhdl
9 ;; WWW: http://www.iis.ee.ethz.ch/~zimmi/emacs/vhdl-mode.html
11 ;; Yoni Rabkin <yoni@rabkins.net> contacted the maintainer of this
12 ;; file on 18/3/2008, and the maintainer agreed that when a bug is
13 ;; filed in the Emacs bug reporting system against this file, a copy
14 ;; of the bug report be sent to the maintainer's email address.
16 (defconst vhdl-version "3.38.1"
17 "VHDL Mode version number.")
19 (defconst vhdl-time-stamp "2015-03-12"
20 "VHDL Mode time stamp for last update.")
22 ;; This file is part of GNU Emacs.
24 ;; GNU Emacs is free software: you can redistribute it and/or modify
25 ;; it under the terms of the GNU General Public License as published by
26 ;; the Free Software Foundation, either version 3 of the License, or
27 ;; (at your option) any later version.
29 ;; GNU Emacs is distributed in the hope that it will be useful,
30 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
31 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 ;; GNU General Public License for more details.
34 ;; You should have received a copy of the GNU General Public License
35 ;; along with GNU Emacs. If not, see <https://www.gnu.org/licenses/>.
37 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
38 ;;; Commentary:
39 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
41 ;; This package provides an Emacs major mode for editing VHDL code.
42 ;; It includes the following features:
44 ;; - Syntax highlighting
45 ;; - Indentation
46 ;; - Template insertion (electrification)
47 ;; - Insertion of file headers
48 ;; - Insertion of user-specified models
49 ;; - Port translation / testbench generation
50 ;; - Structural composition
51 ;; - Configuration generation
52 ;; - Sensitivity list updating
53 ;; - File browser
54 ;; - Design hierarchy browser
55 ;; - Source file compilation (syntax analysis)
56 ;; - Makefile generation
57 ;; - Code hiding
58 ;; - Word/keyword completion
59 ;; - Block commenting
60 ;; - Code fixing/alignment/beautification
61 ;; - PostScript printing
62 ;; - VHDL'87/'93/'02/'08 and VHDL-AMS supported
63 ;; - Comprehensive menu
64 ;; - Fully customizable
65 ;; - Works under GNU Emacs (recommended) and XEmacs
67 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
68 ;; Documentation
70 ;; See comment string of function `vhdl-mode' or type `C-c C-h' in Emacs.
72 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
73 ;; Emacs Versions
75 ;; this updated version was only tested on: GNU Emacs 24.1
77 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
78 ;; Installation
80 ;; Prerequisites: GNU Emacs 20/21/22/23/24, XEmacs 20/21.
82 ;; Put `vhdl-mode.el' into the `site-lisp' directory of your Emacs installation
83 ;; or into an arbitrary directory that is added to the load path by the
84 ;; following line in your Emacs start-up file `.emacs':
86 ;; (push (expand-file-name "<directory-name>") load-path)
88 ;; If you already have the compiled `vhdl-mode.elc' file, put it in the same
89 ;; directory. Otherwise, byte-compile the source file:
90 ;; Emacs: M-x byte-compile-file RET vhdl-mode.el RET
91 ;; Unix: emacs -batch -q -no-site-file -f batch-byte-compile vhdl-mode.el
93 ;; Add the following lines to the `site-start.el' file in the `site-lisp'
94 ;; directory of your Emacs installation or to your Emacs start-up file `.emacs'
95 ;; (not required in Emacs 20 and higher):
97 ;; (autoload 'vhdl-mode "vhdl-mode" "VHDL Mode" t)
98 ;; (push '("\\.vhdl?\\'" . vhdl-mode) auto-mode-alist)
100 ;; More detailed installation instructions are included in the official
101 ;; VHDL Mode distribution.
103 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
104 ;; Acknowledgments
106 ;; Electrification ideas by Bob Pack <rlpst@cislabs.pitt.edu>
107 ;; and Steve Grout.
109 ;; Fontification approach suggested by Ken Wood <ken@eda.com.au>.
110 ;; Ideas about alignment from John Wiegley <johnw@gnu.org>.
112 ;; Many thanks to all the users who sent me bug reports and enhancement
113 ;; requests.
114 ;; Thanks to Colin Marquardt for his serious beta testing, his innumerable
115 ;; enhancement suggestions and the fruitful discussions.
116 ;; Thanks to Dan Nicolaescu for reviewing the code and for his valuable hints.
117 ;; Thanks to Ulf Klaperski for the indentation speedup hint.
119 ;; Special thanks go to Wolfgang Fichtner and the crew from the Integrated
120 ;; Systems Laboratory, Swiss Federal Institute of Technology Zurich, for
121 ;; giving me the opportunity to develop this code.
122 ;; This work has been funded in part by MICROSWISS, a Microelectronics Program
123 ;; of the Swiss Government.
125 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
127 ;;; Code:
129 (eval-when-compile
130 (condition-case nil (require 'cl-lib) (file-missing (require 'cl)))
131 (defalias 'vhdl--pushnew (if (fboundp 'cl-pushnew) 'cl-pushnew 'pushnew)))
133 ;; Before Emacs-24.4, `pushnew' expands to runtime calls to `cl-adjoin'
134 ;; even for relatively simple cases such as used here. We only test <25
135 ;; because it's easier and sufficient.
136 (when (< emacs-major-version 25)
137 (condition-case nil (require 'cl-lib) (file-missing (require 'cl))))
139 ;; Emacs 21+ handling
140 (defconst vhdl-emacs-21 (and (<= 21 emacs-major-version) (not (featurep 'xemacs)))
141 "Non-nil if GNU Emacs 21, 22, ... is used.")
142 ;; Emacs 22+ handling
143 (defconst vhdl-emacs-22 (and (<= 22 emacs-major-version) (not (featurep 'xemacs)))
144 "Non-nil if GNU Emacs 22, ... is used.")
146 (defvar compilation-file-regexp-alist)
147 (defvar conf-alist)
148 (defvar conf-entry)
149 (defvar conf-key)
150 (defvar ent-alist)
151 (defvar itimer-version)
152 (defvar lazy-lock-defer-contextually)
153 (defvar lazy-lock-defer-on-scrolling)
154 (defvar lazy-lock-defer-on-the-fly)
155 (defvar speedbar-attached-frame)
158 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
159 ;;; Variables
160 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
162 ;; help function for user options
163 (defun vhdl-custom-set (variable value &rest functions)
164 "Set variables as in `custom-set-default' and call FUNCTIONS afterwards."
165 (if (fboundp 'custom-set-default)
166 (custom-set-default variable value)
167 (set-default variable value))
168 (while functions
169 (when (fboundp (car functions)) (funcall (car functions)))
170 (setq functions (cdr functions))))
172 (defun vhdl-widget-directory-validate (widget)
173 "Check that the value of WIDGET is a valid directory entry (i.e. ends with
174 '/' or is empty)."
175 (let ((val (widget-value widget)))
176 (unless (string-match "^\\(\\|.*/\\)$" val)
177 (widget-put widget :error "Invalid directory entry: must end with `/'")
178 widget)))
180 ;; help string for user options
181 (defconst vhdl-name-doc-string "
183 FROM REGEXP is a regular expression matching the original name:
184 \".*\" matches the entire string
185 \"\\(...\\)\" matches a substring
186 TO STRING specifies the string to be inserted as new name:
187 \"\\&\" means substitute entire matched text
188 \"\\N\" means substitute what matched the Nth \"\\(...\\)\"
189 Examples:
190 \".*\" \"\\&\" inserts original string
191 \".*\" \"\\&_i\" attaches \"_i\" to original string
192 \"\\(.*\\)_[io]$\" \"\\1\" strips off \"_i\" or \"_o\" from original string
193 \".*\" \"foo\" inserts constant string \"foo\"
194 \".*\" \"\" inserts empty string")
196 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
197 ;; User variables (customization options)
199 (defgroup vhdl nil
200 "Customizations for VHDL Mode."
201 :prefix "vhdl-"
202 :group 'languages
203 ; :version "21.2" ; comment out for XEmacs
206 (defgroup vhdl-mode nil
207 "Customizations for modes."
208 :group 'vhdl)
210 (defcustom vhdl-indent-tabs-mode nil
211 "Non-nil means indentation can insert tabs.
212 Overrides local variable `indent-tabs-mode'."
213 :type 'boolean
214 :group 'vhdl-mode)
217 (defgroup vhdl-compile nil
218 "Customizations for compilation."
219 :group 'vhdl)
221 (defcustom vhdl-compiler-alist
223 ;; 60: docal <= false;
224 ;; ^^^^^
225 ;; [Error] Assignment error: variable is illegal target of signal assignment
226 ("ADVance MS" "vacom" "-work \\1" "make" "-f \\1"
227 nil "valib \\1; vamap \\2 \\1" "./" "work/" "Makefile" "adms"
228 ("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil) ("^Compiling file \\(.+\\)" 1)
229 ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
230 "PACK/\\1.vif" "BODY/\\1.vif" upcase))
231 ;; Aldec
232 ;; COMP96 ERROR COMP96_0018: "Identifier expected." "test.vhd" 66 3
233 ("Aldec" "vcom" "-work \\1" "make" "-f \\1"
234 nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "aldec"
235 ("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3) ("" 0)
236 nil)
237 ;; Cadence Leapfrog: cv -file test.vhd
238 ;; duluth: *E,430 (test.vhd,13): identifier (POSITIV) is not declared
239 ("Cadence Leapfrog" "cv" "-work \\1 -file" "make" "-f \\1"
240 nil "mkdir \\1" "./" "work/" "Makefile" "leapfrog"
241 ("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil) ("" 0)
242 ("\\1/entity" "\\2/\\1" "\\1/configuration"
243 "\\1/package" "\\1/body" downcase))
244 ;; Cadence Affirma NC vhdl: ncvhdl test.vhd
245 ;; ncvhdl_p: *E,IDENTU (test.vhd,13|25): identifier
246 ;; (PLL_400X_TOP) is not declared [10.3].
247 ("Cadence NC" "ncvhdl" "-work \\1" "make" "-f \\1"
248 nil "mkdir \\1" "./" "work/" "Makefile" "ncvhdl"
249 ("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
250 ("\\1/entity/pc.db" "\\2/\\1/pc.db" "\\1/configuration/pc.db"
251 "\\1/package/pc.db" "\\1/body/pc.db" downcase))
252 ;; ghdl vhdl
253 ;; ghdl -a bad_counter.vhdl
254 ;; bad_counter.vhdl:13:14: operator "=" is overloaded
255 ("GHDL" "ghdl" "-i --workdir=\\1 --ieee=synopsys -fexplicit " "make" "-f \\1"
256 nil "mkdir \\1" "./" "work/" "Makefile" "ghdl"
257 ("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
258 ("\\1/entity" "\\2/\\1" "\\1/configuration"
259 "\\1/package" "\\1/body" downcase))
260 ;; IBM Compiler
261 ;; 00 COACHDL* | [CCHDL-1]: File: adder.vhd, line.column: 120.6
262 ("IBM Compiler" "g2tvc" "-src" "precomp" "\\1"
263 nil "mkdir \\1" "./" "work/" "Makefile" "ibm"
264 ("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3) (" " 0)
265 nil)
266 ;; Ikos Voyager: analyze test.vhd
267 ;; analyze test.vhd
268 ;; E L4/C5: this library unit is inaccessible
269 ("Ikos" "analyze" "-l \\1" "make" "-f \\1"
270 nil "mkdir \\1" "./" "work/" "Makefile" "ikos"
271 ("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2)
272 ("^analyze +\\(.+ +\\)*\\(.+\\)$" 2)
273 nil)
274 ;; ModelSim, Model Technology: vcom test.vhd
275 ;; ERROR: test.vhd(14): Unknown identifier: positiv
276 ;; WARNING[2]: test.vhd(85): Possible infinite loop
277 ;; ** Warning: [4] ../src/emacsvsim.vhd(43): An abstract ...
278 ;; ** Error: adder.vhd(190): Unknown identifier: ctl_numb
279 ;; ** Error: counter_rtl.vhd(18): Nonresolved signal 'hallo' has multiple sources.
280 ;; Drivers:
281 ;; counter_rtl.vhd(27):Conditional signal assignment line__27
282 ;; counter_rtl.vhd(29):Conditional signal assignment line__29
283 ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1"
284 nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim"
285 ("\\(ERROR:\\|WARNING\\[[0-9]+\\]:\\|\\*\\* Error:\\|\\*\\* Warning: \\[[0-9]+\\]\\| +\\) \\([^ ]+\\)(\\([0-9]+\\)):" 2 3 nil)
286 ("" 0)
287 ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
288 "\\1/_primary.dat" "\\1/body.dat" downcase))
289 ;; ProVHDL, Synopsys LEDA: provhdl -w work -f test.vhd
290 ;; test.vhd:34: error message
291 ("LEDA ProVHDL" "provhdl" "-w \\1 -f" "make" "-f \\1"
292 nil "mkdir \\1" "./" "work/" "Makefile" "provhdl"
293 ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
294 ("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
295 "PACK/\\1.vif" "BODY/BODY-\\1.vif" upcase))
296 ;; Quartus compiler
297 ;; Error: VHDL error at dvi2sdi.vhd(473): object k2_alto_out_lvl is used
298 ;; Error: Verilog HDL syntax error at otsuif_v1_top.vhd(147) near text
299 ;; Error: VHDL syntax error at otsuif_v1_top.vhd(147): clk_ is an illegal
300 ;; Error: VHDL Use Clause error at otsuif_v1_top.vhd(455): design library
301 ;; Warning: VHDL Process Statement warning at dvi2sdi_tst.vhd(172): ...
302 ("Quartus" "make" "-work \\1" "make" "-f \\1"
303 nil "mkdir \\1" "./" "work/" "Makefile" "quartus"
304 ("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil) ("" 0)
305 nil)
306 ;; QuickHDL, Mentor Graphics: qvhcom test.vhd
307 ;; ERROR: test.vhd(24): near "dnd": expecting: END
308 ;; WARNING[4]: test.vhd(30): A space is required between ...
309 ("QuickHDL" "qvhcom" "-work \\1" "make" "-f \\1"
310 nil "mkdir \\1" "./" "work/" "Makefile" "quickhdl"
311 ("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil) ("" 0)
312 ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
313 "\\1/_primary.dat" "\\1/body.dat" downcase))
314 ;; Savant: scram -publish-cc test.vhd
315 ;; test.vhd:87: _set_passed_through_out_port(IIR_Boolean) not defined for
316 ("Savant" "scram" "-publish-cc -design-library-name \\1" "make" "-f \\1"
317 nil "mkdir \\1" "./" "work._savant_lib/" "Makefile" "savant"
318 ("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
319 ("\\1_entity.vhdl" "\\2_secondary_units._savant_lib/\\2_\\1.vhdl"
320 "\\1_config.vhdl" "\\1_package.vhdl"
321 "\\1_secondary_units._savant_lib/\\1_package_body.vhdl" downcase))
322 ;; Simili: vhdlp -work test.vhd
323 ;; Error: CSVHDL0002: test.vhd: (line 97): Invalid prefix
324 ("Simili" "vhdlp" "-work \\1" "make" "-f \\1"
325 nil "mkdir \\1" "./" "work/" "Makefile" "simili"
326 ("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil) ("" 0)
327 ("\\1/prim.var" "\\2/_\\1.var" "\\1/prim.var"
328 "\\1/prim.var" "\\1/_body.var" downcase))
329 ;; Speedwave (Innoveda): analyze -libfile vsslib.ini -src test.vhd
330 ;; ERROR[11]::File test.vhd Line 100: Use of undeclared identifier
331 ("Speedwave" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
332 nil "mkdir \\1" "./" "work/" "Makefile" "speedwave"
333 ("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil) ("" 0)
334 nil)
335 ;; Synopsys, VHDL Analyzer (sim): vhdlan -nc test.vhd
336 ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
337 ("Synopsys" "vhdlan" "-nc -work \\1" "make" "-f \\1"
338 nil "mkdir \\1" "./" "work/" "Makefile" "synopsys"
339 ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
340 ("\\1.sim" "\\2__\\1.sim" "\\1.sim" "\\1.sim" "\\1__.sim" upcase))
341 ;; Synopsys, VHDL Analyzer (syn): vhdlan -nc -spc test.vhd
342 ;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
343 ("Synopsys Design Compiler" "vhdlan" "-nc -spc -work \\1" "make" "-f \\1"
344 nil "mkdir \\1" "./" "work/" "Makefile" "synopsys_dc"
345 ("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
346 ("\\1.syn" "\\2__\\1.syn" "\\1.syn" "\\1.syn" "\\1__.syn" upcase))
347 ;; Synplify:
348 ;; @W:"test.vhd":57:8:57:9|Optimizing register bit count_x(5) to a constant 0
349 ("Synplify" "n/a" "n/a" "make" "-f \\1"
350 nil "mkdir \\1" "./" "work/" "Makefile" "synplify"
351 ("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3) ("" 0)
352 nil)
353 ;; Vantage: analyze -libfile vsslib.ini -src test.vhd
354 ;; Compiling "test.vhd" line 1...
355 ;; **Error: LINE 49 *** No aggregate value is valid in this context.
356 ("Vantage" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
357 nil "mkdir \\1" "./" "work/" "Makefile" "vantage"
358 ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
359 ("^ *Compiling \"\\(.+\\)\" " 1)
360 nil)
361 ;; VeriBest: vc vhdl test.vhd
362 ;; (no file name printed out!)
363 ;; 32: Z <= A and BitA ;
364 ;; ^^^^
365 ;; [Error] Name BITA is unknown
366 ("VeriBest" "vc" "vhdl" "make" "-f \\1"
367 nil "mkdir \\1" "./" "work/" "Makefile" "veribest"
368 ("^ +\\([0-9]+\\): +[^ ]" nil 1 nil) ("" 0)
369 nil)
370 ;; Viewlogic: analyze -libfile vsslib.ini -src test.vhd
371 ;; Compiling "test.vhd" line 1...
372 ;; **Error: LINE 49 *** No aggregate value is valid in this context.
373 ("Viewlogic" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
374 nil "mkdir \\1" "./" "work/" "Makefile" "viewlogic"
375 ("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
376 ("^ *Compiling \"\\(.+\\)\" " 1)
377 nil)
378 ;; Xilinx XST:
379 ;; ERROR:HDLParsers:164 - "test.vhd" Line 3. parse error
380 ("Xilinx XST" "xflow" "" "make" "-f \\1"
381 nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
382 ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
383 nil)
385 "List of available VHDL compilers and their properties.
386 Each list entry specifies the following items for a compiler:
387 Compiler:
388 Compiler name : name used in option `vhdl-compiler' to choose compiler
389 Compile command : command used for source file compilation
390 Compile options : compile options (\"\\1\" inserts library name)
391 Make command : command used for compilation using a Makefile
392 Make options : make options (\"\\1\" inserts Makefile name)
393 Generate Makefile: use built-in function or command to generate a Makefile
394 (\"\\1\" inserts Makefile name, \"\\2\" inserts library name)
395 Library command : command to create library directory (\"\\1\" inserts
396 library directory, \"\\2\" inserts library name)
397 Compile directory: where compilation is run and the Makefile is placed
398 Library directory: directory of default library
399 Makefile name : name of Makefile (default is \"Makefile\")
400 ID string : compiler identification string (see `vhdl-project-alist')
401 Error message:
402 Regexp : regular expression to match error messages (*)
403 File subexp index: index of subexpression that matches the file name
404 Line subexp index: index of subexpression that matches the line number
405 Column subexp idx: index of subexpression that matches the column number
406 File message:
407 Regexp : regular expression to match a file name message
408 File subexp index: index of subexpression that matches the file name
409 Unit-to-file name mapping: mapping of library unit names to names of files
410 generated by the compiler (used for Makefile generation)
411 To string : string a name is mapped to (\"\\1\" inserts the unit name,
412 \"\\2\" inserts the entity name for architectures,
413 \"\\3\" inserts the library name)
414 Case adjustment : adjust case of inserted unit names
416 \(*) The regular expression must match the error message starting from the
417 beginning of the line (but not necessarily to the end of the line).
419 Compile options allows insertion of the library name (see `vhdl-project-alist')
420 in order to set the compilers library option (e.g. \"vcom -work my_lib\").
422 For Makefile generation, the built-in function can be used (requires
423 specification of the unit-to-file name mapping). Alternatively, an
424 external command can be specified. Work directory allows specification of
425 an alternative \"work\" library path (e.g. \"WORK/\" instead of \"work/\",
426 used for Makefile generation). To use another library name than \"work\",
427 customize `vhdl-project-alist'. The library command is inserted in Makefiles
428 to automatically create the library directory if not existent.
430 Compile options, compile directory, library directory, and Makefile name are
431 overwritten by the project settings if a project is defined (see
432 `vhdl-project-alist'). Directory paths are relative to the source file
433 directory.
435 Some compilers do not include the file name in the error message, but print
436 out a file name message in advance. In this case, set \"File Subexp Index\"
437 under \"Error Message\" to 0 and fill out the \"File Message\" entries.
438 If no file name at all is printed out, set both \"File Message\" entries to 0
439 \(a default file name message will be printed out instead, does not work in
440 XEmacs).
442 A compiler is selected for syntax analysis (`\\[vhdl-compile]') by
443 assigning its name to option `vhdl-compiler'.
445 Please send any missing or erroneous compiler properties to the maintainer for
446 updating.
448 NOTE: Activate new error and file message regexps and reflect the new setting
449 in the choice list of option `vhdl-compiler' by restarting Emacs."
450 :type '(repeat
451 (list :tag "Compiler" :indent 2
452 (string :tag "Compiler name ")
453 (string :tag "Compile command ")
454 (string :tag "Compile options " "-work \\1")
455 (string :tag "Make command " "make")
456 (string :tag "Make options " "-f \\1")
457 (choice :tag "Generate Makefile "
458 (const :tag "Built-in function" nil)
459 (string :tag "Command" "vmake \\2 > \\1"))
460 (string :tag "Library command " "mkdir \\1")
461 (directory :tag "Compile directory "
462 :validate vhdl-widget-directory-validate "./")
463 (directory :tag "Library directory "
464 :validate vhdl-widget-directory-validate "work/")
465 (file :tag "Makefile name " "Makefile")
466 (string :tag "ID string ")
467 (list :tag "Error message" :indent 4
468 (regexp :tag "Regexp ")
469 (choice :tag "File subexp "
470 (integer :tag "Index")
471 (const :tag "No file name" nil))
472 (integer :tag "Line subexp index")
473 (choice :tag "Column subexp "
474 (integer :tag "Index")
475 (const :tag "No column number" nil)))
476 (list :tag "File message" :indent 4
477 (regexp :tag "Regexp ")
478 (integer :tag "File subexp index"))
479 (choice :tag "Unit-to-file name mapping"
480 :format "%t: %[Value Menu%] %v\n"
481 (const :tag "Not defined" nil)
482 (list :tag "To string" :indent 4
483 (string :tag "Entity " "\\1.vhd")
484 (string :tag "Architecture " "\\2_\\1.vhd")
485 (string :tag "Configuration " "\\1.vhd")
486 (string :tag "Package " "\\1.vhd")
487 (string :tag "Package Body " "\\1_body.vhd")
488 (choice :tag "Case adjustment "
489 (const :tag "None" identity)
490 (const :tag "Upcase" upcase)
491 (const :tag "Downcase" downcase))))))
492 :set (lambda (variable value)
493 (vhdl-custom-set variable value 'vhdl-update-mode-menu))
494 :version "24.4"
495 :group 'vhdl-compile)
497 (defcustom vhdl-compiler "GHDL"
498 "Specifies the VHDL compiler to be used for syntax analysis.
499 Select a compiler name from the ones defined in option `vhdl-compiler-alist'."
500 :type (let ((alist vhdl-compiler-alist) list)
501 (while alist
502 (push (list 'const (caar alist)) list)
503 (setq alist (cdr alist)))
504 (append '(choice) (nreverse list)))
505 :group 'vhdl-compile)
507 (defcustom vhdl-compile-use-local-error-regexp nil
508 "Non-nil means use buffer-local `compilation-error-regexp-alist'.
509 In this case, only error message regexps for VHDL compilers are active if
510 compilation is started from a VHDL buffer. Otherwise, the error message
511 regexps are appended to the predefined global regexps, and all regexps are
512 active all the time. Note that by doing that, the predefined global regexps
513 might result in erroneous parsing of error messages for some VHDL compilers.
515 NOTE: Activate the new setting by restarting Emacs."
516 :version "25.1" ; t -> nil
517 :type 'boolean
518 :group 'vhdl-compile)
520 (defcustom vhdl-makefile-default-targets '("all" "clean" "library")
521 "List of default target names in Makefiles.
522 Automatically generated Makefiles include three default targets to compile
523 the entire design, clean the entire design and to create the design library.
524 This option allows you to change the names of these targets to avoid conflicts
525 with other user Makefiles."
526 :type '(list (string :tag "Compile entire design")
527 (string :tag "Clean entire design ")
528 (string :tag "Create design library"))
529 :version "24.3"
530 :group 'vhdl-compile)
532 (defcustom vhdl-makefile-generation-hook nil
533 "Functions to run at the end of Makefile generation.
534 Allows you to insert user specific parts into a Makefile.
536 Example:
537 (lambda nil
538 (re-search-backward \"^# Rule for compiling entire design\")
539 (insert \"# My target\\n\\n.MY_TARGET :\\n\\n\\n\"))"
540 :type 'hook
541 :group 'vhdl-compile)
543 (defcustom vhdl-default-library "work"
544 "Name of default library.
545 Is overwritten by project settings if a project is active."
546 :type 'string
547 :group 'vhdl-compile)
550 (defgroup vhdl-project nil
551 "Customizations for projects."
552 :group 'vhdl)
554 (defcustom vhdl-project-alist
555 '(("Example 1" "Source files in two directories, custom library name, VHDL'87"
556 "~/example1/" ("src/system/" "src/components/") ""
557 (("ModelSim" "-87 \\2" "-f \\1 top_level" nil)
558 ("Synopsys" "-vhdl87 \\2" "-f \\1 top_level" ((".*/datapath/.*" . "-optimize \\3") (".*_tb\\.vhd" . nil))))
559 "lib/" "example3_lib" "lib/example3/" "Makefile_\\2" "")
560 ("Example 2" "Individual source files, multiple compilers in different directories"
561 "$EXAMPLE2/" ("vhdl/system.vhd" "vhdl/component_*.vhd") ""
562 nil "\\1/" "work" "\\1/work/" "Makefile" "")
563 ("Example 3" "Source files in a directory tree, multiple compilers in same directory"
564 "/home/me/example3/" ("-r ./*/vhdl/") "/CVS/"
565 nil "./" "work" "work-\\1/" "Makefile-\\1" "\
566 -------------------------------------------------------------------------------
567 -- This is a multi-line project description
568 -- that can be used as a project dependent part of the file header.
570 "List of projects and their properties.
571 Name : name used in option `vhdl-project' to choose project
572 Title : title of project (single-line string)
573 Default directory: default project directory (absolute path)
574 Sources : a) source files : path + \"/\" + file name
575 b) directory : path + \"/\"
576 c) directory tree: \"-r \" + path + \"/\"
577 Exclude regexp : matches file/directory names to be excluded as sources
578 Compile options : project-specific options for each compiler
579 Compiler name : name of compiler for which these options are valid
580 Compile options: project-specific compiler options
581 (\"\\1\" inserts library name, \"\\2\" default options)
582 Make options: project-specific make options
583 (\"\\1\" inserts Makefile name, \"\\2\" default options)
584 Exceptions : file-specific exceptions
585 File name regexp: matches file names for which exceptions are valid
586 - Options : file-specific compiler options string
587 (\"\\1\" inserts library name, \"\\2\" default options,
588 \"\\3\" project-specific options)
589 - Do not compile: do not compile this file (in Makefile)
590 Compile directory: where compilation is run and the Makefile is placed
591 (\"\\1\" inserts compiler ID string)
592 Library name : name of library (default is \"work\")
593 Library directory: path to library (\"\\1\" inserts compiler ID string)
594 Makefile name : name of Makefile
595 (\"\\1\" inserts compiler ID string, \"\\2\" library name)
596 Description : description of project (multi-line string)
598 Project title and description are used to insert into the file header (see
599 option `vhdl-file-header').
601 The default directory must have an absolute path (use `M-TAB' for completion).
602 All other paths can be absolute or relative to the default directory. All
603 paths must end with `/'.
605 The design units found in the sources (files and directories) are shown in the
606 hierarchy browser. Path and file name can contain wildcards `*' and `?' as
607 well as \"./\" and \"../\" (\"sh\" syntax). Paths can also be absolute.
608 Environment variables (e.g. \"$EXAMPLE2\") are resolved. If no sources are
609 specified, the default directory is taken as source directory. Otherwise,
610 the default directory is only taken as source directory if there is a sources
611 entry with the empty string or \"./\". Exclude regexp allows you to filter
612 out specific file and directory names from the list of sources (e.g. CVS
613 directories).
615 Files are compiled in the compile directory. Makefiles are also placed into
616 the compile directory. Library directory specifies which directory the
617 compiler compiles into (used to generate the Makefile).
619 Since different compile/library directories and Makefiles may exist for
620 different compilers within one project, these paths and names allow the
621 insertion of a compiler-dependent ID string (defined in `vhdl-compiler-alist').
622 Compile options, compile directory, library directory, and Makefile name
623 overwrite the settings of the current compiler.
625 File-specific compiler options (highest priority) overwrite project-specific
626 options which overwrite default options (lowest priority). Lower priority
627 options can be inserted in higher priority options. This allows you to reuse
628 default options (e.g. \"-file\") in project- or file-specific options (e.g.
629 \"-93 -file\").
631 NOTE: Reflect the new setting in the choice list of option `vhdl-project'
632 by restarting Emacs."
633 :type `(repeat
634 (list :tag "Project" :indent 2
635 (string :tag "Name ")
636 (string :tag "Title ")
637 (directory :tag "Default directory"
638 :validate vhdl-widget-directory-validate
639 ,(abbreviate-file-name default-directory))
640 (repeat :tag "Sources " :indent 4
641 (directory :format " %v" "./"))
642 (regexp :tag "Exclude regexp ")
643 (repeat
644 :tag "Compile options " :indent 4
645 (list :tag "Compiler" :indent 6
646 ,(let ((alist vhdl-compiler-alist) list)
647 (while alist
648 (push (list 'const (caar alist)) list)
649 (setq alist (cdr alist)))
650 (append '(choice :tag "Compiler name")
651 (nreverse list)))
652 (string :tag "Compile options" "\\2")
653 (string :tag "Make options " "\\2")
654 (repeat
655 :tag "Exceptions " :indent 8
656 (cons :format "%v"
657 (regexp :tag "File name regexp ")
658 (choice :format "%[Value Menu%] %v"
659 (string :tag "Options" "\\3")
660 (const :tag "Do not compile" nil))))))
661 (directory :tag "Compile directory"
662 :validate vhdl-widget-directory-validate "./")
663 (string :tag "Library name " "work")
664 (directory :tag "Library directory"
665 :validate vhdl-widget-directory-validate "work/")
666 (file :tag "Makefile name " "Makefile")
667 (string :tag "Description: (type `C-j' for newline)"
668 :format "%t\n%v\n")))
669 :set (lambda (variable value)
670 (vhdl-custom-set variable value
671 'vhdl-update-mode-menu
672 'vhdl-speedbar-refresh))
673 :group 'vhdl-project)
675 (defcustom vhdl-project nil
676 "Specifies the default for the current project.
677 Select a project name from the ones defined in option `vhdl-project-alist'.
678 Is used to determine the project title and description to be inserted in file
679 headers and the source files/directories to be scanned in the hierarchy
680 browser. The current project can also be changed temporarily in the menu."
681 :type (let ((alist vhdl-project-alist) list)
682 (while alist
683 (push (list 'const (caar alist)) list)
684 (setq alist (cdr alist)))
685 (append '(choice (const :tag "None" nil) (const :tag "--"))
686 (nreverse list)))
687 :group 'vhdl-project)
689 (defcustom vhdl-project-file-name '("\\1.prj")
690 "List of file names/paths for importing/exporting project setups.
691 \"\\1\" is replaced by the project name (SPC is replaced by `_'), \"\\2\" is
692 replaced by the user name (allows you to have user-specific project setups).
693 The first entry is used as file name to import/export individual project
694 setups. All entries are used to automatically import project setups at
695 startup (see option `vhdl-project-autoload'). Projects loaded from the
696 first entry are automatically made current. Hint: specify local project
697 setups in first entry, global setups in following entries; loading a local
698 project setup will make it current, while loading the global setups
699 is done without changing the current project.
700 Names can also have an absolute path (i.e. project setups can be stored
701 in global directories)."
702 :type '(repeat (string :tag "File name" "\\1.prj"))
703 :group 'vhdl-project)
706 (define-obsolete-variable-alias 'vhdl-project-auto-load
707 'vhdl-project-autoload "27.1")
709 (defcustom vhdl-project-autoload '(startup)
710 "Automatically load project setups from files.
711 All project setup files that match the file names specified in option
712 `vhdl-project-file-name' are automatically loaded. The project of the
713 \(alphabetically) last loaded setup of the first `vhdl-project-file-name'
714 entry is activated.
715 A project setup file can be obtained by exporting a project (see menu).
716 At startup: project setup file is loaded at Emacs startup"
717 :type '(set (const :tag "At startup" startup))
718 :group 'vhdl-project)
720 (defcustom vhdl-project-sort t
721 "Non-nil means projects are displayed in alphabetical order."
722 :type 'boolean
723 :group 'vhdl-project)
726 (defgroup vhdl-style nil
727 "Customizations for coding styles."
728 :group 'vhdl
729 :group 'vhdl-template
730 :group 'vhdl-port
731 :group 'vhdl-compose)
733 (defcustom vhdl-standard '(93 nil)
734 "VHDL standards used.
735 Basic standard:
736 VHDL'87 : IEEE Std 1076-1987
737 VHDL'93/02 : IEEE Std 1076-1993/2002
738 VHDL'08 : IEEE Std 1076-2008
739 Additional standards:
740 VHDL-AMS : IEEE Std 1076.1 (analog-mixed-signal)
741 Math packages: IEEE Std 1076.2 (`math_real', `math_complex')
743 NOTE: Activate the new setting in a VHDL buffer by using the menu entry
744 \"Activate Options\"."
745 :type '(list (choice :tag "Basic standard"
746 (const :tag "VHDL'87" 87)
747 (const :tag "VHDL'93/02" 93)
748 (const :tag "VHDL'08" 08))
749 (set :tag "Additional standards" :indent 2
750 (const :tag "VHDL-AMS" ams)
751 (const :tag "Math packages" math)))
752 :set (lambda (variable value)
753 (vhdl-custom-set variable value
754 'vhdl-template-map-init
755 'vhdl-mode-abbrev-table-init
756 'vhdl-template-construct-alist-init
757 'vhdl-template-package-alist-init
758 'vhdl-update-mode-menu
759 'vhdl-words-init 'vhdl-font-lock-init))
760 :group 'vhdl-style)
762 (defcustom vhdl-basic-offset 2
763 "Amount of basic offset used for indentation.
764 This value is used by + and - symbols in `vhdl-offsets-alist'."
765 :type 'integer
766 :group 'vhdl-style)
768 (defcustom vhdl-upper-case-keywords nil
769 "Non-nil means convert keywords to upper case.
770 This is done when typed or expanded or by the fix case functions."
771 :type 'boolean
772 :set (lambda (variable value)
773 (vhdl-custom-set variable value 'vhdl-abbrev-list-init))
774 :group 'vhdl-style)
776 (defcustom vhdl-upper-case-types nil
777 "Non-nil means convert standardized types to upper case.
778 This is done when expanded or by the fix case functions."
779 :type 'boolean
780 :set (lambda (variable value)
781 (vhdl-custom-set variable value 'vhdl-abbrev-list-init))
782 :group 'vhdl-style)
784 (defcustom vhdl-upper-case-attributes nil
785 "Non-nil means convert standardized attributes to upper case.
786 This is done when expanded or by the fix case functions."
787 :type 'boolean
788 :set (lambda (variable value)
789 (vhdl-custom-set variable value 'vhdl-abbrev-list-init))
790 :group 'vhdl-style)
792 (defcustom vhdl-upper-case-enum-values nil
793 "Non-nil means convert standardized enumeration values to upper case.
794 This is done when expanded or by the fix case functions."
795 :type 'boolean
796 :set (lambda (variable value)
797 (vhdl-custom-set variable value 'vhdl-abbrev-list-init))
798 :group 'vhdl-style)
800 (defcustom vhdl-upper-case-constants t
801 "Non-nil means convert standardized constants to upper case.
802 This is done when expanded."
803 :type 'boolean
804 :set (lambda (variable value)
805 (vhdl-custom-set variable value 'vhdl-abbrev-list-init))
806 :group 'vhdl-style)
808 (defcustom vhdl-use-direct-instantiation 'standard
809 "Non-nil means use VHDL'93 direct component instantiation.
810 Never : never
811 Standard: only in VHDL standards that allow it (VHDL'93 and higher)
812 Always : always"
813 :type '(choice (const :tag "Never" never)
814 (const :tag "Standard" standard)
815 (const :tag "Always" always))
816 :group 'vhdl-style)
818 (defcustom vhdl-array-index-record-field-in-sensitivity-list t
819 "Non-nil means include array indices / record fields in sensitivity list.
820 If a signal read in a process is a record field or pointed to by an array
821 index, the record field or array index is included with the record name in
822 the sensitivity list (e.g. \"in1(0)\", \"in2.f0\").
823 Otherwise, only the record name is included (e.g. \"in1\", \"in2\")."
824 :type 'boolean
825 :version "24.3"
826 :group 'vhdl-style)
828 (defgroup vhdl-naming nil
829 "Customizations for naming conventions."
830 :group 'vhdl)
832 (defcustom vhdl-entity-file-name '(".*" . "\\&")
833 (concat
834 "Specifies how the entity file name is obtained.
835 The entity file name can be obtained by modifying the entity name (e.g.
836 attaching or stripping off a substring). The file extension is automatically
837 taken from the file name of the current buffer."
838 vhdl-name-doc-string)
839 :type '(cons (regexp :tag "From regexp")
840 (string :tag "To string "))
841 :group 'vhdl-naming
842 :group 'vhdl-compose)
844 (defcustom vhdl-architecture-file-name '("\\(.*\\) \\(.*\\)" . "\\1_\\2")
845 (concat
846 "Specifies how the architecture file name is obtained.
847 The architecture file name can be obtained by modifying the entity
848 and/or architecture name (e.g. attaching or stripping off a substring). The
849 file extension is automatically taken from the file name of the current
850 buffer. The string that is matched against the regexp is the concatenation
851 of the entity and the architecture name separated by a space. This gives
852 access to both names (see default setting as example)."
853 vhdl-name-doc-string)
854 :type '(cons (regexp :tag "From regexp")
855 (string :tag "To string "))
856 :group 'vhdl-naming
857 :group 'vhdl-compose)
859 (defcustom vhdl-configuration-file-name '(".*" . "\\&")
860 (concat
861 "Specifies how the configuration file name is obtained.
862 The configuration file name can be obtained by modifying the configuration
863 name (e.g. attaching or stripping off a substring). The file extension is
864 automatically taken from the file name of the current buffer."
865 vhdl-name-doc-string)
866 :type '(cons (regexp :tag "From regexp")
867 (string :tag "To string "))
868 :group 'vhdl-naming
869 :group 'vhdl-compose)
871 (defcustom vhdl-package-file-name '(".*" . "\\&")
872 (concat
873 "Specifies how the package file name is obtained.
874 The package file name can be obtained by modifying the package name (e.g.
875 attaching or stripping off a substring). The file extension is automatically
876 taken from the file name of the current buffer. Package files can be created
877 in a different directory by prepending a relative or absolute path to the
878 file name."
879 vhdl-name-doc-string)
880 :type '(cons (regexp :tag "From regexp")
881 (string :tag "To string "))
882 :group 'vhdl-naming
883 :group 'vhdl-compose)
885 (defcustom vhdl-file-name-case 'identity
886 "Specifies how to change case for obtaining file names.
887 When deriving a file name from a VHDL unit name, case can be changed as
888 follows:
889 As Is: case is not changed (taken as is)
890 Lower Case: whole name is changed to lower case
891 Upper Case: whole name is changed to upper case
892 Capitalize: first letter of each word in name is capitalized"
893 :type '(choice (const :tag "As Is" identity)
894 (const :tag "Lower Case" downcase)
895 (const :tag "Upper Case" upcase)
896 (const :tag "Capitalize" capitalize))
897 :group 'vhdl-naming
898 :group 'vhdl-compose)
901 (defgroup vhdl-template nil
902 "Customizations for electrification."
903 :group 'vhdl)
905 (defcustom vhdl-electric-keywords '(vhdl user)
906 "Type of keywords for which electrification is enabled.
907 VHDL keywords: invoke built-in templates
908 User keywords: invoke user models (see option `vhdl-model-alist')"
909 :type '(set (const :tag "VHDL keywords" vhdl)
910 (const :tag "User model keywords" user))
911 :set (lambda (variable value)
912 (vhdl-custom-set variable value 'vhdl-mode-abbrev-table-init))
913 :group 'vhdl-template)
915 (defcustom vhdl-optional-labels 'process
916 "Constructs for which labels are to be queried.
917 Template generators prompt for optional labels for:
918 None : no constructs
919 Processes only: processes only (also procedurals in VHDL-AMS)
920 All constructs: all constructs with optional labels and keyword END"
921 :type '(choice (const :tag "None" none)
922 (const :tag "Processes only" process)
923 (const :tag "All constructs" all))
924 :group 'vhdl-template)
926 (defcustom vhdl-insert-empty-lines 'unit
927 "Specifies whether to insert empty lines in some templates.
928 This improves readability of code. Empty lines are inserted in:
929 None : no constructs
930 Design units only: entities, architectures, configurations, packages only
931 All constructs : also all constructs with BEGIN...END parts
933 Replaces option `vhdl-additional-empty-lines'."
934 :type '(choice (const :tag "None" none)
935 (const :tag "Design units only" unit)
936 (const :tag "All constructs" all))
937 :group 'vhdl-template
938 :group 'vhdl-port
939 :group 'vhdl-compose)
941 (defcustom vhdl-argument-list-indent nil
942 "Non-nil means indent argument lists relative to opening parenthesis.
943 That is, argument, association, and port lists start on the same line as the
944 opening parenthesis and subsequent lines are indented accordingly.
945 Otherwise, lists start on a new line and are indented as normal code."
946 :type 'boolean
947 :group 'vhdl-template
948 :group 'vhdl-port
949 :group 'vhdl-compose)
951 (defcustom vhdl-association-list-with-formals t
952 "Non-nil means write association lists with formal parameters.
953 Templates prompt for formal and actual parameters (ports/generics).
954 When pasting component instantiations, formals are included.
955 If nil, only a list of actual parameters is entered."
956 :type 'boolean
957 :group 'vhdl-template
958 :group 'vhdl-port
959 :group 'vhdl-compose)
961 (defcustom vhdl-conditions-in-parenthesis nil
962 "Non-nil means place parenthesis around condition expressions."
963 :type 'boolean
964 :group 'vhdl-template)
966 (defcustom vhdl-sensitivity-list-all t
967 "Non-nil means use `all' keyword in sensitivity list."
968 :version "25.1"
969 :type 'boolean
970 :group 'vhdl-template)
972 (defcustom vhdl-zero-string "'0'"
973 "String to use for a logic zero."
974 :type 'string
975 :group 'vhdl-template)
977 (defcustom vhdl-one-string "'1'"
978 "String to use for a logic one."
979 :type 'string
980 :group 'vhdl-template)
983 (defgroup vhdl-header nil
984 "Customizations for file header."
985 :group 'vhdl-template
986 :group 'vhdl-compose)
988 (defcustom vhdl-file-header "\
989 -------------------------------------------------------------------------------
990 -- Title : <title string>
991 -- Project : <project>
992 -------------------------------------------------------------------------------
993 -- File : <filename>
994 -- Author : <author>
995 -- Company : <company>
996 -- Created : <date>
997 -- Last update: <date>
998 -- Platform : <platform>
999 -- Standard : <standard>
1000 <projectdesc>-------------------------------------------------------------------------------
1001 -- Description: <cursor>
1002 <copyright>-------------------------------------------------------------------------------
1003 -- Revisions :
1004 -- Date Version Author Description
1005 -- <date> 1.0 <login>\tCreated
1006 -------------------------------------------------------------------------------
1009 "String or file to insert as file header.
1010 If the string specifies an existing file name, the contents of the file is
1011 inserted, otherwise the string itself is inserted as file header.
1012 Type `C-j' for newlines.
1013 If the header contains RCS keywords, they may be written as <RCS>Keyword<RCS>
1014 if the header needs to be version controlled.
1016 The following keywords for template generation are supported:
1017 <filename> : replaced by the name of the buffer
1018 <author> : replaced by the user name and email address
1019 (`user-full-name', `user-mail-address')
1020 <authorfull> : replaced by the user full name (`user-full-name')
1021 <login> : replaced by user login name (`user-login-name')
1022 <company> : replaced by contents of option `vhdl-company-name'
1023 <date> : replaced by the current date
1024 <year> : replaced by the current year
1025 <project> : replaced by title of current project (`vhdl-project')
1026 <projectdesc> : replaced by description of current project (`vhdl-project')
1027 <copyright> : replaced by copyright string (`vhdl-copyright-string')
1028 <platform> : replaced by contents of option `vhdl-platform-spec'
1029 <standard> : replaced by the VHDL language standard(s) used
1030 <... string> : replaced by a queried string (\"...\" is the prompt word)
1031 <title string>: replaced by file title in automatically generated files
1032 <cursor> : final cursor position
1034 The (multi-line) project description <projectdesc> can be used as a project
1035 dependent part of the file header and can also contain the above keywords."
1036 :type 'string
1037 :group 'vhdl-header)
1039 (defcustom vhdl-file-footer ""
1040 "String or file to insert as file footer.
1041 If the string specifies an existing file name, the contents of the file is
1042 inserted, otherwise the string itself is inserted as file footer (i.e. at
1043 the end of the file).
1044 Type `C-j' for newlines.
1045 The same keywords as in option `vhdl-file-header' can be used."
1046 :type 'string
1047 :group 'vhdl-header)
1049 (defcustom vhdl-company-name ""
1050 "Name of company to insert in file header.
1051 See option `vhdl-file-header'."
1052 :type 'string
1053 :group 'vhdl-header)
1055 (defcustom vhdl-copyright-string "\
1056 -------------------------------------------------------------------------------
1057 -- Copyright (c) <year> <company>
1059 "Copyright string to insert in file header.
1060 Can be multi-line string (type `C-j' for newline) and contain other file
1061 header keywords (see option `vhdl-file-header')."
1062 :type 'string
1063 :group 'vhdl-header)
1065 (defcustom vhdl-platform-spec ""
1066 "Specification of VHDL platform to insert in file header.
1067 The platform specification should contain names and versions of the
1068 simulation and synthesis tools used.
1069 See option `vhdl-file-header'."
1070 :type 'string
1071 :group 'vhdl-header)
1073 (defcustom vhdl-date-format "%Y-%m-%d"
1074 "Specifies the date format to use in the header.
1075 This string is passed as argument to the command `format-time-string'.
1076 For more information on format strings, see the documentation for the
1077 `format-time-string' command (C-h f `format-time-string')."
1078 :type 'string
1079 :group 'vhdl-header)
1081 (defcustom vhdl-modify-date-prefix-string "-- Last update: "
1082 "Prefix string of modification date in VHDL file header.
1083 If actualization of the modification date is called (menu,
1084 `\\[vhdl-template-modify]'), this string is searched and the rest
1085 of the line replaced by the current date."
1086 :type 'string
1087 :group 'vhdl-header)
1089 (defcustom vhdl-modify-date-on-saving t
1090 "Non-nil means update the modification date when the buffer is saved.
1091 Calls function `\\[vhdl-template-modify]').
1093 NOTE: Activate the new setting in a VHDL buffer by using the menu entry
1094 \"Activate Options\"."
1095 :type 'boolean
1096 :group 'vhdl-header)
1099 (defgroup vhdl-sequential-process nil
1100 "Customizations for sequential processes."
1101 :group 'vhdl-template)
1103 (defcustom vhdl-reset-kind 'async
1104 "Specifies which kind of reset to use in sequential processes."
1105 :type '(choice (const :tag "None" none)
1106 (const :tag "Synchronous" sync)
1107 (const :tag "Asynchronous" async)
1108 (const :tag "Query" query))
1109 :group 'vhdl-sequential-process)
1111 (defcustom vhdl-reset-active-high nil
1112 "Non-nil means reset in sequential processes is active high.
1113 Otherwise, reset is active low."
1114 :type 'boolean
1115 :group 'vhdl-sequential-process)
1117 (defcustom vhdl-clock-rising-edge t
1118 "Non-nil means rising edge of clock triggers sequential processes.
1119 Otherwise, falling edge triggers."
1120 :type 'boolean
1121 :group 'vhdl-sequential-process)
1123 (defcustom vhdl-clock-edge-condition 'standard
1124 "Syntax of the clock edge condition.
1125 Standard: \"clk\\='event and clk = \\='1\\='\"
1126 Function: \"rising_edge(clk)\""
1127 :type '(choice (const :tag "Standard" standard)
1128 (const :tag "Function" function))
1129 :group 'vhdl-sequential-process)
1131 (defcustom vhdl-clock-name ""
1132 "Name of clock signal to use in templates."
1133 :type 'string
1134 :group 'vhdl-sequential-process)
1136 (defcustom vhdl-reset-name ""
1137 "Name of reset signal to use in templates."
1138 :type 'string
1139 :group 'vhdl-sequential-process)
1142 (defgroup vhdl-model nil
1143 "Customizations for user models."
1144 :group 'vhdl)
1146 (defcustom vhdl-model-alist
1147 '(("Example Model"
1148 "<label> : process (<clock>, <reset>)
1149 begin -- process <label>
1150 if <reset> = '0' then -- asynchronous reset (active low)
1151 <cursor>
1152 elsif <clock>'event and <clock> = '1' then -- rising clock edge
1153 if <enable> = '1' then -- synchronous load
1155 end if;
1156 end if;
1157 end process <label>;"
1158 "e" ""))
1159 "List of user models.
1160 VHDL models (templates) can be specified by the user in this list. They can be
1161 invoked from the menu, through key bindings (`C-c C-m ...'), or by keyword
1162 electrification (i.e. overriding existing or creating new keywords, see
1163 option `vhdl-electric-keywords').
1164 Name : name of model (string of words and spaces)
1165 String : string or name of file to be inserted as model (newline: `C-j')
1166 Key Binding: key binding to invoke model, added to prefix `C-c C-m'
1167 (must be in double-quotes, examples: \"i\", \"\\C-p\", \"\\M-s\")
1168 Keyword : keyword to invoke model
1170 The models can contain prompts to be queried. A prompt is of the form \"<...>\".
1171 A prompt that appears several times is queried once and replaced throughout
1172 the model. Special prompts are:
1173 <clock> : name specified in `vhdl-clock-name' (if not empty)
1174 <reset> : name specified in `vhdl-reset-name' (if not empty)
1175 <cursor>: final cursor position
1176 File header prompts (see variable `vhdl-file-header') are automatically
1177 replaced, so that user models can also be used to insert different types of
1178 headers.
1180 If the string specifies an existing file name, the contents of the file is
1181 inserted, otherwise the string itself is inserted.
1182 The code within the models should be correctly indented.
1183 Type `C-j' for newlines.
1185 NOTE: Activate the new setting in a VHDL buffer by using the menu entry
1186 \"Activate Options\"."
1187 :type '(repeat (list :tag "Model" :indent 2
1188 (string :tag "Name ")
1189 (string :tag "String : (type `C-j' for newline)"
1190 :format "%t\n%v")
1191 (sexp :tag "Key binding" x)
1192 (string :tag "Keyword " :format "%t: %v\n")))
1193 :set (lambda (variable value)
1194 (vhdl-custom-set variable value
1195 'vhdl-model-map-init
1196 'vhdl-model-defun
1197 'vhdl-mode-abbrev-table-init
1198 'vhdl-update-mode-menu))
1199 :group 'vhdl-model)
1202 (defgroup vhdl-compose nil
1203 "Customizations for structural composition."
1204 :group 'vhdl)
1206 (defcustom vhdl-compose-architecture-name '(".*" . "str")
1207 (concat
1208 "Specifies how the component architecture name is obtained.
1209 The component architecture name can be obtained by modifying the entity name
1210 \(e.g. attaching or stripping off a substring).
1211 If TO STRING is empty, the architecture name is queried."
1212 vhdl-name-doc-string)
1213 :type '(cons (regexp :tag "From regexp")
1214 (string :tag "To string "))
1215 :group 'vhdl-compose)
1217 (defcustom vhdl-compose-configuration-name
1218 '("\\(.*\\) \\(.*\\)" . "\\1_\\2_cfg")
1219 (concat
1220 "Specifies how the configuration name is obtained.
1221 The configuration name can be obtained by modifying the entity and/or
1222 architecture name (e.g. attaching or stripping off a substring). The string
1223 that is matched against the regexp is the concatenation of the entity and the
1224 architecture name separated by a space. This gives access to both names (see
1225 default setting as example)."
1226 vhdl-name-doc-string)
1227 :type '(cons (regexp :tag "From regexp")
1228 (string :tag "To string "))
1229 :group 'vhdl-compose)
1231 (defcustom vhdl-components-package-name
1232 '((".*" . "\\&_components") . "components")
1233 (concat
1234 "Specifies how the name for the components package is obtained.
1235 The components package is a package containing all component declarations for
1236 the current design. Its name can be obtained by modifying the project name
1237 \(e.g. attaching or stripping off a substring). If no project is defined, the
1238 DIRECTORY entry is chosen."
1239 vhdl-name-doc-string)
1240 :type '(cons (cons :tag "Project" :indent 2
1241 (regexp :tag "From regexp")
1242 (string :tag "To string "))
1243 (string :tag "Directory:\n String "))
1244 :group 'vhdl-compose)
1246 (defcustom vhdl-use-components-package nil
1247 "Non-nil means use a separate components package for component declarations.
1248 Otherwise, component declarations are inserted and searched for in the
1249 architecture declarative parts."
1250 :type 'boolean
1251 :group 'vhdl-compose)
1253 (defcustom vhdl-compose-include-header t
1254 "Non-nil means include a header in automatically generated files."
1255 :type 'boolean
1256 :group 'vhdl-compose)
1258 (defcustom vhdl-compose-create-files 'single
1259 "Specifies whether new files should be created for the new component.
1260 The component's entity and architecture are inserted:
1261 None : in current buffer
1262 Single file : in new single file
1263 Separate files: in two separate files
1264 The file names are obtained from variables `vhdl-entity-file-name' and
1265 `vhdl-architecture-file-name'."
1266 :type '(choice (const :tag "None" none)
1267 (const :tag "Single file" single)
1268 (const :tag "Separate files" separate))
1269 :group 'vhdl-compose)
1271 (defcustom vhdl-compose-configuration-create-file nil
1272 "Specifies whether a new file should be created for the configuration.
1273 If non-nil, a new file is created for the configuration.
1274 The file name is obtained from variable `vhdl-configuration-file-name'."
1275 :type 'boolean
1276 :group 'vhdl-compose)
1278 (defcustom vhdl-compose-configuration-hierarchical t
1279 "Specifies whether hierarchical configurations should be created.
1280 If non-nil, automatically created configurations are hierarchical and include
1281 the whole hierarchy of subcomponents. Otherwise the configuration only
1282 includes one level of subcomponents."
1283 :type 'boolean
1284 :group 'vhdl-compose)
1286 (defcustom vhdl-compose-configuration-use-subconfiguration t
1287 "Specifies whether subconfigurations should be used inside configurations.
1288 If non-nil, automatically created configurations use configurations in binding
1289 indications for subcomponents, if such configurations exist. Otherwise,
1290 entities are used in binding indications for subcomponents."
1291 :type 'boolean
1292 :group 'vhdl-compose)
1295 (defgroup vhdl-port nil
1296 "Customizations for port translation functions."
1297 :group 'vhdl
1298 :group 'vhdl-compose)
1300 (defcustom vhdl-include-port-comments nil
1301 "Non-nil means include port comments when a port is pasted."
1302 :type 'boolean
1303 :group 'vhdl-port)
1305 (defcustom vhdl-include-direction-comments nil
1306 "Non-nil means include port direction in instantiations as comments."
1307 :type 'boolean
1308 :group 'vhdl-port)
1310 (defcustom vhdl-include-type-comments nil
1311 "Non-nil means include generic/port type in instantiations as comments."
1312 :type 'boolean
1313 :group 'vhdl-port)
1315 (defcustom vhdl-include-group-comments 'never
1316 "Specifies whether to include group comments and spacings.
1317 The comments and empty lines between groups of ports are pasted:
1318 Never : never
1319 Declarations: in entity/component/constant/signal declarations only
1320 Always : also in generic/port maps"
1321 :type '(choice (const :tag "Never" never)
1322 (const :tag "Declarations" decl)
1323 (const :tag "Always" always))
1324 :group 'vhdl-port)
1326 (defcustom vhdl-actual-generic-name '(".*" . "\\&")
1327 (concat
1328 "Specifies how actual generic names are obtained from formal generic names.
1329 In a component instantiation, an actual generic name can be
1330 obtained by modifying the formal generic name (e.g. attaching or stripping
1331 off a substring)."
1332 vhdl-name-doc-string)
1333 :type '(cons (regexp :tag "From regexp")
1334 (string :tag "To string "))
1335 :group 'vhdl-port
1336 :version "24.4")
1338 (defcustom vhdl-actual-port-name '(".*" . "\\&")
1339 (concat
1340 "Specifies how actual port names are obtained from formal port names.
1341 In a component instantiation, an actual port name can be obtained by
1342 modifying the formal port name (e.g. attaching or stripping off a substring)."
1343 vhdl-name-doc-string)
1344 :type '(cons (regexp :tag "From regexp")
1345 (string :tag "To string "))
1346 :group 'vhdl-port)
1348 (defcustom vhdl-instance-name '(".*" . "\\&_%d")
1349 (concat
1350 "Specifies how an instance name is obtained.
1351 The instance name can be obtained by modifying the name of the component to be
1352 instantiated (e.g. attaching or stripping off a substring). \"%d\" is replaced
1353 by a unique number (starting with 1).
1354 If TO STRING is empty, the instance name is queried."
1355 vhdl-name-doc-string)
1356 :type '(cons (regexp :tag "From regexp")
1357 (string :tag "To string "))
1358 :group 'vhdl-port)
1361 (defgroup vhdl-testbench nil
1362 "Customizations for testbench generation."
1363 :group 'vhdl-port)
1365 (defcustom vhdl-testbench-entity-name '(".*" . "\\&_tb")
1366 (concat
1367 "Specifies how the testbench entity name is obtained.
1368 The entity name of a testbench can be obtained by modifying the name of
1369 the component to be tested (e.g. attaching or stripping off a substring)."
1370 vhdl-name-doc-string)
1371 :type '(cons (regexp :tag "From regexp")
1372 (string :tag "To string "))
1373 :group 'vhdl-testbench)
1375 (defcustom vhdl-testbench-architecture-name '(".*" . "")
1376 (concat
1377 "Specifies how the testbench architecture name is obtained.
1378 The testbench architecture name can be obtained by modifying the name of
1379 the component to be tested (e.g. attaching or stripping off a substring).
1380 If TO STRING is empty, the architecture name is queried."
1381 vhdl-name-doc-string)
1382 :type '(cons (regexp :tag "From regexp")
1383 (string :tag "To string "))
1384 :group 'vhdl-testbench)
1386 (defcustom vhdl-testbench-configuration-name vhdl-compose-configuration-name
1387 (concat
1388 "Specifies how the testbench configuration name is obtained.
1389 The configuration name of a testbench can be obtained by modifying the entity
1390 and/or architecture name (e.g. attaching or stripping off a substring). The
1391 string that is matched against the regexp is the concatenation of the entity
1392 and the architecture name separated by a space. This gives access to both
1393 names (see default setting as example)."
1394 vhdl-name-doc-string)
1395 :type '(cons (regexp :tag "From regexp")
1396 (string :tag "To string "))
1397 :group 'vhdl-testbench)
1399 (defcustom vhdl-testbench-dut-name '(".*" . "DUT")
1400 (concat
1401 "Specifies how a DUT instance name is obtained.
1402 The design-under-test instance name (i.e. the component instantiated in the
1403 testbench) can be obtained by modifying the component name (e.g. attaching
1404 or stripping off a substring)."
1405 vhdl-name-doc-string)
1406 :type '(cons (regexp :tag "From regexp")
1407 (string :tag "To string "))
1408 :group 'vhdl-testbench)
1410 (defcustom vhdl-testbench-include-header t
1411 "Non-nil means include a header in automatically generated files."
1412 :type 'boolean
1413 :group 'vhdl-testbench)
1415 (defcustom vhdl-testbench-declarations "\
1416 -- clock
1417 signal Clk : std_logic := '1';
1419 "String or file to be inserted in the testbench declarative part.
1420 If the string specifies an existing file name, the contents of the file is
1421 inserted, otherwise the string itself is inserted in the testbench
1422 architecture before the BEGIN keyword.
1423 Type `C-j' for newlines."
1424 :type 'string
1425 :group 'vhdl-testbench)
1427 (defcustom vhdl-testbench-statements "\
1428 -- clock generation
1429 Clk <= not Clk after 10 ns;
1431 -- waveform generation
1432 WaveGen_Proc: process
1433 begin
1434 -- insert signal assignments here
1436 wait until Clk = '1';
1437 end process WaveGen_Proc;
1439 "String or file to be inserted in the testbench statement part.
1440 If the string specifies an existing file name, the contents of the file is
1441 inserted, otherwise the string itself is inserted in the testbench
1442 architecture before the END keyword.
1443 Type `C-j' for newlines."
1444 :type 'string
1445 :group 'vhdl-testbench)
1447 (defcustom vhdl-testbench-initialize-signals nil
1448 "Non-nil means initialize signals with `0' when declared in testbench."
1449 :type 'boolean
1450 :group 'vhdl-testbench)
1452 (defcustom vhdl-testbench-include-library t
1453 "Non-nil means a library/use clause for std_logic_1164 is included."
1454 :type 'boolean
1455 :group 'vhdl-testbench)
1457 (defcustom vhdl-testbench-include-configuration t
1458 "Non-nil means a testbench configuration is attached at the end."
1459 :type 'boolean
1460 :group 'vhdl-testbench)
1462 (defcustom vhdl-testbench-create-files 'single
1463 "Specifies whether new files should be created for the testbench.
1464 testbench entity and architecture are inserted:
1465 None : in current buffer
1466 Single file : in new single file
1467 Separate files: in two separate files
1468 The file names are obtained from variables `vhdl-testbench-entity-file-name'
1469 and `vhdl-testbench-architecture-file-name'."
1470 :type '(choice (const :tag "None" none)
1471 (const :tag "Single file" single)
1472 (const :tag "Separate files" separate))
1473 :group 'vhdl-testbench)
1475 (defcustom vhdl-testbench-entity-file-name vhdl-entity-file-name
1476 (concat
1477 "Specifies how the testbench entity file name is obtained.
1478 The entity file name can be obtained by modifying the testbench entity name
1479 \(e.g. attaching or stripping off a substring). The file extension is
1480 automatically taken from the file name of the current buffer. Testbench
1481 files can be created in a different directory by prepending a relative or
1482 absolute path to the file name."
1483 vhdl-name-doc-string)
1484 :type '(cons (regexp :tag "From regexp")
1485 (string :tag "To string "))
1486 :group 'vhdl-testbench)
1488 (defcustom vhdl-testbench-architecture-file-name vhdl-architecture-file-name
1489 (concat
1490 "Specifies how the testbench architecture file name is obtained.
1491 The architecture file name can be obtained by modifying the testbench entity
1492 and/or architecture name (e.g. attaching or stripping off a substring). The
1493 string that is matched against the regexp is the concatenation of the entity
1494 and the architecture name separated by a space. This gives access to both
1495 names (see default setting as example). Testbench files can be created in
1496 a different directory by prepending a relative or absolute path to the file
1497 name."
1498 vhdl-name-doc-string)
1499 :type '(cons (regexp :tag "From regexp")
1500 (string :tag "To string "))
1501 :group 'vhdl-testbench)
1504 (defgroup vhdl-comment nil
1505 "Customizations for comments."
1506 :group 'vhdl)
1508 (defcustom vhdl-self-insert-comments t
1509 "Non-nil means various templates automatically insert help comments."
1510 :type 'boolean
1511 :group 'vhdl-comment)
1513 (defcustom vhdl-prompt-for-comments t
1514 "Non-nil means various templates prompt for user definable comments."
1515 :type 'boolean
1516 :group 'vhdl-comment)
1518 (defcustom vhdl-inline-comment-column 40
1519 "Column to indent and align inline comments to.
1520 Overrides local option `comment-column'.
1522 NOTE: Activate the new setting in a VHDL buffer by using the menu entry
1523 \"Activate Options\"."
1524 :type 'integer
1525 :group 'vhdl-comment)
1527 (defcustom vhdl-end-comment-column 79
1528 "End of comment column.
1529 Comments that exceed this column number are wrapped.
1531 NOTE: Activate the new setting in a VHDL buffer by using the menu entry
1532 \"Activate Options\"."
1533 :type 'integer
1534 :group 'vhdl-comment)
1536 (defvar end-comment-column)
1539 (defgroup vhdl-beautify nil
1540 "Customizations for beautification."
1541 :group 'vhdl)
1543 (defcustom vhdl-auto-align t
1544 "Non-nil means align some templates automatically after generation."
1545 :type 'boolean
1546 :group 'vhdl-beautify)
1548 (defcustom vhdl-align-groups t
1549 "Non-nil means align groups of code lines separately.
1550 A group of code lines is a region of consecutive lines between two lines that
1551 match the regexp in option `vhdl-align-group-separate'."
1552 :type 'boolean
1553 :group 'vhdl-beautify)
1555 (defcustom vhdl-align-group-separate "^\\s-*$"
1556 "Regexp for matching a line that separates groups of lines for alignment.
1557 Examples:
1558 \"^\\s-*$\": matches an empty line
1559 \"^\\s-*\\(--.*\\)?$\": matches an empty line or a comment-only line"
1560 :type 'regexp
1561 :group 'vhdl-beautify)
1563 (defcustom vhdl-align-same-indent t
1564 "Non-nil means align blocks with same indent separately.
1565 When a region or the entire buffer is aligned, the code is divided into
1566 blocks of same indent which are aligned separately (except for argument/port
1567 lists). This gives nicer alignment in most cases.
1568 Option `vhdl-align-groups' still applies within these blocks."
1569 :type 'boolean
1570 :group 'vhdl-beautify)
1572 (defcustom vhdl-beautify-options '(t t t t t)
1573 "List of options for beautifying code.
1574 Allows you to disable individual features of code beautification."
1575 :type '(list (boolean :tag "Whitespace cleanup ")
1576 (boolean :tag "Single statement per line")
1577 (boolean :tag "Indentation ")
1578 (boolean :tag "Alignment ")
1579 (boolean :tag "Case fixing "))
1580 :group 'vhdl-beautify
1581 :version "24.4")
1584 (defgroup vhdl-highlight nil
1585 "Customizations for highlighting."
1586 :group 'vhdl)
1588 (defcustom vhdl-highlight-keywords t
1589 "Non-nil means highlight VHDL keywords and other standardized words.
1590 The following faces are used:
1591 `font-lock-keyword-face' : keywords
1592 `font-lock-type-face' : standardized types
1593 `vhdl-font-lock-attribute-face': standardized attributes
1594 `vhdl-font-lock-enumvalue-face': standardized enumeration values
1595 `vhdl-font-lock-function-face' : standardized function and package names
1597 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1598 entry \"Fontify Buffer\")."
1599 :type 'boolean
1600 :set (lambda (variable value)
1601 (vhdl-custom-set variable value 'vhdl-font-lock-init))
1602 :group 'vhdl-highlight)
1604 (defcustom vhdl-highlight-names t
1605 "Non-nil means highlight declaration names and construct labels.
1606 The following faces are used:
1607 `font-lock-function-name-face' : names in declarations of units,
1608 subprograms, components, as well as labels of VHDL constructs
1609 `font-lock-type-face' : names in type/nature declarations
1610 `vhdl-font-lock-attribute-face': names in attribute declarations
1611 `font-lock-variable-name-face' : names in declarations of signals,
1612 variables, constants, subprogram parameters, generics, and ports
1614 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1615 entry \"Fontify Buffer\")."
1616 :type 'boolean
1617 :set (lambda (variable value)
1618 (vhdl-custom-set variable value 'vhdl-font-lock-init))
1619 :group 'vhdl-highlight)
1621 (defcustom vhdl-highlight-special-words nil
1622 "Non-nil means highlight words with special syntax.
1623 The words with syntax and color specified in option `vhdl-special-syntax-alist'
1624 are highlighted accordingly.
1625 Can be used for visual support of naming conventions.
1627 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1628 entry \"Fontify Buffer\")."
1629 :type 'boolean
1630 :set (lambda (variable value)
1631 (vhdl-custom-set variable value 'vhdl-font-lock-init))
1632 :group 'vhdl-highlight)
1634 (defcustom vhdl-highlight-forbidden-words nil
1635 "Non-nil means highlight forbidden words.
1636 The reserved words specified in option `vhdl-forbidden-words' or having the
1637 syntax specified in option `vhdl-forbidden-syntax' are highlighted in a
1638 warning color (face `vhdl-font-lock-reserved-words-face') to indicate not to
1639 use them.
1641 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1642 entry \"Fontify Buffer\")."
1643 :type 'boolean
1644 :set (lambda (variable value)
1645 (vhdl-custom-set variable value
1646 'vhdl-words-init 'vhdl-font-lock-init))
1647 :group 'vhdl-highlight)
1649 (defcustom vhdl-highlight-verilog-keywords nil
1650 "Non-nil means highlight Verilog keywords as reserved words.
1651 Verilog keywords are highlighted in a warning color (face
1652 `vhdl-font-lock-reserved-words-face') to indicate not to use them.
1654 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1655 entry \"Fontify Buffer\")."
1656 :type 'boolean
1657 :set (lambda (variable value)
1658 (vhdl-custom-set variable value
1659 'vhdl-words-init 'vhdl-font-lock-init))
1660 :group 'vhdl-highlight)
1662 (defcustom vhdl-highlight-translate-off nil
1663 "Non-nil means background-highlight code excluded from translation.
1664 That is, all code between \"-- pragma translate_off\" and
1665 \"-- pragma translate_on\" is highlighted using a different background color
1666 \(face `vhdl-font-lock-translate-off-face').
1667 Note: this might slow down on-the-fly fontification (and thus editing).
1669 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1670 entry \"Fontify Buffer\")."
1671 :type 'boolean
1672 :set (lambda (variable value)
1673 (vhdl-custom-set variable value 'vhdl-font-lock-init))
1674 :group 'vhdl-highlight)
1676 (defcustom vhdl-highlight-case-sensitive nil
1677 "Non-nil means consider case for highlighting.
1678 Possible trade-off:
1679 non-nil also upper-case VHDL words are highlighted, but case of words with
1680 special syntax is not considered
1681 nil only lower-case VHDL words are highlighted, but case of words with
1682 special syntax is considered
1683 Overrides local option `font-lock-keywords-case-fold-search'.
1685 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1686 entry \"Fontify Buffer\")."
1687 :type 'boolean
1688 :group 'vhdl-highlight)
1690 (defcustom vhdl-special-syntax-alist
1691 '(("generic/constant" "\\<\\w+_[cg]\\>" "Gold3" "BurlyWood1" nil)
1692 ("type" "\\<\\w+_t\\>" "ForestGreen" "PaleGreen" nil)
1693 ("variable" "\\<\\w+_v\\>" "Grey50" "Grey80" nil))
1694 "List of special syntax to be highlighted.
1695 If option `vhdl-highlight-special-words' is non-nil, words with the specified
1696 syntax (as regular expression) are highlighted in the corresponding color.
1698 Name : string of words and spaces
1699 Regexp : regular expression describing word syntax
1700 (e.g., `\\=\\<\\w+_c\\>' matches word with suffix `_c')
1701 expression must start with `\\=\\<' and end with `\\>'
1702 if only whole words should be matched (no substrings)
1703 Color (light): foreground color for light background
1704 (matching color examples: Gold3, Grey50, LimeGreen, Tomato,
1705 LightSeaGreen, DodgerBlue, Gold, PaleVioletRed)
1706 Color (dark) : foreground color for dark background
1707 (matching color examples: BurlyWood1, Grey80, Green, Coral,
1708 AquaMarine2, LightSkyBlue1, Yellow, PaleVioletRed1)
1709 In comments : If non-nil, words are also highlighted inside comments
1711 Can be used for visual support of naming conventions, such as highlighting
1712 different kinds of signals (e.g. `Clk50', `Rst_n') or objects (e.g.
1713 `Signal_s', `Variable_v', `Constant_c') by distinguishing them using
1714 common substrings or name suffices.
1715 For each entry, a new face is generated with the specified colors and name
1716 `vhdl-font-lock-' + name + `-face'.
1718 NOTE: Activate a changed regexp in a VHDL buffer by re-fontifying it (menu
1719 entry `Fontify Buffer'). All other changes require restarting Emacs."
1720 :type '(repeat (list :tag "Face" :indent 2
1721 (string :tag "Name ")
1722 (regexp :tag "Regexp " "\\w+_")
1723 (string :tag "Color (light)")
1724 (string :tag "Color (dark) ")
1725 (boolean :tag "In comments ")))
1726 :set (lambda (variable value)
1727 (vhdl-custom-set variable value 'vhdl-font-lock-init))
1728 :group 'vhdl-highlight)
1730 (defcustom vhdl-forbidden-words '()
1731 "List of forbidden words to be highlighted.
1732 If option `vhdl-highlight-forbidden-words' is non-nil, these reserved
1733 words are highlighted in a warning color to indicate not to use them.
1735 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1736 entry \"Fontify Buffer\")."
1737 :type '(repeat (string :format "%v"))
1738 :set (lambda (variable value)
1739 (vhdl-custom-set variable value
1740 'vhdl-words-init 'vhdl-font-lock-init))
1741 :group 'vhdl-highlight)
1743 (defcustom vhdl-forbidden-syntax ""
1744 "Syntax of forbidden words to be highlighted.
1745 If option `vhdl-highlight-forbidden-words' is non-nil, words with this
1746 syntax are highlighted in a warning color to indicate not to use them.
1747 Can be used to highlight too long identifiers (e.g. \"\\w\\w\\w\\w\\w\\w\\w\\w\\w\\w+\"
1748 highlights identifiers with 10 or more characters).
1750 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1751 entry \"Fontify Buffer\")."
1752 :type 'regexp
1753 :set (lambda (variable value)
1754 (vhdl-custom-set variable value
1755 'vhdl-words-init 'vhdl-font-lock-init))
1756 :group 'vhdl-highlight)
1758 (defcustom vhdl-directive-keywords '("psl" "pragma" "synopsys")
1759 "List of compiler directive keywords recognized for highlighting.
1761 NOTE: Activate the new setting in a VHDL buffer by re-fontifying it (menu
1762 entry \"Fontify Buffer\")."
1763 :type '(repeat (string :format "%v"))
1764 :set (lambda (variable value)
1765 (vhdl-custom-set variable value
1766 'vhdl-words-init 'vhdl-font-lock-init))
1767 :group 'vhdl-highlight)
1770 (defgroup vhdl-speedbar nil
1771 "Customizations for speedbar."
1772 :group 'vhdl)
1774 (defcustom vhdl-speedbar-auto-open nil
1775 "Non-nil means automatically open speedbar at startup.
1776 Alternatively, the speedbar can be opened from the VHDL menu."
1777 :type 'boolean
1778 :group 'vhdl-speedbar)
1780 (defcustom vhdl-speedbar-display-mode 'files
1781 "Specifies the default displaying mode when opening speedbar.
1782 Alternatively, the displaying mode can be selected from the speedbar menu or
1783 by typing `f' (files), `h' (directory hierarchy) or `H' (project hierarchy)."
1784 :type '(choice (const :tag "Files" files)
1785 (const :tag "Directory hierarchy" directory)
1786 (const :tag "Project hierarchy" project))
1787 :group 'vhdl-speedbar)
1789 (defcustom vhdl-speedbar-scan-limit '(10000000 (1000000 50))
1790 "Limits scanning of large files and netlists.
1791 Design units: maximum file size to scan for design units
1792 Hierarchy (instances of subcomponents):
1793 File size: maximum file size to scan for instances (in bytes)
1794 Instances per arch: maximum number of instances to scan per architecture
1796 \"None\" always means that there is no limit.
1797 In case of files not or incompletely scanned, a warning message and the file
1798 names are printed out.
1799 Background: scanning for instances is considerably slower than scanning for
1800 design units, especially when there are many instances. These limits should
1801 prevent the scanning of large netlists."
1802 :type '(list (choice :tag "Design units"
1803 :format "%t : %[Value Menu%] %v"
1804 (const :tag "None" nil)
1805 (integer :tag "File size"))
1806 (list :tag "Hierarchy" :indent 2
1807 (choice :tag "File size"
1808 :format "%t : %[Value Menu%] %v"
1809 (const :tag "None" nil)
1810 (integer :tag "Size "))
1811 (choice :tag "Instances per arch"
1812 (const :tag "None" nil)
1813 (integer :tag "Number "))))
1814 :group 'vhdl-speedbar)
1816 (defcustom vhdl-speedbar-jump-to-unit t
1817 "Non-nil means jump to the design unit code when opened in a buffer.
1818 The buffer cursor position is left unchanged otherwise."
1819 :type 'boolean
1820 :group 'vhdl-speedbar)
1822 (defcustom vhdl-speedbar-update-on-saving t
1823 "Automatically update design hierarchy when buffer is saved."
1824 :type 'boolean
1825 :group 'vhdl-speedbar)
1827 (defcustom vhdl-speedbar-save-cache '(hierarchy display)
1828 "Automatically save modified hierarchy caches when exiting Emacs.
1829 Hierarchy: design hierarchy information
1830 Display: displaying information (which design units to expand)"
1831 :type '(set (const :tag "Hierarchy" hierarchy)
1832 (const :tag "Display" display))
1833 :group 'vhdl-speedbar)
1835 (defcustom vhdl-speedbar-cache-file-name ".emacs-vhdl-cache-\\1-\\2"
1836 "Name of file for saving hierarchy cache.
1837 \"\\1\" is replaced by the project name if a project is specified,
1838 \"directory\" otherwise. \"\\2\" is replaced by the user name (allows for
1839 different users to have cache files in the same directory). Can also have
1840 an absolute path (i.e. all caches can be stored in one global directory)."
1841 :type 'string
1842 :group 'vhdl-speedbar)
1845 (defgroup vhdl-menu nil
1846 "Customizations for menus."
1847 :group 'vhdl)
1849 (defcustom vhdl-index-menu nil
1850 "Non-nil means add an index menu for a source file when loading.
1851 Alternatively, the speedbar can be used. Note that the index menu scans a file
1852 when it is opened, while speedbar only scans the file upon request."
1853 :type 'boolean
1854 :group 'vhdl-menu)
1856 (defcustom vhdl-source-file-menu nil
1857 "Non-nil means add a menu of all source files in current directory.
1858 Alternatively, the speedbar can be used."
1859 :type 'boolean
1860 :group 'vhdl-menu)
1862 (defcustom vhdl-hideshow-menu nil
1863 "Non-nil means add hideshow menu and functionality at startup.
1864 Hideshow can also be enabled from the VHDL Mode menu.
1865 Hideshow allows hiding code of various VHDL constructs.
1867 NOTE: Activate the new setting in a VHDL buffer by using the menu entry
1868 \"Activate Options\"."
1869 :type 'boolean
1870 :group 'vhdl-menu)
1872 (defcustom vhdl-hide-all-init nil
1873 "Non-nil means hide all design units initially after a file is loaded."
1874 :type 'boolean
1875 :group 'vhdl-menu)
1878 (defgroup vhdl-print nil
1879 "Customizations for printing."
1880 :group 'vhdl)
1882 (defcustom vhdl-print-two-column t
1883 "Non-nil means print code in two columns and landscape format.
1884 Adjusts settings in a way that PostScript printing (\"File\" menu, `ps-print')
1885 prints VHDL files in a nice two-column landscape style.
1887 NOTE: Activate the new setting by restarting Emacs.
1888 Overrides `ps-print' settings locally."
1889 :type 'boolean
1890 :group 'vhdl-print)
1892 (defcustom vhdl-print-customize-faces t
1893 "Non-nil means use an optimized set of faces for PostScript printing.
1895 NOTE: Activate the new setting by restarting Emacs.
1896 Overrides `ps-print' settings locally."
1897 :type 'boolean
1898 :group 'vhdl-print)
1901 (defgroup vhdl-misc nil
1902 "Miscellaneous customizations."
1903 :group 'vhdl)
1905 (defcustom vhdl-intelligent-tab t
1906 "Non-nil means `TAB' does indentation, word completion and tab insertion.
1907 That is, if preceding character is part of a word then complete word,
1908 else if not at beginning of line then insert tab,
1909 else if last command was a `TAB' or `RET' then dedent one step,
1910 else indent current line (i.e. `TAB' is bound to `vhdl-electric-tab').
1911 If nil, TAB always indents current line (i.e. `TAB' is bound to
1912 `indent-according-to-mode').
1914 NOTE: Activate the new setting in a VHDL buffer by using the menu entry
1915 \"Activate Options\"."
1916 :type 'boolean
1917 :group 'vhdl-misc)
1919 (defcustom vhdl-indent-syntax-based t
1920 "Non-nil means indent lines of code based on their syntactic context.
1921 Otherwise, a line is indented like the previous nonblank line. This can be
1922 useful in large files where syntax-based indentation gets very slow."
1923 :type 'boolean
1924 :group 'vhdl-misc)
1926 (defcustom vhdl-indent-comment-like-next-code-line t
1927 "Non-nil means comment lines are indented like the following code line.
1928 Otherwise, comment lines are indented like the preceding code line.
1929 Indenting comment lines like the following code line gives nicer indentation
1930 when comments precede the code that they refer to."
1931 :type 'boolean
1932 :version "24.3"
1933 :group 'vhdl-misc)
1935 (defcustom vhdl-word-completion-case-sensitive nil
1936 "Non-nil means word completion using `TAB' is case sensitive.
1937 That is, `TAB' completes words that start with the same letters and case.
1938 Otherwise, case is ignored."
1939 :type 'boolean
1940 :group 'vhdl-misc)
1942 (defcustom vhdl-word-completion-in-minibuffer t
1943 "Non-nil enables word completion in minibuffer (for template prompts).
1945 NOTE: Activate the new setting by restarting Emacs."
1946 :type 'boolean
1947 :group 'vhdl-misc)
1949 (defcustom vhdl-underscore-is-part-of-word nil
1950 "Non-nil means consider the underscore character `_' as part of word.
1951 An identifier containing underscores is then treated as a single word in
1952 select and move operations. All parts of an identifier separated by underscore
1953 are treated as single words otherwise."
1954 :type 'boolean
1955 :group 'vhdl-misc)
1956 (make-obsolete-variable 'vhdl-underscore-is-part-of-word
1957 'superword-mode "24.4")
1960 (defgroup vhdl-related nil
1961 "Related general customizations."
1962 :group 'vhdl)
1964 ;; add related general customizations
1965 (custom-add-to-group 'vhdl-related 'hideshow 'custom-group)
1966 (if (featurep 'xemacs)
1967 (custom-add-to-group 'vhdl-related 'paren-mode 'custom-variable)
1968 (custom-add-to-group 'vhdl-related 'paren-showing 'custom-group))
1969 (custom-add-to-group 'vhdl-related 'ps-print 'custom-group)
1970 (custom-add-to-group 'vhdl-related 'speedbar 'custom-group)
1971 (custom-add-to-group 'vhdl-related 'comment-style 'custom-variable)
1972 (custom-add-to-group 'vhdl-related 'line-number-mode 'custom-variable)
1973 (unless (featurep 'xemacs)
1974 (custom-add-to-group 'vhdl-related 'transient-mark-mode 'custom-variable))
1975 (custom-add-to-group 'vhdl-related 'user-full-name 'custom-variable)
1976 (custom-add-to-group 'vhdl-related 'user-mail-address 'custom-variable)
1978 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1979 ;; Hidden user variables
1981 (defvar vhdl-compile-absolute-path nil
1982 "If non-nil, use absolute instead of relative path for compiled files.")
1984 (defvar vhdl-comment-display-line-char ?-
1985 "Character to use in comment display line.")
1987 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1988 ;; Internal variables
1990 (defvar vhdl-menu-max-size 20
1991 "Specifies the maximum size of a menu before splitting it into submenus.")
1993 (defvar vhdl-progress-interval 1
1994 "Interval used to update progress status during long operations.
1995 If a number, percentage complete gets updated after each interval of
1996 that many seconds. To inhibit all messages, set this option to nil.")
1998 (defvar vhdl-inhibit-startup-warnings-p nil
1999 "If non-nil, inhibits start up compatibility warnings.")
2001 (defvar vhdl-strict-syntax-p nil
2002 "If non-nil, all syntactic symbols must be found in `vhdl-offsets-alist'.
2003 If the syntactic symbol for a particular line does not match a symbol
2004 in the offsets alist, an error is generated, otherwise no error is
2005 reported and the syntactic symbol is ignored.")
2007 (defvar vhdl-echo-syntactic-information-p nil
2008 "If non-nil, syntactic info is echoed when the line is indented.")
2010 (defconst vhdl-offsets-alist-default
2011 '((string . -1000)
2012 (cpp-macro . -1000)
2013 (block-open . 0)
2014 (block-close . 0)
2015 (statement . 0)
2016 (statement-cont . vhdl-lineup-statement-cont)
2017 (statement-block-intro . +)
2018 (statement-case-intro . +)
2019 (case-alternative . +)
2020 (comment . vhdl-lineup-comment)
2021 (arglist-intro . +)
2022 (arglist-cont . 0)
2023 (arglist-cont-nonempty . vhdl-lineup-arglist)
2024 (arglist-close . vhdl-lineup-arglist)
2025 (entity . 0)
2026 (configuration . 0)
2027 (package . 0)
2028 (architecture . 0)
2029 (package-body . 0)
2030 (context . 0)
2031 (directive . 0)
2033 "Default settings for offsets of syntactic elements.
2034 Do not change this constant! See the variable `vhdl-offsets-alist' for
2035 more information.")
2037 (defvar vhdl-offsets-alist (copy-alist vhdl-offsets-alist-default)
2038 "Association list of syntactic element symbols and indentation offsets.
2039 As described below, each cons cell in this list has the form:
2041 (SYNTACTIC-SYMBOL . OFFSET)
2043 When a line is indented, `vhdl-mode' first determines the syntactic
2044 context of the line by generating a list of symbols called syntactic
2045 elements. This list can contain more than one syntactic element and
2046 the global variable `vhdl-syntactic-context' contains the context list
2047 for the line being indented. Each element in this list is actually a
2048 cons cell of the syntactic symbol and a buffer position. This buffer
2049 position is call the relative indent point for the line. Some
2050 syntactic symbols may not have a relative indent point associated with
2051 them.
2053 After the syntactic context list for a line is generated, `vhdl-mode'
2054 calculates the absolute indentation for the line by looking at each
2055 syntactic element in the list. First, it compares the syntactic
2056 element against the SYNTACTIC-SYMBOL's in `vhdl-offsets-alist'. When it
2057 finds a match, it adds the OFFSET to the column of the relative indent
2058 point. The sum of this calculation for each element in the syntactic
2059 list is the absolute offset for line being indented.
2061 If the syntactic element does not match any in the `vhdl-offsets-alist',
2062 an error is generated if `vhdl-strict-syntax-p' is non-nil, otherwise
2063 the element is ignored.
2065 Actually, OFFSET can be an integer, a function, a variable, or one of
2066 the following symbols: `+', `-', `++', or `--'. These latter
2067 designate positive or negative multiples of `vhdl-basic-offset',
2068 respectively: *1, *-1, *2, and *-2. If OFFSET is a function, it is
2069 called with a single argument containing the cons of the syntactic
2070 element symbol and the relative indent point. The function should
2071 return an integer offset.
2073 Here is the current list of valid syntactic element symbols:
2075 string -- inside multi-line string
2076 block-open -- statement block open
2077 block-close -- statement block close
2078 statement -- a VHDL statement
2079 statement-cont -- a continuation of a VHDL statement
2080 statement-block-intro -- the first line in a new statement block
2081 statement-case-intro -- the first line in a case alternative block
2082 case-alternative -- a case statement alternative clause
2083 comment -- a line containing only a comment
2084 arglist-intro -- the first line in an argument list
2085 arglist-cont -- subsequent argument list lines when no
2086 arguments follow on the same line as
2087 the arglist opening paren
2088 arglist-cont-nonempty -- subsequent argument list lines when at
2089 least one argument follows on the same
2090 line as the arglist opening paren
2091 arglist-close -- the solo close paren of an argument list
2092 entity -- inside an entity declaration
2093 configuration -- inside a configuration declaration
2094 package -- inside a package declaration
2095 architecture -- inside an architecture body
2096 package-body -- inside a package body
2097 context -- inside a context declaration")
2099 (defvar vhdl-comment-only-line-offset 0
2100 "Extra offset for line which contains only the start of a comment.
2101 Can contain an integer or a cons cell of the form:
2103 (NON-ANCHORED-OFFSET . ANCHORED-OFFSET)
2105 Where NON-ANCHORED-OFFSET is the amount of offset given to
2106 non-column-zero anchored comment-only lines, and ANCHORED-OFFSET is
2107 the amount of offset to give column-zero anchored comment-only lines.
2108 Just an integer as value is equivalent to (<val> . 0)")
2110 (defvar vhdl-special-indent-hook nil
2111 "Hook for user defined special indentation adjustments.
2112 This hook gets called after a line is indented by the mode.")
2114 (defvar vhdl-style-alist
2115 '(("IEEE"
2116 (vhdl-basic-offset . 4)
2117 (vhdl-offsets-alist . ())))
2118 "Styles of Indentation.
2119 Elements of this alist are of the form:
2121 (STYLE-STRING (VARIABLE . VALUE) [(VARIABLE . VALUE) ...])
2123 where STYLE-STRING is a short descriptive string used to select a
2124 style, VARIABLE is any `vhdl-mode' variable, and VALUE is the intended
2125 value for that variable when using the selected style.
2127 There is one special case when VARIABLE is `vhdl-offsets-alist'. In this
2128 case, the VALUE is a list containing elements of the form:
2130 (SYNTACTIC-SYMBOL . VALUE)
2132 as described in `vhdl-offsets-alist'. These are passed directly to
2133 `vhdl-set-offset' so there is no need to set every syntactic symbol in
2134 your style, only those that are different from the default.")
2136 ;; dynamically append the default value of most variables
2137 (or (assoc "Default" vhdl-style-alist)
2138 (let* ((varlist '(vhdl-inhibit-startup-warnings-p
2139 vhdl-strict-syntax-p
2140 vhdl-echo-syntactic-information-p
2141 vhdl-basic-offset
2142 vhdl-offsets-alist
2143 vhdl-comment-only-line-offset))
2144 (default (cons "Default"
2145 (mapcar
2146 (function
2147 (lambda (var)
2148 (cons var (symbol-value var))))
2149 varlist))))
2150 (push default vhdl-style-alist)))
2152 (defvar vhdl-mode-hook nil
2153 "Hook called by `vhdl-mode'.")
2156 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2157 ;;; Required packages
2158 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2160 ;; mandatory
2161 (require 'compile) ; XEmacs
2162 (require 'easymenu)
2163 (require 'hippie-exp)
2165 ;; optional (minimize warning messages during compile)
2166 (unless (featurep 'xemacs)
2167 (eval-when-compile
2168 (require 'font-lock)
2169 (require 'ps-print)
2170 (require 'speedbar))) ; for speedbar-with-writable
2172 (defun vhdl-aput (alist-symbol key &optional value)
2173 "Insert a key-value pair into an alist.
2174 The alist is referenced by ALIST-SYMBOL. The key-value pair is made
2175 from KEY and VALUE. If the key-value pair referenced by KEY can be
2176 found in the alist, the value of KEY will be set to VALUE. If the
2177 key-value pair cannot be found in the alist, it will be inserted into
2178 the head of the alist."
2179 (let* ((alist (symbol-value alist-symbol))
2180 (elem (assoc key alist)))
2181 (if elem
2182 (setcdr elem value)
2183 (set alist-symbol (cons (cons key value) alist)))))
2185 (defun vhdl-adelete (alist-symbol key)
2186 "Delete a key-value pair from the alist.
2187 Alist is referenced by ALIST-SYMBOL and the key-value pair to remove
2188 is pair matching KEY."
2189 (let ((alist (symbol-value alist-symbol)) alist-cdr)
2190 (while (equal key (caar alist))
2191 (setq alist (cdr alist))
2192 (set alist-symbol alist))
2193 (while (setq alist-cdr (cdr alist))
2194 (if (equal key (caar alist-cdr))
2195 (setcdr alist (cdr alist-cdr))
2196 (setq alist alist-cdr)))))
2198 (defun vhdl-aget (alist key)
2199 "Return the value in ALIST that is associated with KEY. If KEY is
2200 not found, then nil is returned."
2201 (cdr (assoc key alist)))
2203 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2204 ;;; Compatibility
2205 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2207 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2208 ;; XEmacs compatibility
2210 ;; active regions
2211 (defun vhdl-keep-region-active ()
2212 "Do whatever is necessary to keep the region active in XEmacs.
2213 Ignore byte-compiler warnings you might see."
2214 (and (featurep 'xemacs)
2215 (setq zmacs-region-stays t)))
2217 ;; `wildcard-to-regexp' is included only in XEmacs 21
2218 (unless (fboundp 'wildcard-to-regexp)
2219 (defun wildcard-to-regexp (wildcard)
2220 "Simplified version of `wildcard-to-regexp' from Emacs's `files.el'."
2221 (let* ((i (string-match "[*?]" wildcard))
2222 (result (substring wildcard 0 i))
2223 (len (length wildcard)))
2224 (when i
2225 (while (< i len)
2226 (let ((ch (aref wildcard i)))
2227 (setq result (concat result
2228 (cond ((eq ch ?*) "[^\000]*")
2229 ((eq ch ??) "[^\000]")
2230 (t (char-to-string ch)))))
2231 (setq i (1+ i)))))
2232 (concat "\\`" result "\\'"))))
2234 ;; `regexp-opt' undefined (`xemacs-devel' not installed)
2235 ;; `regexp-opt' accelerates fontification by 10-20%
2236 (unless (fboundp 'regexp-opt)
2237 ; (vhdl-warning-when-idle "Please install `xemacs-devel' package.")
2238 (defun regexp-opt (strings &optional paren)
2239 (let ((open (if paren "\\(" "")) (close (if paren "\\)" "")))
2240 (concat open (mapconcat 'regexp-quote strings "\\|") close))))
2242 ;; `match-string-no-properties' undefined (XEmacs, what else?)
2243 (unless (fboundp 'match-string-no-properties)
2244 (defalias 'match-string-no-properties 'match-string))
2246 ;; `subst-char-in-string' undefined (XEmacs)
2247 (unless (fboundp 'subst-char-in-string)
2248 (defun subst-char-in-string (fromchar tochar string &optional inplace)
2249 (let ((i (length string))
2250 (newstr (if inplace string (copy-sequence string))))
2251 (while (> i 0)
2252 (setq i (1- i))
2253 (if (eq (aref newstr i) fromchar) (aset newstr i tochar)))
2254 newstr)))
2256 ;; `itimer.el': idle timer bug fix in version 1.09 (XEmacs 21.1.9)
2257 (when (and (featurep 'xemacs) (string< itimer-version "1.09")
2258 (not noninteractive))
2259 (load "itimer")
2260 (when (string< itimer-version "1.09")
2261 (message "WARNING: Install included `itimer.el' patch first (see INSTALL file)")
2262 (beep) (sit-for 5)))
2264 ;; `file-expand-wildcards' undefined (XEmacs)
2265 (unless (fboundp 'file-expand-wildcards)
2266 (defun file-expand-wildcards (pattern &optional full)
2267 "Taken from Emacs's `files.el'."
2268 (let* ((nondir (file-name-nondirectory pattern))
2269 (dirpart (file-name-directory pattern))
2270 (dirs (if (and dirpart (string-match "[[*?]" dirpart))
2271 (mapcar 'file-name-as-directory
2272 (file-expand-wildcards (directory-file-name dirpart)))
2273 (list dirpart)))
2274 contents)
2275 (while dirs
2276 (when (or (null (car dirs)) ; Possible if DIRPART is not wild.
2277 (file-directory-p (directory-file-name (car dirs))))
2278 (let ((this-dir-contents
2279 (delq nil
2280 (mapcar #'(lambda (name)
2281 (unless (string-match "\\`\\.\\.?\\'"
2282 (file-name-nondirectory name))
2283 name))
2284 (directory-files (or (car dirs) ".") full
2285 (wildcard-to-regexp nondir))))))
2286 (setq contents
2287 (nconc
2288 (if (and (car dirs) (not full))
2289 (mapcar (function (lambda (name) (concat (car dirs) name)))
2290 this-dir-contents)
2291 this-dir-contents)
2292 contents))))
2293 (setq dirs (cdr dirs)))
2294 contents)))
2296 ;; `member-ignore-case' undefined (XEmacs)
2297 (unless (fboundp 'member-ignore-case)
2298 (defalias 'member-ignore-case 'member))
2300 ;; `last-input-char' obsolete in Emacs 24, `last-input-event' different
2301 ;; behavior in XEmacs
2302 (defvar vhdl-last-input-event)
2303 (if (featurep 'xemacs)
2304 (defvaralias 'vhdl-last-input-event 'last-input-char)
2305 (defvaralias 'vhdl-last-input-event 'last-input-event))
2307 ;; `help-print-return-message' changed to `print-help-return-message' in Emacs
2308 ;;;(unless (fboundp 'help-print-return-message)
2309 ;;; (defalias 'help-print-return-message 'print-help-return-message))
2311 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2312 ;; Compatibility with older VHDL Mode versions
2314 (defvar vhdl-warnings nil
2315 "Warnings to tell the user during start up.")
2317 (defun vhdl-run-when-idle (secs repeat function)
2318 "Wait until idle, then run FUNCTION."
2319 (if (fboundp 'start-itimer)
2320 (start-itimer "vhdl-mode" function secs repeat t)
2321 ;; explicitly activate timer (necessary when Emacs is already idle)
2322 (aset (run-with-idle-timer secs repeat function) 0 nil)))
2324 (defun vhdl-warning-when-idle (&rest args)
2325 "Wait until idle, then print out warning STRING and beep."
2326 (let ((message (apply #'format-message args)))
2327 (if noninteractive
2328 (vhdl-warning message t)
2329 (unless vhdl-warnings
2330 (vhdl-run-when-idle .1 nil 'vhdl-print-warnings))
2331 (push message vhdl-warnings))))
2333 (defun vhdl-warning (string &optional nobeep)
2334 "Print out warning STRING and beep."
2335 (message "WARNING: %s" string)
2336 (unless (or nobeep noninteractive) (beep)))
2338 (defun vhdl-print-warnings ()
2339 "Print out messages in variable `vhdl-warnings'."
2340 (let ((no-warnings (length vhdl-warnings)))
2341 (setq vhdl-warnings (nreverse vhdl-warnings))
2342 (while vhdl-warnings
2343 (message "WARNING: %s" (car vhdl-warnings))
2344 (setq vhdl-warnings (cdr vhdl-warnings)))
2345 (beep)
2346 (when (> no-warnings 1)
2347 (message "WARNING: See warnings in message buffer (type `C-c M-m')."))))
2349 ;; Backward compatibility checks and fixes
2350 ;; option `vhdl-compiler' changed format
2351 (unless (stringp vhdl-compiler)
2352 (setq vhdl-compiler "ModelSim")
2353 (vhdl-warning-when-idle "Option `vhdl-compiler' has changed format; customize again"))
2355 ;; option `vhdl-standard' changed format
2356 (unless (listp vhdl-standard)
2357 (setq vhdl-standard '(87 nil))
2358 (vhdl-warning-when-idle "Option `vhdl-standard' has changed format; customize again"))
2360 ;; option `vhdl-model-alist' changed format
2361 (when (= (length (car vhdl-model-alist)) 3)
2362 (let ((old-alist vhdl-model-alist)
2363 new-alist)
2364 (while old-alist
2365 (push (append (car old-alist) '("")) new-alist)
2366 (setq old-alist (cdr old-alist)))
2367 (setq vhdl-model-alist (nreverse new-alist)))
2368 (customize-save-variable 'vhdl-model-alist vhdl-model-alist))
2370 ;; option `vhdl-project-alist' changed format
2371 (when (= (length (car vhdl-project-alist)) 3)
2372 (let ((old-alist vhdl-project-alist)
2373 new-alist)
2374 (while old-alist
2375 (push (append (car old-alist) '("")) new-alist)
2376 (setq old-alist (cdr old-alist)))
2377 (setq vhdl-project-alist (nreverse new-alist)))
2378 (customize-save-variable 'vhdl-project-alist vhdl-project-alist))
2380 ;; option `vhdl-project-alist' changed format (3.31.1)
2381 (when (= (length (car vhdl-project-alist)) 4)
2382 (let ((old-alist vhdl-project-alist)
2383 new-alist elem)
2384 (while old-alist
2385 (setq elem (car old-alist))
2386 (setq new-alist
2387 (cons (list (nth 0 elem) (nth 1 elem) "" (nth 2 elem)
2388 nil "./" "work" "work/" "Makefile" (nth 3 elem))
2389 new-alist))
2390 (setq old-alist (cdr old-alist)))
2391 (setq vhdl-project-alist (nreverse new-alist)))
2392 (vhdl-warning-when-idle "Option `vhdl-project-alist' changed format; please re-customize"))
2394 ;; option `vhdl-project-alist' changed format (3.31.12)
2395 (when (= (length (car vhdl-project-alist)) 10)
2396 (let ((tmp-alist vhdl-project-alist))
2397 (while tmp-alist
2398 (setcdr (nthcdr 3 (car tmp-alist))
2399 (cons "" (nthcdr 4 (car tmp-alist))))
2400 (setq tmp-alist (cdr tmp-alist))))
2401 (customize-save-variable 'vhdl-project-alist vhdl-project-alist))
2403 ;; option `vhdl-compiler-alist' changed format (3.31.1)
2404 (when (= (length (car vhdl-compiler-alist)) 7)
2405 (let ((old-alist vhdl-compiler-alist)
2406 new-alist elem)
2407 (while old-alist
2408 (setq elem (car old-alist))
2409 (setq new-alist
2410 (cons (list (nth 0 elem) (nth 1 elem) "" "make -f \\1"
2411 (if (equal (nth 3 elem) "") nil (nth 3 elem))
2412 (nth 4 elem) "work/" "Makefile" (downcase (nth 0 elem))
2413 (nth 5 elem) (nth 6 elem) nil)
2414 new-alist))
2415 (setq old-alist (cdr old-alist)))
2416 (setq vhdl-compiler-alist (nreverse new-alist)))
2417 (vhdl-warning-when-idle "Option `vhdl-compiler-alist' changed; please reset and re-customize"))
2419 ;; option `vhdl-compiler-alist' changed format (3.31.10)
2420 (when (= (length (car vhdl-compiler-alist)) 12)
2421 (let ((tmp-alist vhdl-compiler-alist))
2422 (while tmp-alist
2423 (setcdr (nthcdr 4 (car tmp-alist))
2424 (cons "mkdir \\1" (nthcdr 5 (car tmp-alist))))
2425 (setq tmp-alist (cdr tmp-alist))))
2426 (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
2428 ;; option `vhdl-compiler-alist' changed format (3.31.11)
2429 (when (= (length (car vhdl-compiler-alist)) 13)
2430 (let ((tmp-alist vhdl-compiler-alist))
2431 (while tmp-alist
2432 (setcdr (nthcdr 3 (car tmp-alist))
2433 (cons "" (nthcdr 4 (car tmp-alist))))
2434 (setq tmp-alist (cdr tmp-alist))))
2435 (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
2437 ;; option `vhdl-compiler-alist' changed format (3.32.7)
2438 (when (= (length (nth 11 (car vhdl-compiler-alist))) 3)
2439 (let ((tmp-alist vhdl-compiler-alist))
2440 (while tmp-alist
2441 (setcdr (nthcdr 2 (nth 11 (car tmp-alist)))
2442 '(0 . nil))
2443 (setq tmp-alist (cdr tmp-alist))))
2444 (customize-save-variable 'vhdl-compiler-alist vhdl-compiler-alist))
2446 ;; option `vhdl-project': empty value changed from "" to nil (3.31.1)
2447 (when (equal vhdl-project "")
2448 (setq vhdl-project nil)
2449 (customize-save-variable 'vhdl-project vhdl-project))
2451 ;; option `vhdl-project-file-name': changed format (3.31.17 beta)
2452 (when (stringp vhdl-project-file-name)
2453 (setq vhdl-project-file-name (list vhdl-project-file-name))
2454 (customize-save-variable 'vhdl-project-file-name vhdl-project-file-name))
2456 ;; option `speedbar-indentation-width': introduced in speedbar 0.10
2457 (if (not (boundp 'speedbar-indentation-width))
2458 (defvar speedbar-indentation-width 2)
2459 ;; set default to 2 if not already customized
2460 (unless (get 'speedbar-indentation-width 'saved-value)
2461 (setq speedbar-indentation-width 2)))
2463 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2464 ;;; Help functions / inline substitutions / macros
2465 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2467 (defun vhdl-standard-p (standard)
2468 "Check if STANDARD is specified as used standard."
2469 (or (eq standard (car vhdl-standard))
2470 (memq standard (cadr vhdl-standard))))
2472 (defun vhdl-project-p (&optional warning)
2473 "Return non-nil if a project is displayed, i.e. directories or files are
2474 specified."
2475 (if (assoc vhdl-project vhdl-project-alist)
2476 vhdl-project
2477 (when (and vhdl-project warning)
2478 (vhdl-warning-when-idle "Project does not exist: \"%s\"" vhdl-project))
2479 nil))
2481 (defun vhdl-resolve-env-variable (string)
2482 "Resolve environment variables in STRING."
2483 (while (string-match "\\(.*\\)\\${?\\(\\(\\w\\|_\\)+\\)}?\\(.*\\)" string)
2484 (setq string (concat (match-string 1 string)
2485 (getenv (match-string 2 string))
2486 (match-string 4 string))))
2487 string)
2489 (defun vhdl-default-directory ()
2490 "Return the default directory of the current project or the directory of the
2491 current buffer if no project is defined."
2492 (if (vhdl-project-p)
2493 (expand-file-name (vhdl-resolve-env-variable
2494 (nth 1 (vhdl-aget vhdl-project-alist vhdl-project))))
2495 default-directory))
2497 (defmacro vhdl-prepare-search-1 (&rest body)
2498 "Enable case insensitive search and switch to syntax table that includes `_',
2499 then execute BODY, and finally restore the old environment. Used for
2500 consistent searching."
2501 `(let ((case-fold-search t)) ; case insensitive search
2502 ;; use extended syntax table
2503 (with-syntax-table vhdl-mode-ext-syntax-table
2504 ,@body)))
2506 (defmacro vhdl-prepare-search-2 (&rest body)
2507 "Enable case insensitive search, switch to syntax table that includes `_',
2508 arrange to ignore `intangible' overlays, then execute BODY, and finally restore
2509 the old environment. Used for consistent searching."
2510 `(let ((case-fold-search t) ; case insensitive search
2511 (current-syntax-table (syntax-table))
2512 (inhibit-point-motion-hooks t))
2513 ;; use extended syntax table
2514 (set-syntax-table vhdl-mode-ext-syntax-table)
2515 ;; execute BODY safely
2516 (unwind-protect
2517 (progn ,@body)
2518 ;; restore syntax table
2519 (set-syntax-table current-syntax-table))))
2521 (defmacro vhdl-visit-file (file-name issue-error &rest body)
2522 "Visit file FILE-NAME and execute BODY."
2523 `(if (null ,file-name)
2524 (progn ,@body)
2525 (unless (file-directory-p ,file-name)
2526 (let ((source-buffer (current-buffer))
2527 (visiting-buffer (find-buffer-visiting ,file-name))
2528 file-opened)
2529 (when (or (and visiting-buffer (set-buffer visiting-buffer))
2530 (condition-case ()
2531 (progn (set-buffer (create-file-buffer ,file-name))
2532 (setq file-opened t)
2533 (vhdl-insert-file-contents ,file-name)
2534 ;; FIXME: This modifies a global syntax-table!
2535 (modify-syntax-entry ?\- ". 12" (syntax-table))
2536 (modify-syntax-entry ?\n ">" (syntax-table))
2537 (modify-syntax-entry ?\^M ">" (syntax-table))
2538 (modify-syntax-entry ?_ "w" (syntax-table))
2540 (error
2541 (if ,issue-error
2542 (progn
2543 (when file-opened (kill-buffer (current-buffer)))
2544 (set-buffer source-buffer)
2545 (error "ERROR: File cannot be opened: \"%s\"" ,file-name))
2546 (vhdl-warning (format "File cannot be opened: \"%s\"" ,file-name) t)
2547 nil))))
2548 (condition-case info
2549 (progn ,@body)
2550 (error
2551 (if ,issue-error
2552 (progn
2553 (when file-opened (kill-buffer (current-buffer)))
2554 (set-buffer source-buffer)
2555 (error (cadr info)))
2556 (vhdl-warning (cadr info))))))
2557 (when file-opened (kill-buffer (current-buffer)))
2558 (set-buffer source-buffer)))))
2560 (defun vhdl-insert-file-contents (filename)
2561 "Nicked from `insert-file-contents-literally', but allow coding system
2562 conversion."
2563 (let ((format-alist nil)
2564 (after-insert-file-functions nil)
2565 (jka-compr-compression-info-list nil))
2566 (insert-file-contents filename t)))
2568 (defun vhdl-sort-alist (alist)
2569 "Sort ALIST."
2570 (sort alist (function (lambda (a b) (string< (car a) (car b))))))
2572 (defun vhdl-get-subdirs (directory)
2573 "Recursively get subdirectories of DIRECTORY."
2574 (let ((dir-list (list (file-name-as-directory directory)))
2575 file-list)
2576 (setq file-list (vhdl-directory-files directory t "\\w.*"))
2577 (while file-list
2578 (when (file-directory-p (car file-list))
2579 (setq dir-list (append dir-list (vhdl-get-subdirs (car file-list)))))
2580 (setq file-list (cdr file-list)))
2581 dir-list))
2583 (defun vhdl-aput-delete-if-nil (alist-symbol key &optional value)
2584 "As `aput', but delete key-value pair if VALUE is nil."
2585 (if value
2586 (vhdl-aput alist-symbol key value)
2587 (vhdl-adelete alist-symbol key)))
2589 (defun vhdl-delete (elt list)
2590 "Delete by side effect the first occurrence of ELT as a member of LIST."
2591 (push nil list)
2592 (let ((list1 list))
2593 (while (and (cdr list1) (not (equal elt (cadr list1))))
2594 (setq list1 (cdr list1)))
2595 (when list
2596 (setcdr list1 (cddr list1))))
2597 (cdr list))
2599 (declare-function speedbar-refresh "speedbar" (&optional arg))
2600 (declare-function speedbar-do-function-pointer "speedbar" ())
2602 (defun vhdl-speedbar-refresh (&optional key)
2603 "Refresh directory or project with name KEY."
2604 (when (and (boundp 'speedbar-frame)
2605 (frame-live-p speedbar-frame))
2606 (let ((pos (point))
2607 (last-frame (selected-frame)))
2608 (if (null key)
2609 (speedbar-refresh)
2610 (select-frame speedbar-frame)
2611 (when (save-excursion
2612 (goto-char (point-min))
2613 (re-search-forward (concat "^\\([0-9]+:\\s-*<\\)->\\s-+" key "$") nil t))
2614 (goto-char (match-end 1))
2615 (speedbar-do-function-pointer)
2616 (backward-char 2)
2617 (speedbar-do-function-pointer)
2618 (message "Refreshing speedbar...done"))
2619 (select-frame last-frame)))))
2621 (defun vhdl-show-messages ()
2622 "Get *Messages* buffer to show recent messages."
2623 (interactive)
2624 (display-buffer (if (featurep 'xemacs) " *Message-Log*" "*Messages*")))
2626 (defun vhdl-use-direct-instantiation ()
2627 "Return whether direct instantiation is used."
2628 (or (eq vhdl-use-direct-instantiation 'always)
2629 (and (eq vhdl-use-direct-instantiation 'standard)
2630 (not (vhdl-standard-p '87)))))
2632 (defun vhdl-max-marker (marker1 marker2)
2633 "Return larger marker."
2634 (if (> marker1 marker2) marker1 marker2))
2636 (defun vhdl-goto-marker (marker)
2637 "Goto marker in appropriate buffer."
2638 (when (markerp marker)
2639 (set-buffer (marker-buffer marker)))
2640 (goto-char marker))
2642 (defun vhdl-menu-split (list title)
2643 "Split menu LIST into several submenus, if number of
2644 elements > `vhdl-menu-max-size'."
2645 (if (> (length list) vhdl-menu-max-size)
2646 (let ((remain list)
2647 (result '())
2648 (sublist '())
2649 (menuno 1)
2650 (i 0))
2651 (while remain
2652 (push (car remain) sublist)
2653 (setq remain (cdr remain))
2654 (setq i (+ i 1))
2655 (if (= i vhdl-menu-max-size)
2656 (progn
2657 (push (cons (format "%s %s" title menuno)
2658 (nreverse sublist)) result)
2659 (setq i 0)
2660 (setq menuno (+ menuno 1))
2661 (setq sublist '()))))
2662 (and sublist
2663 (push (cons (format "%s %s" title menuno)
2664 (nreverse sublist)) result))
2665 (nreverse result))
2666 list))
2669 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2670 ;;; Bindings
2671 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2673 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2674 ;; Key bindings
2676 (defvar vhdl-template-map nil
2677 "Keymap for VHDL templates.")
2679 (defun vhdl-template-map-init ()
2680 "Initialize `vhdl-template-map'."
2681 (setq vhdl-template-map (make-sparse-keymap))
2682 ;; key bindings for VHDL templates
2683 (define-key vhdl-template-map "al" 'vhdl-template-alias)
2684 (define-key vhdl-template-map "ar" 'vhdl-template-architecture)
2685 (define-key vhdl-template-map "at" 'vhdl-template-assert)
2686 (define-key vhdl-template-map "ad" 'vhdl-template-attribute-decl)
2687 (define-key vhdl-template-map "as" 'vhdl-template-attribute-spec)
2688 (define-key vhdl-template-map "bl" 'vhdl-template-block)
2689 (define-key vhdl-template-map "ca" 'vhdl-template-case-is)
2690 (define-key vhdl-template-map "cd" 'vhdl-template-component-decl)
2691 (define-key vhdl-template-map "ci" 'vhdl-template-component-inst)
2692 (define-key vhdl-template-map "cs" 'vhdl-template-conditional-signal-asst)
2693 (define-key vhdl-template-map "Cb" 'vhdl-template-block-configuration)
2694 (define-key vhdl-template-map "Cc" 'vhdl-template-component-conf)
2695 (define-key vhdl-template-map "Cd" 'vhdl-template-configuration-decl)
2696 (define-key vhdl-template-map "Cs" 'vhdl-template-configuration-spec)
2697 (define-key vhdl-template-map "co" 'vhdl-template-constant)
2698 (define-key vhdl-template-map "ct" 'vhdl-template-context)
2699 (define-key vhdl-template-map "di" 'vhdl-template-disconnect)
2700 (define-key vhdl-template-map "el" 'vhdl-template-else)
2701 (define-key vhdl-template-map "ei" 'vhdl-template-elsif)
2702 (define-key vhdl-template-map "en" 'vhdl-template-entity)
2703 (define-key vhdl-template-map "ex" 'vhdl-template-exit)
2704 (define-key vhdl-template-map "fi" 'vhdl-template-file)
2705 (define-key vhdl-template-map "fg" 'vhdl-template-for-generate)
2706 (define-key vhdl-template-map "fl" 'vhdl-template-for-loop)
2707 (define-key vhdl-template-map "\C-f" 'vhdl-template-footer)
2708 (define-key vhdl-template-map "fb" 'vhdl-template-function-body)
2709 (define-key vhdl-template-map "fd" 'vhdl-template-function-decl)
2710 (define-key vhdl-template-map "ge" 'vhdl-template-generic)
2711 (define-key vhdl-template-map "gd" 'vhdl-template-group-decl)
2712 (define-key vhdl-template-map "gt" 'vhdl-template-group-template)
2713 (define-key vhdl-template-map "\C-h" 'vhdl-template-header)
2714 (define-key vhdl-template-map "ig" 'vhdl-template-if-generate)
2715 (define-key vhdl-template-map "it" 'vhdl-template-if-then)
2716 (define-key vhdl-template-map "li" 'vhdl-template-library)
2717 (define-key vhdl-template-map "lo" 'vhdl-template-bare-loop)
2718 (define-key vhdl-template-map "\C-m" 'vhdl-template-modify)
2719 (define-key vhdl-template-map "\C-t" 'vhdl-template-insert-date)
2720 (define-key vhdl-template-map "ma" 'vhdl-template-map)
2721 (define-key vhdl-template-map "ne" 'vhdl-template-next)
2722 (define-key vhdl-template-map "ot" 'vhdl-template-others)
2723 (define-key vhdl-template-map "Pd" 'vhdl-template-package-decl)
2724 (define-key vhdl-template-map "Pb" 'vhdl-template-package-body)
2725 (define-key vhdl-template-map "(" 'vhdl-template-paired-parens)
2726 (define-key vhdl-template-map "po" 'vhdl-template-port)
2727 (define-key vhdl-template-map "pb" 'vhdl-template-procedure-body)
2728 (define-key vhdl-template-map "pd" 'vhdl-template-procedure-decl)
2729 (define-key vhdl-template-map "pc" 'vhdl-template-process-comb)
2730 (define-key vhdl-template-map "ps" 'vhdl-template-process-seq)
2731 (define-key vhdl-template-map "rp" 'vhdl-template-report)
2732 (define-key vhdl-template-map "rt" 'vhdl-template-return)
2733 (define-key vhdl-template-map "ss" 'vhdl-template-selected-signal-asst)
2734 (define-key vhdl-template-map "si" 'vhdl-template-signal)
2735 (define-key vhdl-template-map "su" 'vhdl-template-subtype)
2736 (define-key vhdl-template-map "ty" 'vhdl-template-type)
2737 (define-key vhdl-template-map "us" 'vhdl-template-use)
2738 (define-key vhdl-template-map "va" 'vhdl-template-variable)
2739 (define-key vhdl-template-map "wa" 'vhdl-template-wait)
2740 (define-key vhdl-template-map "wl" 'vhdl-template-while-loop)
2741 (define-key vhdl-template-map "wi" 'vhdl-template-with)
2742 (define-key vhdl-template-map "wc" 'vhdl-template-clocked-wait)
2743 (define-key vhdl-template-map "\C-pb" 'vhdl-template-package-numeric-bit)
2744 (define-key vhdl-template-map "\C-pn" 'vhdl-template-package-numeric-std)
2745 (define-key vhdl-template-map "\C-ps" 'vhdl-template-package-std-logic-1164)
2746 (define-key vhdl-template-map "\C-pA" 'vhdl-template-package-std-logic-arith)
2747 (define-key vhdl-template-map "\C-pM" 'vhdl-template-package-std-logic-misc)
2748 (define-key vhdl-template-map "\C-pS" 'vhdl-template-package-std-logic-signed)
2749 (define-key vhdl-template-map "\C-pT" 'vhdl-template-package-std-logic-textio)
2750 (define-key vhdl-template-map "\C-pU" 'vhdl-template-package-std-logic-unsigned)
2751 (define-key vhdl-template-map "\C-pt" 'vhdl-template-package-textio)
2752 (define-key vhdl-template-map "\C-dn" 'vhdl-template-directive-translate-on)
2753 (define-key vhdl-template-map "\C-df" 'vhdl-template-directive-translate-off)
2754 (define-key vhdl-template-map "\C-dN" 'vhdl-template-directive-synthesis-on)
2755 (define-key vhdl-template-map "\C-dF" 'vhdl-template-directive-synthesis-off)
2756 (define-key vhdl-template-map "\C-q" 'vhdl-template-search-prompt)
2757 (when (vhdl-standard-p 'ams)
2758 (define-key vhdl-template-map "br" 'vhdl-template-break)
2759 (define-key vhdl-template-map "cu" 'vhdl-template-case-use)
2760 (define-key vhdl-template-map "iu" 'vhdl-template-if-use)
2761 (define-key vhdl-template-map "lm" 'vhdl-template-limit)
2762 (define-key vhdl-template-map "na" 'vhdl-template-nature)
2763 (define-key vhdl-template-map "pa" 'vhdl-template-procedural)
2764 (define-key vhdl-template-map "qf" 'vhdl-template-quantity-free)
2765 (define-key vhdl-template-map "qb" 'vhdl-template-quantity-branch)
2766 (define-key vhdl-template-map "qs" 'vhdl-template-quantity-source)
2767 (define-key vhdl-template-map "sn" 'vhdl-template-subnature)
2768 (define-key vhdl-template-map "te" 'vhdl-template-terminal)
2770 (when (vhdl-standard-p 'math)
2771 (define-key vhdl-template-map "\C-pc" 'vhdl-template-package-math-complex)
2772 (define-key vhdl-template-map "\C-pr" 'vhdl-template-package-math-real)
2775 ;; initialize template map for VHDL Mode
2776 (vhdl-template-map-init)
2778 (defun vhdl-function-name (prefix string &optional postfix)
2779 "Generate a Lisp function name.
2780 PREFIX, STRING and optional POSTFIX are concatenated by `-' and spaces in
2781 STRING are replaced by `-' and substrings are converted to lower case."
2782 (let ((name prefix))
2783 (while (string-match "\\(\\w+\\)\\s-*\\(.*\\)" string)
2784 (setq name
2785 (concat name "-" (downcase (substring string 0 (match-end 1)))))
2786 (setq string (substring string (match-beginning 2))))
2787 (when postfix (setq name (concat name "-" postfix)))
2788 (intern name)))
2790 (defvar vhdl-model-map nil
2791 "Keymap for VHDL models.")
2793 (defun vhdl-model-map-init ()
2794 "Initialize `vhdl-model-map'."
2795 (setq vhdl-model-map (make-sparse-keymap))
2796 ;; key bindings for VHDL models
2797 (let ((model-alist vhdl-model-alist) model)
2798 (while model-alist
2799 (setq model (car model-alist))
2800 (define-key vhdl-model-map (nth 2 model)
2801 (vhdl-function-name "vhdl-model" (nth 0 model)))
2802 (setq model-alist (cdr model-alist)))))
2804 ;; initialize user model map for VHDL Mode
2805 (vhdl-model-map-init)
2807 (defvar vhdl-mode-map nil
2808 "Keymap for VHDL Mode.")
2810 (defun vhdl-mode-map-init ()
2811 "Initialize `vhdl-mode-map'."
2812 (setq vhdl-mode-map (make-sparse-keymap))
2813 ;; template key bindings
2814 (define-key vhdl-mode-map "\C-c\C-t" vhdl-template-map)
2815 ;; model key bindings
2816 (define-key vhdl-mode-map "\C-c\C-m" vhdl-model-map)
2817 ;; standard key bindings
2818 (define-key vhdl-mode-map "\M-a" 'vhdl-beginning-of-statement)
2819 (define-key vhdl-mode-map "\M-e" 'vhdl-end-of-statement)
2820 (define-key vhdl-mode-map "\M-\C-f" 'vhdl-forward-sexp)
2821 (define-key vhdl-mode-map "\M-\C-b" 'vhdl-backward-sexp)
2822 (define-key vhdl-mode-map "\M-\C-u" 'vhdl-backward-up-list)
2823 (define-key vhdl-mode-map "\M-\C-a" 'vhdl-backward-same-indent)
2824 (define-key vhdl-mode-map "\M-\C-e" 'vhdl-forward-same-indent)
2825 (unless (featurep 'xemacs) ; would override `M-backspace' in XEmacs
2826 (define-key vhdl-mode-map "\M-\C-h" 'vhdl-mark-defun))
2827 (define-key vhdl-mode-map "\M-\C-q" 'vhdl-indent-sexp)
2828 (define-key vhdl-mode-map "\M-^" 'vhdl-delete-indentation)
2829 ;; mode specific key bindings
2830 (define-key vhdl-mode-map "\C-c\C-m\C-e" 'vhdl-electric-mode)
2831 (define-key vhdl-mode-map "\C-c\C-m\C-s" 'vhdl-stutter-mode)
2832 (define-key vhdl-mode-map "\C-c\C-s\C-p" 'vhdl-set-project)
2833 (define-key vhdl-mode-map "\C-c\C-p\C-d" 'vhdl-duplicate-project)
2834 (define-key vhdl-mode-map "\C-c\C-p\C-m" 'vhdl-import-project)
2835 (define-key vhdl-mode-map "\C-c\C-p\C-x" 'vhdl-export-project)
2836 (define-key vhdl-mode-map "\C-c\C-s\C-k" 'vhdl-set-compiler)
2837 (define-key vhdl-mode-map "\C-c\C-k" 'vhdl-compile)
2838 (define-key vhdl-mode-map "\C-c\M-\C-k" 'vhdl-make)
2839 (define-key vhdl-mode-map "\C-c\M-k" 'vhdl-generate-makefile)
2840 (define-key vhdl-mode-map "\C-c\C-p\C-w" 'vhdl-port-copy)
2841 (define-key vhdl-mode-map "\C-c\C-p\M-w" 'vhdl-port-copy)
2842 (define-key vhdl-mode-map "\C-c\C-p\C-e" 'vhdl-port-paste-entity)
2843 (define-key vhdl-mode-map "\C-c\C-p\C-c" 'vhdl-port-paste-component)
2844 (define-key vhdl-mode-map "\C-c\C-p\C-i" 'vhdl-port-paste-instance)
2845 (define-key vhdl-mode-map "\C-c\C-p\C-s" 'vhdl-port-paste-signals)
2846 (define-key vhdl-mode-map "\C-c\C-p\M-c" 'vhdl-port-paste-constants)
2847 (if (featurep 'xemacs) ; `... C-g' not allowed in XEmacs
2848 (define-key vhdl-mode-map "\C-c\C-p\M-g" 'vhdl-port-paste-generic-map)
2849 (define-key vhdl-mode-map "\C-c\C-p\C-g" 'vhdl-port-paste-generic-map))
2850 (define-key vhdl-mode-map "\C-c\C-p\C-z" 'vhdl-port-paste-initializations)
2851 (define-key vhdl-mode-map "\C-c\C-p\C-t" 'vhdl-port-paste-testbench)
2852 (define-key vhdl-mode-map "\C-c\C-p\C-f" 'vhdl-port-flatten)
2853 (define-key vhdl-mode-map "\C-c\C-p\C-r" 'vhdl-port-reverse-direction)
2854 (define-key vhdl-mode-map "\C-c\C-s\C-w" 'vhdl-subprog-copy)
2855 (define-key vhdl-mode-map "\C-c\C-s\M-w" 'vhdl-subprog-copy)
2856 (define-key vhdl-mode-map "\C-c\C-s\C-d" 'vhdl-subprog-paste-declaration)
2857 (define-key vhdl-mode-map "\C-c\C-s\C-b" 'vhdl-subprog-paste-body)
2858 (define-key vhdl-mode-map "\C-c\C-s\C-c" 'vhdl-subprog-paste-call)
2859 (define-key vhdl-mode-map "\C-c\C-s\C-f" 'vhdl-subprog-flatten)
2860 (define-key vhdl-mode-map "\C-c\C-m\C-n" 'vhdl-compose-new-component)
2861 (define-key vhdl-mode-map "\C-c\C-m\C-p" 'vhdl-compose-place-component)
2862 (define-key vhdl-mode-map "\C-c\C-m\C-w" 'vhdl-compose-wire-components)
2863 (define-key vhdl-mode-map "\C-c\C-m\C-f" 'vhdl-compose-configuration)
2864 (define-key vhdl-mode-map "\C-c\C-m\C-k" 'vhdl-compose-components-package)
2865 (define-key vhdl-mode-map "\C-c\C-c" 'vhdl-comment-uncomment-region)
2866 (define-key vhdl-mode-map "\C-c-" 'vhdl-comment-append-inline)
2867 (define-key vhdl-mode-map "\C-c\M--" 'vhdl-comment-display-line)
2868 (define-key vhdl-mode-map "\C-c\C-i\C-l" 'indent-according-to-mode)
2869 (define-key vhdl-mode-map "\C-c\C-i\C-g" 'vhdl-indent-group)
2870 (define-key vhdl-mode-map "\M-\C-\\" 'vhdl-indent-region)
2871 (define-key vhdl-mode-map "\C-c\C-i\C-b" 'vhdl-indent-buffer)
2872 (define-key vhdl-mode-map "\C-c\C-a\C-g" 'vhdl-align-group)
2873 (define-key vhdl-mode-map "\C-c\C-a\C-a" 'vhdl-align-group)
2874 (define-key vhdl-mode-map "\C-c\C-a\C-i" 'vhdl-align-same-indent)
2875 (define-key vhdl-mode-map "\C-c\C-a\C-l" 'vhdl-align-list)
2876 (define-key vhdl-mode-map "\C-c\C-a\C-d" 'vhdl-align-declarations)
2877 (define-key vhdl-mode-map "\C-c\C-a\M-a" 'vhdl-align-region)
2878 (define-key vhdl-mode-map "\C-c\C-a\C-b" 'vhdl-align-buffer)
2879 (define-key vhdl-mode-map "\C-c\C-a\C-c" 'vhdl-align-inline-comment-group)
2880 (define-key vhdl-mode-map "\C-c\C-a\M-c" 'vhdl-align-inline-comment-region)
2881 (define-key vhdl-mode-map "\C-c\C-f\C-l" 'vhdl-fill-list)
2882 (define-key vhdl-mode-map "\C-c\C-f\C-f" 'vhdl-fill-list)
2883 (define-key vhdl-mode-map "\C-c\C-f\C-g" 'vhdl-fill-group)
2884 (define-key vhdl-mode-map "\C-c\C-f\C-i" 'vhdl-fill-same-indent)
2885 (define-key vhdl-mode-map "\C-c\C-f\M-f" 'vhdl-fill-region)
2886 (define-key vhdl-mode-map "\C-c\C-l\C-w" 'vhdl-line-kill)
2887 (define-key vhdl-mode-map "\C-c\C-l\M-w" 'vhdl-line-copy)
2888 (define-key vhdl-mode-map "\C-c\C-l\C-y" 'vhdl-line-yank)
2889 (define-key vhdl-mode-map "\C-c\C-l\t" 'vhdl-line-expand)
2890 (define-key vhdl-mode-map "\C-c\C-l\C-n" 'vhdl-line-transpose-next)
2891 (define-key vhdl-mode-map "\C-c\C-l\C-p" 'vhdl-line-transpose-previous)
2892 (define-key vhdl-mode-map "\C-c\C-l\C-o" 'vhdl-line-open)
2893 (define-key vhdl-mode-map "\C-c\C-l\C-g" 'goto-line)
2894 (define-key vhdl-mode-map "\C-c\C-l\C-c" 'vhdl-comment-uncomment-line)
2895 (define-key vhdl-mode-map "\C-c\C-x\C-s" 'vhdl-fix-statement-region)
2896 (define-key vhdl-mode-map "\C-c\C-x\M-s" 'vhdl-fix-statement-buffer)
2897 (define-key vhdl-mode-map "\C-c\C-x\C-p" 'vhdl-fix-clause)
2898 (define-key vhdl-mode-map "\C-c\C-x\M-c" 'vhdl-fix-case-region)
2899 (define-key vhdl-mode-map "\C-c\C-x\C-c" 'vhdl-fix-case-buffer)
2900 (define-key vhdl-mode-map "\C-c\C-x\M-w" 'vhdl-fixup-whitespace-region)
2901 (define-key vhdl-mode-map "\C-c\C-x\C-w" 'vhdl-fixup-whitespace-buffer)
2902 (define-key vhdl-mode-map "\C-c\M-b" 'vhdl-beautify-region)
2903 (define-key vhdl-mode-map "\C-c\C-b" 'vhdl-beautify-buffer)
2904 (define-key vhdl-mode-map "\C-c\C-u\C-s" 'vhdl-update-sensitivity-list-process)
2905 (define-key vhdl-mode-map "\C-c\C-u\M-s" 'vhdl-update-sensitivity-list-buffer)
2906 (define-key vhdl-mode-map "\C-c\C-i\C-f" 'vhdl-fontify-buffer)
2907 (define-key vhdl-mode-map "\C-c\C-i\C-s" 'vhdl-statistics-buffer)
2908 (define-key vhdl-mode-map "\C-c\M-m" 'vhdl-show-messages)
2909 (define-key vhdl-mode-map "\C-c\C-h" 'vhdl-doc-mode)
2910 (define-key vhdl-mode-map "\C-c\C-v" 'vhdl-version)
2911 (define-key vhdl-mode-map "\M-\t" 'insert-tab)
2912 ;; insert commands bindings
2913 (define-key vhdl-mode-map "\C-c\C-i\C-t" 'vhdl-template-insert-construct)
2914 (define-key vhdl-mode-map "\C-c\C-i\C-p" 'vhdl-template-insert-package)
2915 (define-key vhdl-mode-map "\C-c\C-i\C-d" 'vhdl-template-insert-directive)
2916 (define-key vhdl-mode-map "\C-c\C-i\C-m" 'vhdl-model-insert)
2917 ;; electric key bindings
2918 (define-key vhdl-mode-map " " 'vhdl-electric-space)
2919 (when vhdl-intelligent-tab
2920 (define-key vhdl-mode-map "\t" 'vhdl-electric-tab))
2921 (define-key vhdl-mode-map "\r" 'vhdl-electric-return)
2922 (define-key vhdl-mode-map "-" 'vhdl-electric-dash)
2923 (define-key vhdl-mode-map "[" 'vhdl-electric-open-bracket)
2924 (define-key vhdl-mode-map "]" 'vhdl-electric-close-bracket)
2925 (define-key vhdl-mode-map "'" 'vhdl-electric-quote)
2926 (define-key vhdl-mode-map ";" 'vhdl-electric-semicolon)
2927 (define-key vhdl-mode-map "," 'vhdl-electric-comma)
2928 (define-key vhdl-mode-map "." 'vhdl-electric-period)
2929 (when (vhdl-standard-p 'ams)
2930 (define-key vhdl-mode-map "=" 'vhdl-electric-equal)))
2932 ;; initialize mode map for VHDL Mode
2933 (vhdl-mode-map-init)
2935 ;; define special minibuffer keymap for enabling word completion in minibuffer
2936 ;; (useful in template generator prompts)
2937 (defvar vhdl-minibuffer-local-map
2938 (let ((map (make-sparse-keymap)))
2939 (set-keymap-parent map minibuffer-local-map)
2940 (when vhdl-word-completion-in-minibuffer
2941 (define-key map "\t" 'vhdl-minibuffer-tab))
2942 map)
2943 "Keymap for minibuffer used in VHDL Mode.")
2945 ;; set up electric character functions to work with
2946 ;; `delete-selection-mode' (Emacs) and `pending-delete-mode' (XEmacs)
2947 (mapc
2948 (function
2949 (lambda (sym)
2950 (put sym 'delete-selection t) ; for `delete-selection-mode' (Emacs)
2951 (put sym 'pending-delete t))) ; for `pending-delete-mode' (XEmacs)
2952 '(vhdl-electric-space
2953 vhdl-electric-tab
2954 vhdl-electric-return
2955 vhdl-electric-dash
2956 vhdl-electric-open-bracket
2957 vhdl-electric-close-bracket
2958 vhdl-electric-quote
2959 vhdl-electric-semicolon
2960 vhdl-electric-comma
2961 vhdl-electric-period
2962 vhdl-electric-equal))
2964 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2965 ;; Syntax table
2967 (defvar vhdl-mode-syntax-table
2968 (let ((st (make-syntax-table)))
2969 ;; define punctuation
2970 (modify-syntax-entry ?\# "." st)
2971 (modify-syntax-entry ?\$ "." st)
2972 (modify-syntax-entry ?\% "." st)
2973 (modify-syntax-entry ?\& "." st)
2974 (modify-syntax-entry ?\' "." st)
2975 (modify-syntax-entry ?\* "." st)
2976 (modify-syntax-entry ?\+ "." st)
2977 (modify-syntax-entry ?\. "." st)
2978 ;;; (modify-syntax-entry ?\/ "." st)
2979 (modify-syntax-entry ?\: "." st)
2980 (modify-syntax-entry ?\; "." st)
2981 (modify-syntax-entry ?\< "." st)
2982 (modify-syntax-entry ?\= "." st)
2983 (modify-syntax-entry ?\> "." st)
2984 (modify-syntax-entry ?\\ "." st)
2985 (modify-syntax-entry ?\| "." st)
2986 ;; define string
2987 (modify-syntax-entry ?\" "\"" st)
2988 ;; define underscore
2989 (modify-syntax-entry ?\_ (if vhdl-underscore-is-part-of-word "w" "_") st)
2990 ;; single-line comments
2991 (modify-syntax-entry ?\- ". 12b" st)
2992 ;; multi-line comments
2993 (modify-syntax-entry ?\/ ". 14b" st)
2994 (modify-syntax-entry ?* ". 23" st)
2995 (modify-syntax-entry ?\n "> b" st)
2996 (modify-syntax-entry ?\^M "> b" st)
2997 ;; define parentheses to match
2998 (modify-syntax-entry ?\( "()" st)
2999 (modify-syntax-entry ?\) ")(" st)
3000 (modify-syntax-entry ?\[ "(]" st)
3001 (modify-syntax-entry ?\] ")[" st)
3002 (modify-syntax-entry ?\{ "(}" st)
3003 (modify-syntax-entry ?\} "){" st)
3005 "Syntax table used in `vhdl-mode' buffers.")
3007 (defvar vhdl-mode-ext-syntax-table
3008 ;; Extended syntax table including '_' (for simpler search regexps).
3009 (let ((st (copy-syntax-table vhdl-mode-syntax-table)))
3010 (modify-syntax-entry ?_ "w" st)
3012 "Syntax table extended by `_' used in `vhdl-mode' buffers.")
3014 (defvar vhdl-syntactic-context nil
3015 "Buffer local variable containing syntactic analysis list.")
3016 (make-variable-buffer-local 'vhdl-syntactic-context)
3018 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3019 ;; Abbrev hook bindings
3021 (defvar vhdl-mode-abbrev-table nil
3022 "Abbrev table to use in `vhdl-mode' buffers.")
3024 (defun vhdl-mode-abbrev-table-init ()
3025 "Initialize `vhdl-mode-abbrev-table'."
3026 (define-abbrev-table 'vhdl-mode-abbrev-table
3027 (append
3028 (when (memq 'vhdl vhdl-electric-keywords)
3029 ;; VHDL'02 keywords
3030 (mapcar (if (featurep 'xemacs)
3031 (lambda (x) (list (car x) "" (cdr x) 0))
3032 (lambda (x) (list (car x) "" (cdr x) 0 'system)))
3034 ("--" . vhdl-template-display-comment-hook)
3035 ("abs" . vhdl-template-default-hook)
3036 ("access" . vhdl-template-default-hook)
3037 ("after" . vhdl-template-default-hook)
3038 ("alias" . vhdl-template-alias-hook)
3039 ("all" . vhdl-template-default-hook)
3040 ("and" . vhdl-template-default-hook)
3041 ("arch" . vhdl-template-architecture-hook)
3042 ("architecture" . vhdl-template-architecture-hook)
3043 ("array" . vhdl-template-default-hook)
3044 ("assert" . vhdl-template-assert-hook)
3045 ("attr" . vhdl-template-attribute-hook)
3046 ("attribute" . vhdl-template-attribute-hook)
3047 ("begin" . vhdl-template-default-indent-hook)
3048 ("block" . vhdl-template-block-hook)
3049 ("body" . vhdl-template-default-hook)
3050 ("buffer" . vhdl-template-default-hook)
3051 ("bus" . vhdl-template-default-hook)
3052 ("case" . vhdl-template-case-hook)
3053 ("comp" . vhdl-template-component-hook)
3054 ("component" . vhdl-template-component-hook)
3055 ("cond" . vhdl-template-conditional-signal-asst-hook)
3056 ("conditional" . vhdl-template-conditional-signal-asst-hook)
3057 ("conf" . vhdl-template-configuration-hook)
3058 ("configuration" . vhdl-template-configuration-hook)
3059 ("cons" . vhdl-template-constant-hook)
3060 ("constant" . vhdl-template-constant-hook)
3061 ("context" . vhdl-template-context-hook)
3062 ("disconnect" . vhdl-template-disconnect-hook)
3063 ("downto" . vhdl-template-default-hook)
3064 ("else" . vhdl-template-else-hook)
3065 ("elseif" . vhdl-template-elsif-hook)
3066 ("elsif" . vhdl-template-elsif-hook)
3067 ("end" . vhdl-template-default-indent-hook)
3068 ("entity" . vhdl-template-entity-hook)
3069 ("exit" . vhdl-template-exit-hook)
3070 ("file" . vhdl-template-file-hook)
3071 ("for" . vhdl-template-for-hook)
3072 ("func" . vhdl-template-function-hook)
3073 ("function" . vhdl-template-function-hook)
3074 ("generic" . vhdl-template-generic-hook)
3075 ("group" . vhdl-template-group-hook)
3076 ("guarded" . vhdl-template-default-hook)
3077 ("if" . vhdl-template-if-hook)
3078 ("impure" . vhdl-template-default-hook)
3079 ("in" . vhdl-template-default-hook)
3080 ("inertial" . vhdl-template-default-hook)
3081 ("inout" . vhdl-template-default-hook)
3082 ("inst" . vhdl-template-instance-hook)
3083 ("instance" . vhdl-template-instance-hook)
3084 ("is" . vhdl-template-default-hook)
3085 ("label" . vhdl-template-default-hook)
3086 ("library" . vhdl-template-library-hook)
3087 ("linkage" . vhdl-template-default-hook)
3088 ("literal" . vhdl-template-default-hook)
3089 ("loop" . vhdl-template-bare-loop-hook)
3090 ("map" . vhdl-template-map-hook)
3091 ("mod" . vhdl-template-default-hook)
3092 ("nand" . vhdl-template-default-hook)
3093 ("new" . vhdl-template-default-hook)
3094 ("next" . vhdl-template-next-hook)
3095 ("nor" . vhdl-template-default-hook)
3096 ("not" . vhdl-template-default-hook)
3097 ("null" . vhdl-template-default-hook)
3098 ("of" . vhdl-template-default-hook)
3099 ("on" . vhdl-template-default-hook)
3100 ("open" . vhdl-template-default-hook)
3101 ("or" . vhdl-template-default-hook)
3102 ("others" . vhdl-template-others-hook)
3103 ("out" . vhdl-template-default-hook)
3104 ("pack" . vhdl-template-package-hook)
3105 ("package" . vhdl-template-package-hook)
3106 ("port" . vhdl-template-port-hook)
3107 ("postponed" . vhdl-template-default-hook)
3108 ("procedure" . vhdl-template-procedure-hook)
3109 ("process" . vhdl-template-process-hook)
3110 ("pure" . vhdl-template-default-hook)
3111 ("range" . vhdl-template-default-hook)
3112 ("record" . vhdl-template-default-hook)
3113 ("register" . vhdl-template-default-hook)
3114 ("reject" . vhdl-template-default-hook)
3115 ("rem" . vhdl-template-default-hook)
3116 ("report" . vhdl-template-report-hook)
3117 ("return" . vhdl-template-return-hook)
3118 ("rol" . vhdl-template-default-hook)
3119 ("ror" . vhdl-template-default-hook)
3120 ("select" . vhdl-template-selected-signal-asst-hook)
3121 ("severity" . vhdl-template-default-hook)
3122 ("shared" . vhdl-template-default-hook)
3123 ("sig" . vhdl-template-signal-hook)
3124 ("signal" . vhdl-template-signal-hook)
3125 ("sla" . vhdl-template-default-hook)
3126 ("sll" . vhdl-template-default-hook)
3127 ("sra" . vhdl-template-default-hook)
3128 ("srl" . vhdl-template-default-hook)
3129 ("subtype" . vhdl-template-subtype-hook)
3130 ("then" . vhdl-template-default-hook)
3131 ("to" . vhdl-template-default-hook)
3132 ("transport" . vhdl-template-default-hook)
3133 ("type" . vhdl-template-type-hook)
3134 ("unaffected" . vhdl-template-default-hook)
3135 ("units" . vhdl-template-default-hook)
3136 ("until" . vhdl-template-default-hook)
3137 ("use" . vhdl-template-use-hook)
3138 ("var" . vhdl-template-variable-hook)
3139 ("variable" . vhdl-template-variable-hook)
3140 ("wait" . vhdl-template-wait-hook)
3141 ("when" . vhdl-template-when-hook)
3142 ("while" . vhdl-template-while-loop-hook)
3143 ("with" . vhdl-template-with-hook)
3144 ("xnor" . vhdl-template-default-hook)
3145 ("xor" . vhdl-template-default-hook)
3147 ;; VHDL-AMS keywords
3148 (when (and (memq 'vhdl vhdl-electric-keywords) (vhdl-standard-p 'ams))
3149 (mapcar (if (featurep 'xemacs)
3150 (lambda (x) (list (car x) "" (cdr x) 0))
3151 (lambda (x) (list (car x) "" (cdr x) 0 'system)))
3153 ("across" . vhdl-template-default-hook)
3154 ("break" . vhdl-template-break-hook)
3155 ("limit" . vhdl-template-limit-hook)
3156 ("nature" . vhdl-template-nature-hook)
3157 ("noise" . vhdl-template-default-hook)
3158 ("procedural" . vhdl-template-procedural-hook)
3159 ("quantity" . vhdl-template-quantity-hook)
3160 ("reference" . vhdl-template-default-hook)
3161 ("spectrum" . vhdl-template-default-hook)
3162 ("subnature" . vhdl-template-subnature-hook)
3163 ("terminal" . vhdl-template-terminal-hook)
3164 ("through" . vhdl-template-default-hook)
3165 ("tolerance" . vhdl-template-default-hook)
3167 ;; user model keywords
3168 (when (memq 'user vhdl-electric-keywords)
3169 (let (abbrev-list keyword)
3170 (dolist (elem vhdl-model-alist)
3171 (setq keyword (nth 3 elem))
3172 (unless (equal keyword "")
3173 (push (list keyword ""
3174 (vhdl-function-name
3175 "vhdl-model" (nth 0 elem) "hook") 0 'system)
3176 abbrev-list)))
3177 abbrev-list)))))
3179 ;; initialize abbrev table for VHDL Mode
3180 (vhdl-mode-abbrev-table-init)
3182 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3183 ;; Template completion lists
3185 (defvar vhdl-template-construct-alist nil
3186 "List of built-in construct templates.")
3188 (defun vhdl-template-construct-alist-init ()
3189 "Initialize `vhdl-template-construct-alist'."
3190 (setq
3191 vhdl-template-construct-alist
3192 (append
3194 ("alias declaration" vhdl-template-alias)
3195 ("architecture body" vhdl-template-architecture)
3196 ("assertion" vhdl-template-assert)
3197 ("attribute declaration" vhdl-template-attribute-decl)
3198 ("attribute specification" vhdl-template-attribute-spec)
3199 ("block configuration" vhdl-template-block-configuration)
3200 ("block statement" vhdl-template-block)
3201 ("case statement" vhdl-template-case-is)
3202 ("component configuration" vhdl-template-component-conf)
3203 ("component declaration" vhdl-template-component-decl)
3204 ("component instantiation statement" vhdl-template-component-inst)
3205 ("conditional signal assignment" vhdl-template-conditional-signal-asst)
3206 ("configuration declaration" vhdl-template-configuration-decl)
3207 ("configuration specification" vhdl-template-configuration-spec)
3208 ("constant declaration" vhdl-template-constant)
3209 ("context declaration" vhdl-template-context)
3210 ("disconnection specification" vhdl-template-disconnect)
3211 ("entity declaration" vhdl-template-entity)
3212 ("exit statement" vhdl-template-exit)
3213 ("file declaration" vhdl-template-file)
3214 ("generate statement" vhdl-template-generate)
3215 ("generic clause" vhdl-template-generic)
3216 ("group declaration" vhdl-template-group-decl)
3217 ("group template declaration" vhdl-template-group-template)
3218 ("if statement" vhdl-template-if-then)
3219 ("library clause" vhdl-template-library)
3220 ("loop statement" vhdl-template-loop)
3221 ("next statement" vhdl-template-next)
3222 ("package declaration" vhdl-template-package-decl)
3223 ("package body" vhdl-template-package-body)
3224 ("port clause" vhdl-template-port)
3225 ("process statement" vhdl-template-process)
3226 ("report statement" vhdl-template-report)
3227 ("return statement" vhdl-template-return)
3228 ("selected signal assignment" vhdl-template-selected-signal-asst)
3229 ("signal declaration" vhdl-template-signal)
3230 ("subprogram declaration" vhdl-template-subprogram-decl)
3231 ("subprogram body" vhdl-template-subprogram-body)
3232 ("subtype declaration" vhdl-template-subtype)
3233 ("type declaration" vhdl-template-type)
3234 ("use clause" vhdl-template-use)
3235 ("variable declaration" vhdl-template-variable)
3236 ("wait statement" vhdl-template-wait)
3238 (when (vhdl-standard-p 'ams)
3240 ("break statement" vhdl-template-break)
3241 ("nature declaration" vhdl-template-nature)
3242 ("quantity declaration" vhdl-template-quantity)
3243 ("simultaneous case statement" vhdl-template-case-use)
3244 ("simultaneous if statement" vhdl-template-if-use)
3245 ("simultaneous procedural statement" vhdl-template-procedural)
3246 ("step limit specification" vhdl-template-limit)
3247 ("subnature declaration" vhdl-template-subnature)
3248 ("terminal declaration" vhdl-template-terminal)
3249 )))))
3251 ;; initialize for VHDL Mode
3252 (vhdl-template-construct-alist-init)
3254 (defvar vhdl-template-package-alist nil
3255 "List of built-in package templates.")
3257 (defun vhdl-template-package-alist-init ()
3258 "Initialize `vhdl-template-package-alist'."
3259 (setq
3260 vhdl-template-package-alist
3261 (append
3263 ("numeric_bit" vhdl-template-package-numeric-bit)
3264 ("numeric_std" vhdl-template-package-numeric-std)
3265 ("std_logic_1164" vhdl-template-package-std-logic-1164)
3266 ("std_logic_arith" vhdl-template-package-std-logic-arith)
3267 ("std_logic_misc" vhdl-template-package-std-logic-misc)
3268 ("std_logic_signed" vhdl-template-package-std-logic-signed)
3269 ("std_logic_textio" vhdl-template-package-std-logic-textio)
3270 ("std_logic_unsigned" vhdl-template-package-std-logic-unsigned)
3271 ("textio" vhdl-template-package-textio)
3273 (when (vhdl-standard-p 'math)
3275 ("math_complex" vhdl-template-package-math-complex)
3276 ("math_real" vhdl-template-package-math-real)
3277 )))))
3279 ;; initialize for VHDL Mode
3280 (vhdl-template-package-alist-init)
3282 (defvar vhdl-template-directive-alist
3284 ("translate_on" vhdl-template-directive-translate-on)
3285 ("translate_off" vhdl-template-directive-translate-off)
3286 ("synthesis_on" vhdl-template-directive-synthesis-on)
3287 ("synthesis_off" vhdl-template-directive-synthesis-off)
3289 "List of built-in directive templates.")
3292 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3293 ;;; Menus
3294 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3296 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3297 ;; VHDL menu (using `easy-menu.el')
3299 (defun vhdl-customize ()
3300 "Call the customize function with `vhdl' as argument."
3301 (interactive)
3302 (customize-browse 'vhdl))
3304 (defun vhdl-create-mode-menu ()
3305 "Create VHDL Mode menu."
3306 `("VHDL"
3307 ,(append
3308 '("Project"
3309 ["None" (vhdl-set-project "")
3310 :style radio :selected (null vhdl-project)]
3311 "--")
3312 ;; add menu entries for defined projects
3313 (let ((project-alist vhdl-project-alist) menu-list name)
3314 (while project-alist
3315 (setq name (caar project-alist))
3316 (setq menu-list
3317 (cons `[,name (vhdl-set-project ,name)
3318 :style radio :selected (equal ,name vhdl-project)]
3319 menu-list))
3320 (setq project-alist (cdr project-alist)))
3321 (setq menu-list
3322 (if vhdl-project-sort
3323 (sort menu-list
3324 (function (lambda (a b) (string< (elt a 0) (elt b 0)))))
3325 (nreverse menu-list)))
3326 (vhdl-menu-split menu-list "Project"))
3327 '("--" "--"
3328 ["Select Project..." vhdl-set-project t]
3329 ["Set As Default Project" vhdl-set-default-project t]
3330 "--"
3331 ["Duplicate Project" vhdl-duplicate-project vhdl-project]
3332 ["Import Project..." vhdl-import-project
3333 :keys "C-c C-p C-m" :active t]
3334 ["Export Project" vhdl-export-project vhdl-project]
3335 "--"
3336 ["Customize Project..." (customize-option 'vhdl-project-alist) t]))
3337 "--"
3338 ("Compile"
3339 ["Compile Buffer" vhdl-compile t]
3340 ["Stop Compilation" kill-compilation t]
3341 "--"
3342 ["Make" vhdl-make t]
3343 ["Generate Makefile" vhdl-generate-makefile t]
3344 "--"
3345 ["Next Error" next-error t]
3346 ["Previous Error" previous-error t]
3347 ["First Error" first-error t]
3348 "--"
3349 ,(append
3350 '("Compiler")
3351 ;; add menu entries for defined compilers
3352 (let ((comp-alist vhdl-compiler-alist) menu-list name)
3353 (while comp-alist
3354 (setq name (caar comp-alist))
3355 (setq menu-list
3356 (cons `[,name (setq vhdl-compiler ,name)
3357 :style radio :selected (equal ,name vhdl-compiler)]
3358 menu-list))
3359 (setq comp-alist (cdr comp-alist)))
3360 (setq menu-list (nreverse menu-list))
3361 (vhdl-menu-split menu-list "Compiler"))
3362 '("--" "--"
3363 ["Select Compiler..." vhdl-set-compiler t]
3364 "--"
3365 ["Customize Compiler..."
3366 (customize-option 'vhdl-compiler-alist) t])))
3367 "--"
3368 ,(append
3369 '("Template"
3370 ("VHDL Construct 1"
3371 ["Alias" vhdl-template-alias t]
3372 ["Architecture" vhdl-template-architecture t]
3373 ["Assert" vhdl-template-assert t]
3374 ["Attribute (Decl)" vhdl-template-attribute-decl t]
3375 ["Attribute (Spec)" vhdl-template-attribute-spec t]
3376 ["Block" vhdl-template-block t]
3377 ["Case" vhdl-template-case-is t]
3378 ["Component (Decl)" vhdl-template-component-decl t]
3379 ["(Component) Instance" vhdl-template-component-inst t]
3380 ["Conditional (Signal Asst)" vhdl-template-conditional-signal-asst t]
3381 ["Configuration (Block)" vhdl-template-block-configuration t]
3382 ["Configuration (Comp)" vhdl-template-component-conf t]
3383 ["Configuration (Decl)" vhdl-template-configuration-decl t]
3384 ["Configuration (Spec)" vhdl-template-configuration-spec t]
3385 ["Constant" vhdl-template-constant t]
3386 ["Context" vhdl-template-context t]
3387 ["Disconnect" vhdl-template-disconnect t]
3388 ["Else" vhdl-template-else t]
3389 ["Elsif" vhdl-template-elsif t]
3390 ["Entity" vhdl-template-entity t]
3391 ["Exit" vhdl-template-exit t]
3392 ["File" vhdl-template-file t]
3393 ["For (Generate)" vhdl-template-for-generate t]
3394 ["For (Loop)" vhdl-template-for-loop t]
3395 ["Function (Body)" vhdl-template-function-body t]
3396 ["Function (Decl)" vhdl-template-function-decl t]
3397 ["Generic" vhdl-template-generic t]
3398 ["Group (Decl)" vhdl-template-group-decl t]
3399 ["Group (Template)" vhdl-template-group-template t])
3400 ("VHDL Construct 2"
3401 ["If (Generate)" vhdl-template-if-generate t]
3402 ["If (Then)" vhdl-template-if-then t]
3403 ["Library" vhdl-template-library t]
3404 ["Loop" vhdl-template-bare-loop t]
3405 ["Map" vhdl-template-map t]
3406 ["Next" vhdl-template-next t]
3407 ["Others (Aggregate)" vhdl-template-others t]
3408 ["Package (Decl)" vhdl-template-package-decl t]
3409 ["Package (Body)" vhdl-template-package-body t]
3410 ["Port" vhdl-template-port t]
3411 ["Procedure (Body)" vhdl-template-procedure-body t]
3412 ["Procedure (Decl)" vhdl-template-procedure-decl t]
3413 ["Process (Comb)" vhdl-template-process-comb t]
3414 ["Process (Seq)" vhdl-template-process-seq t]
3415 ["Report" vhdl-template-report t]
3416 ["Return" vhdl-template-return t]
3417 ["Select" vhdl-template-selected-signal-asst t]
3418 ["Signal" vhdl-template-signal t]
3419 ["Subtype" vhdl-template-subtype t]
3420 ["Type" vhdl-template-type t]
3421 ["Use" vhdl-template-use t]
3422 ["Variable" vhdl-template-variable t]
3423 ["Wait" vhdl-template-wait t]
3424 ["(Clocked Wait)" vhdl-template-clocked-wait t]
3425 ["When" vhdl-template-when t]
3426 ["While (Loop)" vhdl-template-while-loop t]
3427 ["With" vhdl-template-with t]))
3428 (when (vhdl-standard-p 'ams)
3429 '(("VHDL-AMS Construct"
3430 ["Break" vhdl-template-break t]
3431 ["Case (Use)" vhdl-template-case-use t]
3432 ["If (Use)" vhdl-template-if-use t]
3433 ["Limit" vhdl-template-limit t]
3434 ["Nature" vhdl-template-nature t]
3435 ["Procedural" vhdl-template-procedural t]
3436 ["Quantity (Free)" vhdl-template-quantity-free t]
3437 ["Quantity (Branch)" vhdl-template-quantity-branch t]
3438 ["Quantity (Source)" vhdl-template-quantity-source t]
3439 ["Subnature" vhdl-template-subnature t]
3440 ["Terminal" vhdl-template-terminal t])))
3441 '(["Insert Construct..." vhdl-template-insert-construct
3442 :keys "C-c C-i C-t"]
3443 "--")
3444 (list
3445 (append
3446 '("Package")
3447 '(["numeric_bit" vhdl-template-package-numeric-bit t]
3448 ["numeric_std" vhdl-template-package-numeric-std t]
3449 ["std_logic_1164" vhdl-template-package-std-logic-1164 t]
3450 ["textio" vhdl-template-package-textio t]
3451 "--"
3452 ["std_logic_arith" vhdl-template-package-std-logic-arith t]
3453 ["std_logic_signed" vhdl-template-package-std-logic-signed t]
3454 ["std_logic_unsigned" vhdl-template-package-std-logic-unsigned t]
3455 ["std_logic_misc" vhdl-template-package-std-logic-misc t]
3456 ["std_logic_textio" vhdl-template-package-std-logic-textio t]
3457 "--")
3458 (when (vhdl-standard-p 'ams)
3459 '(["fundamental_constants" vhdl-template-package-fundamental-constants t]
3460 ["material_constants" vhdl-template-package-material-constants t]
3461 ["energy_systems" vhdl-template-package-energy-systems t]
3462 ["electrical_systems" vhdl-template-package-electrical-systems t]
3463 ["mechanical_systems" vhdl-template-package-mechanical-systems t]
3464 ["radiant_systems" vhdl-template-package-radiant-systems t]
3465 ["thermal_systems" vhdl-template-package-thermal-systems t]
3466 ["fluidic_systems" vhdl-template-package-fluidic-systems t]
3467 "--"))
3468 (when (vhdl-standard-p 'math)
3469 '(["math_complex" vhdl-template-package-math-complex t]
3470 ["math_real" vhdl-template-package-math-real t]
3471 "--"))
3472 '(["Insert Package..." vhdl-template-insert-package
3473 :keys "C-c C-i C-p"])))
3474 '(("Directive"
3475 ["translate_on" vhdl-template-directive-translate-on t]
3476 ["translate_off" vhdl-template-directive-translate-off t]
3477 ["synthesis_on" vhdl-template-directive-synthesis-on t]
3478 ["synthesis_off" vhdl-template-directive-synthesis-off t]
3479 "--"
3480 ["Insert Directive..." vhdl-template-insert-directive
3481 :keys "C-c C-i C-d"])
3482 "--"
3483 ["Insert Header" vhdl-template-header :keys "C-c C-t C-h"]
3484 ["Insert Footer" vhdl-template-footer t]
3485 ["Insert Date" vhdl-template-insert-date t]
3486 ["Modify Date" vhdl-template-modify :keys "C-c C-t C-m"]
3487 "--"
3488 ["Query Next Prompt" vhdl-template-search-prompt t]))
3489 ,(append
3490 '("Model")
3491 ;; add menu entries for defined models
3492 (let ((model-alist vhdl-model-alist) menu-list model)
3493 (while model-alist
3494 (setq model (car model-alist))
3495 (setq menu-list
3496 (cons
3497 (vector
3498 (nth 0 model)
3499 (vhdl-function-name "vhdl-model" (nth 0 model))
3500 :keys (concat "C-c C-m " (key-description (nth 2 model))))
3501 menu-list))
3502 (setq model-alist (cdr model-alist)))
3503 (setq menu-list (nreverse menu-list))
3504 (vhdl-menu-split menu-list "Model"))
3505 '("--" "--"
3506 ["Insert Model..." vhdl-model-insert :keys "C-c C-i C-m"]
3507 ["Customize Model..." (customize-option 'vhdl-model-alist) t]))
3508 ("Port"
3509 ["Copy" vhdl-port-copy t]
3510 "--"
3511 ["Paste As Entity" vhdl-port-paste-entity vhdl-port-list]
3512 ["Paste As Component" vhdl-port-paste-component vhdl-port-list]
3513 ["Paste As Instance" vhdl-port-paste-instance
3514 :keys "C-c C-p C-i" :active vhdl-port-list]
3515 ["Paste As Signals" vhdl-port-paste-signals vhdl-port-list]
3516 ["Paste As Constants" vhdl-port-paste-constants vhdl-port-list]
3517 ["Paste As Generic Map" vhdl-port-paste-generic-map vhdl-port-list]
3518 ["Paste As Initializations" vhdl-port-paste-initializations vhdl-port-list]
3519 "--"
3520 ["Paste As Testbench" vhdl-port-paste-testbench vhdl-port-list]
3521 "--"
3522 ["Flatten" vhdl-port-flatten
3523 :style toggle :selected vhdl-port-flattened :active vhdl-port-list]
3524 ["Reverse Direction" vhdl-port-reverse-direction
3525 :style toggle :selected vhdl-port-reversed-direction :active vhdl-port-list])
3526 ("Compose"
3527 ["New Component" vhdl-compose-new-component t]
3528 ["Copy Component" vhdl-port-copy t]
3529 ["Place Component" vhdl-compose-place-component vhdl-port-list]
3530 ["Wire Components" vhdl-compose-wire-components t]
3531 "--"
3532 ["Generate Configuration" vhdl-compose-configuration t]
3533 ["Generate Components Package" vhdl-compose-components-package t])
3534 ("Subprogram"
3535 ["Copy" vhdl-subprog-copy t]
3536 "--"
3537 ["Paste As Declaration" vhdl-subprog-paste-declaration vhdl-subprog-list]
3538 ["Paste As Body" vhdl-subprog-paste-body vhdl-subprog-list]
3539 ["Paste As Call" vhdl-subprog-paste-call vhdl-subprog-list]
3540 "--"
3541 ["Flatten" vhdl-subprog-flatten
3542 :style toggle :selected vhdl-subprog-flattened :active vhdl-subprog-list])
3543 "--"
3544 ("Comment"
3545 ["(Un)Comment Out Region" vhdl-comment-uncomment-region (mark)]
3546 "--"
3547 ["Insert Inline Comment" vhdl-comment-append-inline t]
3548 ["Insert Horizontal Line" vhdl-comment-display-line t]
3549 ["Insert Display Comment" vhdl-comment-display t]
3550 "--"
3551 ["Fill Comment" fill-paragraph t]
3552 ["Fill Comment Region" fill-region (mark)]
3553 ["Kill Comment Region" vhdl-comment-kill-region (mark)]
3554 ["Kill Inline Comment Region" vhdl-comment-kill-inline-region (mark)])
3555 ("Line"
3556 ["Kill" vhdl-line-kill t]
3557 ["Copy" vhdl-line-copy t]
3558 ["Yank" vhdl-line-yank t]
3559 ["Expand" vhdl-line-expand t]
3560 "--"
3561 ["Transpose Next" vhdl-line-transpose-next t]
3562 ["Transpose Prev" vhdl-line-transpose-previous t]
3563 ["Open" vhdl-line-open t]
3564 ["Join" vhdl-delete-indentation t]
3565 "--"
3566 ["Goto" goto-line t]
3567 ["(Un)Comment Out" vhdl-comment-uncomment-line t])
3568 ("Move"
3569 ["Forward Statement" vhdl-end-of-statement t]
3570 ["Backward Statement" vhdl-beginning-of-statement t]
3571 ["Forward Expression" vhdl-forward-sexp t]
3572 ["Backward Expression" vhdl-backward-sexp t]
3573 ["Forward Same Indent" vhdl-forward-same-indent t]
3574 ["Backward Same Indent" vhdl-backward-same-indent t]
3575 ["Forward Function" vhdl-end-of-defun t]
3576 ["Backward Function" vhdl-beginning-of-defun t]
3577 ["Mark Function" vhdl-mark-defun t])
3578 "--"
3579 ("Indent"
3580 ["Line" indent-according-to-mode :keys "C-c C-i C-l"]
3581 ["Group" vhdl-indent-group :keys "C-c C-i C-g"]
3582 ["Region" vhdl-indent-region (mark)]
3583 ["Buffer" vhdl-indent-buffer :keys "C-c C-i C-b"])
3584 ("Align"
3585 ["Group" vhdl-align-group t]
3586 ["Same Indent" vhdl-align-same-indent :keys "C-c C-a C-i"]
3587 ["List" vhdl-align-list t]
3588 ["Declarations" vhdl-align-declarations t]
3589 ["Region" vhdl-align-region (mark)]
3590 ["Buffer" vhdl-align-buffer t]
3591 "--"
3592 ["Inline Comment Group" vhdl-align-inline-comment-group t]
3593 ["Inline Comment Region" vhdl-align-inline-comment-region (mark)]
3594 ["Inline Comment Buffer" vhdl-align-inline-comment-buffer t])
3595 ("Fill"
3596 ["List" vhdl-fill-list t]
3597 ["Group" vhdl-fill-group t]
3598 ["Same Indent" vhdl-fill-same-indent :keys "C-c C-f C-i"]
3599 ["Region" vhdl-fill-region (mark)])
3600 ("Beautify"
3601 ["Region" vhdl-beautify-region (mark)]
3602 ["Buffer" vhdl-beautify-buffer t])
3603 ("Fix"
3604 ["Generic/Port Clause" vhdl-fix-clause t]
3605 ["Generic/Port Clause Buffer" vhdl-fix-clause t]
3606 "--"
3607 ["Case Region" vhdl-fix-case-region (mark)]
3608 ["Case Buffer" vhdl-fix-case-buffer t]
3609 "--"
3610 ["Whitespace Region" vhdl-fixup-whitespace-region (mark)]
3611 ["Whitespace Buffer" vhdl-fixup-whitespace-buffer t]
3612 "--"
3613 ["Statement Region" vhdl-fix-statement-region (mark)]
3614 ["Statement Buffer" vhdl-fix-statement-buffer t]
3615 "--"
3616 ["Trailing Spaces Buffer" vhdl-remove-trailing-spaces t])
3617 ("Update"
3618 ["Sensitivity List" vhdl-update-sensitivity-list-process t]
3619 ["Sensitivity List Buffer" vhdl-update-sensitivity-list-buffer t])
3620 "--"
3621 ["Fontify Buffer" vhdl-fontify-buffer t]
3622 ["Statistics Buffer" vhdl-statistics-buffer t]
3623 ["Show Messages" vhdl-show-messages t]
3624 ["Syntactic Info" vhdl-show-syntactic-information t]
3625 "--"
3626 ["Speedbar" vhdl-speedbar t]
3627 ["Hide/Show" vhdl-hs-minor-mode t]
3628 "--"
3629 ("Documentation"
3630 ["VHDL Mode" vhdl-doc-mode :keys "C-c C-h"]
3631 ["Release Notes" (vhdl-doc-variable 'vhdl-doc-release-notes) t]
3632 ["Reserved Words" (vhdl-doc-variable 'vhdl-doc-keywords) t]
3633 ["Coding Style" (vhdl-doc-variable 'vhdl-doc-coding-style) t])
3634 ["Version" vhdl-version t]
3635 ["Bug Report..." vhdl-submit-bug-report t]
3636 "--"
3637 ("Options"
3638 ("Mode"
3639 ["Electric Mode"
3640 (progn (customize-set-variable 'vhdl-electric-mode
3641 (not vhdl-electric-mode))
3642 (vhdl-mode-line-update))
3643 :style toggle :selected vhdl-electric-mode :keys "C-c C-m C-e"]
3644 ["Stutter Mode"
3645 (progn (customize-set-variable 'vhdl-stutter-mode
3646 (not vhdl-stutter-mode))
3647 (vhdl-mode-line-update))
3648 :style toggle :selected vhdl-stutter-mode :keys "C-c C-m C-s"]
3649 ["Indent Tabs Mode"
3650 (progn (customize-set-variable 'vhdl-indent-tabs-mode
3651 (not vhdl-indent-tabs-mode))
3652 (setq indent-tabs-mode vhdl-indent-tabs-mode))
3653 :style toggle :selected vhdl-indent-tabs-mode]
3654 "--"
3655 ["Customize Group..." (customize-group 'vhdl-mode) t])
3656 ("Project"
3657 ["Project Setup..." (customize-option 'vhdl-project-alist) t]
3658 ,(append
3659 '("Selected Project at Startup"
3660 ["None" (progn (customize-set-variable 'vhdl-project nil)
3661 (vhdl-set-project ""))
3662 :style radio :selected (null vhdl-project)]
3663 "--")
3664 ;; add menu entries for defined projects
3665 (let ((project-alist vhdl-project-alist) menu-list name)
3666 (while project-alist
3667 (setq name (caar project-alist))
3668 (setq menu-list
3669 (cons `[,name (progn (customize-set-variable
3670 'vhdl-project ,name)
3671 (vhdl-set-project ,name))
3672 :style radio :selected (equal ,name vhdl-project)]
3673 menu-list))
3674 (setq project-alist (cdr project-alist)))
3675 (setq menu-list (nreverse menu-list))
3676 (vhdl-menu-split menu-list "Project")))
3677 ["Setup File Name..." (customize-option 'vhdl-project-file-name) t]
3678 ("Auto Load Setup File"
3679 ["At Startup"
3680 (customize-set-variable 'vhdl-project-autoload
3681 (if (memq 'startup vhdl-project-autoload)
3682 (delq 'startup vhdl-project-autoload)
3683 (cons 'startup vhdl-project-autoload)))
3684 :style toggle :selected (memq 'startup vhdl-project-autoload)])
3685 ["Sort Projects"
3686 (customize-set-variable 'vhdl-project-sort (not vhdl-project-sort))
3687 :style toggle :selected vhdl-project-sort]
3688 "--"
3689 ["Customize Group..." (customize-group 'vhdl-project) t])
3690 ("Compiler"
3691 ["Compiler Setup..." (customize-option 'vhdl-compiler-alist) t]
3692 ,(append
3693 '("Selected Compiler at Startup")
3694 ;; add menu entries for defined compilers
3695 (let ((comp-alist vhdl-compiler-alist) menu-list name)
3696 (while comp-alist
3697 (setq name (caar comp-alist))
3698 (setq menu-list
3699 (cons `[,name (customize-set-variable 'vhdl-compiler ,name)
3700 :style radio :selected (equal ,name vhdl-compiler)]
3701 menu-list))
3702 (setq comp-alist (cdr comp-alist)))
3703 (setq menu-list (nreverse menu-list))
3704 (vhdl-menu-split menu-list "Compiler")))
3705 ["Use Local Error Regexp"
3706 (customize-set-variable 'vhdl-compile-use-local-error-regexp
3707 (not vhdl-compile-use-local-error-regexp))
3708 :style toggle :selected vhdl-compile-use-local-error-regexp]
3709 ["Makefile Default Targets..."
3710 (customize-option 'vhdl-makefile-default-targets) t]
3711 ["Makefile Generation Hook..."
3712 (customize-option 'vhdl-makefile-generation-hook) t]
3713 ["Default Library Name" (customize-option 'vhdl-default-library) t]
3714 "--"
3715 ["Customize Group..." (customize-group 'vhdl-compiler) t])
3716 ("Style"
3717 ("VHDL Standard"
3718 ["VHDL'87"
3719 (progn (customize-set-variable 'vhdl-standard
3720 (list '87 (cadr vhdl-standard)))
3721 (vhdl-activate-customizations))
3722 :style radio :selected (eq '87 (car vhdl-standard))]
3723 ["VHDL'93/02"
3724 (progn (customize-set-variable 'vhdl-standard
3725 (list '93 (cadr vhdl-standard)))
3726 (vhdl-activate-customizations))
3727 :style radio :selected (eq '93 (car vhdl-standard))]
3728 ["VHDL'08"
3729 (progn (customize-set-variable 'vhdl-standard
3730 (list '08 (cadr vhdl-standard)))
3731 (vhdl-activate-customizations))
3732 :style radio :selected (eq '08 (car vhdl-standard))]
3733 "--"
3734 ["VHDL-AMS"
3735 (progn (customize-set-variable
3736 'vhdl-standard (list (car vhdl-standard)
3737 (if (memq 'ams (cadr vhdl-standard))
3738 (delq 'ams (cadr vhdl-standard))
3739 (cons 'ams (cadr vhdl-standard)))))
3740 (vhdl-activate-customizations))
3741 :style toggle :selected (memq 'ams (cadr vhdl-standard))]
3742 ["Math Packages"
3743 (progn (customize-set-variable
3744 'vhdl-standard (list (car vhdl-standard)
3745 (if (memq 'math (cadr vhdl-standard))
3746 (delq 'math (cadr vhdl-standard))
3747 (cons 'math (cadr vhdl-standard)))))
3748 (vhdl-activate-customizations))
3749 :style toggle :selected (memq 'math (cadr vhdl-standard))])
3750 ["Indentation Offset..." (customize-option 'vhdl-basic-offset) t]
3751 ["Upper Case Keywords"
3752 (customize-set-variable 'vhdl-upper-case-keywords
3753 (not vhdl-upper-case-keywords))
3754 :style toggle :selected vhdl-upper-case-keywords]
3755 ["Upper Case Types"
3756 (customize-set-variable 'vhdl-upper-case-types
3757 (not vhdl-upper-case-types))
3758 :style toggle :selected vhdl-upper-case-types]
3759 ["Upper Case Attributes"
3760 (customize-set-variable 'vhdl-upper-case-attributes
3761 (not vhdl-upper-case-attributes))
3762 :style toggle :selected vhdl-upper-case-attributes]
3763 ["Upper Case Enumeration Values"
3764 (customize-set-variable 'vhdl-upper-case-enum-values
3765 (not vhdl-upper-case-enum-values))
3766 :style toggle :selected vhdl-upper-case-enum-values]
3767 ["Upper Case Constants"
3768 (customize-set-variable 'vhdl-upper-case-constants
3769 (not vhdl-upper-case-constants))
3770 :style toggle :selected vhdl-upper-case-constants]
3771 ("Use Direct Instantiation"
3772 ["Never"
3773 (customize-set-variable 'vhdl-use-direct-instantiation 'never)
3774 :style radio :selected (eq 'never vhdl-use-direct-instantiation)]
3775 ["Standard"
3776 (customize-set-variable 'vhdl-use-direct-instantiation 'standard)
3777 :style radio :selected (eq 'standard vhdl-use-direct-instantiation)]
3778 ["Always"
3779 (customize-set-variable 'vhdl-use-direct-instantiation 'always)
3780 :style radio :selected (eq 'always vhdl-use-direct-instantiation)])
3781 ["Include Array Index and Record Field in Sensitivity List"
3782 (customize-set-variable 'vhdl-array-index-record-field-in-sensitivity-list
3783 (not vhdl-array-index-record-field-in-sensitivity-list))
3784 :style toggle :selected vhdl-array-index-record-field-in-sensitivity-list]
3785 "--"
3786 ["Customize Group..." (customize-group 'vhdl-style) t])
3787 ("Naming"
3788 ["Entity File Name..." (customize-option 'vhdl-entity-file-name) t]
3789 ["Architecture File Name..."
3790 (customize-option 'vhdl-architecture-file-name) t]
3791 ["Configuration File Name..."
3792 (customize-option 'vhdl-configuration-file-name) t]
3793 ["Package File Name..." (customize-option 'vhdl-package-file-name) t]
3794 ("File Name Case"
3795 ["As Is"
3796 (customize-set-variable 'vhdl-file-name-case 'identity)
3797 :style radio :selected (eq 'identity vhdl-file-name-case)]
3798 ["Lower Case"
3799 (customize-set-variable 'vhdl-file-name-case 'downcase)
3800 :style radio :selected (eq 'downcase vhdl-file-name-case)]
3801 ["Upper Case"
3802 (customize-set-variable 'vhdl-file-name-case 'upcase)
3803 :style radio :selected (eq 'upcase vhdl-file-name-case)]
3804 ["Capitalize"
3805 (customize-set-variable 'vhdl-file-name-case 'capitalize)
3806 :style radio :selected (eq 'capitalize vhdl-file-name-case)])
3807 "--"
3808 ["Customize Group..." (customize-group 'vhdl-naming) t])
3809 ("Template"
3810 ("Electric Keywords"
3811 ["VHDL Keywords"
3812 (customize-set-variable 'vhdl-electric-keywords
3813 (if (memq 'vhdl vhdl-electric-keywords)
3814 (delq 'vhdl vhdl-electric-keywords)
3815 (cons 'vhdl vhdl-electric-keywords)))
3816 :style toggle :selected (memq 'vhdl vhdl-electric-keywords)]
3817 ["User Model Keywords"
3818 (customize-set-variable 'vhdl-electric-keywords
3819 (if (memq 'user vhdl-electric-keywords)
3820 (delq 'user vhdl-electric-keywords)
3821 (cons 'user vhdl-electric-keywords)))
3822 :style toggle :selected (memq 'user vhdl-electric-keywords)])
3823 ("Insert Optional Labels"
3824 ["None"
3825 (customize-set-variable 'vhdl-optional-labels 'none)
3826 :style radio :selected (eq 'none vhdl-optional-labels)]
3827 ["Processes Only"
3828 (customize-set-variable 'vhdl-optional-labels 'process)
3829 :style radio :selected (eq 'process vhdl-optional-labels)]
3830 ["All Constructs"
3831 (customize-set-variable 'vhdl-optional-labels 'all)
3832 :style radio :selected (eq 'all vhdl-optional-labels)])
3833 ("Insert Empty Lines"
3834 ["None"
3835 (customize-set-variable 'vhdl-insert-empty-lines 'none)
3836 :style radio :selected (eq 'none vhdl-insert-empty-lines)]
3837 ["Design Units Only"
3838 (customize-set-variable 'vhdl-insert-empty-lines 'unit)
3839 :style radio :selected (eq 'unit vhdl-insert-empty-lines)]
3840 ["All Constructs"
3841 (customize-set-variable 'vhdl-insert-empty-lines 'all)
3842 :style radio :selected (eq 'all vhdl-insert-empty-lines)])
3843 ["Argument List Indent"
3844 (customize-set-variable 'vhdl-argument-list-indent
3845 (not vhdl-argument-list-indent))
3846 :style toggle :selected vhdl-argument-list-indent]
3847 ["Association List with Formals"
3848 (customize-set-variable 'vhdl-association-list-with-formals
3849 (not vhdl-association-list-with-formals))
3850 :style toggle :selected vhdl-association-list-with-formals]
3851 ["Conditions in Parenthesis"
3852 (customize-set-variable 'vhdl-conditions-in-parenthesis
3853 (not vhdl-conditions-in-parenthesis))
3854 :style toggle :selected vhdl-conditions-in-parenthesis]
3855 ["Sensitivity List uses 'all'"
3856 (customize-set-variable 'vhdl-sensitivity-list-all
3857 (not vhdl-sensitivity-list-all))
3858 :style toggle :selected vhdl-sensitivity-list-all]
3859 ["Zero String..." (customize-option 'vhdl-zero-string) t]
3860 ["One String..." (customize-option 'vhdl-one-string) t]
3861 ("File Header"
3862 ["Header String..." (customize-option 'vhdl-file-header) t]
3863 ["Footer String..." (customize-option 'vhdl-file-footer) t]
3864 ["Company Name..." (customize-option 'vhdl-company-name) t]
3865 ["Copyright String..." (customize-option 'vhdl-copyright-string) t]
3866 ["Platform Specification..." (customize-option 'vhdl-platform-spec) t]
3867 ["Date Format..." (customize-option 'vhdl-date-format) t]
3868 ["Modify Date Prefix String..."
3869 (customize-option 'vhdl-modify-date-prefix-string) t]
3870 ["Modify Date on Saving"
3871 (progn (customize-set-variable 'vhdl-modify-date-on-saving
3872 (not vhdl-modify-date-on-saving))
3873 (vhdl-activate-customizations))
3874 :style toggle :selected vhdl-modify-date-on-saving])
3875 ("Sequential Process"
3876 ("Kind of Reset"
3877 ["None"
3878 (customize-set-variable 'vhdl-reset-kind 'none)
3879 :style radio :selected (eq 'none vhdl-reset-kind)]
3880 ["Synchronous"
3881 (customize-set-variable 'vhdl-reset-kind 'sync)
3882 :style radio :selected (eq 'sync vhdl-reset-kind)]
3883 ["Asynchronous"
3884 (customize-set-variable 'vhdl-reset-kind 'async)
3885 :style radio :selected (eq 'async vhdl-reset-kind)]
3886 ["Query"
3887 (customize-set-variable 'vhdl-reset-kind 'query)
3888 :style radio :selected (eq 'query vhdl-reset-kind)])
3889 ["Reset is Active High"
3890 (customize-set-variable 'vhdl-reset-active-high
3891 (not vhdl-reset-active-high))
3892 :style toggle :selected vhdl-reset-active-high]
3893 ["Use Rising Clock Edge"
3894 (customize-set-variable 'vhdl-clock-rising-edge
3895 (not vhdl-clock-rising-edge))
3896 :style toggle :selected vhdl-clock-rising-edge]
3897 ("Clock Edge Condition"
3898 ["Standard"
3899 (customize-set-variable 'vhdl-clock-edge-condition 'standard)
3900 :style radio :selected (eq 'standard vhdl-clock-edge-condition)]
3901 ["Function \"rising_edge\""
3902 (customize-set-variable 'vhdl-clock-edge-condition 'function)
3903 :style radio :selected (eq 'function vhdl-clock-edge-condition)])
3904 ["Clock Name..." (customize-option 'vhdl-clock-name) t]
3905 ["Reset Name..." (customize-option 'vhdl-reset-name) t])
3906 "--"
3907 ["Customize Group..." (customize-group 'vhdl-template) t])
3908 ("Model"
3909 ["Model Definition..." (customize-option 'vhdl-model-alist) t])
3910 ("Port"
3911 ["Include Port Comments"
3912 (customize-set-variable 'vhdl-include-port-comments
3913 (not vhdl-include-port-comments))
3914 :style toggle :selected vhdl-include-port-comments]
3915 ["Include Direction Comments"
3916 (customize-set-variable 'vhdl-include-direction-comments
3917 (not vhdl-include-direction-comments))
3918 :style toggle :selected vhdl-include-direction-comments]
3919 ["Include Type Comments"
3920 (customize-set-variable 'vhdl-include-type-comments
3921 (not vhdl-include-type-comments))
3922 :style toggle :selected vhdl-include-type-comments]
3923 ("Include Group Comments"
3924 ["Never"
3925 (customize-set-variable 'vhdl-include-group-comments 'never)
3926 :style radio :selected (eq 'never vhdl-include-group-comments)]
3927 ["Declarations"
3928 (customize-set-variable 'vhdl-include-group-comments 'decl)
3929 :style radio :selected (eq 'decl vhdl-include-group-comments)]
3930 ["Always"
3931 (customize-set-variable 'vhdl-include-group-comments 'always)
3932 :style radio :selected (eq 'always vhdl-include-group-comments)])
3933 ["Actual Generic Name..." (customize-option 'vhdl-actual-generic-name) t]
3934 ["Actual Port Name..." (customize-option 'vhdl-actual-port-name) t]
3935 ["Instance Name..." (customize-option 'vhdl-instance-name) t]
3936 ("Testbench"
3937 ["Entity Name..." (customize-option 'vhdl-testbench-entity-name) t]
3938 ["Architecture Name..."
3939 (customize-option 'vhdl-testbench-architecture-name) t]
3940 ["Configuration Name..."
3941 (customize-option 'vhdl-testbench-configuration-name) t]
3942 ["DUT Name..." (customize-option 'vhdl-testbench-dut-name) t]
3943 ["Include Header"
3944 (customize-set-variable 'vhdl-testbench-include-header
3945 (not vhdl-testbench-include-header))
3946 :style toggle :selected vhdl-testbench-include-header]
3947 ["Declarations..." (customize-option 'vhdl-testbench-declarations) t]
3948 ["Statements..." (customize-option 'vhdl-testbench-statements) t]
3949 ["Initialize Signals"
3950 (customize-set-variable 'vhdl-testbench-initialize-signals
3951 (not vhdl-testbench-initialize-signals))
3952 :style toggle :selected vhdl-testbench-initialize-signals]
3953 ["Include Library Clause"
3954 (customize-set-variable 'vhdl-testbench-include-library
3955 (not vhdl-testbench-include-library))
3956 :style toggle :selected vhdl-testbench-include-library]
3957 ["Include Configuration"
3958 (customize-set-variable 'vhdl-testbench-include-configuration
3959 (not vhdl-testbench-include-configuration))
3960 :style toggle :selected vhdl-testbench-include-configuration]
3961 ("Create Files"
3962 ["None"
3963 (customize-set-variable 'vhdl-testbench-create-files 'none)
3964 :style radio :selected (eq 'none vhdl-testbench-create-files)]
3965 ["Single"
3966 (customize-set-variable 'vhdl-testbench-create-files 'single)
3967 :style radio :selected (eq 'single vhdl-testbench-create-files)]
3968 ["Separate"
3969 (customize-set-variable 'vhdl-testbench-create-files 'separate)
3970 :style radio :selected (eq 'separate vhdl-testbench-create-files)])
3971 ["Testbench Entity File Name..."
3972 (customize-option 'vhdl-testbench-entity-file-name) t]
3973 ["Testbench Architecture File Name..."
3974 (customize-option 'vhdl-testbench-architecture-file-name) t])
3975 "--"
3976 ["Customize Group..." (customize-group 'vhdl-port) t])
3977 ("Compose"
3978 ["Architecture Name..."
3979 (customize-option 'vhdl-compose-architecture-name) t]
3980 ["Configuration Name..."
3981 (customize-option 'vhdl-compose-configuration-name) t]
3982 ["Components Package Name..."
3983 (customize-option 'vhdl-components-package-name) t]
3984 ["Use Components Package"
3985 (customize-set-variable 'vhdl-use-components-package
3986 (not vhdl-use-components-package))
3987 :style toggle :selected vhdl-use-components-package]
3988 ["Include Header"
3989 (customize-set-variable 'vhdl-compose-include-header
3990 (not vhdl-compose-include-header))
3991 :style toggle :selected vhdl-compose-include-header]
3992 ("Create Entity/Architecture Files"
3993 ["None"
3994 (customize-set-variable 'vhdl-compose-create-files 'none)
3995 :style radio :selected (eq 'none vhdl-compose-create-files)]
3996 ["Single"
3997 (customize-set-variable 'vhdl-compose-create-files 'single)
3998 :style radio :selected (eq 'single vhdl-compose-create-files)]
3999 ["Separate"
4000 (customize-set-variable 'vhdl-compose-create-files 'separate)
4001 :style radio :selected (eq 'separate vhdl-compose-create-files)])
4002 ["Create Configuration File"
4003 (customize-set-variable 'vhdl-compose-configuration-create-file
4004 (not vhdl-compose-configuration-create-file))
4005 :style toggle :selected vhdl-compose-configuration-create-file]
4006 ["Hierarchical Configuration"
4007 (customize-set-variable 'vhdl-compose-configuration-hierarchical
4008 (not vhdl-compose-configuration-hierarchical))
4009 :style toggle :selected vhdl-compose-configuration-hierarchical]
4010 ["Use Subconfiguration"
4011 (customize-set-variable 'vhdl-compose-configuration-use-subconfiguration
4012 (not vhdl-compose-configuration-use-subconfiguration))
4013 :style toggle :selected vhdl-compose-configuration-use-subconfiguration]
4014 "--"
4015 ["Customize Group..." (customize-group 'vhdl-compose) t])
4016 ("Comment"
4017 ["Self Insert Comments"
4018 (customize-set-variable 'vhdl-self-insert-comments
4019 (not vhdl-self-insert-comments))
4020 :style toggle :selected vhdl-self-insert-comments]
4021 ["Prompt for Comments"
4022 (customize-set-variable 'vhdl-prompt-for-comments
4023 (not vhdl-prompt-for-comments))
4024 :style toggle :selected vhdl-prompt-for-comments]