lisp/progmodes/mixal-mode.el

   1 ;;; mixal-mode.el --- Major mode for the mix asm language.
   2
   3 ;; Copyright (C) 2003, 2004, 2005, 2006, 2007
   4 ;;   Free Software Foundation, Inc.
   5
   6 ;; Author: Pieter E.J. Pareit <pieter.pareit@gmail.com>
   7 ;; Maintainer: Pieter E.J. Pareit <pieter.pareit@gmail.com>
   8 ;; Created: 09 Nov 2002
   9 ;; Version: 0.1
  10 ;; Keywords: Knuth mix mixal asm mixvm "The Art Of Computer Programming"
  11
  12 ;; This file is part of GNU Emacs.
  13
  14 ;; GNU Emacs is free software; you can redistribute it and/or modify
  15 ;; it under the terms of the GNU General Public License as published by
  16 ;; the Free Software Foundation; either version 3, or (at your option)
  17 ;; any later version.
  18
  19 ;; GNU Emacs is distributed in the hope that it will be useful,
  20 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  21 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22 ;; GNU General Public License for more details.
  23
  24 ;; You should have received a copy of the GNU General Public License
  25 ;; along with GNU Emacs; see the file COPYING.  If not, write to the
  26 ;; Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  27 ;; Boston, MA 02110-1301, USA.
  28
  29 ;;; Commentary:
  30 ;; Major mode for the mix asm language.
  31 ;; The mix asm language is described in "The Art Of Computer Programming".
  32 ;;
  33 ;; For optimal use, also use GNU MDK.  Compiling needs mixasm, running
  34 ;; and debugging needs mixvm and mixvm.el from GNU MDK.  You can get
  35 ;; GNU MDK from `https://savannah.gnu.org/projects/mdk/' and
  36 ;; `ftp://ftp.gnu.org/pub/gnu/mdk'.
  37 ;;
  38 ;; To use this mode, place the following in your .emacs file:
  39 ;; `(load-file "/PATH-TO-FILE/mixal-mode.el")'.
  40 ;; When you load a file with the extension .mixal the mode will be started
  41 ;; automatic.  If you want to start the mode manual, use `M-x mixal-mode'.
  42 ;; Font locking will work, the behavior of tabs is the same as Emacs's
  43 ;; default behavior.  You can compile a source file with `C-c c' you can
  44 ;; run a compiled file with `C-c r' or run it in debug mode with `C-c d'.
  45 ;; You can get more information about a particular operation code by using
  46 ;; mixal-describe-operation-code or `C-h o'.
  47 ;;
  48 ;; Have fun.
  49
  50 ;;; History:
  51 ;; Version 0.3:
  52 ;; 12/10/05: Stefan Monnier <monnier@iro.umontreal.ca>
  53 ;;           Use font-lock-syntactic-keywords to detect/mark comments.
  54 ;;           Use [^ \t\n]+ to match the operand part of a line.
  55 ;;           Drop mixal-operation-codes.
  56 ;;           Build the mixal-operation-codes-alist immediately.
  57 ;;           Use `interactive' in mixal-describe-operation-code.
  58 ;;           Remove useless ".*$" at the end of some regexps.
  59 ;;           Fix the definition of comment-start-skip.
  60 ;; 08/10/05: sync mdk and emacs cvs
  61 ;;           from emacs: compile-command and require-final-newline
  62 ;;           from mdk:   see version 0.2
  63 ;;           correct my email address
  64 ;; Version 0.2:
  65 ;; 06/04/05: mixasm no longer needs -g option
  66 ;;           fontlocking of comments works in all? cases now
  67 ;;           added some more mixal-operation-codes
  68 ;; Version 0.1:
  69 ;; Version 0.1.1:
  70 ;; 22/11/02: bugfix in fontlocking, needed to add a '-' to the regex.
  71 ;; 19/11/02: completed implementing mixal-describe-operation-code.
  72 ;; 13/11/02: implemented compile, mixal-run and mixal-debug.
  73 ;; 10/11/02: implemented font-locking and syntax table.
  74 ;; 09/11/02: started mixal-mode.
  75
  76 ;;; Code:
  77 (defvar compile-command)
  78
  79 ;;; Key map
  80 (defvar mixal-mode-map
  81   (let ((map (make-sparse-keymap)))
  82     (define-key map "\C-cc" 'compile)
  83     (define-key map "\C-cr" 'mixal-run)
  84     (define-key map "\C-cd" 'mixal-debug)
  85     (define-key map "\C-ho" 'mixal-describe-operation-code)
  86     map)
  87   "Keymap for `mixal-mode'.")
  88 ;; (makunbound 'mixal-mode-map)
  89
  90 ;;; Syntax table
  91 (defvar mixal-mode-syntax-table
  92   (let ((st (make-syntax-table)))
  93     ;; We need to do a bit more to make fontlocking for comments work.
  94     ;; See mixal-font-lock-syntactic-keywords.
  95     ;; (modify-syntax-entry ?* "<" st)
  96     (modify-syntax-entry ?\n ">" st)
  97     st)
  98   "Syntax table for `mixal-mode'.")
  99
 100 (defvar mixal-font-lock-label-face 'font-lock-variable-name-face
 101   "Face name to use for label names.
 102 Default value is that of `font-lock-variable-name-face', but you can modify
 103 its value.")
 104
 105 (defvar mixal-font-lock-operation-code-face 'font-lock-keyword-face
 106   "Face name to use for operation code names.
 107 Default value is that of `font-lock-keyword-face', but you can modify its
 108 value.")
 109
 110 (defvar mixal-font-lock-assembly-pseudoinstruction-face 'font-lock-builtin-face
 111   "Face name to use for assembly pseudoinstruction names.
 112 Default value is that of `font-lock-builtin-face', but you can modify its
 113 value.")
 114
 115 (defvar mixal-assembly-pseudoinstructions
 116   '("ORIG" "EQU" "CON" "ALF" "END")
 117   "List of possible assembly pseudoinstructions.")
 118
 119 ;;;; Compilation
 120 ;; Output from mixasm is compatible with default behavior of emacs,
 121 ;; I just added a key (C-cc) and modified the make-command.
 122
 123 ;;;; Indentation
 124 ;; Tabs works well by default.
 125
 126 ;;;; Describe
 127 (defvar mixal-operation-codes-alist
 128   ;; FIXME: the codes FADD, FSUB, FMUL, FDIV, JRAD, and FCMP were in
 129   ;; mixal-operation-codes but not here.  They should probably be added here.
 130   ;;
 131   ;; We used to define this with a backquote and subexps like ,(+ 8 3) for
 132   ;; better clarity, but the resulting code was too big and caused the
 133   ;; byte-compiler to eat up all the stack space.  Even using
 134   ;; `eval-when-compile' didn't help because the byte-compiler insists on
 135   ;; compiling the code before evaluating it.
 136   '((LDA loading "load A" 8 field
 137          "Put in rA the contents of cell no. M.
 138 Uses a + when there is no sign in subfield. Subfield is left padded with
 139 zeros to make a word."
 140          2)
 141
 142     (LDX loading "load X" 15 field
 143          "Put in rX the contents of cell no. M.
 144 Uses a + when there is no sign in subfield. Subfield is left padded with
 145 zeros to make a word."
 146          2)
 147
 148     (LD1 loading "load I1" 9 field
 149          "Put in rI1 the contents of cell no. M.
 150 Uses a + when there is no sign in subfield. Subfield is left padded with
 151 zeros to make a word. Index registers only have 2 bytes and a sign, Trying
 152 to set anything more that that will result in undefined behavior."
 153          2)
 154
 155     (LD2 loading "load I2" 10 field
 156          "Put in rI2 the contents of cell no. M.
 157 Uses a + when there is no sign in subfield. Subfield is left padded with
 158 zeros to make a word. Index registers only have 2 bytes and a sign, Trying
 159 to set anything more that that will result in undefined behavior."
 160          2)
 161
 162     (LD3 loading "load I3" 11 field
 163          "Put in rI3 the contents of cell no. M.
 164 Uses a + when there is no sign in subfield. Subfield is left padded with
 165 zeros to make a word. Index registers only have 2 bytes and a sign, Trying
 166 to set anything more that that will result in undefined behavior."
 167          2)
 168
 169     (LD4 loading "load I4" 12 field
 170          "Put in rI4 the contents of cell no. M.
 171 Uses a + when there is no sign in subfield. Subfield is left padded with
 172 zeros to make a word. Index registers only have 2 bytes and a sign, Trying
 173 to set anything more that that will result in undefined behavior."
 174          2)
 175
 176     (LD5 loading "load I5" 13 field
 177          "Put in rI5 the contents of cell no. M.
 178 Uses a + when there is no sign in subfield. Subfield is left padded with
 179 zeros to make a word. Index registers only have 2 bytes and a sign, Trying
 180 to set anything more that that will result in undefined behavior."
 181          2)
 182
 183     (LD6 loading "load I6" 14 field
 184          "Put in rI6 the contents of cell no. M.
 185 Uses a + when there is no sign in subfield. Subfield is left padded with
 186 zeros to make a word. Index registers only have 2 bytes and a sign, Trying
 187 to set anything more that that will result in undefined behavior."
 188          2)
 189
 190     (LDAN loading "load A negative" 16 field
 191           "Put in rA the contents of cell no. M, with opposite sign.
 192 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 193 Subfield is left padded with zeros to make a word."
 194           2)
 195
 196     (LDXN loading "load X negative" 23 field
 197           "Put in rX the contents of cell no. M, with opposite sign.
 198 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 199 Subfield is left padded with zeros to make a word."
 200           2)
 201
 202     (LD1N loading "load I1 negative" 17 field
 203           "Put in rI1 the contents of cell no. M, with opposite sign.
 204 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 205 Subfield is left padded with zeros to make a word. Index registers only
 206 have 2 bytes and a sign, Trying to set anything more that that will result
 207 in undefined behavior."
 208           2)
 209
 210     (LD2N loading "load I2 negative" 18 field
 211           "Put in rI2 the contents of cell no. M, with opposite sign.
 212 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 213 Subfield is left padded with zeros to make a word. Index registers only
 214 have 2 bytes and a sign, Trying to set anything more that that will result
 215 in undefined behavior."
 216           2)
 217
 218     (LD3N loading "load I3 negative" 19 field
 219           "Put in rI3 the contents of cell no. M, with opposite sign.
 220 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 221 Subfield is left padded with zeros to make a word. Index registers only
 222 have 2 bytes and a sign, Trying to set anything more that that will result
 223 in undefined behavior."
 224           2)
 225
 226     (LD4N loading "load I4 negative" 20 field
 227           "Put in rI4 the contents of cell no. M, with opposite sign.
 228 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 229 Subfield is left padded with zeros to make a word. Index registers only
 230 have 2 bytes and a sign, Trying to set anything more that that will result
 231 in undefined behavior."
 232           2)
 233
 234     (LD5N loading "load I5 negative" 21 field
 235           "Put in rI5 the contents of cell no. M, with opposite sign.
 236 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 237 Subfield is left padded with zeros to make a word. Index registers only
 238 have 2 bytes and a sign, Trying to set anything more that that will result
 239 in undefined behavior."
 240           2)
 241
 242     (LD6N loading "load I6 negative" 22 field
 243           "Put in rI6 the contents of cell no. M, with opposite sign.
 244 Uses a + when there is no sign in subfield, otherwise use the opposite sign.
 245 Subfield is left padded with zeros to make a word. Index registers only
 246 have 2 bytes and a sign, Trying to set anything more that that will result
 247 in undefined behavior."
 248           2)
 249
 250     (STA storing "store A" 24 field
 251          "Store in cell Nr. M the contents of rA.
 252 The modification of the operation code represents the subfield of the
 253 memory cell that is to be overwritten with bytes from a register. These
 254 bytes are taken beginning by the rightmost side of the register. The
 255 sign of the memory cell is not changed, unless it is part of the subfield."
 256          2)
 257
 258     (STX storing "store X" 31 field
 259          "Store in cell Nr. M the contents of rX.
 260 The modification of the operation code represents the subfield of the
 261 memory cell that is to be overwritten with bytes from a register. These
 262 bytes are taken beginning by the rightmost side of the register. The
 263 sign of the memory cell is not changed, unless it is part of the subfield."
 264          2)
 265
 266     (ST1 storing "store I1" 25 field
 267          "Store in cell Nr. M the contents of rI1.
 268 The modification of the operation code represents the subfield of the
 269 memory cell that is to be overwritten with bytes from a register. These
 270 bytes are taken beginning by the rightmost side of the register. The
 271 sign of the memory cell is not changed, unless it is part of the subfield.
 272 Because index registers only have 2 bytes and a sign, the rest of the bytes
 273 are assumed to be 0."
 274          2)
 275
 276     (ST2 storing "store I2" 26 field
 277          "Store in cell Nr. M the contents of rI2.
 278 The modification of the operation code represents the subfield of the
 279 memory cell that is to be overwritten with bytes from a register. These
 280 bytes are taken beginning by the rightmost side of the register. The
 281 sign of the memory cell is not changed, unless it is part of the subfield.
 282 Because index registers only have 2 bytes and a sign, the rest of the bytes
 283 are assumed to be 0."
 284          2)
 285
 286     (ST3 storing "store I3" 27 field
 287          "Store in cell Nr. M the contents of rI3.
 288 The modification of the operation code represents the subfield of the
 289 memory cell that is to be overwritten with bytes from a register. These
 290 bytes are taken beginning by the rightmost side of the register. The
 291 sign of the memory cell is not changed, unless it is part of the subfield.
 292 Because index registers only have 2 bytes and a sign, the rest of the bytes
 293 are assumed to be 0."
 294          2)
 295
 296     (ST4 storing "store I4" 28 field
 297          "Store in cell Nr. M the contents of rI4.
 298 The modification of the operation code represents the subfield of the
 299 memory cell that is to be overwritten with bytes from a register. These
 300 bytes are taken beginning by the rightmost side of the register. The
 301 sign of the memory cell is not changed, unless it is part of the subfield.
 302 Because index registers only have 2 bytes and a sign, the rest of the bytes
 303 are assumed to be 0."
 304          2)
 305
 306     (ST5 storing "store I5" 29 field
 307          "Store in cell Nr. M the contents of rI5.
 308 The modification of the operation code represents the subfield of the
 309 memory cell that is to be overwritten with bytes from a register. These
 310 bytes are taken beginning by the rightmost side of the register. The
 311 sign of the memory cell is not changed, unless it is part of the subfield.
 312 Because index registers only have 2 bytes and a sign, the rest of the bytes
 313 are assumed to be 0."
 314          2)
 315
 316     (ST6 storing "store I6" 30 field
 317          "Store in cell Nr. M the contents of rI6.
 318 The modification of the operation code represents the subfield of the
 319 memory cell that is to be overwritten with bytes from a register. These
 320 bytes are taken beginning by the rightmost side of the register. The
 321 sign of the memory cell is not changed, unless it is part of the subfield.
 322 Because index registers only have 2 bytes and a sign, the rest of the bytes
 323 are assumed to be 0."
 324          2)
 325
 326     (STJ storing "store J" 32 field
 327          "Store in cell Nr. M the contents of rJ.
 328 The modification of the operation code represents the subfield of the
 329 memory cell that is to be overwritten with bytes from a register. These
 330 bytes are taken beginning by the rightmost side of the register. The sign
 331 of rJ is always +, sign of the memory cell is not changed, unless it is
 332 part of the subfield. The default field for STJ is (0:2)."
 333          2)
 334
 335     (STZ storing "store zero" 33 field
 336          "Store in cell Nr. M '+ 0'.
 337 The modification of the operation code represents the subfield of the
 338 memory cell that is to be overwritten with zeros."
 339          2)
 340
 341     (ADD arithmetic "add" 1 field
 342          "Add to A the contents of cell Nr. M.
 343 Subfield is padded with zero to make a word.
 344 If the result is to large, the operation result modulo 1,073,741,823 (the
 345 maximum value storable in a MIX word) is stored in `rA', and the overflow
 346 toggle is set to TRUE."
 347          2)
 348
 349     (SUB arithmetic "subtract" 2 field
 350          "Subtract to A the contents of cell Nr. M.
 351 Subfield is padded with zero to make a word.
 352 If the result is to large, the operation result modulo 1,073,741,823 (the
 353 maximum value storable in a MIX word) is stored in `rA', and the overflow
 354 toggle is set to TRUE."
 355          2)
 356
 357     (MUL arithmetic "multiply" 3 field
 358          "Multiplies the contents of cell Nr. M with A, result is 10 bytes and stored in rA and rX.
 359 The sign is + if the sign of rA and cell M where the same, otherwise, it is -"
 360          10)
 361
 362     (DIV arithmetic "divide" 4 field
 363          "Both rA and rX are taken together and divided by cell Nr. M, quotient is placed in rA, remainder in rX.
 364 The sign is taken from rA, and after the divide the sign of rA is set to + when
 365 both the sign of rA and M where the same. Divide by zero and overflow of rA
 366 result in undefined behavior."
 367          12)
 368
 369     (ENTA address-transfer "enter A" 48
 370           "Literal value is stored in rA.
 371 Indexed, stores value of index in rA."
 372           1)
 373
 374     (ENTX address-transfer "enter X" 55
 375           "Literal value is stored in rX.
 376 Indexed, stores value of index in rX."
 377           1)
 378
 379     (ENT1 address-transfer "Enter rI1" 49
 380           "Literal value is stored in rI1.
 381 Indexed, stores value of index in rI1."
 382           1)
 383
 384     (ENT2 address-transfer "Enter rI2" 50
 385           "Literal value is stored in rI2.
 386 Indexed, stores value of index in rI2."
 387           1)
 388
 389     (ENT3 address-transfer "Enter rI3" 51
 390           "Literal value is stored in rI3.
 391 Indexed, stores value of index in rI3."
 392           1)
 393
 394     (ENT4 address-transfer "Enter rI4" 52
 395           "Literal value is stored in rI4.
 396 Indexed, stores value of index in rI4."
 397           1)
 398
 399     (ENT5 address-transfer "Enter rI5" 53
 400           "Literal value is stored in rI5.
 401 Indexed, stores value of index in rI5."
 402           1)
 403
 404     (ENT6 address-transfer "Enter rI6" 54
 405           "Literal value is stored in rI6.
 406 Indexed, stores value of index in rI6."
 407           1)
 408
 409     (ENNA address-transfer "enter negative A" 48
 410           "Literal value is stored in rA with opposite sign.
 411 Indexed, stores value of index in rA with opposite sign."
 412           1)
 413
 414     (ENNX address-transfer "enter negative X" 55
 415           "Literal value is stored in rX with opposite sign.
 416 Indexed, stores value of index in rX with opposite sign."
 417           1)
 418
 419     (ENN1 address-transfer "Enter negative rI1" 49
 420           "Literal value is stored in rI1 with opposite sign.
 421 Indexed, stores value of index in rI1 with opposite sign."
 422           1)
 423
 424     (ENN2 address-transfer "Enter negative rI2" 50
 425           "Literal value is stored in rI2 with opposite sign.
 426 Indexed, stores value of index in rI2 with opposite sign."
 427           1)
 428
 429     (ENN3 address-transfer "Enter negative rI3" 51
 430           "Literal value is stored in rI3 with opposite sign.
 431 Indexed, stores value of index in rI3 with opposite sign."
 432           1)
 433
 434     (ENN4 address-transfer "Enter negative rI4" 52
 435           "Literal value is stored in rI4 with opposite sign.
 436 Indexed, stores value of index in rI4 with opposite sign."
 437           1)
 438
 439     (ENN5 address-transfer "Enter negative rI5" 53
 440           "Literal value is stored in rI5 with opposite sign.
 441 Indexed, stores value of index in rI5 with opposite sign."
 442           1)
 443
 444     (ENN6 address-transfer "Enter negative rI6" 54
 445           "Literal value is stored in rI6 with opposite sign.
 446 Indexed, stores value of index in rI6 with opposite sign."
 447           1)
 448
 449     (INCA address-transfer "increase A" 48
 450           "Increase register A with the literal value of M.
 451 On overflow the overflow toggle is set."
 452           1)
 453
 454     (INCX address-transfer "increase X" 55
 455           "Increase register X with the literal value of M.
 456 On overflow the overflow toggle is set."
 457           1)
 458
 459     (INC1 address-transfer "increase I1" 49
 460           "Increase register I1 with the literal value of M.
 461 The result is undefined when the result does not fit in
 462 2 bytes."
 463           1)
 464
 465     (INC2 address-transfer "increase I2" 50
 466           "Increase register I2 with the literal value of M.
 467 The result is undefined when the result does not fit in
 468 2 bytes."
 469           1)
 470
 471     (INC3 address-transfer "increase I3" 51
 472           "Increase register I3 with the literal value of M.
 473 The result is undefined when the result does not fit in
 474 2 bytes."
 475           1)
 476
 477     (INC4 address-transfer "increase I4" 52
 478           "Increase register I4 with the literal value of M.
 479 The result is undefined when the result does not fit in
 480 2 bytes."
 481           1)
 482
 483     (INC5 address-transfer "increase I5" 53
 484           "Increase register I5 with the literal value of M.
 485 The result is undefined when the result does not fit in
 486 2 bytes."
 487           1)
 488
 489     (INC6 address-transfer "increase I6" 54
 490           "Increase register I6 with the literal value of M.
 491 The result is undefined when the result does not fit in
 492 2 bytes."
 493           1)
 494
 495     (DECA address-transfer "decrease A" 48
 496           "Decrease register A with the literal value of M.
 497 On overflow the overflow toggle is set."
 498           1)
 499
 500     (DECX address-transfer "decrease X" 55
 501           "Decrease register X with the literal value of M.
 502 On overflow the overflow toggle is set."
 503           1)
 504
 505     (DEC1 address-transfer "decrease I1" 49
 506           "Decrease register I1 with the literal value of M.
 507 The result is undefined when the result does not fit in
 508 2 bytes."
 509           1)
 510
 511     (DEC2 address-transfer "decrease I2" 50
 512           "Decrease register I2 with the literal value of M.
 513 The result is undefined when the result does not fit in
 514 2 bytes."
 515           1)
 516
 517     (DEC3 address-transfer "decrease I3" 51
 518           "Decrease register I3 with the literal value of M.
 519 The result is undefined when the result does not fit in
 520 2 bytes."
 521           1)
 522
 523     (DEC4 address-transfer "decrease I4" 52
 524           "Decrease register I4 with the literal value of M.
 525 The result is undefined when the result does not fit in
 526 2 bytes."
 527           1)
 528
 529     (DEC5 address-transfer "decrease I5" 53
 530           "Decrease register I5 with the literal value of M.
 531 The result is undefined when the result does not fit in
 532 2 bytes."
 533           1)
 534
 535     (DEC6 address-transfer "decrease I6" 54
 536           "Decrease register I6 with the literal value of M.
 537 The result is undefined when the result does not fit in
 538 2 bytes."
 539           1)
 540
 541     (CMPA comparison "compare A" 56 field
 542           "Compare contents of A with contents of M.
 543 The field specifier works on both fields. The comparison indicator
 544 is set to LESS, EQUAL or GREATER depending on the outcome."
 545           2)
 546
 547     (CMPX comparison "compare X" 63 field
 548           "Compare contents of rX with contents of M.
 549 The field specifier works on both fields. The comparison indicator
 550 is set to LESS, EQUAL or GREATER depending on the outcome."
 551           2)
 552
 553     (CMP1 comparison "compare I1" 57 field
 554           "Compare contents of rI1 with contents of M.
 555 The field specifier works on both fields. The comparison indicator
 556 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3
 557 have a value of 0."
 558           2)
 559
 560     (CMP2 comparison "compare I2" 58 field
 561           "Compare contents of rI2 with contents of M.
 562 The field specifier works on both fields. The comparison indicator
 563 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3
 564 have a value of 0."
 565           2)
 566
 567     (CMP3 comparison "compare I3" 59 field
 568           "Compare contents of rI3 with contents of M.
 569 The field specifier works on both fields. The comparison indicator
 570 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3
 571 have a value of 0."
 572           2)
 573
 574     (CMP4 comparison "compare I4" 60 field
 575           "Compare contents of rI4 with contents of M.
 576 The field specifier works on both fields. The comparison indicator
 577 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3
 578 have a value of 0."
 579           2)
 580
 581     (CMP5 comparison "compare I5" 61 field
 582           "Compare contents of rI5 with contents of M.
 583 The field specifier works on both fields. The comparison indicator
 584 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3
 585 have a value of 0."
 586           2)
 587
 588     (CMP6 comparison "compare I6" 62 field
 589           "Compare contents of rI6 with contents of M.
 590 The field specifier works on both fields. The comparison indicator
 591 is set to LESS, EQUAL or GREATER depending on the outcome. Bit 1,2 and 3
 592 have a value of 0."
 593           2)
 594
 595     (JMP jump "jump" 39
 596          "Unconditional jump.
 597 Register J is set to the value of the next instruction that would have
 598 been executed when there was no jump."
 599          1)
 600
 601     (JSJ jump "jump, save J" 39
 602          "Unconditional jump, but rJ is not modified."
 603          1)
 604
 605     (JOV jump "jump on overflow" 39
 606          "Jump if OV is set (and turn it off).
 607 Register J is set to the value of the next instruction that would have
 608 been executed when there was no jump."
 609          1)
 610
 611     (JNOV jump "Jump on no overflow" 39
 612           "Jump if OV is not set (and turn it off).
 613 Register J is set to the value of the next instruction that would have
 614 been executed when there was no jump."
 615           1)
 616
 617     (JL jump "Jump on less" 39
 618         "Jump if '[CM] = L'.
 619 Register J is set to the value of the next instruction that would have
 620 been executed when there was no jump."
 621         1)
 622
 623     (JE jump "Jump on equal" 39
 624         "Jump if '[CM] = E'.
 625 Register J is set to the value of the next instruction that would have
 626 been executed when there was no jump."
 627         1)
 628
 629     (JG jump "Jump on greater" 39
 630         "Jump if '[CM] = G'.
 631 Register J is set to the value of the next instruction that would have
 632 been executed when there was no jump."
 633         1)
 634
 635     (JGE jump "Jump on not less" 39
 636          "Jump if '[CM]' does not equal 'L'.
 637 Register J is set to the value of the next instruction that would have
 638 been executed when there was no jump."
 639          1)
 640
 641     (JNE jump "Jump on not equal" 39
 642          "Jump if '[CM]' does not equal 'E'.
 643 Register J is set to the value of the next instruction that would have
 644 been executed when there was no jump."
 645          1)
 646
 647     (JLE jump "Jump on not greater" 39
 648          "Jump if '[CM]' does not equal 'G'.
 649 Register J is set to the value of the next instruction that would have
 650 been executed when there was no jump."
 651          1)
 652
 653     (JAN jump "jump A negative" 40
 654          "Jump if the content of rA is negative.
 655 Register J is set to the value of the next instruction that would have
 656 been executed when there was no jump."
 657          1)
 658
 659     (JAZ jump "jump A zero" 40
 660          "Jump if the content of rA is zero.
 661 Register J is set to the value of the next instruction that would have
 662 been executed when there was no jump."
 663          1)
 664
 665     (JAP jump "jump A positive" 40
 666          "Jump if the content of rA is positive.
 667 Register J is set to the value of the next instruction that would have
 668 been executed when there was no jump."
 669          1)
 670
 671     (JANN jump "jump A non-negative" 40
 672           "Jump if the content of rA is non-negative.
 673 Register J is set to the value of the next instruction that would have
 674 been executed when there was no jump."
 675           1)
 676
 677     (JANZ jump "jump A non-zero" 40
 678           "Jump if the content of rA is non-zero.
 679 Register J is set to the value of the next instruction that would have
 680 been executed when there was no jump."
 681           1)
 682
 683     (JANP jump "jump A non-positive" 40
 684           "Jump if the content of rA is non-positive.
 685 Register J is set to the value of the next instruction that would have
 686 been executed when there was no jump."
 687           1)
 688
 689     (JXN jump "jump X negative" 47
 690          "Jump if the content of rX is negative.
 691 Register J is set to the value of the next instruction that would have
 692 been executed when there was no jump."
 693          1)
 694
 695     (JXZ jump "jump X zero" 47
 696          "Jump if the content of rX is zero.
 697 Register J is set to the value of the next instruction that would have
 698 been executed when there was no jump."
 699          1)
 700
 701     (JXP jump "jump X positive" 47
 702          "Jump if the content of rX is positive.
 703 Register J is set to the value of the next instruction that would have
 704 been executed when there was no jump."
 705          1)
 706
 707     (JXNN jump "jump X non-negative" 47
 708           "Jump if the content of rX is non-negative.
 709 Register J is set to the value of the next instruction that would have
 710 been executed when there was no jump."
 711           1)
 712
 713     (JXNZ jump "jump X non-zero" 47
 714           "Jump if the content of rX is non-zero.
 715 Register J is set to the value of the next instruction that would have
 716 been executed when there was no jump."
 717           1)
 718
 719     (JXNP jump "jump X non-positive" 47
 720           "Jump if the content of rX is non-positive.
 721 Register J is set to the value of the next instruction that would have
 722 been executed when there was no jump."
 723           1)
 724
 725     (J1N jump "jump I1 negative" 41
 726          "Jump if the content of rI1 is negative.
 727 Register J is set to the value of the next instruction that would have
 728 been executed when there was no jump."
 729          1)
 730
 731     (J1Z jump "jump I1 zero" 41
 732          "Jump if the content of rI1 is zero.
 733 Register J is set to the value of the next instruction that would have
 734 been executed when there was no jump."
 735          1)
 736
 737     (J1P jump "jump I1 positive" 41
 738          "Jump if the content of rI1 is positive.
 739 Register J is set to the value of the next instruction that would have
 740 been executed when there was no jump."
 741          1)
 742
 743     (J1NN jump "jump I1 non-negative" 41
 744           "Jump if the content of rI1 is non-negative.
 745 Register J is set to the value of the next instruction that would have
 746 been executed when there was no jump."
 747           1)
 748
 749     (J1NZ jump "jump I1 non-zero" 41
 750           "Jump if the content of rI1 is non-zero.
 751 Register J is set to the value of the next instruction that would have
 752 been executed when there was no jump."
 753           1)
 754
 755     (J1NP jump "jump I1 non-positive" 41
 756           "Jump if the content of rI1 is non-positive.
 757 Register J is set to the value of the next instruction that would have
 758 been executed when there was no jump."
 759           1)
 760
 761     (J2N jump "jump I2 negative" 41
 762          "Jump if the content of rI2 is negative.
 763 Register J is set to the value of the next instruction that would have
 764 been executed when there was no jump."
 765          1)
 766
 767     (J2Z jump "jump I2 zero" 41
 768          "Jump if the content of rI2 is zero.
 769 Register J is set to the value of the next instruction that would have
 770 been executed when there was no jump."
 771          1)
 772
 773     (J2P jump "jump I2 positive" 41
 774          "Jump if the content of rI2 is positive.
 775 Register J is set to the value of the next instruction that would have
 776 been executed when there was no jump."
 777          1)
 778
 779     (J2NN jump "jump I2 non-negative" 41
 780           "Jump if the content of rI2 is non-negative.
 781 Register J is set to the value of the next instruction that would have
 782 been executed when there was no jump."
 783           1)
 784
 785     (J2NZ jump "jump I2 non-zero" 41
 786           "Jump if the content of rI2 is non-zero.
 787 Register J is set to the value of the next instruction that would have
 788 been executed when there was no jump."
 789           1)
 790
 791     (J2NP jump "jump I2 non-positive" 41
 792           "Jump if the content of rI2 is non-positive.
 793 Register J is set to the value of the next instruction that would have
 794 been executed when there was no jump."
 795           1)
 796
 797     (J3N jump "jump I3 negative" 41
 798          "Jump if the content of rI3 is negative.
 799 Register J is set to the value of the next instruction that would have
 800 been executed when there was no jump."
 801          1)
 802
 803     (J3Z jump "jump I3 zero" 41
 804          "Jump if the content of rI3 is zero.
 805 Register J is set to the value of the next instruction that would have
 806 been executed when there was no jump."
 807          1)
 808
 809     (J3P jump "jump I3 positive" 41
 810          "Jump if the content of rI3 is positive.
 811 Register J is set to the value of the next instruction that would have
 812 been executed when there was no jump."
 813          1)
 814
 815     (J3NN jump "jump I3 non-negative" 41
 816           "Jump if the content of rI3 is non-negative.
 817 Register J is set to the value of the next instruction that would have
 818 been executed when there was no jump."
 819           1)
 820
 821     (J3NZ jump "jump I3 non-zero" 41
 822           "Jump if the content of rI3 is non-zero.
 823 Register J is set to the value of the next instruction that would have
 824 been executed when there was no jump."
 825           1)
 826
 827     (J3NP jump "jump I3 non-positive" 41
 828           "Jump if the content of rI3 is non-positive.
 829 Register J is set to the value of the next instruction that would have
 830 been executed when there was no jump."
 831           1)
 832
 833     (J4N jump "jump I4 negative" 41
 834          "Jump if the content of rI4 is negative.
 835 Register J is set to the value of the next instruction that would have
 836 been executed when there was no jump."
 837          1)
 838
 839     (J4Z jump "jump I4 zero" 41
 840          "Jump if the content of rI4 is zero.
 841 Register J is set to the value of the next instruction that would have
 842 been executed when there was no jump."
 843          1)
 844
 845     (J4P jump "jump I4 positive" 41
 846          "Jump if the content of rI4 is positive.
 847 Register J is set to the value of the next instruction that would have
 848 been executed when there was no jump."
 849          1)
 850
 851     (J4NN jump "jump I4 non-negative" 41
 852           "Jump if the content of rI4 is non-negative.
 853 Register J is set to the value of the next instruction that would have
 854 been executed when there was no jump."
 855           1)
 856
 857     (J4NZ jump "jump I4 non-zero" 41
 858           "Jump if the content of rI4 is non-zero.
 859 Register J is set to the value of the next instruction that would have
 860 been executed when there was no jump."
 861           1)
 862
 863     (J4NP jump "jump I4 non-positive" 41
 864           "Jump if the content of rI4 is non-positive.
 865 Register J is set to the value of the next instruction that would have
 866 been executed when there was no jump."
 867           1)
 868
 869     (J5N jump "jump I5 negative" 41
 870          "Jump if the content of rI5 is negative.
 871 Register J is set to the value of the next instruction that would have
 872 been executed when there was no jump."
 873          1)
 874
 875     (J5Z jump "jump I5 zero" 41
 876          "Jump if the content of rI5 is zero.
 877 Register J is set to the value of the next instruction that would have
 878 been executed when there was no jump."
 879          1)
 880
 881     (J5P jump "jump I5 positive" 41
 882          "Jump if the content of rI5 is positive.
 883 Register J is set to the value of the next instruction that would have
 884 been executed when there was no jump."
 885          1)
 886
 887     (J5NN jump "jump I5 non-negative" 41
 888           "Jump if the content of rI5 is non-negative.
 889 Register J is set to the value of the next instruction that would have
 890 been executed when there was no jump."
 891           1)
 892
 893     (J5NZ jump "jump I5 non-zero" 41
 894           "Jump if the content of rI5 is non-zero.
 895 Register J is set to the value of the next instruction that would have
 896 been executed when there was no jump."
 897           1)
 898
 899     (J5NP jump "jump I5 non-positive" 41
 900           "Jump if the content of rI5 is non-positive.
 901 Register J is set to the value of the next instruction that would have
 902 been executed when there was no jump."
 903           1)
 904
 905     (J6N jump "jump I6 negative" 41
 906          "Jump if the content of rI6 is negative.
 907 Register J is set to the value of the next instruction that would have
 908 been executed when there was no jump."
 909          1)
 910
 911     (J6Z jump "jump I6 zero" 41
 912          "Jump if the content of rI6 is zero.
 913 Register J is set to the value of the next instruction that would have
 914 been executed when there was no jump."
 915          1)
 916
 917     (J6P jump "jump I6 positive" 41
 918          "Jump if the content of rI6 is positive.
 919 Register J is set to the value of the next instruction that would have
 920 been executed when there was no jump."
 921          1)
 922
 923     (J6NN jump "jump I6 non-negative" 41
 924           "Jump if the content of rI6 is non-negative.
 925 Register J is set to the value of the next instruction that would have
 926 been executed when there was no jump."
 927           1)
 928
 929     (J6NZ jump "jump I6 non-zero" 41
 930           "Jump if the content of rI6 is non-zero.
 931 Register J is set to the value of the next instruction that would have
 932 been executed when there was no jump."
 933           1)
 934
 935     (J6NP jump "jump I6 non-positive" 41
 936           "Jump if the content of rI6 is non-positive.
 937 Register J is set to the value of the next instruction that would have
 938 been executed when there was no jump."
 939           1)
 940
 941     (SLA miscellaneous "shift left A" 6
 942          "Shift to A, M bytes left.
 943 Hero's will be added to the right."
 944          2)
 945
 946     (SRA miscellaneous "shift right A" 6
 947          "Shift to A, M bytes right.
 948 Zeros will be added to the left."
 949          2)
 950
 951     (SLAX miscellaneous "shift left AX" 6
 952           "Shift AX, M bytes left.
 953 Zeros will be added to the right."
 954           2)
 955
 956
 957     (SRAX miscellaneous "shift right AX" 6
 958           "Shift AX, M bytes right.
 959 Zeros will be added to the left."
 960           2)
 961
 962     (SLC miscellaneous "shift left AX circularly" 6
 963          "Shift AX, M bytes left circularly.
 964 The bytes that fall off to the left will be added to the right."
 965          2)
 966
 967     (SRC miscellaneous "shift right AX circularly" 6
 968          "Shift AX, M bytes right circularly.
 969 The bytes that fall off to the right will be added to the left."
 970          2)
 971
 972     (MOVE miscellaneous "move" 7 number
 973           "Move MOD words from M to the location stored in rI1."
 974           (+ 1 (* 2 number)))
 975
 976     (NOP miscellaneous "no operation" 0 ignored
 977          "No operation, M and F are not used by the machine."
 978          1)
 979
 980     (HLT miscellaneous "halt" 5
 981          "Halt.
 982 Stop instruction fetching."
 983          1)
 984
 985     (IN input-output "input" 36 unit
 986         "Transfer a block of words from the specified unit to memory.
 987 The transfer starts at address M."
 988         1)
 989
 990     (OUT input-output "output" 37 unit
 991          "Transfer a block of words from memory.
 992 The transfer starts at address M to the specified unit."
 993          1)
 994
 995     (IOC input-output "input-output control" 35 unit
 996          "Perform a control operation.
 997 The control operation is given by M on the specified unit."
 998          1)
 999
1000     (JRED input-output "jump ready" 38 unit
1001           "Jump to M if the specified unit is ready."
1002           1)
1003
1004     (JBUS input-output "jump busy" 34 unit
1005           "Jump to M if the specified unit is busy."
1006           1)
1007
1008     (NUM conversion "convert to numeric" 5
1009          "Convert rAX to its numerical value and store it in rA.
1010 the register rAX is assumed to contain a character representation of
1011 a number."
1012          10)
1013
1014     (CHAR conversion "convert to characters" 5
1015           "Convert the number stored in rA to a character representation.
1016 The converted character representation is stored in rAX."
1017           10))
1018
1019   "Alist that contains all the possible operation codes for mix.
1020 Each elt has the form
1021   (OP-CODE GROUP FULL-NAME C-BYTE F-BYTE DESCRIPTION EXECUTION-TIME)
1022 Where OP-CODE is the text of the opcode as a symbol,
1023 FULL-NAME is the human readable name as a string,
1024 C-BYTE is the operation code telling what operation is to be performed,
1025 F-BYTE holds a modification of the operation code which can be a symbol
1026   or a number,
1027 DESCRIPTION contains an string with a description about the operation code and
1028 EXECUTION-TIME holds info about the time it takes, number or string.")
1029 ;; (makunbound 'mixal-operation-codes-alist)
1030
1031
1032 ;;; Font-locking:
1033 (defvar mixal-font-lock-syntactic-keywords
1034   ;; Normal comments start with a * in column 0 and end at end of line.
1035   '(("^\\*" (0 '(11)))                  ;(string-to-syntax "<") == '(11)
1036     ;; Every line can end with a comment which is placed after the operand.
1037     ;; I assume here that mnemonics without operands can not have a comment.
1038     ("^[[:alnum:]]*[ \t]+[[:alnum:]]+[ \t]+[^ \n\t]+[ \t]*\\([ \t]\\)[^\n \t]"
1039      (1 '(11)))))
1040
1041 (defvar mixal-font-lock-keywords
1042   `(("^\\([A-Z0-9a-z]+\\)"
1043      (1 mixal-font-lock-label-face))
1044     (,(regexp-opt (mapcar (lambda (x) (symbol-name (car x)))
1045                           mixal-operation-codes-alist) 'words)
1046      . mixal-font-lock-operation-code-face)
1047     (,(regexp-opt mixal-assembly-pseudoinstructions 'words)
1048      . mixal-font-lock-assembly-pseudoinstruction-face)
1049     ("^[A-Z0-9a-z]*[ \t]+[A-ZO-9a-z]+[ \t]+\\(=.*=\\)"
1050      (1 font-lock-constant-face)))
1051   "Keyword highlighting specification for `mixal-mode'.")
1052 ;; (makunbound 'mixal-font-lock-keywords)
1053
1054 (defvar mixal-describe-operation-code-history nil
1055   "History list for describe operation code.")
1056
1057 (defun mixal-describe-operation-code (op-code)
1058   "Display the full documentation of OP-CODE."
1059   (interactive
1060    (list
1061     (let* ((completion-ignore-case t)
1062            ;; we already have a list, but it is not in the right format
1063            ;; transform it to a valid table so completition can use it
1064            (table (mapcar '(lambda (elm)
1065                              (cons (symbol-name (car elm)) nil))
1066                           mixal-operation-codes-alist))
1067            ;; prompt is different depending on we are close to a valid op-code
1068            (have-default (assq (intern-soft (current-word))
1069                                mixal-operation-codes-alist))
1070            (prompt (concat "Describe operation code "
1071                            (if have-default
1072                                (concat "(default " (current-word) "): ")
1073                              ": "))))
1074       ;; As the operation code to the user.
1075       (completing-read prompt table nil t nil
1076                        'mixal-describe-operation-code-history
1077                        (current-word)))))
1078   ;; get the info on the op-code and output it to the help buffer
1079   (let ((op-code-help (assq (intern-soft op-code) mixal-operation-codes-alist)))
1080     (when op-code-help
1081       (with-output-to-temp-buffer (buffer-name (get-buffer-create "*Help*"))
1082         (princ op-code) (princ " is an mix operation code\n\n")
1083         (princ (nth 5 op-code-help)) (terpri) (terpri)
1084         (princ "      group: ") (princ (nth 1 op-code-help)) (terpri)
1085         (princ "  nice name: ") (princ (nth 2 op-code-help)) (terpri)
1086         (princ " OPCODE / C: ") (princ (nth 3 op-code-help)) (terpri)
1087         (princ "    MOD / F: ") (princ (nth 4 op-code-help)) (terpri)
1088         (princ "       time: ") (princ (nth 6 op-code-help)) (terpri)))))
1089
1090 ;;;; Running
1091 (defun mixal-run ()
1092   "Run mixal file in current buffer, assumes that file has been compiled."
1093   (interactive)
1094   (mixvm (concat "mixvm -r -t -d "
1095                  (file-name-sans-extension (buffer-file-name)))))
1096
1097 (defun mixal-debug ()
1098   "Start mixvm for debugging.
1099 Assumes that file has been compiled with debugging support."
1100   (interactive)
1101   (mixvm (concat "mixvm "
1102                  (file-name-sans-extension (buffer-file-name)))))
1103
1104 ;;;###autoload
1105 (define-derived-mode mixal-mode fundamental-mode "mixal"
1106   "Major mode for the mixal asm language.
1107 \\{mixal-mode-map}"
1108   (set (make-local-variable 'comment-start) "*")
1109   (set (make-local-variable 'comment-start-skip) "^\\*[ \t]*")
1110   (set (make-local-variable 'font-lock-defaults)
1111        `(mixal-font-lock-keywords nil nil nil nil
1112          (font-lock-syntactic-keywords . ,mixal-font-lock-syntactic-keywords)
1113          (parse-sexp-lookup-properties . t)))
1114   ;; might add an indent function in the future
1115   ;;  (set (make-local-variable 'indent-line-function) 'mixal-indent-line)
1116   (set (make-local-variable 'compile-command) (concat "mixasm "
1117                                                       buffer-file-name))
1118   ;; mixasm will do strange when there is no final newline,
1119   ;; so let Emacs ensure that it is always there
1120   (set (make-local-variable 'require-final-newline)
1121        mode-require-final-newline))
1122
1123 ;;;###autoload
1124 (add-to-list 'auto-mode-alist '("\\.mixal\\'" . mixal-mode))
1125
1126 (provide 'mixal-mode)
1127
1128 ;; arch-tag: be7c128a-bf61-4951-a90e-9398267ce3f3
1129 ;;; mixal-mode.el ends here