change DxeSmmDriverEntryPoint library class name to UefiEntryPoint
[edk2.git] / DuetPkg / PciBusNoEnumerationDxe / PciCommand.h
blob3e948fdbb2193fe6384177452a281dc9c1d419cd
1 /*++
3 Copyright (c) 2005 - 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 Module Name:
14 PciCommand.h
16 Abstract:
18 PCI Bus Driver
20 Revision History
22 --*/
24 #ifndef _EFI_PCI_COMMAND_H
25 #define _EFI_PCI_COMMAND_H
27 #include "PciBus.h"
30 // The PCI Command register bits owned by PCI Bus driver.
32 // They should be cleared at the beginning. The other registers
33 // are owned by chipset, we should not touch them.
35 #define EFI_PCI_COMMAND_BITS_OWNED ( \
36 EFI_PCI_COMMAND_IO_SPACE | \
37 EFI_PCI_COMMAND_MEMORY_SPACE | \
38 EFI_PCI_COMMAND_BUS_MASTER | \
39 EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \
40 EFI_PCI_COMMAND_VGA_PALETTE_SNOOP | \
41 EFI_PCI_COMMAND_FAST_BACK_TO_BACK \
45 // The PCI Bridge Control register bits owned by PCI Bus driver.
46 //
47 // They should be cleared at the beginning. The other registers
48 // are owned by chipset, we should not touch them.
50 #define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
51 EFI_PCI_BRIDGE_CONTROL_ISA | \
52 EFI_PCI_BRIDGE_CONTROL_VGA | \
53 EFI_PCI_BRIDGE_CONTROL_VGA_16 | \
54 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
58 // The PCCard Bridge Control register bits owned by PCI Bus driver.
59 //
60 // They should be cleared at the beginning. The other registers
61 // are owned by chipset, we should not touch them.
63 #define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
64 EFI_PCI_BRIDGE_CONTROL_ISA | \
65 EFI_PCI_BRIDGE_CONTROL_VGA | \
66 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
69 EFI_STATUS
70 PciReadCommandRegister (
71 IN PCI_IO_DEVICE *PciIoDevice,
72 OUT UINT16 *Command
76 EFI_STATUS
77 PciSetCommandRegister (
78 IN PCI_IO_DEVICE *PciIoDevice,
79 IN UINT16 Command
82 EFI_STATUS
83 PciEnableCommandRegister (
84 IN PCI_IO_DEVICE *PciIoDevice,
85 IN UINT16 Command
88 EFI_STATUS
89 PciDisableCommandRegister (
90 IN PCI_IO_DEVICE *PciIoDevice,
91 IN UINT16 Command
94 EFI_STATUS
95 PciDisableBridgeControlRegister (
96 IN PCI_IO_DEVICE *PciIoDevice,
97 IN UINT16 Command
101 EFI_STATUS
102 PciEnableBridgeControlRegister (
103 IN PCI_IO_DEVICE *PciIoDevice,
104 IN UINT16 Command
107 EFI_STATUS
108 PciReadBridgeControlRegister (
109 IN PCI_IO_DEVICE *PciIoDevice,
110 OUT UINT16 *Command
113 BOOLEAN
114 PciCapabilitySupport (
115 IN PCI_IO_DEVICE *PciIoDevice
117 /*++
119 Routine Description:
121 TODO: Add function description
123 Arguments:
125 PciIoDevice - TODO: add argument description
127 Returns:
129 TODO: add return values
131 --*/
134 EFI_STATUS
135 LocateCapabilityRegBlock (
136 IN PCI_IO_DEVICE *PciIoDevice,
137 IN UINT8 CapId,
138 IN OUT UINT8 *Offset,
139 OUT UINT8 *NextRegBlock OPTIONAL
141 /*++
143 Routine Description:
145 Locate Capability register.
147 Arguments:
149 PciIoDevice - A pointer to the PCI_IO_DEVICE.
150 CapId - The capability ID.
151 Offset - A pointer to the offset.
152 As input: the default offset;
153 As output: the offset of the found block.
154 NextRegBlock - An optional pointer to return the value of next block.
156 Returns:
158 EFI_UNSUPPORTED - The Pci Io device is not supported.
159 EFI_NOT_FOUND - The Pci Io device cannot be found.
160 EFI_SUCCESS - The Pci Io device is successfully located.
162 --*/
166 #endif