- Factor out bge_{disable,enable}_intr().
- In bge_enable_intr(), trigger another hardware interrupt after clearing
interrupt mask, since any writing to BGE_MBX_IRQ0_LO will acknowledge
interrupts. Add comment about it.
- In bge_disable_intr(), acknowledge and disable interrupt by writing 1 to
BGE_MBX_IRQ0_LO, since setting interrupt mask itself does not de-assert
a currently asserted interrupt. Add comment about it.
- Since we have explicitly disabled interrupt using BGE_MBX_IRQ0_LO, set
"RX/TX coalesced BD count during interrupt" to 1. In this way, RX/TX
coalescing engine will properly update status block, which contains RX/TX
descriptor index. This only affects polling(4) operation, since we don't
have a "during interrupt" period in our interrupt handler.
- Fix comment.
Tested-with: 5751, 5701(altima)