* Greatly reduce the complexity of the LWKT messaging and port abstraction.
[dragonfly/vkernel-mp.git] / sys / bus / usb / ohci_pci.c
blobf7c9480c92c5a5e8093311000faeb8e8fb2eedda
1 /*
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Lennart Augustsson (augustss@carlstedt.se) at
7 * Carlstedt Research & Technology.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
37 * $FreeBSD: src/sys/dev/usb/ohci_pci.c,v 1.44.2.1 2006/01/29 01:26:46 iedowse Exp $
38 * $DragonFly: src/sys/bus/usb/ohci_pci.c,v 1.8 2007/05/01 00:05:16 dillon Exp $
42 * USB Open Host Controller driver.
44 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
47 /* The low level controller code for OHCI has been split into
48 * PCI probes and OHCI specific code. This was done to facilitate the
49 * sharing of code between *BSD's
52 #include "opt_bus.h"
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/kernel.h>
57 #include <sys/module.h>
58 #include <sys/bus.h>
59 #include <sys/queue.h>
60 #include <sys/rman.h>
62 #include <bus/pci/pcivar.h>
63 #include <bus/pci/pcireg.h>
65 #include <bus/usb/usb.h>
66 #include <bus/usb/usbdi.h>
67 #include <bus/usb/usbdivar.h>
68 #include <bus/usb/usb_mem.h>
70 #include <bus/usb/ohcireg.h>
71 #include <bus/usb/ohcivar.h>
73 #define PCI_OHCI_VENDORID_ACERLABS 0x10b9
74 #define PCI_OHCI_VENDORID_AMD 0x1022
75 #define PCI_OHCI_VENDORID_APPLE 0x106b
76 #define PCI_OHCI_VENDORID_ATI 0x1002
77 #define PCI_OHCI_VENDORID_CMDTECH 0x1095
78 #define PCI_OHCI_VENDORID_NEC 0x1033
79 #define PCI_OHCI_VENDORID_NVIDIA 0x12D2
80 #define PCI_OHCI_VENDORID_NVIDIA2 0x10DE
81 #define PCI_OHCI_VENDORID_OPTI 0x1045
82 #define PCI_OHCI_VENDORID_SIS 0x1039
83 #define PCI_OHCI_VENDORID_SUN 0x108e
85 #define PCI_OHCI_DEVICEID_ALADDIN_V 0x523710b9
86 static const char *ohci_device_aladdin_v = "AcerLabs M5237 (Aladdin-V) USB controller";
88 #define PCI_OHCI_DEVICEID_AMD756 0x740c1022
89 static const char *ohci_device_amd756 = "AMD-756 USB Controller";
91 #define PCI_OHCI_DEVICEID_AMD766 0x74141022
92 static const char *ohci_device_amd766 = "AMD-766 USB Controller";
94 #define PCI_OHCI_DEVICEID_SB400_1 0x43741002
95 #define PCI_OHCI_DEVICEID_SB400_2 0x43751002
96 static const char *ohci_device_sb400 = "ATI SB400 USB Controller";
98 #define PCI_OHCI_DEVICEID_FIRELINK 0xc8611045
99 static const char *ohci_device_firelink = "OPTi 82C861 (FireLink) USB controller";
101 #define PCI_OHCI_DEVICEID_NEC 0x00351033
102 static const char *ohci_device_nec = "NEC uPD 9210 USB controller";
104 #define PCI_OHCI_DEVICEID_NFORCE3 0x00d710de
105 static const char *ohci_device_nforce3 = "nVidia nForce3 USB Controller";
107 #define PCI_OHCI_DEVICEID_USB0670 0x06701095
108 static const char *ohci_device_usb0670 = "CMD Tech 670 (USB0670) USB controller";
110 #define PCI_OHCI_DEVICEID_USB0673 0x06731095
111 static const char *ohci_device_usb0673 = "CMD Tech 673 (USB0673) USB controller";
113 #define PCI_OHCI_DEVICEID_SIS5571 0x70011039
114 static const char *ohci_device_sis5571 = "SiS 5571 USB controller";
116 #define PCI_OHCI_DEVICEID_KEYLARGO 0x0019106b
117 static const char *ohci_device_keylargo = "Apple KeyLargo USB controller";
119 #define PCI_OHCI_DEVICEID_PCIO2USB 0x1103108e
120 static const char *ohci_device_pcio2usb = "Sun PCIO-2 USB controller";
122 static const char *ohci_device_generic = "OHCI (generic) USB controller";
124 #define PCI_OHCI_BASE_REG 0x10
127 static int ohci_pci_attach(device_t self);
128 static int ohci_pci_detach(device_t self);
129 static int ohci_pci_suspend(device_t self);
130 static int ohci_pci_resume(device_t self);
132 static int
133 ohci_pci_suspend(device_t self)
135 ohci_softc_t *sc = device_get_softc(self);
136 int err;
138 err = bus_generic_suspend(self);
139 if (err)
140 return err;
141 ohci_power(PWR_SUSPEND, sc);
143 return 0;
146 static int
147 ohci_pci_resume(device_t self)
149 ohci_softc_t *sc = device_get_softc(self);
151 #ifndef BURN_BRIDGES
152 uint32_t reg, int_line;
154 if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
155 device_printf(self, "chip is in D%d mode "
156 "-- setting to D0\n", pci_get_powerstate(self));
157 reg = pci_read_config(self, PCI_CBMEM, 4);
158 int_line = pci_read_config(self, PCIR_INTLINE, 4);
159 pci_set_powerstate(self, PCI_POWERSTATE_D0);
160 pci_write_config(self, PCI_CBMEM, reg, 4);
161 pci_write_config(self, PCIR_INTLINE, int_line, 4);
163 #endif /* !BURN_BRIDGES */
165 ohci_power(PWR_RESUME, sc);
166 bus_generic_resume(self);
168 return 0;
171 static const char *
172 ohci_pci_match(device_t self)
174 u_int32_t device_id = pci_get_devid(self);
176 switch (device_id) {
177 case PCI_OHCI_DEVICEID_ALADDIN_V:
178 return (ohci_device_aladdin_v);
179 case PCI_OHCI_DEVICEID_AMD756:
180 return (ohci_device_amd756);
181 case PCI_OHCI_DEVICEID_AMD766:
182 return (ohci_device_amd766);
183 case PCI_OHCI_DEVICEID_SB400_1:
184 case PCI_OHCI_DEVICEID_SB400_2:
185 return (ohci_device_sb400);
186 case PCI_OHCI_DEVICEID_USB0670:
187 return (ohci_device_usb0670);
188 case PCI_OHCI_DEVICEID_USB0673:
189 return (ohci_device_usb0673);
190 case PCI_OHCI_DEVICEID_FIRELINK:
191 return (ohci_device_firelink);
192 case PCI_OHCI_DEVICEID_NEC:
193 return (ohci_device_nec);
194 case PCI_OHCI_DEVICEID_NFORCE3:
195 return (ohci_device_nforce3);
196 case PCI_OHCI_DEVICEID_SIS5571:
197 return (ohci_device_sis5571);
198 case PCI_OHCI_DEVICEID_KEYLARGO:
199 return (ohci_device_keylargo);
200 case PCI_OHCI_DEVICEID_PCIO2USB:
201 return (ohci_device_pcio2usb);
202 default:
203 if (pci_get_class(self) == PCIC_SERIALBUS
204 && pci_get_subclass(self) == PCIS_SERIALBUS_USB
205 && pci_get_progif(self) == PCI_INTERFACE_OHCI) {
206 return (ohci_device_generic);
210 return NULL; /* dunno */
213 static int
214 ohci_pci_probe(device_t self)
216 const char *desc = ohci_pci_match(self);
218 if (desc) {
219 device_set_desc(self, desc);
220 device_set_async_attach(self, TRUE);
221 return 0;
222 } else {
223 return ENXIO;
227 static int
228 ohci_pci_attach(device_t self)
230 ohci_softc_t *sc = device_get_softc(self);
231 int err;
232 int rid;
234 /* XXX where does it say so in the spec? */
235 sc->sc_bus.usbrev = USBREV_1_0;
237 pci_enable_busmaster(self);
240 * Some Sun PCIO-2 USB controllers have their intpin register
241 * bogusly set to 0, although it should be 4. Correct that.
243 if (pci_get_devid(self) == PCI_OHCI_DEVICEID_PCIO2USB &&
244 pci_get_intpin(self) == 0)
245 pci_set_intpin(self, 4);
247 rid = PCI_CBMEM;
248 sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
249 RF_ACTIVE);
250 if (!sc->io_res) {
251 device_printf(self, "Could not map memory\n");
252 return ENXIO;
254 sc->iot = rman_get_bustag(sc->io_res);
255 sc->ioh = rman_get_bushandle(sc->io_res);
257 rid = 0;
258 sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
259 RF_SHAREABLE | RF_ACTIVE);
260 if (sc->irq_res == NULL) {
261 device_printf(self, "Could not allocate irq\n");
262 ohci_pci_detach(self);
263 return ENXIO;
265 sc->sc_bus.bdev = device_add_child(self, "usb", -1);
266 if (!sc->sc_bus.bdev) {
267 device_printf(self, "Could not add USB device\n");
268 ohci_pci_detach(self);
269 return ENOMEM;
271 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
273 /* ohci_pci_match will never return NULL if ohci_pci_probe succeeded */
274 device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
275 switch (pci_get_vendor(self)) {
276 case PCI_OHCI_VENDORID_ACERLABS:
277 ksprintf(sc->sc_vendor, "AcerLabs");
278 break;
279 case PCI_OHCI_VENDORID_AMD:
280 ksprintf(sc->sc_vendor, "AMD");
281 break;
282 case PCI_OHCI_VENDORID_APPLE:
283 ksprintf(sc->sc_vendor, "Apple");
284 break;
285 case PCI_OHCI_VENDORID_ATI:
286 ksprintf(sc->sc_vendor, "ATI");
287 break;
288 case PCI_OHCI_VENDORID_CMDTECH:
289 ksprintf(sc->sc_vendor, "CMDTECH");
290 break;
291 case PCI_OHCI_VENDORID_NEC:
292 ksprintf(sc->sc_vendor, "NEC");
293 break;
294 case PCI_OHCI_VENDORID_NVIDIA:
295 case PCI_OHCI_VENDORID_NVIDIA2:
296 ksprintf(sc->sc_vendor, "nVidia");
297 break;
298 case PCI_OHCI_VENDORID_OPTI:
299 ksprintf(sc->sc_vendor, "OPTi");
300 break;
301 case PCI_OHCI_VENDORID_SIS:
302 ksprintf(sc->sc_vendor, "SiS");
303 break;
304 default:
305 if (bootverbose)
306 device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
307 pci_get_devid(self));
308 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
311 err = bus_setup_intr(self, sc->irq_res, 0,
312 (driver_intr_t *) ohci_intr, sc, &sc->ih, NULL);
313 if (err) {
314 device_printf(self, "Could not setup irq, %d\n", err);
315 sc->ih = NULL;
316 ohci_pci_detach(self);
317 return ENXIO;
319 err = ohci_init(sc);
320 if (!err) {
321 sc->sc_flags |= OHCI_SCFLG_DONEINIT;
322 err = device_probe_and_attach(sc->sc_bus.bdev);
325 if (err) {
326 device_printf(self, "USB init failed\n");
327 ohci_pci_detach(self);
328 return EIO;
330 return 0;
333 static int
334 ohci_pci_detach(device_t self)
336 ohci_softc_t *sc = device_get_softc(self);
338 if (sc->sc_flags & OHCI_SCFLG_DONEINIT) {
339 ohci_detach(sc, 0);
340 sc->sc_flags &= ~OHCI_SCFLG_DONEINIT;
343 if (sc->irq_res && sc->ih) {
344 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
346 if (err)
347 /* XXX or should we panic? */
348 device_printf(self, "Could not tear down irq, %d\n",
349 err);
350 sc->ih = NULL;
352 if (sc->sc_bus.bdev) {
353 device_delete_child(self, sc->sc_bus.bdev);
354 sc->sc_bus.bdev = NULL;
356 if (sc->irq_res) {
357 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
358 sc->irq_res = NULL;
360 if (sc->io_res) {
361 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
362 sc->io_res = NULL;
363 sc->iot = 0;
364 sc->ioh = 0;
366 return 0;
369 static device_method_t ohci_methods[] = {
370 /* Device interface */
371 DEVMETHOD(device_probe, ohci_pci_probe),
372 DEVMETHOD(device_attach, ohci_pci_attach),
373 DEVMETHOD(device_detach, ohci_pci_detach),
374 DEVMETHOD(device_suspend, ohci_pci_suspend),
375 DEVMETHOD(device_resume, ohci_pci_resume),
376 DEVMETHOD(device_shutdown, bus_generic_shutdown),
378 /* Bus interface */
379 DEVMETHOD(bus_print_child, bus_generic_print_child),
381 {0, 0}
384 static driver_t ohci_driver = {
385 "ohci",
386 ohci_methods,
387 sizeof(ohci_softc_t),
390 static devclass_t ohci_devclass;
392 DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, 0, 0);
393 DRIVER_MODULE(ohci, cardbus, ohci_driver, ohci_devclass, 0, 0);