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For rum(4) and ural(4):
[dragonfly/vkernel-mp.git] / sys / dev / netif / ural / if_ural.c
blob569c0ce57cf2b43ab1c7591831952a5cf201575e
1 /* $FreeBSD: src/sys/dev/usb/if_ural.c,v 1.10.2.8 2006/07/08 07:48:43 maxim Exp $ */
2 /* $DragonFly: src/sys/dev/netif/ural/if_ural.c,v 1.13 2007/05/27 10:53:29 sephe Exp $ */
3
4 /*-
5 * Copyright (c) 2005, 2006
6 * Damien Bergamini <damien.bergamini@free.fr>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 /*-
22 * Ralink Technology RT2500USB chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/param.h>
27 #include <sys/bus.h>
28 #include <sys/endian.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
31 #include <sys/mbuf.h>
32 #include <sys/rman.h>
33 #include <sys/socket.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
36
37 #include <net/bpf.h>
38 #include <net/ethernet.h>
39 #include <net/if.h>
40 #include <net/if_arp.h>
41 #include <net/if_dl.h>
42 #include <net/if_media.h>
43 #include <net/ifq_var.h>
44
45 #include <netproto/802_11/ieee80211_var.h>
46 #include <netproto/802_11/ieee80211_radiotap.h>
47 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
48
49 #include <bus/usb/usb.h>
50 #include <bus/usb/usbdi.h>
51 #include <bus/usb/usbdi_util.h>
52 #include <bus/usb/usbdevs.h>
53
54 #include <dev/netif/ural/if_uralreg.h>
55 #include <dev/netif/ural/if_uralvar.h>
56
57 #ifdef USB_DEBUG
58 #define DPRINTF(x) do { if (uraldebug > 0) logprintf x; } while (0)
59 #define DPRINTFN(n, x) do { if (uraldebug >= (n)) logprintf x; } while (0)
60 int uraldebug = 0;
61 SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
62 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &uraldebug, 0,
63 "ural debug level");
64 #else
65 #define DPRINTF(x)
66 #define DPRINTFN(n, x)
67 #endif
68
69 #define URAL_RSSI(rssi) \
70 ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \
71 ((rssi) - RAL_NOISE_FLOOR + RAL_RSSI_CORR) : 0)
72
73 /* various supported device vendors/products */
74 static const struct usb_devno ural_devs[] = {
75 { USB_VENDOR_ASUS, USB_PRODUCT_ASUS_WL167G },
76 { USB_VENDOR_ASUS, USB_PRODUCT_RALINK_RT2570 },
77 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
78 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54U },
79 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
80 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
81 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
82 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_WUSB54G },
83 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_WUSB54GP },
84 { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_HU200TS },
85 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
86 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
87 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
88 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
89 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570 },
90 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_2 },
91 { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_3 },
92 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
93 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
94 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
95 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
96 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
97 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_RT2570 },
98 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
99 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_RT2570 }
100 };
101
102 MODULE_DEPEND(ural, wlan, 1, 1, 1);
103
104 Static int ural_alloc_tx_list(struct ural_softc *);
105 Static void ural_free_tx_list(struct ural_softc *);
106 Static int ural_alloc_rx_list(struct ural_softc *);
107 Static void ural_free_rx_list(struct ural_softc *);
108 Static int ural_media_change(struct ifnet *);
109 Static void ural_next_scan(void *);
110 Static void ural_task(void *);
111 Static int ural_newstate(struct ieee80211com *,
112 enum ieee80211_state, int);
113 Static int ural_rxrate(struct ural_rx_desc *);
114 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
115 usbd_status);
116 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
117 usbd_status);
118 Static uint8_t ural_plcp_signal(int);
119 Static void ural_setup_tx_desc(struct ural_softc *,
120 struct ural_tx_desc *, uint32_t, int, int);
121 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
122 struct ieee80211_node *);
123 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
124 struct ieee80211_node *);
125 Static int ural_tx_data(struct ural_softc *, struct mbuf *,
126 struct ieee80211_node *);
127 Static void ural_start(struct ifnet *);
128 Static void ural_watchdog(struct ifnet *);
129 Static int ural_reset(struct ifnet *);
130 Static int ural_ioctl(struct ifnet *, u_long, caddr_t,
131 struct ucred *);
132 Static void ural_set_testmode(struct ural_softc *);
133 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
134 int);
135 Static uint16_t ural_read(struct ural_softc *, uint16_t);
136 Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
137 int);
138 Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
139 Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
140 int) __unused;
141 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
142 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
143 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
144 Static void ural_set_chan(struct ural_softc *,
145 struct ieee80211_channel *);
146 Static void ural_disable_rf_tune(struct ural_softc *);
147 Static void ural_enable_tsf_sync(struct ural_softc *);
148 Static void ural_update_slot(struct ifnet *);
149 Static void ural_set_txpreamble(struct ural_softc *);
150 Static void ural_set_basicrates(struct ural_softc *);
151 Static void ural_set_bssid(struct ural_softc *, uint8_t *);
152 Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
153 Static void ural_update_promisc(struct ural_softc *);
154 Static const char *ural_get_rf(int);
155 Static void ural_read_eeprom(struct ural_softc *);
156 Static int ural_bbp_init(struct ural_softc *);
157 Static void ural_set_txantenna(struct ural_softc *, int);
158 Static void ural_set_rxantenna(struct ural_softc *, int);
159 Static void ural_init(void *);
160 Static void ural_stop(struct ural_softc *);
161 Static void ural_stats(struct ieee80211com *,
162 struct ieee80211_node *,
163 struct ieee80211_ratectl_stats *);
164 Static void ural_stats_update(usbd_xfer_handle,
165 usbd_private_handle, usbd_status);
166 Static void ural_stats_timeout(void *);
167 Static void ural_ratectl_change(struct ieee80211com *ic, u_int,
168 u_int);
169
170 /*
171 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
172 */
173 static const struct ieee80211_rateset ural_rateset_11a =
174 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
175
176 static const struct ieee80211_rateset ural_rateset_11b =
177 { 4, { 2, 4, 11, 22 } };
178
179 static const struct ieee80211_rateset ural_rateset_11g =
180 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
181
182 /*
183 * Default values for MAC registers; values taken from the reference driver.
184 */
185 static const struct {
186 uint16_t reg;
187 uint16_t val;
188 } ural_def_mac[] = {
189 { RAL_TXRX_CSR5, 0x8c8d },
190 { RAL_TXRX_CSR6, 0x8b8a },
191 { RAL_TXRX_CSR7, 0x8687 },
192 { RAL_TXRX_CSR8, 0x0085 },
193 { RAL_MAC_CSR13, 0x1111 },
194 { RAL_MAC_CSR14, 0x1e11 },
195 { RAL_TXRX_CSR21, 0xe78f },
196 { RAL_MAC_CSR9, 0xff1d },
197 { RAL_MAC_CSR11, 0x0002 },
198 { RAL_MAC_CSR22, 0x0053 },
199 { RAL_MAC_CSR15, 0x0000 },
200 { RAL_MAC_CSR8, 0x0780 },
201 { RAL_TXRX_CSR19, 0x0000 },
202 { RAL_TXRX_CSR18, 0x005a },
203 { RAL_PHY_CSR2, 0x0000 },
204 { RAL_TXRX_CSR0, 0x1ec0 },
205 { RAL_PHY_CSR4, 0x000f }
206 };
207
208 /*
209 * Default values for BBP registers; values taken from the reference driver.
210 */
211 static const struct {
212 uint8_t reg;
213 uint8_t val;
214 } ural_def_bbp[] = {
215 { 3, 0x02 },
216 { 4, 0x19 },
217 { 14, 0x1c },
218 { 15, 0x30 },
219 { 16, 0xac },
220 { 17, 0x48 },
221 { 18, 0x18 },
222 { 19, 0xff },
223 { 20, 0x1e },
224 { 21, 0x08 },
225 { 22, 0x08 },
226 { 23, 0x08 },
227 { 24, 0x80 },
228 { 25, 0x50 },
229 { 26, 0x08 },
230 { 27, 0x23 },
231 { 30, 0x10 },
232 { 31, 0x2b },
233 { 32, 0xb9 },
234 { 34, 0x12 },
235 { 35, 0x50 },
236 { 39, 0xc4 },
237 { 40, 0x02 },
238 { 41, 0x60 },
239 { 53, 0x10 },
240 { 54, 0x18 },
241 { 56, 0x08 },
242 { 57, 0x10 },
243 { 58, 0x08 },
244 { 61, 0x60 },
245 { 62, 0x10 },
246 { 75, 0xff }
247 };
248
249 /*
250 * Default values for RF register R2 indexed by channel numbers.
251 */
252 static const uint32_t ural_rf2522_r2[] = {
253 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
254 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
255 };
256
257 static const uint32_t ural_rf2523_r2[] = {
258 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
259 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
260 };
261
262 static const uint32_t ural_rf2524_r2[] = {
263 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
264 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
265 };
266
267 static const uint32_t ural_rf2525_r2[] = {
268 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
269 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
270 };
271
272 static const uint32_t ural_rf2525_hi_r2[] = {
273 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
274 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
275 };
276
277 static const uint32_t ural_rf2525e_r2[] = {
278 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
279 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
280 };
281
282 static const uint32_t ural_rf2526_hi_r2[] = {
283 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
284 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
285 };
286
287 static const uint32_t ural_rf2526_r2[] = {
288 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
289 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
290 };
291
292 /*
293 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
294 * values taken from the reference driver.
295 */
296 static const struct {
297 uint8_t chan;
298 uint32_t r1;
299 uint32_t r2;
300 uint32_t r4;
301 } ural_rf5222[] = {
302 { 1, 0x08808, 0x0044d, 0x00282 },
303 { 2, 0x08808, 0x0044e, 0x00282 },
304 { 3, 0x08808, 0x0044f, 0x00282 },
305 { 4, 0x08808, 0x00460, 0x00282 },
306 { 5, 0x08808, 0x00461, 0x00282 },
307 { 6, 0x08808, 0x00462, 0x00282 },
308 { 7, 0x08808, 0x00463, 0x00282 },
309 { 8, 0x08808, 0x00464, 0x00282 },
310 { 9, 0x08808, 0x00465, 0x00282 },
311 { 10, 0x08808, 0x00466, 0x00282 },
312 { 11, 0x08808, 0x00467, 0x00282 },
313 { 12, 0x08808, 0x00468, 0x00282 },
314 { 13, 0x08808, 0x00469, 0x00282 },
315 { 14, 0x08808, 0x0046b, 0x00286 },
316
317 { 36, 0x08804, 0x06225, 0x00287 },
318 { 40, 0x08804, 0x06226, 0x00287 },
319 { 44, 0x08804, 0x06227, 0x00287 },
320 { 48, 0x08804, 0x06228, 0x00287 },
321 { 52, 0x08804, 0x06229, 0x00287 },
322 { 56, 0x08804, 0x0622a, 0x00287 },
323 { 60, 0x08804, 0x0622b, 0x00287 },
324 { 64, 0x08804, 0x0622c, 0x00287 },
325
326 { 100, 0x08804, 0x02200, 0x00283 },
327 { 104, 0x08804, 0x02201, 0x00283 },
328 { 108, 0x08804, 0x02202, 0x00283 },
329 { 112, 0x08804, 0x02203, 0x00283 },
330 { 116, 0x08804, 0x02204, 0x00283 },
331 { 120, 0x08804, 0x02205, 0x00283 },
332 { 124, 0x08804, 0x02206, 0x00283 },
333 { 128, 0x08804, 0x02207, 0x00283 },
334 { 132, 0x08804, 0x02208, 0x00283 },
335 { 136, 0x08804, 0x02209, 0x00283 },
336 { 140, 0x08804, 0x0220a, 0x00283 },
337
338 { 149, 0x08808, 0x02429, 0x00281 },
339 { 153, 0x08808, 0x0242b, 0x00281 },
340 { 157, 0x08808, 0x0242d, 0x00281 },
341 { 161, 0x08808, 0x0242f, 0x00281 }
342 };
343
344 USB_DECLARE_DRIVER(ural);
345
346 USB_MATCH(ural)
347 {
348 USB_MATCH_START(ural, uaa);
349
350 if (uaa->iface != NULL)
351 return UMATCH_NONE;
352
353 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
354 UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
355 }
356
357 USB_ATTACH(ural)
358 {
359 USB_ATTACH_START(ural, sc, uaa);
360 struct ifnet *ifp;
361 struct ieee80211com *ic = &sc->sc_ic;
362 usb_interface_descriptor_t *id;
363 usb_endpoint_descriptor_t *ed;
364 usbd_status error;
365 char devinfo[1024];
366 int i;
367
368 sc->sc_udev = uaa->device;
369 sc->sc_tx_retries = 7; /* TODO tunable/sysctl */
370
371 usbd_devinfo(sc->sc_udev, 0, devinfo);
372 USB_ATTACH_SETUP;
373
374 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
375 kprintf("%s: could not set configuration no\n",
376 USBDEVNAME(sc->sc_dev));
377 USB_ATTACH_ERROR_RETURN;
378 }
379
380 /* get the first interface handle */
381 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
382 &sc->sc_iface);
383 if (error != 0) {
384 kprintf("%s: could not get interface handle\n",
385 USBDEVNAME(sc->sc_dev));
386 USB_ATTACH_ERROR_RETURN;
387 }
388
389 /*
390 * Find endpoints.
391 */
392 id = usbd_get_interface_descriptor(sc->sc_iface);
393
394 sc->sc_rx_no = sc->sc_tx_no = -1;
395 for (i = 0; i < id->bNumEndpoints; i++) {
396 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
397 if (ed == NULL) {
398 kprintf("%s: no endpoint descriptor for %d\n",
399 USBDEVNAME(sc->sc_dev), i);
400 USB_ATTACH_ERROR_RETURN;
401 }
402
403 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
404 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
405 sc->sc_rx_no = ed->bEndpointAddress;
406 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
407 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
408 sc->sc_tx_no = ed->bEndpointAddress;
409 }
410 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
411 kprintf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev));
412 USB_ATTACH_ERROR_RETURN;
413 }
414
415 usb_init_task(&sc->sc_task, ural_task, sc);
416 callout_init(&sc->scan_ch);
417 callout_init(&sc->stats_ch);
418
419 /* retrieve RT2570 rev. no */
420 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
421
422 /* retrieve MAC address and various other things from EEPROM */
423 ural_read_eeprom(sc);
424
425 kprintf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
426 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev));
427
428 ifp = &ic->ic_if;
429 ifp->if_softc = sc;
430 if_initname(ifp, "ural", USBDEVUNIT(sc->sc_dev));
431 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
432 ifp->if_init = ural_init;
433 ifp->if_ioctl = ural_ioctl;
434 ifp->if_start = ural_start;
435 ifp->if_watchdog = ural_watchdog;
436 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
437 ifq_set_ready(&ifp->if_snd);
438
439 ic->ic_ratectl.rc_st_ratectl_cap = IEEE80211_RATECTL_CAP_ONOE;
440 ic->ic_ratectl.rc_st_ratectl = IEEE80211_RATECTL_ONOE;
441 ic->ic_ratectl.rc_st_valid_stats =
442 IEEE80211_RATECTL_STATS_PKT_NORETRY |
443 IEEE80211_RATECTL_STATS_PKT_OK |
444 IEEE80211_RATECTL_STATS_PKT_ERR |
445 IEEE80211_RATECTL_STATS_RETRIES;
446 ic->ic_ratectl.rc_st_stats = ural_stats;
447 ic->ic_ratectl.rc_st_change = ural_ratectl_change;
448
449 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
450 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
451 ic->ic_state = IEEE80211_S_INIT;
452
453 /* set device capabilities */
454 ic->ic_caps =
455 IEEE80211_C_IBSS | /* IBSS mode supported */
456 IEEE80211_C_MONITOR | /* monitor mode supported */
457 IEEE80211_C_HOSTAP | /* HostAp mode supported */
458 IEEE80211_C_TXPMGT | /* tx power management */
459 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
460 IEEE80211_C_SHSLOT | /* short slot time supported */
461 IEEE80211_C_WPA; /* 802.11i */
462
463 if (sc->rf_rev == RAL_RF_5222) {
464 /* set supported .11a rates */
465 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
466
467 /* set supported .11a channels */
468 for (i = 36; i <= 64; i += 4) {
469 ic->ic_channels[i].ic_freq =
470 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
471 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
472 }
473 for (i = 100; i <= 140; i += 4) {
474 ic->ic_channels[i].ic_freq =
475 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
476 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
477 }
478 for (i = 149; i <= 161; i += 4) {
479 ic->ic_channels[i].ic_freq =
480 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
481 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
482 }
483 }
484
485 /* set supported .11b and .11g rates */
486 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
487 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
488
489 /* set supported .11b and .11g channels (1 through 14) */
490 for (i = 1; i <= 14; i++) {
491 ic->ic_channels[i].ic_freq =
492 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
493 ic->ic_channels[i].ic_flags =
494 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
495 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
496 }
497
498 sc->sc_sifs = IEEE80211_DUR_SIFS; /* Default SIFS */
499
500 ieee80211_ifattach(ic);
501 ic->ic_reset = ural_reset;
502 /* enable s/w bmiss handling in sta mode */
503 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
504
505 /* override state transition machine */
506 sc->sc_newstate = ic->ic_newstate;
507 ic->ic_newstate = ural_newstate;
508 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
509
510 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
511 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
512
513 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
514 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
515 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
516
517 sc->sc_txtap_len = sizeof sc->sc_txtapu;
518 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
519 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
520
521 if (bootverbose)
522 ieee80211_announce(ic);
523
524 USB_ATTACH_SUCCESS_RETURN;
525 }
526
527 USB_DETACH(ural)
528 {
529 USB_DETACH_START(ural, sc);
530 struct ieee80211com *ic = &sc->sc_ic;
531 struct ifnet *ifp = &ic->ic_if;
532 #ifdef INVARIANTS
533 int i;
534 #endif
535
536 crit_enter();
537
538 callout_stop(&sc->scan_ch);
539 callout_stop(&sc->stats_ch);
540
541 lwkt_serialize_enter(ifp->if_serializer);
542 ural_stop(sc);
543 lwkt_serialize_exit(ifp->if_serializer);
544
545 usb_rem_task(sc->sc_udev, &sc->sc_task);
546
547 bpfdetach(ifp);
548 ieee80211_ifdetach(ic);
549
550 crit_exit();
551
552 KKASSERT(sc->stats_xfer == NULL);
553 KKASSERT(sc->sc_rx_pipeh == NULL);
554 KKASSERT(sc->sc_tx_pipeh == NULL);
555
556 #ifdef INVARIANTS
557 /*
558 * Make sure TX/RX list is empty
559 */
560 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
561 struct ural_tx_data *data = &sc->tx_data[i];
562
563 KKASSERT(data->xfer == NULL);
564 KKASSERT(data->ni == NULL);
565 KKASSERT(data->m == NULL);
566 }
567 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
568 struct ural_rx_data *data = &sc->rx_data[i];
569
570 KKASSERT(data->xfer == NULL);
571 KKASSERT(data->m == NULL);
572 }
573 #endif
574
575 return 0;
576 }
577
578 Static int
579 ural_alloc_tx_list(struct ural_softc *sc)
580 {
581 int i;
582
583 sc->tx_queued = 0;
584
585 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
586 struct ural_tx_data *data = &sc->tx_data[i];
587
588 data->sc = sc;
589
590 data->xfer = usbd_alloc_xfer(sc->sc_udev);
591 if (data->xfer == NULL) {
592 kprintf("%s: could not allocate tx xfer\n",
593 USBDEVNAME(sc->sc_dev));
594 return ENOMEM;
595 }
596
597 data->buf = usbd_alloc_buffer(data->xfer,
598 RAL_TX_DESC_SIZE + MCLBYTES);
599 if (data->buf == NULL) {
600 kprintf("%s: could not allocate tx buffer\n",
601 USBDEVNAME(sc->sc_dev));
602 return ENOMEM;
603 }
604 }
605 return 0;
606 }
607
608 Static void
609 ural_free_tx_list(struct ural_softc *sc)
610 {
611 int i;
612
613 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
614 struct ural_tx_data *data = &sc->tx_data[i];
615
616 if (data->xfer != NULL) {
617 usbd_free_xfer(data->xfer);
618 data->xfer = NULL;
619 }
620
621 if (data->ni != NULL) {
622 ieee80211_free_node(data->ni);
623 data->ni = NULL;
624 }
625 if (data->m != NULL) {
626 m_freem(data->m);
627 data->m = NULL;
628 }
629 }
630 sc->tx_queued = 0;
631 }
632
633 Static int
634 ural_alloc_rx_list(struct ural_softc *sc)
635 {
636 int i;
637
638 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
639 struct ural_rx_data *data = &sc->rx_data[i];
640
641 data->sc = sc;
642
643 data->xfer = usbd_alloc_xfer(sc->sc_udev);
644 if (data->xfer == NULL) {
645 kprintf("%s: could not allocate rx xfer\n",
646 USBDEVNAME(sc->sc_dev));
647 return ENOMEM;
648 }
649
650 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
651 kprintf("%s: could not allocate rx buffer\n",
652 USBDEVNAME(sc->sc_dev));
653 return ENOMEM;
654 }
655
656 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
657 if (data->m == NULL) {
658 kprintf("%s: could not allocate rx mbuf\n",
659 USBDEVNAME(sc->sc_dev));
660 return ENOMEM;
661 }
662
663 data->buf = mtod(data->m, uint8_t *);
664 }
665 return 0;
666 }
667
668 Static void
669 ural_free_rx_list(struct ural_softc *sc)
670 {
671 int i;
672
673 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
674 struct ural_rx_data *data = &sc->rx_data[i];
675
676 if (data->xfer != NULL) {
677 usbd_free_xfer(data->xfer);
678 data->xfer = NULL;
679 }
680
681 if (data->m != NULL) {
682 m_freem(data->m);
683 data->m = NULL;
684 }
685 }
686 }
687
688 Static int
689 ural_media_change(struct ifnet *ifp)
690 {
691 struct ural_softc *sc = ifp->if_softc;
692 int error;
693
694 error = ieee80211_media_change(ifp);
695 if (error != ENETRESET)
696 return error;
697
698 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
699 ural_init(sc);
700
701 return 0;
702 }
703
704 /*
705 * This function is called periodically (every 200ms) during scanning to
706 * switch from one channel to another.
707 */
708 Static void
709 ural_next_scan(void *arg)
710 {
711 struct ural_softc *sc = arg;
712 struct ieee80211com *ic = &sc->sc_ic;
713 struct ifnet *ifp = &ic->ic_if;
714
715 if (sc->sc_stopped)
716 return;
717
718 crit_enter();
719
720 if (ic->ic_state == IEEE80211_S_SCAN) {
721 lwkt_serialize_enter(ifp->if_serializer);
722 ieee80211_next_scan(ic);
723 lwkt_serialize_exit(ifp->if_serializer);
724 }
725
726 crit_exit();
727 }
728
729 Static void
730 ural_task(void *xarg)
731 {
732 struct ural_softc *sc = xarg;
733 struct ieee80211com *ic = &sc->sc_ic;
734 struct ifnet *ifp = &ic->ic_if;
735 enum ieee80211_state nstate;
736 struct ieee80211_node *ni;
737 struct mbuf *m;
738 int arg;
739
740 if (sc->sc_stopped)
741 return;
742
743 crit_enter();
744
745 nstate = sc->sc_state;
746 arg = sc->sc_arg;
747
748 KASSERT(nstate != IEEE80211_S_INIT,
749 ("->INIT state transition should not be defered\n"));
750 ural_set_chan(sc, ic->ic_curchan);
751
752 switch (sc->sc_state) {
753 case IEEE80211_S_RUN:
754 ni = ic->ic_bss;
755
756 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
757 ural_update_slot(&ic->ic_if);
758 ural_set_txpreamble(sc);
759 ural_set_basicrates(sc);
760 ural_set_bssid(sc, ni->ni_bssid);
761 }
762
763 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
764 ic->ic_opmode == IEEE80211_M_IBSS) {
765 lwkt_serialize_enter(ifp->if_serializer);
766 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
767 lwkt_serialize_exit(ifp->if_serializer);
768
769 if (m == NULL) {
770 kprintf("%s: could not allocate beacon\n",
771 USBDEVNAME(sc->sc_dev));
772 crit_exit();
773 return;
774 }
775
776 if (ural_tx_bcn(sc, m, ni) != 0) {
777 kprintf("%s: could not send beacon\n",
778 USBDEVNAME(sc->sc_dev));
779 crit_exit();
780 return;
781 }
782 }
783
784 /* make tx led blink on tx (controlled by ASIC) */
785 ural_write(sc, RAL_MAC_CSR20, 1);
786
787 if (ic->ic_opmode != IEEE80211_M_MONITOR)
788 ural_enable_tsf_sync(sc);
789
790 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
791 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
792
793 callout_reset(&sc->stats_ch, 4 * hz / 5,
794 ural_stats_timeout, sc);
795 break;
796
797 case IEEE80211_S_SCAN:
798 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc);
799 break;
800
801 default:
802 break;
803 }
804
805 lwkt_serialize_enter(ifp->if_serializer);
806 ieee80211_ratectl_newstate(ic, sc->sc_state);
807 sc->sc_newstate(ic, sc->sc_state, arg);
808 lwkt_serialize_exit(ifp->if_serializer);
809
810 crit_exit();
811 }
812
813 Static int
814 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
815 {
816 struct ifnet *ifp = &ic->ic_if;
817 struct ural_softc *sc = ifp->if_softc;
818
819 ASSERT_SERIALIZED(ifp->if_serializer);
820
821 crit_enter();
822
823 callout_stop(&sc->scan_ch);
824 callout_stop(&sc->stats_ch);
825
826 /* do it in a process context */
827 sc->sc_state = nstate;
828 sc->sc_arg = arg;
829
830 lwkt_serialize_exit(ifp->if_serializer);
831 usb_rem_task(sc->sc_udev, &sc->sc_task);
832
833 if (nstate == IEEE80211_S_INIT) {
834 lwkt_serialize_enter(ifp->if_serializer);
835 ieee80211_ratectl_newstate(ic, nstate);
836 sc->sc_newstate(ic, nstate, arg);
837 } else {
838 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
839 lwkt_serialize_enter(ifp->if_serializer);
840 }
841
842 crit_exit();
843 return 0;
844 }
845
846 /* quickly determine if a given rate is CCK or OFDM */
847 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
848
849 #define RAL_ACK_SIZE (sizeof(struct ieee80211_frame_ack) + IEEE80211_FCS_LEN)
850
851 #define RAL_RXTX_TURNAROUND 5 /* us */
852
853 /*
854 * This function is only used by the Rx radiotap code.
855 */
856 Static int
857 ural_rxrate(struct ural_rx_desc *desc)
858 {
859 if (le32toh(desc->flags) & RAL_RX_OFDM) {
860 /* reverse function of ural_plcp_signal */
861 switch (desc->rate) {
862 case 0xb: return 12;
863 case 0xf: return 18;
864 case 0xa: return 24;
865 case 0xe: return 36;
866 case 0x9: return 48;
867 case 0xd: return 72;
868 case 0x8: return 96;
869 case 0xc: return 108;
870 }
871 } else {
872 if (desc->rate == 10)
873 return 2;
874 if (desc->rate == 20)
875 return 4;
876 if (desc->rate == 55)
877 return 11;
878 if (desc->rate == 110)
879 return 22;
880 }
881 return 2; /* should not get there */
882 }
883
884 Static void
885 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
886 {
887 struct ural_tx_data *data = priv;
888 struct ural_softc *sc = data->sc;
889 struct ieee80211_node *ni;
890 struct ifnet *ifp = &sc->sc_ic.ic_if;
891
892 if (sc->sc_stopped)
893 return;
894
895 crit_enter();
896
897 if (status != USBD_NORMAL_COMPLETION) {
898 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
899 crit_exit();
900 return;
901 }
902
903 kprintf("%s: could not transmit buffer: %s\n",
904 USBDEVNAME(sc->sc_dev), usbd_errstr(status));
905
906 if (status == USBD_STALLED)
907 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
908
909 ifp->if_oerrors++;
910 crit_exit();
911 return;
912 }
913
914 m_freem(data->m);
915 data->m = NULL;
916 ni = data->ni;
917 data->ni = NULL;
918
919 sc->tx_queued--;
920 ifp->if_opackets++;
921
922 DPRINTFN(10, ("tx done\n"));
923
924 sc->sc_tx_timer = 0;
925 ifp->if_flags &= ~IFF_OACTIVE;
926
927 lwkt_serialize_enter(ifp->if_serializer);
928 ieee80211_free_node(ni);
929 ifp->if_start(ifp);
930 lwkt_serialize_exit(ifp->if_serializer);
931
932 crit_exit();
933 }
934
935 Static void
936 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
937 {
938 struct ural_rx_data *data = priv;
939 struct ural_softc *sc = data->sc;
940 struct ieee80211com *ic = &sc->sc_ic;
941 struct ifnet *ifp = &ic->ic_if;
942 struct ural_rx_desc *desc;
943 struct ieee80211_frame *wh;
944 struct ieee80211_node *ni;
945 struct mbuf *mnew, *m;
946 int len;
947
948 if (sc->sc_stopped)
949 return;
950
951 crit_enter();
952
953 if (status != USBD_NORMAL_COMPLETION) {
954 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
955 crit_exit();
956 return;
957 }
958
959 if (status == USBD_STALLED)
960 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
961 goto skip;
962 }
963
964 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
965
966 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
967 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev),
968 len));
969 ifp->if_ierrors++;
970 goto skip;
971 }
972
973 /* rx descriptor is located at the end */
974 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
975
976 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
977 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
978 /*
979 * This should not happen since we did not request to receive
980 * those frames when we filled RAL_TXRX_CSR2.
981 */
982 DPRINTFN(5, ("PHY or CRC error\n"));
983 ifp->if_ierrors++;
984 goto skip;
985 }
986
987 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
988 if (mnew == NULL) {
989 ifp->if_ierrors++;
990 goto skip;
991 }
992
993 m = data->m;
994 data->m = NULL;
995 data->buf = NULL;
996
997 lwkt_serialize_enter(ifp->if_serializer);
998
999 /* finalize mbuf */
1000 m->m_pkthdr.rcvif = ifp;
1001 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
1002
1003 if (sc->sc_drvbpf != NULL) {
1004 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
1005
1006 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; /* h/w leaves FCS */
1007 tap->wr_rate = ural_rxrate(desc);
1008 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1009 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1010 tap->wr_antenna = sc->rx_ant;
1011 tap->wr_antsignal = URAL_RSSI(desc->rssi);
1012
1013 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1014 }
1015
1016 /* trim CRC here so WEP can find its own CRC at the end of packet. */
1017 m_adj(m, -IEEE80211_CRC_LEN);
1018
1019 wh = mtod(m, struct ieee80211_frame *);
1020 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1021
1022 /* send the frame to the 802.11 layer */
1023 ieee80211_input(ic, m, ni, URAL_RSSI(desc->rssi), 0);
1024
1025 /* node is no longer needed */
1026 ieee80211_free_node(ni);
1027
1028 lwkt_serialize_exit(ifp->if_serializer);
1029
1030 data->m = mnew;
1031 data->buf = mtod(data->m, uint8_t *);
1032
1033 DPRINTFN(15, ("rx done\n"));
1034
1035 skip: /* setup a new transfer */
1036 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
1037 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
1038 usbd_transfer(xfer);
1039
1040 crit_exit();
1041 }
1042
1043 Static uint8_t
1044 ural_plcp_signal(int rate)
1045 {
1046 switch (rate) {
1047 /* CCK rates (returned values are device-dependent) */
1048 case 2: return 0x0;
1049 case 4: return 0x1;
1050 case 11: return 0x2;
1051 case 22: return 0x3;
1052
1053 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1054 case 12: return 0xb;
1055 case 18: return 0xf;
1056 case 24: return 0xa;
1057 case 36: return 0xe;
1058 case 48: return 0x9;
1059 case 72: return 0xd;
1060 case 96: return 0x8;
1061 case 108: return 0xc;
1062
1063 /* unsupported rates (should not get there) */
1064 default: return 0xff;
1065 }
1066 }
1067
1068 Static void
1069 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1070 uint32_t flags, int len, int rate)
1071 {
1072 struct ieee80211com *ic = &sc->sc_ic;
1073 uint16_t plcp_length;
1074 int remainder;
1075
1076 desc->flags = htole32(flags);
1077 desc->flags |= htole32(RAL_TX_NEWSEQ);
1078 desc->flags |= htole32(len << 16);
1079
1080 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1081 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1082
1083 /* setup PLCP fields */
1084 desc->plcp_signal = ural_plcp_signal(rate);
1085 desc->plcp_service = 4;
1086
1087 len += IEEE80211_CRC_LEN;
1088 if (RAL_RATE_IS_OFDM(rate)) {
1089 desc->flags |= htole32(RAL_TX_OFDM);
1090
1091 plcp_length = len & 0xfff;
1092 desc->plcp_length_hi = plcp_length >> 6;
1093 desc->plcp_length_lo = plcp_length & 0x3f;
1094 } else {
1095 plcp_length = (16 * len + rate - 1) / rate;
1096 if (rate == 22) {
1097 remainder = (16 * len) % 22;
1098 if (remainder != 0 && remainder < 7)
1099 desc->plcp_service |= RAL_PLCP_LENGEXT;
1100 }
1101 desc->plcp_length_hi = plcp_length >> 8;
1102 desc->plcp_length_lo = plcp_length & 0xff;
1103
1104 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1105 desc->plcp_signal |= 0x08;
1106 }
1107
1108 desc->iv = 0;
1109 desc->eiv = 0;
1110 }
1111
1112 #define RAL_TX_TIMEOUT 5000
1113
1114 Static int
1115 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1116 {
1117 struct ural_tx_desc *desc;
1118 usbd_xfer_handle xfer;
1119 uint8_t cmd = 0;
1120 usbd_status error;
1121 uint8_t *buf;
1122 int xferlen, rate;
1123
1124 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1125
1126 xfer = usbd_alloc_xfer(sc->sc_udev);
1127 if (xfer == NULL)
1128 return ENOMEM;
1129
1130 /* xfer length needs to be a multiple of two! */
1131 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1132
1133 buf = usbd_alloc_buffer(xfer, xferlen);
1134 if (buf == NULL) {
1135 usbd_free_xfer(xfer);
1136 return ENOMEM;
1137 }
1138
1139 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1140 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1141
1142 error = usbd_sync_transfer(xfer);
1143 if (error != 0) {
1144 usbd_free_xfer(xfer);
1145 return error;
1146 }
1147
1148 desc = (struct ural_tx_desc *)buf;
1149
1150 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1151 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1152 m0->m_pkthdr.len, rate);
1153
1154 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1155 m0->m_pkthdr.len, rate, xferlen));
1156
1157 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1158 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1159
1160 error = usbd_sync_transfer(xfer);
1161 usbd_free_xfer(xfer);
1162
1163 return error;
1164 }
1165
1166 Static int
1167 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1168 {
1169 struct ieee80211com *ic = &sc->sc_ic;
1170 struct ifnet *ifp = &ic->ic_if;
1171 struct ural_tx_desc *desc;
1172 struct ural_tx_data *data;
1173 struct ieee80211_frame *wh;
1174 uint32_t flags = 0;
1175 uint16_t dur;
1176 usbd_status error;
1177 int xferlen, rate;
1178
1179 data = &sc->tx_data[0];
1180 desc = (struct ural_tx_desc *)data->buf;
1181
1182 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1183
1184 data->m = m0;
1185 data->ni = ni;
1186
1187 wh = mtod(m0, struct ieee80211_frame *);
1188
1189 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1190 flags |= RAL_TX_ACK;
1191
1192 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, rate, ic->ic_flags) +
1193 sc->sc_sifs;
1194 *(uint16_t *)wh->i_dur = htole16(dur);
1195
1196 /* tell hardware to add timestamp for probe responses */
1197 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1198 IEEE80211_FC0_TYPE_MGT &&
1199 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1200 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1201 flags |= RAL_TX_TIMESTAMP;
1202 }
1203
1204 if (sc->sc_drvbpf != NULL) {
1205 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1206
1207 tap->wt_flags = 0;
1208 tap->wt_rate = rate;
1209 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1210 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1211 tap->wt_antenna = sc->tx_ant;
1212
1213 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1214 }
1215
1216 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1217 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1218
1219 /* align end on a 2-bytes boundary */
1220 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1221
1222 /*
1223 * No space left in the last URB to store the extra 2 bytes, force
1224 * sending of another URB.
1225 */
1226 if ((xferlen % 64) == 0)
1227 xferlen += 2;
1228
1229 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1230 m0->m_pkthdr.len, rate, xferlen));
1231
1232 lwkt_serialize_exit(ifp->if_serializer);
1233
1234 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1235 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1236 ural_txeof);
1237
1238 error = usbd_transfer(data->xfer);
1239 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1240 m_freem(m0);
1241 data->m = NULL;
1242 data->ni = NULL;
1243 } else {
1244 sc->tx_queued++;
1245 error = 0;
1246 }
1247
1248 lwkt_serialize_enter(ifp->if_serializer);
1249 return error;
1250 }
1251
1252 Static int
1253 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1254 {
1255 struct ieee80211com *ic = &sc->sc_ic;
1256 struct ifnet *ifp = &ic->ic_if;
1257 struct ural_tx_desc *desc;
1258 struct ural_tx_data *data;
1259 struct ieee80211_frame *wh;
1260 struct ieee80211_key *k;
1261 uint32_t flags = 0;
1262 uint16_t dur;
1263 usbd_status error;
1264 int xferlen, rate, rate_idx;
1265
1266 wh = mtod(m0, struct ieee80211_frame *);
1267
1268 ieee80211_ratectl_findrate(ni, m0->m_pkthdr.len, &rate_idx, 1);
1269 rate = IEEE80211_RS_RATE(&ni->ni_rates, rate_idx);
1270
1271 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1272 k = ieee80211_crypto_encap(ic, ni, m0);
1273 if (k == NULL) {
1274 m_freem(m0);
1275 return ENOBUFS;
1276 }
1277
1278 /* packet header may have moved, reset our local pointer */
1279 wh = mtod(m0, struct ieee80211_frame *);
1280 }
1281
1282 data = &sc->tx_data[0];
1283 desc = (struct ural_tx_desc *)data->buf;
1284
1285 data->m = m0;
1286 data->ni = ni;
1287
1288 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1289 flags |= RAL_TX_ACK;
1290 flags |= RAL_TX_RETRY(sc->sc_tx_retries);
1291
1292 dur = ieee80211_txtime(ni, RAL_ACK_SIZE,
1293 ieee80211_ack_rate(ni, rate), ic->ic_flags) +
1294 sc->sc_sifs;
1295 *(uint16_t *)wh->i_dur = htole16(dur);
1296 }
1297
1298 if (sc->sc_drvbpf != NULL) {
1299 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1300
1301 tap->wt_flags = 0;
1302 tap->wt_rate = rate;
1303 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1304 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1305 tap->wt_antenna = sc->tx_ant;
1306
1307 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1308 }
1309
1310 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1311 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1312
1313 /* align end on a 2-bytes boundary */
1314 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1315
1316 /*
1317 * No space left in the last URB to store the extra 2 bytes, force
1318 * sending of another URB.
1319 */
1320 if ((xferlen % 64) == 0)
1321 xferlen += 2;
1322
1323 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1324 m0->m_pkthdr.len, rate, xferlen));
1325
1326 lwkt_serialize_exit(ifp->if_serializer);
1327
1328 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1329 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1330 ural_txeof);
1331
1332 error = usbd_transfer(data->xfer);
1333 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1334 m_freem(m0);
1335 data->m = NULL;
1336 data->ni = NULL;
1337 } else {
1338 sc->tx_queued++;
1339 error = 0;
1340 }
1341
1342 lwkt_serialize_enter(ifp->if_serializer);
1343 return error;
1344 }
1345
1346 Static void
1347 ural_start(struct ifnet *ifp)
1348 {
1349 struct ural_softc *sc = ifp->if_softc;
1350 struct ieee80211com *ic = &sc->sc_ic;
1351
1352 ASSERT_SERIALIZED(ifp->if_serializer);
1353
1354 if (sc->sc_stopped)
1355 return;
1356
1357 crit_enter();
1358
1359 if ((ifp->if_flags & (IFF_OACTIVE | IFF_RUNNING)) != IFF_RUNNING) {
1360 crit_exit();
1361 return;
1362 }
1363
1364 for (;;) {
1365 struct ieee80211_node *ni;
1366 struct mbuf *m0;
1367
1368 if (!IF_QEMPTY(&ic->ic_mgtq)) {
1369 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1370 ifp->if_flags |= IFF_OACTIVE;
1371 break;
1372 }
1373 IF_DEQUEUE(&ic->ic_mgtq, m0);
1374
1375 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1376 m0->m_pkthdr.rcvif = NULL;
1377
1378 if (ic->ic_rawbpf != NULL)
1379 bpf_mtap(ic->ic_rawbpf, m0);
1380
1381 if (ural_tx_mgt(sc, m0, ni) != 0) {
1382 ieee80211_free_node(ni);
1383 break;
1384 }
1385 } else {
1386 struct ether_header *eh;
1387
1388 if (ic->ic_state != IEEE80211_S_RUN)
1389 break;
1390 m0 = ifq_poll(&ifp->if_snd);
1391 if (m0 == NULL)
1392 break;
1393 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1394 ifp->if_flags |= IFF_OACTIVE;
1395 break;
1396 }
1397
1398 ifq_dequeue(&ifp->if_snd, m0);
1399
1400 if (m0->m_len < sizeof (struct ether_header)) {
1401 m0 = m_pullup(m0, sizeof (struct ether_header));
1402 if (m0 == NULL) {
1403 ifp->if_oerrors++;
1404 continue;
1405 }
1406 }
1407
1408 eh = mtod(m0, struct ether_header *);
1409 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1410 if (ni == NULL) {
1411 m_freem(m0);
1412 continue;
1413 }
1414 BPF_MTAP(ifp, m0);
1415
1416 m0 = ieee80211_encap(ic, m0, ni);
1417 if (m0 == NULL) {
1418 ieee80211_free_node(ni);
1419 continue;
1420 }
1421
1422 if (ic->ic_rawbpf != NULL)
1423 bpf_mtap(ic->ic_rawbpf, m0);
1424
1425 if (ural_tx_data(sc, m0, ni) != 0) {
1426 ieee80211_free_node(ni);
1427 ifp->if_oerrors++;
1428 break;
1429 }
1430 }
1431
1432 sc->sc_tx_timer = 5;
1433 ifp->if_timer = 1;
1434 }
1435
1436 crit_exit();
1437 }
1438
1439 Static void
1440 ural_watchdog(struct ifnet *ifp)
1441 {
1442 struct ural_softc *sc = ifp->if_softc;
1443 struct ieee80211com *ic = &sc->sc_ic;
1444
1445 ASSERT_SERIALIZED(ifp->if_serializer);
1446
1447 crit_enter();
1448
1449 ifp->if_timer = 0;
1450
1451 if (sc->sc_tx_timer > 0) {
1452 if (--sc->sc_tx_timer == 0) {
1453 device_printf(sc->sc_dev, "device timeout\n");
1454 /*ural_init(sc); XXX needs a process context! */
1455 ifp->if_oerrors++;
1456
1457 crit_exit();
1458 return;
1459 }
1460 ifp->if_timer = 1;
1461 }
1462 ieee80211_watchdog(ic);
1463
1464 crit_exit();
1465 }
1466
1467 /*
1468 * This function allows for fast channel switching in monitor mode (used by
1469 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1470 * generate a new beacon frame.
1471 */
1472 Static int
1473 ural_reset(struct ifnet *ifp)
1474 {
1475 struct ural_softc *sc = ifp->if_softc;
1476 struct ieee80211com *ic = &sc->sc_ic;
1477
1478 ASSERT_SERIALIZED(ifp->if_serializer);
1479
1480 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1481 return ENETRESET;
1482
1483 crit_enter();
1484
1485 lwkt_serialize_exit(ifp->if_serializer);
1486 ural_set_chan(sc, ic->ic_curchan);
1487 lwkt_serialize_enter(ifp->if_serializer);
1488
1489 crit_exit();
1490
1491 return 0;
1492 }
1493
1494 Static int
1495 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1496 {
1497 struct ural_softc *sc = ifp->if_softc;
1498 struct ieee80211com *ic = &sc->sc_ic;
1499 int error = 0;
1500
1501 ASSERT_SERIALIZED(ifp->if_serializer);
1502
1503 crit_enter();
1504
1505 switch (cmd) {
1506 case SIOCSIFFLAGS:
1507 if (ifp->if_flags & IFF_UP) {
1508 if (ifp->if_flags & IFF_RUNNING) {
1509 lwkt_serialize_exit(ifp->if_serializer);
1510 ural_update_promisc(sc);
1511 lwkt_serialize_enter(ifp->if_serializer);
1512 } else {
1513 ural_init(sc);
1514 }
1515 } else {
1516 if (ifp->if_flags & IFF_RUNNING)
1517 ural_stop(sc);
1518 }
1519 break;
1520
1521 default:
1522 error = ieee80211_ioctl(ic, cmd, data, cr);
1523 }
1524
1525 if (error == ENETRESET) {
1526 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1527 (IFF_UP | IFF_RUNNING) &&
1528 ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
1529 ural_init(sc);
1530 error = 0;
1531 }
1532
1533 crit_exit();
1534 return error;
1535 }
1536
1537 Static void
1538 ural_set_testmode(struct ural_softc *sc)
1539 {
1540 usb_device_request_t req;
1541 usbd_status error;
1542
1543 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1544 req.bRequest = RAL_VENDOR_REQUEST;
1545 USETW(req.wValue, 4);
1546 USETW(req.wIndex, 1);
1547 USETW(req.wLength, 0);
1548
1549 error = usbd_do_request(sc->sc_udev, &req, NULL);
1550 if (error != 0) {
1551 kprintf("%s: could not set test mode: %s\n",
1552 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1553 }
1554 }
1555
1556 Static void
1557 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1558 {
1559 usb_device_request_t req;
1560 usbd_status error;
1561
1562 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1563 req.bRequest = RAL_READ_EEPROM;
1564 USETW(req.wValue, 0);
1565 USETW(req.wIndex, addr);
1566 USETW(req.wLength, len);
1567
1568 error = usbd_do_request(sc->sc_udev, &req, buf);
1569 if (error != 0) {
1570 kprintf("%s: could not read EEPROM: %s\n",
1571 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1572 }
1573 }
1574
1575 Static uint16_t
1576 ural_read(struct ural_softc *sc, uint16_t reg)
1577 {
1578 usb_device_request_t req;
1579 usbd_status error;
1580 uint16_t val;
1581
1582 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1583 req.bRequest = RAL_READ_MAC;
1584 USETW(req.wValue, 0);
1585 USETW(req.wIndex, reg);
1586 USETW(req.wLength, sizeof (uint16_t));
1587
1588 error = usbd_do_request(sc->sc_udev, &req, &val);
1589 if (error != 0) {
1590 kprintf("%s: could not read MAC register: %s\n",
1591 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1592 return 0;
1593 }
1594
1595 return le16toh(val);
1596 }
1597
1598 Static void
1599 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1600 {
1601 usb_device_request_t req;
1602 usbd_status error;
1603
1604 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1605 req.bRequest = RAL_READ_MULTI_MAC;
1606 USETW(req.wValue, 0);
1607 USETW(req.wIndex, reg);
1608 USETW(req.wLength, len);
1609
1610 error = usbd_do_request(sc->sc_udev, &req, buf);
1611 if (error != 0) {
1612 kprintf("%s: could not read MAC register: %s\n",
1613 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1614 }
1615 }
1616
1617 Static void
1618 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1619 {
1620 usb_device_request_t req;
1621 usbd_status error;
1622
1623 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1624 req.bRequest = RAL_WRITE_MAC;
1625 USETW(req.wValue, val);
1626 USETW(req.wIndex, reg);
1627 USETW(req.wLength, 0);
1628
1629 error = usbd_do_request(sc->sc_udev, &req, NULL);
1630 if (error != 0) {
1631 kprintf("%s: could not write MAC register: %s\n",
1632 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1633 }
1634 }
1635
1636 Static void
1637 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1638 {
1639 usb_device_request_t req;
1640 usbd_status error;
1641
1642 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1643 req.bRequest = RAL_WRITE_MULTI_MAC;
1644 USETW(req.wValue, 0);
1645 USETW(req.wIndex, reg);
1646 USETW(req.wLength, len);
1647
1648 error = usbd_do_request(sc->sc_udev, &req, buf);
1649 if (error != 0) {
1650 kprintf("%s: could not write MAC register: %s\n",
1651 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1652 }
1653 }
1654
1655 Static void
1656 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1657 {
1658 uint16_t tmp;
1659 int ntries;
1660
1661 for (ntries = 0; ntries < 5; ntries++) {
1662 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1663 break;
1664 }
1665 if (ntries == 5) {
1666 kprintf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev));
1667 return;
1668 }
1669
1670 tmp = reg << 8 | val;
1671 ural_write(sc, RAL_PHY_CSR7, tmp);
1672 }
1673
1674 Static uint8_t
1675 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1676 {
1677 uint16_t val;
1678 int ntries;
1679
1680 val = RAL_BBP_WRITE | reg << 8;
1681 ural_write(sc, RAL_PHY_CSR7, val);
1682
1683 for (ntries = 0; ntries < 5; ntries++) {
1684 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1685 break;
1686 }
1687 if (ntries == 5) {
1688 kprintf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev));
1689 return 0;
1690 }
1691
1692 return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1693 }
1694
1695 Static void
1696 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1697 {
1698 uint32_t tmp;
1699 int ntries;
1700
1701 for (ntries = 0; ntries < 5; ntries++) {
1702 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1703 break;
1704 }
1705 if (ntries == 5) {
1706 kprintf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev));
1707 return;
1708 }
1709
1710 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1711 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1712 ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1713
1714 /* remember last written value in sc */
1715 sc->rf_regs[reg] = val;
1716
1717 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1718 }
1719
1720 Static void
1721 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1722 {
1723 struct ieee80211com *ic = &sc->sc_ic;
1724 uint8_t power, tmp;
1725 u_int i, chan;
1726
1727 chan = ieee80211_chan2ieee(ic, c);
1728 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1729 return;
1730
1731 if (IEEE80211_IS_CHAN_2GHZ(c))
1732 power = min(sc->txpow[chan - 1], 31);
1733 else
1734 power = 31;
1735
1736 /* adjust txpower using ifconfig settings */
1737 power -= (100 - ic->ic_txpowlimit) / 8;
1738
1739 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1740
1741 switch (sc->rf_rev) {
1742 case RAL_RF_2522:
1743 ural_rf_write(sc, RAL_RF1, 0x00814);
1744 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1745 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1746 break;
1747
1748 case RAL_RF_2523:
1749 ural_rf_write(sc, RAL_RF1, 0x08804);
1750 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1751 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1752 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1753 break;
1754
1755 case RAL_RF_2524:
1756 ural_rf_write(sc, RAL_RF1, 0x0c808);
1757 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1758 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1759 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1760 break;
1761
1762 case RAL_RF_2525:
1763 ural_rf_write(sc, RAL_RF1, 0x08808);
1764 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1765 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1766 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1767
1768 ural_rf_write(sc, RAL_RF1, 0x08808);
1769 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1770 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1771 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1772 break;
1773
1774 case RAL_RF_2525E:
1775 ural_rf_write(sc, RAL_RF1, 0x08808);
1776 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1777 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1778 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1779 break;
1780
1781 case RAL_RF_2526:
1782 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1783 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1784 ural_rf_write(sc, RAL_RF1, 0x08804);
1785
1786 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1787 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1788 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1789 break;
1790
1791 /* dual-band RF */
1792 case RAL_RF_5222:
1793 for (i = 0; ural_rf5222[i].chan != chan; i++)
1794 ; /* EMPTY */
1795
1796 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1797 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1798 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1799 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1800 break;
1801 }
1802
1803 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1804 ic->ic_state != IEEE80211_S_SCAN) {
1805 /* set Japan filter bit for channel 14 */
1806 tmp = ural_bbp_read(sc, 70);
1807
1808 tmp &= ~RAL_JAPAN_FILTER;
1809 if (chan == 14)
1810 tmp |= RAL_JAPAN_FILTER;
1811
1812 ural_bbp_write(sc, 70, tmp);
1813
1814 /* clear CRC errors */
1815 ural_read(sc, RAL_STA_CSR0);
1816
1817 DELAY(10000);
1818 ural_disable_rf_tune(sc);
1819 }
1820
1821 sc->sc_sifs = IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS
1822 : IEEE80211_DUR_SIFS;
1823 }
1824
1825 /*
1826 * Disable RF auto-tuning.
1827 */
1828 Static void
1829 ural_disable_rf_tune(struct ural_softc *sc)
1830 {
1831 uint32_t tmp;
1832
1833 if (sc->rf_rev != RAL_RF_2523) {
1834 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1835 ural_rf_write(sc, RAL_RF1, tmp);
1836 }
1837
1838 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1839 ural_rf_write(sc, RAL_RF3, tmp);
1840
1841 DPRINTFN(2, ("disabling RF autotune\n"));
1842 }
1843
1844 /*
1845 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1846 * synchronization.
1847 */
1848 Static void
1849 ural_enable_tsf_sync(struct ural_softc *sc)
1850 {
1851 struct ieee80211com *ic = &sc->sc_ic;
1852 uint16_t logcwmin, preload, tmp;
1853
1854 /* first, disable TSF synchronization */
1855 ural_write(sc, RAL_TXRX_CSR19, 0);
1856
1857 tmp = (16 * ic->ic_bss->ni_intval) << 4;
1858 ural_write(sc, RAL_TXRX_CSR18, tmp);
1859
1860 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1861 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1862 tmp = logcwmin << 12 | preload;
1863 ural_write(sc, RAL_TXRX_CSR20, tmp);
1864
1865 /* finally, enable TSF synchronization */
1866 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1867 if (ic->ic_opmode == IEEE80211_M_STA)
1868 tmp |= RAL_ENABLE_TSF_SYNC(1);
1869 else
1870 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1871 ural_write(sc, RAL_TXRX_CSR19, tmp);
1872
1873 DPRINTF(("enabling TSF synchronization\n"));
1874 }
1875
1876 Static void
1877 ural_update_slot(struct ifnet *ifp)
1878 {
1879 struct ural_softc *sc = ifp->if_softc;
1880 struct ieee80211com *ic = &sc->sc_ic;
1881 uint16_t slottime, sifs, eifs;
1882
1883 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1884
1885 /*
1886 * These settings may sound a bit inconsistent but this is what the
1887 * reference driver does.
1888 */
1889 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1890 sifs = 16 - RAL_RXTX_TURNAROUND;
1891 eifs = 364;
1892 } else {
1893 sifs = 10 - RAL_RXTX_TURNAROUND;
1894 eifs = 64;
1895 }
1896
1897 ural_write(sc, RAL_MAC_CSR10, slottime);
1898 ural_write(sc, RAL_MAC_CSR11, sifs);
1899 ural_write(sc, RAL_MAC_CSR12, eifs);
1900 }
1901
1902 Static void
1903 ural_set_txpreamble(struct ural_softc *sc)
1904 {
1905 uint16_t tmp;
1906
1907 tmp = ural_read(sc, RAL_TXRX_CSR10);
1908
1909 tmp &= ~RAL_SHORT_PREAMBLE;
1910 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1911 tmp |= RAL_SHORT_PREAMBLE;
1912
1913 ural_write(sc, RAL_TXRX_CSR10, tmp);
1914 }
1915
1916 Static void
1917 ural_set_basicrates(struct ural_softc *sc)
1918 {
1919 struct ieee80211com *ic = &sc->sc_ic;
1920
1921 /* update basic rate set */
1922 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1923 /* 11b basic rates: 1, 2Mbps */
1924 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1925 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1926 /* 11a basic rates: 6, 12, 24Mbps */
1927 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1928 } else {
1929 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1930 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1931 }
1932 }
1933
1934 Static void
1935 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1936 {
1937 uint16_t tmp;
1938
1939 tmp = bssid[0] | bssid[1] << 8;
1940 ural_write(sc, RAL_MAC_CSR5, tmp);
1941
1942 tmp = bssid[2] | bssid[3] << 8;
1943 ural_write(sc, RAL_MAC_CSR6, tmp);
1944
1945 tmp = bssid[4] | bssid[5] << 8;
1946 ural_write(sc, RAL_MAC_CSR7, tmp);
1947
1948 DPRINTF(("setting BSSID to %6D\n", bssid, ":"));
1949 }
1950
1951 Static void
1952 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1953 {
1954 uint16_t tmp;
1955
1956 tmp = addr[0] | addr[1] << 8;
1957 ural_write(sc, RAL_MAC_CSR2, tmp);
1958
1959 tmp = addr[2] | addr[3] << 8;
1960 ural_write(sc, RAL_MAC_CSR3, tmp);
1961
1962 tmp = addr[4] | addr[5] << 8;
1963 ural_write(sc, RAL_MAC_CSR4, tmp);
1964
1965 DPRINTF(("setting MAC address to %6D\n", addr, ":"));
1966 }
1967
1968 Static void
1969 ural_update_promisc(struct ural_softc *sc)
1970 {
1971 struct ifnet *ifp = &sc->sc_ic.ic_if;
1972 uint32_t tmp;
1973
1974 tmp = ural_read(sc, RAL_TXRX_CSR2);
1975
1976 tmp &= ~RAL_DROP_NOT_TO_ME;
1977 if (!(ifp->if_flags & IFF_PROMISC))
1978 tmp |= RAL_DROP_NOT_TO_ME;
1979
1980 ural_write(sc, RAL_TXRX_CSR2, tmp);
1981
1982 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1983 "entering" : "leaving"));
1984 }
1985
1986 Static const char *
1987 ural_get_rf(int rev)
1988 {
1989 switch (rev) {
1990 case RAL_RF_2522: return "RT2522";
1991 case RAL_RF_2523: return "RT2523";
1992 case RAL_RF_2524: return "RT2524";
1993 case RAL_RF_2525: return "RT2525";
1994 case RAL_RF_2525E: return "RT2525e";
1995 case RAL_RF_2526: return "RT2526";
1996 case RAL_RF_5222: return "RT5222";
1997 default: return "unknown";
1998 }
1999 }
2000
2001 Static void
2002 ural_read_eeprom(struct ural_softc *sc)
2003 {
2004 struct ieee80211com *ic = &sc->sc_ic;
2005 uint16_t val;
2006
2007 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
2008 val = le16toh(val);
2009 sc->rf_rev = (val >> 11) & 0x7;
2010 sc->hw_radio = (val >> 10) & 0x1;
2011 sc->led_mode = (val >> 6) & 0x7;
2012 sc->rx_ant = (val >> 4) & 0x3;
2013 sc->tx_ant = (val >> 2) & 0x3;
2014 sc->nb_ant = val & 0x3;
2015
2016 /* read MAC address */
2017 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
2018
2019 /* read default values for BBP registers */
2020 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
2021
2022 /* read Tx power for all b/g channels */
2023 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
2024 }
2025
2026 Static int
2027 ural_bbp_init(struct ural_softc *sc)
2028 {
2029 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2030 int i, ntries;
2031
2032 /* wait for BBP to be ready */
2033 for (ntries = 0; ntries < 100; ntries++) {
2034 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
2035 break;
2036 DELAY(1000);
2037 }
2038 if (ntries == 100) {
2039 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2040 return EIO;
2041 }
2042
2043 /* initialize BBP registers to default values */
2044 for (i = 0; i < N(ural_def_bbp); i++)
2045 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2046
2047 #if 0
2048 /* initialize BBP registers to values stored in EEPROM */
2049 for (i = 0; i < 16; i++) {
2050 if (sc->bbp_prom[i].reg == 0xff)
2051 continue;
2052 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2053 }
2054 #endif
2055
2056 return 0;
2057 #undef N
2058 }
2059
2060 Static void
2061 ural_set_txantenna(struct ural_softc *sc, int antenna)
2062 {
2063 uint16_t tmp;
2064 uint8_t tx;
2065
2066 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2067 if (antenna == 1)
2068 tx |= RAL_BBP_ANTA;
2069 else if (antenna == 2)
2070 tx |= RAL_BBP_ANTB;
2071 else
2072 tx |= RAL_BBP_DIVERSITY;
2073
2074 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2075 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2076 sc->rf_rev == RAL_RF_5222)
2077 tx |= RAL_BBP_FLIPIQ;
2078
2079 ural_bbp_write(sc, RAL_BBP_TX, tx);
2080
2081 /* update values in PHY_CSR5 and PHY_CSR6 */
2082 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2083 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2084
2085 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2086 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2087 }
2088
2089 Static void
2090 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2091 {
2092 uint8_t rx;
2093
2094 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2095 if (antenna == 1)
2096 rx |= RAL_BBP_ANTA;
2097 else if (antenna == 2)
2098 rx |= RAL_BBP_ANTB;
2099 else
2100 rx |= RAL_BBP_DIVERSITY;
2101
2102 /* need to force no I/Q flip for RF 2525e and 2526 */
2103 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2104 rx &= ~RAL_BBP_FLIPIQ;
2105
2106 ural_bbp_write(sc, RAL_BBP_RX, rx);
2107 }
2108
2109 Static void
2110 ural_init(void *priv)
2111 {
2112 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2113 struct ural_softc *sc = priv;
2114 struct ieee80211com *ic = &sc->sc_ic;
2115 struct ifnet *ifp = &ic->ic_if;
2116 struct ural_rx_data *data;
2117 uint16_t tmp;
2118 usbd_status usb_err;
2119 int i, ntries, error;
2120
2121 ASSERT_SERIALIZED(ifp->if_serializer);
2122
2123 crit_enter();
2124
2125 lwkt_serialize_exit(ifp->if_serializer);
2126 ural_set_testmode(sc);
2127 ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2128 lwkt_serialize_enter(ifp->if_serializer);
2129
2130 ural_stop(sc);
2131 sc->sc_stopped = 0;
2132
2133 lwkt_serialize_exit(ifp->if_serializer);
2134
2135 /* initialize MAC registers to default values */
2136 for (i = 0; i < N(ural_def_mac); i++)
2137 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2138
2139 /* wait for BBP and RF to wake up (this can take a long time!) */
2140 for (ntries = 0; ntries < 100; ntries++) {
2141 tmp = ural_read(sc, RAL_MAC_CSR17);
2142 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2143 (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2144 break;
2145 DELAY(1000);
2146 }
2147 if (ntries == 100) {
2148 kprintf("%s: timeout waiting for BBP/RF to wakeup\n",
2149 USBDEVNAME(sc->sc_dev));
2150 error = ETIMEDOUT;
2151 goto fail;
2152 }
2153
2154 /* we're ready! */
2155 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2156
2157 /* set basic rate set (will be updated later) */
2158 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2159
2160 error = ural_bbp_init(sc);
2161 if (error)
2162 goto fail;
2163
2164 /* set default BSS channel */
2165 ural_set_chan(sc, ic->ic_curchan);
2166
2167 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2168 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2169
2170 ural_set_txantenna(sc, sc->tx_ant);
2171 ural_set_rxantenna(sc, sc->rx_ant);
2172
2173 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2174 ural_set_macaddr(sc, ic->ic_myaddr);
2175
2176 /*
2177 * Allocate xfer for AMRR statistics requests.
2178 */
2179 sc->stats_xfer = usbd_alloc_xfer(sc->sc_udev);
2180 if (sc->stats_xfer == NULL) {
2181 kprintf("%s: could not allocate AMRR xfer\n",
2182 USBDEVNAME(sc->sc_dev));
2183 error = ENOMEM;
2184 goto fail;
2185 }
2186
2187 /*
2188 * Open Tx and Rx USB bulk pipes.
2189 */
2190 usb_err = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2191 &sc->sc_tx_pipeh);
2192 if (usb_err != 0) {
2193 kprintf("%s: could not open Tx pipe: %s\n",
2194 USBDEVNAME(sc->sc_dev), usbd_errstr(usb_err));
2195 error = ENOMEM;
2196 goto fail;
2197 }
2198
2199 usb_err = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2200 &sc->sc_rx_pipeh);
2201 if (usb_err != 0) {
2202 kprintf("%s: could not open Rx pipe: %s\n",
2203 USBDEVNAME(sc->sc_dev), usbd_errstr(usb_err));
2204 error = ENOMEM;
2205 goto fail;
2206 }
2207
2208 /*
2209 * Allocate Tx and Rx xfer queues.
2210 */
2211 error = ural_alloc_tx_list(sc);
2212 if (error) {
2213 kprintf("%s: could not allocate Tx list\n",
2214 USBDEVNAME(sc->sc_dev));
2215 goto fail;
2216 }
2217
2218 error = ural_alloc_rx_list(sc);
2219 if (error) {
2220 kprintf("%s: could not allocate Rx list\n",
2221 USBDEVNAME(sc->sc_dev));
2222 goto fail;
2223 }
2224
2225 /*
2226 * Start up the receive pipe.
2227 */
2228 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2229 data = &sc->rx_data[i];
2230
2231 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2232 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2233 usbd_transfer(data->xfer);
2234 }
2235
2236 /* kick Rx */
2237 tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2238 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2239 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2240 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2241 tmp |= RAL_DROP_TODS;
2242 if (!(ifp->if_flags & IFF_PROMISC))
2243 tmp |= RAL_DROP_NOT_TO_ME;
2244 }
2245 ural_write(sc, RAL_TXRX_CSR2, tmp);
2246
2247 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2248 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2249 fail:
2250 lwkt_serialize_enter(ifp->if_serializer);
2251 if (error) {
2252 ural_stop(sc);
2253 } else {
2254 ifp->if_flags &= ~IFF_OACTIVE;
2255 ifp->if_flags |= IFF_RUNNING;
2256
2257 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2258 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2259 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2260 } else {
2261 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2262 }
2263 }
2264
2265 crit_exit();
2266 #undef N
2267 }
2268
2269 Static void
2270 ural_stop(struct ural_softc *sc)
2271 {
2272 struct ieee80211com *ic = &sc->sc_ic;
2273 struct ifnet *ifp = &ic->ic_if;
2274
2275 ASSERT_SERIALIZED(ifp->if_serializer);
2276
2277 crit_enter();
2278
2279 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2280 sc->sc_stopped = 1;
2281
2282 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2283
2284 sc->sc_tx_timer = 0;
2285 ifp->if_timer = 0;
2286
2287 lwkt_serialize_exit(ifp->if_serializer);
2288
2289 /* disable Rx */
2290 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2291
2292 /* reset ASIC and BBP (but won't reset MAC registers!) */
2293 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2294 ural_write(sc, RAL_MAC_CSR1, 0);
2295
2296 if (sc->stats_xfer != NULL) {
2297 usbd_free_xfer(sc->stats_xfer);
2298 sc->stats_xfer = NULL;
2299 }
2300
2301 if (sc->sc_rx_pipeh != NULL) {
2302 usbd_abort_pipe(sc->sc_rx_pipeh);
2303 usbd_close_pipe(sc->sc_rx_pipeh);
2304 sc->sc_rx_pipeh = NULL;
2305 }
2306
2307 if (sc->sc_tx_pipeh != NULL) {
2308 usbd_abort_pipe(sc->sc_tx_pipeh);
2309 usbd_close_pipe(sc->sc_tx_pipeh);
2310 sc->sc_tx_pipeh = NULL;
2311 }
2312
2313 lwkt_serialize_enter(ifp->if_serializer);
2314
2315 ural_free_rx_list(sc);
2316 ural_free_tx_list(sc);
2317
2318 crit_exit();
2319 }
2320
2321 Static void
2322 ural_stats_timeout(void *arg)
2323 {
2324 struct ural_softc *sc = (struct ural_softc *)arg;
2325 usb_device_request_t req;
2326
2327 if (sc->sc_stopped)
2328 return;
2329
2330 crit_enter();
2331
2332 /*
2333 * Asynchronously read statistic registers (cleared by read).
2334 */
2335 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2336 req.bRequest = RAL_READ_MULTI_MAC;
2337 USETW(req.wValue, 0);
2338 USETW(req.wIndex, RAL_STA_CSR0);
2339 USETW(req.wLength, sizeof(sc->sta));
2340
2341 usbd_setup_default_xfer(sc->stats_xfer, sc->sc_udev, sc,
2342 USBD_DEFAULT_TIMEOUT, &req,
2343 sc->sta, sizeof(sc->sta), 0,
2344 ural_stats_update);
2345 usbd_transfer(sc->stats_xfer);
2346
2347 crit_exit();
2348 }
2349
2350 Static void
2351 ural_stats_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2352 usbd_status status)
2353 {
2354 struct ural_softc *sc = (struct ural_softc *)priv;
2355 struct ifnet *ifp = &sc->sc_ic.ic_if;
2356 struct ieee80211_ratectl_stats *stats = &sc->sc_stats;
2357
2358 if (status != USBD_NORMAL_COMPLETION) {
2359 device_printf(sc->sc_dev, "could not retrieve Tx statistics - "
2360 "cancelling automatic rate control\n");
2361 return;
2362 }
2363
2364 crit_enter();
2365
2366 /* count TX retry-fail as Tx errors */
2367 ifp->if_oerrors += sc->sta[RAL_TX_PKT_FAIL];
2368
2369 stats->stats_pkt_ok += sc->sta[RAL_TX_PKT_NO_RETRY] +
2370 sc->sta[RAL_TX_PKT_ONE_RETRY] +
2371 sc->sta[RAL_TX_PKT_MULTI_RETRY];
2372
2373 stats->stats_pkt_err += sc->sta[RAL_TX_PKT_FAIL];
2374
2375 stats->stats_pkt_noretry += sc->sta[RAL_TX_PKT_NO_RETRY];
2376
2377 stats->stats_retries += sc->sta[RAL_TX_PKT_ONE_RETRY];
2378 #if 1
2379 /*
2380 * XXX Estimated average:
2381 * Actual number of retries for each packet should belong to
2382 * [2, sc->sc_tx_retries]
2383 */
2384 stats->stats_retries += sc->sta[RAL_TX_PKT_MULTI_RETRY] *
2385 ((2 + sc->sc_tx_retries) / 2);
2386 #else
2387 stats->stats_retries += sc->sta[RAL_TX_PKT_MULTI_RETRY];
2388 #endif
2389 stats->stats_retries += sc->sta[RAL_TX_PKT_FAIL] * sc->sc_tx_retries;
2390
2391 callout_reset(&sc->stats_ch, 4 * hz / 5, ural_stats_timeout, sc);
2392
2393 crit_exit();
2394 }
2395
2396 Static void
2397 ural_stats(struct ieee80211com *ic, struct ieee80211_node *ni __unused,
2398 struct ieee80211_ratectl_stats *stats)
2399 {
2400 struct ifnet *ifp = &ic->ic_if;
2401 struct ural_softc *sc = ifp->if_softc;
2402
2403 ASSERT_SERIALIZED(ifp->if_serializer);
2404
2405 bcopy(&sc->sc_stats, stats, sizeof(*stats));
2406 bzero(&sc->sc_stats, sizeof(sc->sc_stats));
2407 }
2408
2409 Static void
2410 ural_ratectl_change(struct ieee80211com *ic, u_int orc __unused, u_int nrc)
2411 {
2412 struct ieee80211_ratectl_state *st = &ic->ic_ratectl;
2413 struct ieee80211_onoe_param *oparam;
2414
2415 if (st->rc_st_param != NULL) {
2416 kfree(st->rc_st_param, M_DEVBUF);
2417 st->rc_st_param = NULL;
2418 }
2419
2420 switch (nrc) {
2421 case IEEE80211_RATECTL_ONOE:
2422 oparam = kmalloc(sizeof(*oparam), M_DEVBUF, M_INTWAIT);
2423
2424 IEEE80211_ONOE_PARAM_SETUP(oparam);
2425 oparam->onoe_raise = 20;
2426
2427 st->rc_st_param = oparam;
2428 break;
2429 case IEEE80211_RATECTL_NONE:
2430 /* This could only happen during detaching */
2431 break;
2432 default:
2433 panic("unknown rate control algo %u\n", nrc);
2434 }
2435 }
2436
2437 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, usbd_driver_load, 0);
DragonFly vkernel multiprocessor port