sys/dev/netif/mii_layer/ciphy.c

   1 /*      $OpenBSD: ciphy.c,v 1.13 2006/03/10 09:53:16 jsg Exp $  */
   2
   3 /*
   4  * Copyright (c) 2004
   5  *      Bill Paul <wpaul@windriver.com>.  All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. All advertising materials mentioning features or use of this software
  16  *    must display the following acknowledgement:
  17  *      This product includes software developed by Bill Paul.
  18  * 4. Neither the name of the author nor the names of any co-contributors
  19  *    may be used to endorse or promote products derived from this software
  20  *    without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
  23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  32  * THE POSSIBILITY OF SUCH DAMAGE.
  33  *
  34  * $FreeBSD: src/sys/dev/mii/ciphy.c,v 1.3 2005/09/30 19:39:27 imp Exp $
  35  * $DragonFly: src/sys/dev/netif/mii_layer/ciphy.c,v 1.4 2006/12/23 00:26:20 swildner Exp $
  36  */
  37
  38 /*
  39  * Driver for the Cicada CS8201 10/100/1000 copper PHY.
  40  */
  41
  42 #include <sys/param.h>
  43 #include <sys/systm.h>
  44 #include <sys/kernel.h>
  45 #include <sys/module.h>
  46 #include <sys/socket.h>
  47 #include <sys/bus.h>
  48
  49 #include <net/if.h>
  50 #include <net/if_arp.h>
  51 #include <net/if_media.h>
  52
  53 #include <dev/netif/mii_layer/mii.h>
  54 #include <dev/netif/mii_layer/miivar.h>
  55
  56 #include "miidevs.h"
  57 #include "miibus_if.h"
  58
  59 #include <dev/netif/mii_layer/ciphyreg.h>
  60
  61 static int ciphy_probe(device_t);
  62 static int ciphy_attach(device_t);
  63
  64 static device_method_t ciphy_methods[] = {
  65         /* device interface */
  66         DEVMETHOD(device_probe,         ciphy_probe),
  67         DEVMETHOD(device_attach,        ciphy_attach),
  68         DEVMETHOD(device_detach,        ukphy_detach),
  69         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  70         { 0, 0 }
  71 };
  72
  73 static const struct mii_phydesc ciphys[] = {
  74         MII_PHYDESC(CICADA,     CS8201),
  75         MII_PHYDESC(CICADA,     CS8201A),
  76         MII_PHYDESC(CICADA,     CS8201B),
  77         MII_PHYDESC(xxCICADA,   CS8201),
  78         MII_PHYDESC(xxCICADA,   CS8201A),
  79         MII_PHYDESC(xxCICADA,   CS8201B),
  80         MII_PHYDESC_NULL
  81 };
  82
  83 static devclass_t ciphy_devclass;
  84
  85 static driver_t ciphy_driver = {
  86         "ciphy",
  87         ciphy_methods,
  88         sizeof(struct mii_softc)
  89 };
  90
  91 DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
  92
  93 static int      ciphy_service(struct mii_softc *, struct mii_data *, int);
  94 static void     ciphy_status(struct mii_softc *);
  95 static void     ciphy_reset(struct mii_softc *);
  96 static void     ciphy_fixup(struct mii_softc *);
  97
  98 static int
  99 ciphy_probe(device_t dev)
 100 {
 101         struct mii_attach_args *ma = device_get_ivars(dev);
 102         const struct mii_phydesc *mpd;
 103
 104         mpd = mii_phy_match(ma, ciphys);
 105         if (mpd != NULL) {
 106                 device_set_desc(dev, mpd->mpd_name);
 107                 return (0);
 108         }
 109         return (ENXIO);
 110 }
 111
 112 static int
 113 ciphy_attach(device_t dev)
 114 {
 115         struct mii_softc *sc;
 116         struct mii_attach_args *ma;
 117         struct mii_data *mii;
 118
 119         sc = device_get_softc(dev);
 120         ma = device_get_ivars(dev);
 121         mii_softc_init(sc, ma);
 122
 123         sc->mii_dev = device_get_parent(dev);
 124         mii = device_get_softc(sc->mii_dev);
 125         LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
 126
 127         sc->mii_inst = mii->mii_instance;
 128         sc->mii_service = ciphy_service;
 129         sc->mii_reset = ciphy_reset;
 130         sc->mii_pdata = mii;
 131
 132         sc->mii_flags |= MIIF_NOISOLATE;
 133         mii->mii_instance++;
 134
 135         ciphy_reset(sc);
 136
 137         sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
 138         if (sc->mii_capabilities & BMSR_EXTSTAT)
 139                 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
 140
 141         device_printf(dev, " ");
 142         if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
 143             (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
 144                 kprintf("no media present");
 145         else
 146                 mii_phy_add_media(sc);
 147         kprintf("\n");
 148
 149         MIIBUS_MEDIAINIT(sc->mii_dev);
 150         return(0);
 151 }
 152
 153 static int
 154 ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 155 {
 156         struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
 157         int reg, speed, gig;
 158
 159         switch (cmd) {
 160         case MII_POLLSTAT:
 161                 /*
 162                  * If we're not polling our PHY instance, just return.
 163                  */
 164                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
 165                         return (0);
 166                 break;
 167
 168         case MII_MEDIACHG:
 169                 /*
 170                  * If the media indicates a different PHY instance,
 171                  * isolate ourselves.
 172                  */
 173                 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
 174                         reg = PHY_READ(sc, MII_BMCR);
 175                         PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
 176                         return (0);
 177                 }
 178
 179                 /*
 180                  * If the interface is not up, don't do anything.
 181                  */
 182                 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
 183                         break;
 184
 185                 ciphy_fixup(sc);        /* XXX hardware bug work-around */
 186
 187                 switch (IFM_SUBTYPE(ife->ifm_media)) {
 188                 case IFM_AUTO:
 189 #ifdef foo
 190                         /*
 191                          * If we're already in auto mode, just return.
 192                          */
 193                         if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
 194                                 return (0);
 195 #endif
 196                         if (mii_phy_auto(sc, 0) == EJUSTRETURN)
 197                                 return (0);
 198                         break;
 199                 case IFM_1000_T:
 200                         speed = CIPHY_S1000;
 201                         goto setit;
 202                 case IFM_100_TX:
 203                         speed = CIPHY_S100;
 204                         goto setit;
 205                 case IFM_10_T:
 206                         speed = CIPHY_S10;
 207 setit:
 208                         if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
 209                                 speed |= CIPHY_BMCR_FDX;
 210                                 gig = CIPHY_1000CTL_AFD;
 211                         } else {
 212                                 gig = CIPHY_1000CTL_AHD;
 213                         }
 214
 215                         PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
 216                         PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
 217                         PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
 218
 219                         if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
 220                                 break;
 221
 222                         PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
 223                         PHY_WRITE(sc, CIPHY_MII_BMCR,
 224                             speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG);
 225
 226                         /*
 227                          * When setting the link manually, one side must
 228                          * be the master and the other the slave. However
 229                          * ifmedia doesn't give us a good way to specify
 230                          * this, so we fake it by using one of the LINK
 231                          * flags. If LINK0 is set, we program the PHY to
 232                          * be a master, otherwise it's a slave.
 233                          */
 234                         if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
 235                                 PHY_WRITE(sc, CIPHY_MII_1000CTL,
 236                                     gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC);
 237                         } else {
 238                                 PHY_WRITE(sc, CIPHY_MII_1000CTL,
 239                                     gig|CIPHY_1000CTL_MSE);
 240                         }
 241                         break;
 242                 case IFM_NONE:
 243                         PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
 244                         break;
 245                 case IFM_100_T4:
 246                 default:
 247                         return (EINVAL);
 248                 }
 249                 break;
 250
 251         case MII_TICK:
 252                 /*
 253                  * If we're not currently selected, just return.
 254                  */
 255                 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
 256                         return (0);
 257
 258                 if (mii_phy_tick(sc) == EJUSTRETURN)
 259                         return (0);
 260                 break;
 261         }
 262
 263         /* Update the media status. */
 264         ciphy_status(sc);
 265
 266         /*
 267          * Callback if something changed. Note that we need to poke
 268          * apply fixups for certain PHY revs.
 269          */
 270         if (sc->mii_media_active != mii->mii_media_active ||
 271             sc->mii_media_status != mii->mii_media_status ||
 272             cmd == MII_MEDIACHG)
 273                 ciphy_fixup(sc);
 274         mii_phy_update(sc, cmd);
 275         return (0);
 276 }
 277
 278 static void
 279 ciphy_status(struct mii_softc *sc)
 280 {
 281         struct mii_data *mii = sc->mii_pdata;
 282         int bmsr, bmcr;
 283
 284         mii->mii_media_status = IFM_AVALID;
 285         mii->mii_media_active = IFM_ETHER;
 286
 287         bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
 288
 289         if (bmsr & BMSR_LINK)
 290                 mii->mii_media_status |= IFM_ACTIVE;
 291
 292         bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
 293
 294         if (bmcr & CIPHY_BMCR_LOOP)
 295                 mii->mii_media_active |= IFM_LOOP;
 296
 297         if (bmcr & CIPHY_BMCR_AUTOEN) {
 298                 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
 299                         /* Erg, still trying, I guess... */
 300                         mii->mii_media_active |= IFM_NONE;
 301                         return;
 302                 }
 303         }
 304
 305         bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
 306         switch (bmsr & CIPHY_AUXCSR_SPEED) {
 307         case CIPHY_SPEED10:
 308                 mii->mii_media_active |= IFM_10_T;
 309                 break;
 310         case CIPHY_SPEED100:
 311                 mii->mii_media_active |= IFM_100_TX;
 312                 break;
 313         case CIPHY_SPEED1000:
 314                 mii->mii_media_active |= IFM_1000_T;
 315                 break;
 316         default:
 317                 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
 318                     bmsr & CIPHY_AUXCSR_SPEED);
 319                 break;
 320         }
 321
 322         if (bmsr & CIPHY_AUXCSR_FDX)
 323                 mii->mii_media_active |= IFM_FDX;
 324 }
 325
 326 static void
 327 ciphy_reset(struct mii_softc *sc)
 328 {
 329         mii_phy_reset(sc);
 330         DELAY(1000);
 331 }
 332
 333 #define PHY_SETBIT(x, y, z) \
 334         PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
 335 #define PHY_CLRBIT(x, y, z) \
 336         PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
 337
 338 static void
 339 ciphy_fixup(struct mii_softc *sc)
 340 {
 341         uint16_t model, status, speed;
 342         device_t parent;
 343
 344         model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
 345         status = PHY_READ(sc, CIPHY_MII_AUXCSR);
 346         speed = status & CIPHY_AUXCSR_SPEED;
 347
 348         parent = device_get_parent(sc->mii_dev);
 349         if (strncmp(device_get_name(parent), "nfe", 3) == 0) {
 350                 /* Need to set for 2.5V RGMII for NVIDIA adapters */
 351                 PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII);
 352                 PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV);
 353         }
 354
 355         switch (model) {
 356         case MII_MODEL_CICADA_CS8201:   /* MII_MODEL_xxCICADA_CS8201 */
 357                 /* Turn off "aux mode" (whatever that means) */
 358                 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
 359
 360                 /*
 361                  * Work around speed polling bug in VT3119/VT3216
 362                  * when using MII in full duplex mode.
 363                  */
 364                 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
 365                     (status & CIPHY_AUXCSR_FDX)) {
 366                         PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
 367                 } else {
 368                         PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
 369                 }
 370
 371                 /* Enable link/activity LED blink. */
 372                 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
 373                 break;
 374
 375         case MII_MODEL_CICADA_CS8201A:  /* MII_MODEL_xxCICADA_CS8201A */
 376         case MII_MODEL_CICADA_CS8201B:  /* MII_MODEL_xxCICADA_CS8201B */
 377                 /*
 378                  * Work around speed polling bug in VT3119/VT3216
 379                  * when using MII in full duplex mode.
 380                  */
 381                 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
 382                     (status & CIPHY_AUXCSR_FDX)) {
 383                         PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
 384                 } else {
 385                         PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
 386                 }
 387                 break;
 388
 389         default:
 390                 device_printf(sc->mii_dev,
 391                               "unknown CICADA PHY model %x\n", model);
 392                 break;
 393         }
 394 }