sys/dev/disk/aic7xxx/ahd_pci.c

   1 /*
   2  * FreeBSD, PCI product support functions
   3  *
   4  * Copyright (c) 1995-2001 Justin T. Gibbs
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification, immediately at the beginning of the file.
  13  * 2. The name of the author may not be used to endorse or promote products
  14  *    derived from this software without specific prior written permission.
  15  *
  16  * Alternatively, this software may be distributed under the terms of the
  17  * GNU Public License ("GPL").
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  *
  31  * $Id: //depot/aic7xxx/freebsd/dev/aic7xxx/ahd_pci.c#13 $
  32  *
  33  * $FreeBSD: src/sys/dev/aic7xxx/ahd_pci.c,v 1.2.2.5 2003/06/10 03:26:07 gibbs Exp $
  34  * $DragonFly: src/sys/dev/disk/aic7xxx/ahd_pci.c,v 1.7 2006/12/23 00:26:15 swildner Exp $
  35  */
  36
  37 #include "aic79xx_osm.h"
  38
  39 #define AHD_PCI_IOADDR0 PCIR_MAPS       /* Primary I/O BAR */
  40 #define AHD_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
  41 #define AHD_PCI_IOADDR1 (PCIR_MAPS + 12)/* Secondary I/O BAR */
  42
  43 static int ahd_pci_probe(device_t dev);
  44 static int ahd_pci_attach(device_t dev);
  45
  46 static device_method_t ahd_pci_device_methods[] = {
  47         /* Device interface */
  48         DEVMETHOD(device_probe,         ahd_pci_probe),
  49         DEVMETHOD(device_attach,        ahd_pci_attach),
  50         DEVMETHOD(device_detach,        ahd_detach),
  51         { 0, 0 }
  52 };
  53
  54 static driver_t ahd_pci_driver = {
  55         "ahd",
  56         ahd_pci_device_methods,
  57         sizeof(struct ahd_softc)
  58 };
  59
  60 static devclass_t ahd_devclass;
  61
  62 DRIVER_MODULE(ahd, pci, ahd_pci_driver, ahd_devclass, 0, 0);
  63 DRIVER_MODULE(ahd, cardbus, ahd_pci_driver, ahd_devclass, 0, 0);
  64 MODULE_DEPEND(ahd_pci, ahd, 1, 1, 1);
  65 MODULE_VERSION(ahd_pci, 1);
  66
  67 static int
  68 ahd_pci_probe(device_t dev)
  69 {
  70         struct  ahd_pci_identity *entry;
  71
  72         entry = ahd_find_pci_device(dev);
  73         if (entry != NULL) {
  74                 device_set_desc(dev, entry->name);
  75                 return (0);
  76         }
  77         return (ENXIO);
  78 }
  79
  80 static int
  81 ahd_pci_attach(device_t dev)
  82 {
  83         struct   ahd_pci_identity *entry;
  84         struct   ahd_softc *ahd;
  85         char    *name;
  86         int      error;
  87
  88         entry = ahd_find_pci_device(dev);
  89         if (entry == NULL)
  90                 return (ENXIO);
  91
  92         /*
  93          * Allocate a softc for this card and
  94          * set it up for attachment by our
  95          * common detect routine.
  96          */
  97         name = kmalloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_WAITOK);
  98         strcpy(name, device_get_nameunit(dev));
  99         ahd = ahd_alloc(dev, name);
 100         if (ahd == NULL)
 101                 return (ENOMEM);
 102
 103         ahd_set_unit(ahd, device_get_unit(dev));
 104
 105         /*
 106          * Should we bother disabling 39Bit addressing
 107          * based on installed memory?
 108          */
 109         if (sizeof(bus_addr_t) > 4)
 110                 ahd->flags |= AHD_39BIT_ADDRESSING;
 111
 112         /* Allocate a dmatag for our SCB DMA maps */
 113         /* XXX Should be a child of the PCI bus dma tag */
 114         error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
 115                                    /*boundary*/0,
 116                                    (ahd->flags & AHD_39BIT_ADDRESSING)
 117                                    ? 0x7FFFFFFFFFULL
 118                                    : BUS_SPACE_MAXADDR_32BIT,
 119                                    /*highaddr*/BUS_SPACE_MAXADDR,
 120                                    /*filter*/NULL, /*filterarg*/NULL,
 121                                    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
 122                                    /*nsegments*/AHD_NSEG,
 123                                    /*maxsegsz*/AHD_MAXTRANSFER_SIZE,
 124                                    /*flags*/0,
 125                                    &ahd->parent_dmat);
 126
 127         if (error != 0) {
 128                 kprintf("ahd_pci_attach: Could not allocate DMA tag "
 129                        "- error %d\n", error);
 130                 ahd_free(ahd);
 131                 return (ENOMEM);
 132         }
 133         ahd->dev_softc = dev;
 134         error = ahd_pci_config(ahd, entry);
 135         if (error != 0) {
 136                 ahd_free(ahd);
 137                 return (error);
 138         }
 139
 140         ahd_attach(ahd);
 141         return (0);
 142 }
 143
 144 int
 145 ahd_pci_map_registers(struct ahd_softc *ahd)
 146 {
 147         struct  resource *regs;
 148         struct  resource *regs2;
 149         u_int   command;
 150         int     regs_type;
 151         int     regs_id;
 152         int     regs_id2;
 153         int     allow_memio;
 154
 155         command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, /*bytes*/1);
 156         regs = NULL;
 157         regs2 = NULL;
 158         regs_type = 0;
 159         regs_id = 0;
 160
 161         /* Retrieve the per-device 'allow_memio' hint */
 162         if (resource_int_value(device_get_name(ahd->dev_softc),
 163                                device_get_unit(ahd->dev_softc),
 164                                "allow_memio", &allow_memio) != 0) {
 165                 if (bootverbose)
 166                         device_printf(ahd->dev_softc,
 167                                       "Defaulting to MEMIO on\n");
 168         }
 169
 170         if ((command & PCIM_CMD_MEMEN) != 0
 171          && (ahd->bugs & AHD_PCIX_MMAPIO_BUG) == 0
 172          && allow_memio != 0) {
 173
 174                 regs_type = SYS_RES_MEMORY;
 175                 regs_id = AHD_PCI_MEMADDR;
 176                 regs = bus_alloc_resource(ahd->dev_softc, regs_type,
 177                                           &regs_id, 0, ~0, 1, RF_ACTIVE);
 178                 if (regs != NULL) {
 179                         int error;
 180
 181                         ahd->tags[0] = rman_get_bustag(regs);
 182                         ahd->bshs[0] = rman_get_bushandle(regs);
 183                         ahd->tags[1] = ahd->tags[0];
 184                         error = bus_space_subregion(ahd->tags[0], ahd->bshs[0],
 185                                                     /*offset*/0x100,
 186                                                     /*size*/0x100,
 187                                                     &ahd->bshs[1]);
 188                         /*
 189                          * Do a quick test to see if memory mapped
 190                          * I/O is functioning correctly.
 191                          */
 192                         if (error != 0
 193                          || ahd_pci_test_register_access(ahd) != 0) {
 194                                 device_printf(ahd->dev_softc,
 195                                        "PCI Device %d:%d:%d failed memory "
 196                                        "mapped test.  Using PIO.\n",
 197                                        ahd_get_pci_bus(ahd->dev_softc),
 198                                        ahd_get_pci_slot(ahd->dev_softc),
 199                                        ahd_get_pci_function(ahd->dev_softc));
 200                                 bus_release_resource(ahd->dev_softc, regs_type,
 201                                                      regs_id, regs);
 202                                 regs = NULL;
 203                         } else {
 204                                 command &= ~PCIM_CMD_PORTEN;
 205                                 ahd_pci_write_config(ahd->dev_softc,
 206                                                      PCIR_COMMAND,
 207                                                      command, /*bytes*/1);
 208                         }
 209                 }
 210         }
 211         if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
 212                 regs_type = SYS_RES_IOPORT;
 213                 regs_id = AHD_PCI_IOADDR0;
 214                 regs = bus_alloc_resource(ahd->dev_softc, regs_type,
 215                                           &regs_id, 0, ~0, 1, RF_ACTIVE);
 216                 if (regs == NULL) {
 217                         device_printf(ahd->dev_softc,
 218                                       "can't allocate register resources\n");
 219                         return (ENOMEM);
 220                 }
 221                 ahd->tags[0] = rman_get_bustag(regs);
 222                 ahd->bshs[0] = rman_get_bushandle(regs);
 223
 224                 /* And now the second BAR */
 225                 regs_id2 = AHD_PCI_IOADDR1;
 226                 regs2 = bus_alloc_resource(ahd->dev_softc, regs_type,
 227                                            &regs_id2, 0, ~0, 1, RF_ACTIVE);
 228                 if (regs2 == NULL) {
 229                         device_printf(ahd->dev_softc,
 230                                       "can't allocate register resources\n");
 231                         return (ENOMEM);
 232                 }
 233                 ahd->tags[1] = rman_get_bustag(regs2);
 234                 ahd->bshs[1] = rman_get_bushandle(regs2);
 235                 command &= ~PCIM_CMD_MEMEN;
 236                 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
 237                                      command, /*bytes*/1);
 238                 ahd->platform_data->regs_res_type[1] = regs_type;
 239                 ahd->platform_data->regs_res_id[1] = regs_id2;
 240                 ahd->platform_data->regs[1] = regs2;
 241         }
 242         ahd->platform_data->regs_res_type[0] = regs_type;
 243         ahd->platform_data->regs_res_id[0] = regs_id;
 244         ahd->platform_data->regs[0] = regs;
 245         return (0);
 246 }
 247
 248 int
 249 ahd_pci_map_int(struct ahd_softc *ahd)
 250 {
 251         int zero;
 252
 253         zero = 0;
 254         ahd->platform_data->irq =
 255             bus_alloc_resource(ahd->dev_softc, SYS_RES_IRQ, &zero,
 256                                0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
 257         if (ahd->platform_data->irq == NULL)
 258                 return (ENOMEM);
 259         ahd->platform_data->irq_res_type = SYS_RES_IRQ;
 260         return (ahd_map_int(ahd));
 261 }
 262
 263 void
 264 ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
 265 {
 266         uint32_t cap;
 267         u_int cap_offset;
 268
 269         /*
 270          * Traverse the capability list looking for
 271          * the power management capability.
 272          */
 273         cap = 0;
 274         cap_offset = ahd_pci_read_config(ahd->dev_softc,
 275                                          PCIR_CAP_PTR, /*bytes*/1);
 276         while (cap_offset != 0) {
 277
 278                 cap = ahd_pci_read_config(ahd->dev_softc,
 279                                           cap_offset, /*bytes*/4);
 280                 if ((cap & 0xFF) == 1
 281                  && ((cap >> 16) & 0x3) > 0) {
 282                         uint32_t pm_control;
 283
 284                         pm_control = ahd_pci_read_config(ahd->dev_softc,
 285                                                          cap_offset + 4,
 286                                                          /*bytes*/2);
 287                         pm_control &= ~0x3;
 288                         pm_control |= new_state;
 289                         ahd_pci_write_config(ahd->dev_softc,
 290                                              cap_offset + 4,
 291                                              pm_control, /*bytes*/2);
 292                         break;
 293                 }
 294                 cap_offset = (cap >> 8) & 0xFF;
 295         }
 296 }