sys/dev/drm/drm.h

   1 /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*-
   2  * Created: Mon Jan  4 10:05:05 1999 by faith@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All rights reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25  * OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors:
  28  *    Rickard E. (Rik) Faith <faith@valinux.com>
  29  *
  30  * Acknowledgements:
  31  * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
  32  *
  33  * $FreeBSD: src/sys/dev/drm/drm.h,v 1.3.2.1 2003/04/26 07:05:27 anholt Exp $
  34  * $DragonFly: src/sys/dev/drm/drm.h,v 1.3 2004/02/13 02:23:57 joerg Exp $
  35  */
  36
  37 #ifndef _DRM_H_
  38 #define _DRM_H_
  39
  40 #if defined(__linux__)
  41 #include <linux/config.h>
  42 #include <asm/ioctl.h>          /* For _IO* macros */
  43 #define DRM_IOCTL_NR(n)         _IOC_NR(n)
  44 #define DRM_IOC_VOID            _IOC_NONE
  45 #define DRM_IOC_READ            _IOC_READ
  46 #define DRM_IOC_WRITE           _IOC_WRITE
  47 #define DRM_IOC_READWRITE       _IOC_READ|_IOC_WRITE
  48 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  49 #elif defined(__DragonFly__) || defined(__FreeBSD__) || defined(__NetBSD__)
  50 #if (defined(__DragonFly__) || defined(__FreeBSD__)) && defined(XFree86Server)
  51 /* Prevent name collision when including sys/ioccom.h */
  52 #undef ioctl
  53 #include <sys/ioccom.h>
  54 #define ioctl(a,b,c)            xf86ioctl(a,b,c)
  55 #else
  56 #include <sys/ioccom.h>
  57 #endif /* __FreeBSD__ && xf86ioctl */
  58 #define DRM_IOCTL_NR(n)         ((n) & 0xff)
  59 #define DRM_IOC_VOID            IOC_VOID
  60 #define DRM_IOC_READ            IOC_OUT
  61 #define DRM_IOC_WRITE           IOC_IN
  62 #define DRM_IOC_READWRITE       IOC_INOUT
  63 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  64 #endif
  65
  66 #define XFREE86_VERSION(major,minor,patch,snap) \
  67                 ((major << 16) | (minor << 8) | patch)
  68
  69 #ifndef CONFIG_XFREE86_VERSION
  70 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
  71 #endif
  72
  73 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
  74 #define DRM_PROC_DEVICES "/proc/devices"
  75 #define DRM_PROC_MISC    "/proc/misc"
  76 #define DRM_PROC_DRM     "/proc/drm"
  77 #define DRM_DEV_DRM      "/dev/drm"
  78 #define DRM_DEV_MODE     (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
  79 #define DRM_DEV_UID      0
  80 #define DRM_DEV_GID      0
  81 #endif
  82
  83 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
  84 #define DRM_MAJOR       226
  85 #define DRM_MAX_MINOR   15
  86 #endif
  87 #define DRM_NAME        "drm"     /* Name in kernel, /dev, and /proc        */
  88 #define DRM_MIN_ORDER   5         /* At least 2^5 bytes = 32 bytes          */
  89 #define DRM_MAX_ORDER   22        /* Up to 2^22 bytes = 4MB                 */
  90 #define DRM_RAM_PERCENT 10        /* How much system ram can we lock?       */
  91
  92 #define _DRM_LOCK_HELD  0x80000000 /* Hardware lock is held                 */
  93 #define _DRM_LOCK_CONT  0x40000000 /* Hardware lock is contended            */
  94 #define _DRM_LOCK_IS_HELD(lock)    ((lock) & _DRM_LOCK_HELD)
  95 #define _DRM_LOCK_IS_CONT(lock)    ((lock) & _DRM_LOCK_CONT)
  96 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  97
  98 typedef unsigned long drm_handle_t;
  99 typedef unsigned int  drm_context_t;
 100 typedef unsigned int  drm_drawable_t;
 101 typedef unsigned int  drm_magic_t;
 102
 103 /* Warning: If you change this structure, make sure you change
 104  * XF86DRIClipRectRec in the server as well */
 105
 106 /* KW: Actually it's illegal to change either for
 107  * backwards-compatibility reasons.
 108  */
 109
 110 typedef struct drm_clip_rect {
 111         unsigned short  x1;
 112         unsigned short  y1;
 113         unsigned short  x2;
 114         unsigned short  y2;
 115 } drm_clip_rect_t;
 116
 117 typedef struct drm_tex_region {
 118         unsigned char   next;
 119         unsigned char   prev;
 120         unsigned char   in_use;
 121         unsigned char   padding;
 122         unsigned int    age;
 123 } drm_tex_region_t;
 124
 125 typedef struct drm_version {
 126         int    version_major;     /* Major version                          */
 127         int    version_minor;     /* Minor version                          */
 128         int    version_patchlevel;/* Patch level                            */
 129         size_t name_len;          /* Length of name buffer                  */
 130         char   *name;             /* Name of driver                         */
 131         size_t date_len;          /* Length of date buffer                  */
 132         char   *date;             /* User-space buffer to hold date         */
 133         size_t desc_len;          /* Length of desc buffer                  */
 134         char   *desc;             /* User-space buffer to hold desc         */
 135 } drm_version_t;
 136
 137 typedef struct drm_unique {
 138         size_t unique_len;        /* Length of unique                       */
 139         char   *unique;           /* Unique name for driver instantiation   */
 140 } drm_unique_t;
 141
 142 typedef struct drm_list {
 143         int              count;   /* Length of user-space structures        */
 144         drm_version_t    *version;
 145 } drm_list_t;
 146
 147 typedef struct drm_block {
 148         int              unused;
 149 } drm_block_t;
 150
 151 typedef struct drm_control {
 152         enum {
 153                 DRM_ADD_COMMAND,
 154                 DRM_RM_COMMAND,
 155                 DRM_INST_HANDLER,
 156                 DRM_UNINST_HANDLER
 157         }                func;
 158         int              irq;
 159 } drm_control_t;
 160
 161 typedef enum drm_map_type {
 162         _DRM_FRAME_BUFFER   = 0,  /* WC (no caching), no core dump          */
 163         _DRM_REGISTERS      = 1,  /* no caching, no core dump               */
 164         _DRM_SHM            = 2,  /* shared, cached                         */
 165         _DRM_AGP            = 3,  /* AGP/GART                               */
 166         _DRM_SCATTER_GATHER = 4   /* Scatter/gather memory for PCI DMA      */
 167 } drm_map_type_t;
 168
 169 typedef enum drm_map_flags {
 170         _DRM_RESTRICTED      = 0x01, /* Cannot be mapped to user-virtual    */
 171         _DRM_READ_ONLY       = 0x02,
 172         _DRM_LOCKED          = 0x04, /* shared, cached, locked              */
 173         _DRM_KERNEL          = 0x08, /* kernel requires access              */
 174         _DRM_WRITE_COMBINING = 0x10, /* use write-combining if available    */
 175         _DRM_CONTAINS_LOCK   = 0x20, /* SHM page that contains lock         */
 176         _DRM_REMOVABLE       = 0x40  /* Removable mapping                   */
 177 } drm_map_flags_t;
 178
 179 typedef struct drm_ctx_priv_map {
 180         unsigned int    ctx_id;  /* Context requesting private mapping */
 181         void            *handle; /* Handle of map */
 182 } drm_ctx_priv_map_t;
 183
 184 typedef struct drm_map {
 185         unsigned long   offset;  /* Requested physical address (0 for SAREA)*/
 186         unsigned long   size;    /* Requested physical size (bytes)         */
 187         drm_map_type_t  type;    /* Type of memory to map                   */
 188         drm_map_flags_t flags;   /* Flags                                   */
 189         void            *handle; /* User-space: "Handle" to pass to mmap    */
 190                                  /* Kernel-space: kernel-virtual address    */
 191         int             mtrr;    /* MTRR slot used                          */
 192                                  /* Private data                            */
 193 } drm_map_t;
 194
 195 typedef struct drm_client {
 196         int             idx;    /* Which client desired?                    */
 197         int             auth;   /* Is client authenticated?                 */
 198         unsigned long   pid;    /* Process id                               */
 199         unsigned long   uid;    /* User id                                  */
 200         unsigned long   magic;  /* Magic                                    */
 201         unsigned long   iocs;   /* Ioctl count                              */
 202 } drm_client_t;
 203
 204 typedef enum {
 205         _DRM_STAT_LOCK,
 206         _DRM_STAT_OPENS,
 207         _DRM_STAT_CLOSES,
 208         _DRM_STAT_IOCTLS,
 209         _DRM_STAT_LOCKS,
 210         _DRM_STAT_UNLOCKS,
 211         _DRM_STAT_VALUE,        /* Generic value                      */
 212         _DRM_STAT_BYTE,         /* Generic byte counter (1024bytes/K) */
 213         _DRM_STAT_COUNT,        /* Generic non-byte counter (1000/k)  */
 214
 215         _DRM_STAT_IRQ,          /* IRQ */
 216         _DRM_STAT_PRIMARY,      /* Primary DMA bytes */
 217         _DRM_STAT_SECONDARY,    /* Secondary DMA bytes */
 218         _DRM_STAT_DMA,          /* DMA */
 219         _DRM_STAT_SPECIAL,      /* Special DMA (e.g., priority or polled) */
 220         _DRM_STAT_MISSED        /* Missed DMA opportunity */
 221
 222                                 /* Add to the *END* of the list */
 223 } drm_stat_type_t;
 224
 225 typedef struct drm_stats {
 226         unsigned long count;
 227         struct {
 228                 unsigned long   value;
 229                 drm_stat_type_t type;
 230         } data[15];
 231 } drm_stats_t;
 232
 233 typedef enum drm_lock_flags {
 234         _DRM_LOCK_READY      = 0x01, /* Wait until hardware is ready for DMA */
 235         _DRM_LOCK_QUIESCENT  = 0x02, /* Wait until hardware quiescent        */
 236         _DRM_LOCK_FLUSH      = 0x04, /* Flush this context's DMA queue first */
 237         _DRM_LOCK_FLUSH_ALL  = 0x08, /* Flush all DMA queues first           */
 238                                 /* These *HALT* flags aren't supported yet
 239                                    -- they will be used to support the
 240                                    full-screen DGA-like mode. */
 241         _DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues   */
 242         _DRM_HALT_CUR_QUEUES = 0x20  /* Halt all current queues              */
 243 } drm_lock_flags_t;
 244
 245 typedef struct drm_lock {
 246         int              context;
 247         drm_lock_flags_t flags;
 248 } drm_lock_t;
 249
 250 typedef enum drm_dma_flags {          /* These values *MUST* match xf86drm.h */
 251                                       /* Flags for DMA buffer dispatch       */
 252         _DRM_DMA_BLOCK        = 0x01, /* Block until buffer dispatched.
 253                                          Note, the buffer may not yet have
 254                                          been processed by the hardware --
 255                                          getting a hardware lock with the
 256                                          hardware quiescent will ensure
 257                                          that the buffer has been
 258                                          processed.                          */
 259         _DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held            */
 260         _DRM_DMA_PRIORITY     = 0x04, /* High priority dispatch              */
 261
 262                                       /* Flags for DMA buffer request        */
 263         _DRM_DMA_WAIT         = 0x10, /* Wait for free buffers               */
 264         _DRM_DMA_SMALLER_OK   = 0x20, /* Smaller-than-requested buffers ok   */
 265         _DRM_DMA_LARGER_OK    = 0x40  /* Larger-than-requested buffers ok    */
 266 } drm_dma_flags_t;
 267
 268 typedef struct drm_buf_desc {
 269         int           count;     /* Number of buffers of this size           */
 270         int           size;      /* Size in bytes                            */
 271         int           low_mark;  /* Low water mark                           */
 272         int           high_mark; /* High water mark                          */
 273         enum {
 274                 _DRM_PAGE_ALIGN = 0x01, /* Align on page boundaries for DMA  */
 275                 _DRM_AGP_BUFFER = 0x02, /* Buffer is in agp space            */
 276                 _DRM_SG_BUFFER  = 0x04  /* Scatter/gather memory buffer      */
 277         }             flags;
 278         unsigned long agp_start; /* Start address of where the agp buffers
 279                                   * are in the agp aperture */
 280 } drm_buf_desc_t;
 281
 282 typedef struct drm_buf_info {
 283         int            count;   /* Entries in list                           */
 284         drm_buf_desc_t *list;
 285 } drm_buf_info_t;
 286
 287 typedef struct drm_buf_free {
 288         int            count;
 289         int            *list;
 290 } drm_buf_free_t;
 291
 292 typedef struct drm_buf_pub {
 293         int               idx;         /* Index into master buflist          */
 294         int               total;       /* Buffer size                        */
 295         int               used;        /* Amount of buffer in use (for DMA)  */
 296         void              *address;    /* Address of buffer                  */
 297 } drm_buf_pub_t;
 298
 299 typedef struct drm_buf_map {
 300         int           count;    /* Length of buflist                        */
 301         void          *virtual; /* Mmaped area in user-virtual              */
 302         drm_buf_pub_t *list;    /* Buffer information                       */
 303 } drm_buf_map_t;
 304
 305 typedef struct drm_dma {
 306                                 /* Indices here refer to the offset into
 307                                    buflist in drm_buf_get_t.  */
 308         int             context;          /* Context handle                 */
 309         int             send_count;       /* Number of buffers to send      */
 310         int             *send_indices;    /* List of handles to buffers     */
 311         int             *send_sizes;      /* Lengths of data to send        */
 312         drm_dma_flags_t flags;            /* Flags                          */
 313         int             request_count;    /* Number of buffers requested    */
 314         int             request_size;     /* Desired size for buffers       */
 315         int             *request_indices; /* Buffer information             */
 316         int             *request_sizes;
 317         int             granted_count;    /* Number of buffers granted      */
 318 } drm_dma_t;
 319
 320 typedef enum {
 321         _DRM_CONTEXT_PRESERVED = 0x01,
 322         _DRM_CONTEXT_2DONLY    = 0x02
 323 } drm_ctx_flags_t;
 324
 325 typedef struct drm_ctx {
 326         drm_context_t   handle;
 327         drm_ctx_flags_t flags;
 328 } drm_ctx_t;
 329
 330 typedef struct drm_ctx_res {
 331         int             count;
 332         drm_ctx_t       *contexts;
 333 } drm_ctx_res_t;
 334
 335 typedef struct drm_draw {
 336         drm_drawable_t  handle;
 337 } drm_draw_t;
 338
 339 typedef struct drm_auth {
 340         drm_magic_t     magic;
 341 } drm_auth_t;
 342
 343 typedef struct drm_irq_busid {
 344         int irq;
 345         int busnum;
 346         int devnum;
 347         int funcnum;
 348 } drm_irq_busid_t;
 349
 350 typedef enum {
 351     _DRM_VBLANK_ABSOLUTE = 0x0,         /* Wait for specific vblank sequence number */
 352     _DRM_VBLANK_RELATIVE = 0x1,         /* Wait for given number of vblanks */
 353     _DRM_VBLANK_SIGNAL   = 0x40000000   /* Send signal instead of blocking */
 354 } drm_vblank_seq_type_t;
 355
 356 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
 357
 358 struct drm_wait_vblank_request {
 359         drm_vblank_seq_type_t type;
 360         unsigned int sequence;
 361         unsigned long signal;
 362 };
 363
 364 struct drm_wait_vblank_reply {
 365         drm_vblank_seq_type_t type;
 366         unsigned int sequence;
 367         long tval_sec;
 368         long tval_usec;
 369 };
 370
 371 typedef union drm_wait_vblank {
 372         struct drm_wait_vblank_request request;
 373         struct drm_wait_vblank_reply reply;
 374 } drm_wait_vblank_t;
 375
 376 typedef struct drm_agp_mode {
 377         unsigned long mode;
 378 } drm_agp_mode_t;
 379
 380                                 /* For drm_agp_alloc -- allocated a buffer */
 381 typedef struct drm_agp_buffer {
 382         unsigned long size;     /* In bytes -- will round to page boundary */
 383         unsigned long handle;   /* Used for BIND/UNBIND ioctls */
 384         unsigned long type;     /* Type of memory to allocate  */
 385         unsigned long physical; /* Physical used by i810       */
 386 } drm_agp_buffer_t;
 387
 388                                 /* For drm_agp_bind */
 389 typedef struct drm_agp_binding {
 390         unsigned long handle;   /* From drm_agp_buffer */
 391         unsigned long offset;   /* In bytes -- will round to page boundary */
 392 } drm_agp_binding_t;
 393
 394 typedef struct drm_agp_info {
 395         int            agp_version_major;
 396         int            agp_version_minor;
 397         unsigned long  mode;
 398         unsigned long  aperture_base;  /* physical address */
 399         unsigned long  aperture_size;  /* bytes */
 400         unsigned long  memory_allowed; /* bytes */
 401         unsigned long  memory_used;
 402
 403                                 /* PCI information */
 404         unsigned short id_vendor;
 405         unsigned short id_device;
 406 } drm_agp_info_t;
 407
 408 typedef struct drm_scatter_gather {
 409         unsigned long size;     /* In bytes -- will round to page boundary */
 410         unsigned long handle;   /* Used for mapping / unmapping */
 411 } drm_scatter_gather_t;
 412
 413 #define DRM_IOCTL_BASE                  'd'
 414 #define DRM_IO(nr)                      _IO(DRM_IOCTL_BASE,nr)
 415 #define DRM_IOR(nr,type)                _IOR(DRM_IOCTL_BASE,nr,type)
 416 #define DRM_IOW(nr,type)                _IOW(DRM_IOCTL_BASE,nr,type)
 417 #define DRM_IOWR(nr,type)               _IOWR(DRM_IOCTL_BASE,nr,type)
 418
 419 #define DRM_IOCTL_VERSION               DRM_IOWR(0x00, drm_version_t)
 420 #define DRM_IOCTL_GET_UNIQUE            DRM_IOWR(0x01, drm_unique_t)
 421 #define DRM_IOCTL_GET_MAGIC             DRM_IOR( 0x02, drm_auth_t)
 422 #define DRM_IOCTL_IRQ_BUSID             DRM_IOWR(0x03, drm_irq_busid_t)
 423 #define DRM_IOCTL_GET_MAP               DRM_IOWR(0x04, drm_map_t)
 424 #define DRM_IOCTL_GET_CLIENT            DRM_IOWR(0x05, drm_client_t)
 425 #define DRM_IOCTL_GET_STATS             DRM_IOR( 0x06, drm_stats_t)
 426
 427 #define DRM_IOCTL_SET_UNIQUE            DRM_IOW( 0x10, drm_unique_t)
 428 #define DRM_IOCTL_AUTH_MAGIC            DRM_IOW( 0x11, drm_auth_t)
 429 #define DRM_IOCTL_BLOCK                 DRM_IOWR(0x12, drm_block_t)
 430 #define DRM_IOCTL_UNBLOCK               DRM_IOWR(0x13, drm_block_t)
 431 #define DRM_IOCTL_CONTROL               DRM_IOW( 0x14, drm_control_t)
 432 #define DRM_IOCTL_ADD_MAP               DRM_IOWR(0x15, drm_map_t)
 433 #define DRM_IOCTL_ADD_BUFS              DRM_IOWR(0x16, drm_buf_desc_t)
 434 #define DRM_IOCTL_MARK_BUFS             DRM_IOW( 0x17, drm_buf_desc_t)
 435 #define DRM_IOCTL_INFO_BUFS             DRM_IOWR(0x18, drm_buf_info_t)
 436 #define DRM_IOCTL_MAP_BUFS              DRM_IOWR(0x19, drm_buf_map_t)
 437 #define DRM_IOCTL_FREE_BUFS             DRM_IOW( 0x1a, drm_buf_free_t)
 438
 439 #define DRM_IOCTL_RM_MAP                DRM_IOW( 0x1b, drm_map_t)
 440
 441 #define DRM_IOCTL_SET_SAREA_CTX         DRM_IOW( 0x1c, drm_ctx_priv_map_t)
 442 #define DRM_IOCTL_GET_SAREA_CTX         DRM_IOWR(0x1d, drm_ctx_priv_map_t)
 443
 444 #define DRM_IOCTL_ADD_CTX               DRM_IOWR(0x20, drm_ctx_t)
 445 #define DRM_IOCTL_RM_CTX                DRM_IOWR(0x21, drm_ctx_t)
 446 #define DRM_IOCTL_MOD_CTX               DRM_IOW( 0x22, drm_ctx_t)
 447 #define DRM_IOCTL_GET_CTX               DRM_IOWR(0x23, drm_ctx_t)
 448 #define DRM_IOCTL_SWITCH_CTX            DRM_IOW( 0x24, drm_ctx_t)
 449 #define DRM_IOCTL_NEW_CTX               DRM_IOW( 0x25, drm_ctx_t)
 450 #define DRM_IOCTL_RES_CTX               DRM_IOWR(0x26, drm_ctx_res_t)
 451 #define DRM_IOCTL_ADD_DRAW              DRM_IOWR(0x27, drm_draw_t)
 452 #define DRM_IOCTL_RM_DRAW               DRM_IOWR(0x28, drm_draw_t)
 453 #define DRM_IOCTL_DMA                   DRM_IOWR(0x29, drm_dma_t)
 454 #define DRM_IOCTL_LOCK                  DRM_IOW( 0x2a, drm_lock_t)
 455 #define DRM_IOCTL_UNLOCK                DRM_IOW( 0x2b, drm_lock_t)
 456 #define DRM_IOCTL_FINISH                DRM_IOW( 0x2c, drm_lock_t)
 457
 458 #define DRM_IOCTL_AGP_ACQUIRE           DRM_IO(  0x30)
 459 #define DRM_IOCTL_AGP_RELEASE           DRM_IO(  0x31)
 460 #define DRM_IOCTL_AGP_ENABLE            DRM_IOW( 0x32, drm_agp_mode_t)
 461 #define DRM_IOCTL_AGP_INFO              DRM_IOR( 0x33, drm_agp_info_t)
 462 #define DRM_IOCTL_AGP_ALLOC             DRM_IOWR(0x34, drm_agp_buffer_t)
 463 #define DRM_IOCTL_AGP_FREE              DRM_IOW( 0x35, drm_agp_buffer_t)
 464 #define DRM_IOCTL_AGP_BIND              DRM_IOW( 0x36, drm_agp_binding_t)
 465 #define DRM_IOCTL_AGP_UNBIND            DRM_IOW( 0x37, drm_agp_binding_t)
 466
 467 #define DRM_IOCTL_SG_ALLOC              DRM_IOW( 0x38, drm_scatter_gather_t)
 468 #define DRM_IOCTL_SG_FREE               DRM_IOW( 0x39, drm_scatter_gather_t)
 469
 470 #define DRM_IOCTL_WAIT_VBLANK           DRM_IOWR(0x3a, drm_wait_vblank_t)
 471
 472 /* Device specfic ioctls should only be in their respective headers
 473  * The device specific ioctl range is 0x40 to 0x79.                  */
 474 #define DRM_COMMAND_BASE                0x40
 475
 476 #endif