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Nuke device_ptr_t, USBBASEDEVICE, USBDEVNAME(), USBDEVUNIT(), USBGETSOFTC(),
[dragonfly/vkernel-mp.git] / sys / bus / usb / uhci.c
blob6bc7565e2714ced4e8063e1b52d8bf2e01ef14f7
1 /* $NetBSD: uhci.c,v 1.170 2003/02/19 01:35:04 augustss Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.162.2.1 2006/03/01 01:59:04 iedowse Exp $ */
3 /* $DragonFly: src/sys/bus/usb/uhci.c,v 1.23 2007/06/28 06:32:31 hasso Exp $ */
4
5 /* Also already incorporated from NetBSD:
6 * $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $
7 * $NetBSD: uhci.c,v 1.173 2003/05/13 04:41:59 gson Exp $
8 * $NetBSD: uhci.c,v 1.175 2003/09/12 16:18:08 mycroft Exp $
9 * $NetBSD: uhci.c,v 1.176 2003/11/04 19:11:21 mycroft Exp $
10 * $NetBSD: uhci.c,v 1.177 2003/12/29 08:17:10 toshii Exp $
11 * $NetBSD: uhci.c,v 1.178 2004/03/02 16:32:05 martin Exp $
12 * $NetBSD: uhci.c,v 1.180 2004/07/17 20:12:03 mycroft Exp $
13 */
14
15 /*
16 * Copyright (c) 1998 The NetBSD Foundation, Inc.
17 * All rights reserved.
18 *
19 * This code is derived from software contributed to The NetBSD Foundation
20 * by Lennart Augustsson (lennart@augustsson.net) at
21 * Carlstedt Research & Technology.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. All advertising materials mentioning features or use of this software
32 * must display the following acknowledgement:
33 * This product includes software developed by the NetBSD
34 * Foundation, Inc. and its contributors.
35 * 4. Neither the name of The NetBSD Foundation nor the names of its
36 * contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
40 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
41 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
42 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
43 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
44 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
45 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
46 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
48 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
50 */
51
52 /*
53 * USB Universal Host Controller driver.
54 * Handles e.g. PIIX3 and PIIX4.
55 *
56 * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
57 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
58 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
59 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
60 */
61
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/kernel.h>
65 #include <sys/malloc.h>
66 #include <sys/endian.h>
67 #include <sys/module.h>
68 #include <sys/bus.h>
69 #if defined(DIAGNOSTIC) && defined(__i386__)
70 #include <machine/cpu.h>
71 #endif
72 #include <sys/proc.h>
73 #include <sys/queue.h>
74 #include <sys/sysctl.h>
75 #include <sys/thread2.h>
76
77 #include <machine/endian.h>
78
79 #include <bus/usb/usb.h>
80 #include <bus/usb/usbdi.h>
81 #include <bus/usb/usbdivar.h>
82 #include <bus/usb/usb_mem.h>
83 #include <bus/usb/usb_quirks.h>
84
85 #include <bus/usb/uhcireg.h>
86 #include <bus/usb/uhcivar.h>
87
88 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
89 /*#define UHCI_CTL_LOOP */
90
91 #define delay(d) DELAY(d)
92
93 #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
94
95 #ifdef USB_DEBUG
96 uhci_softc_t *thesc;
97 #define DPRINTF(x) if (uhcidebug) kprintf x
98 #define DPRINTFN(n,x) if (uhcidebug>(n)) kprintf x
99 int uhcidebug = 0;
100 int uhcinoloop = 0;
101 SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci");
102 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW,
103 &uhcidebug, 0, "uhci debug level");
104 SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW,
105 &uhcinoloop, 0, "uhci noloop");
106 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
107 #else
108 #define DPRINTF(x)
109 #define DPRINTFN(n,x)
110 #endif
111
112 struct uhci_pipe {
113 struct usbd_pipe pipe;
114 int nexttoggle;
115
116 u_char aborting;
117 usbd_xfer_handle abortstart, abortend;
118
119 /* Info needed for different pipe kinds. */
120 union {
121 /* Control pipe */
122 struct {
123 uhci_soft_qh_t *sqh;
124 usb_dma_t reqdma;
125 uhci_soft_td_t *setup, *stat;
126 u_int length;
127 } ctl;
128 /* Interrupt pipe */
129 struct {
130 int npoll;
131 int isread;
132 uhci_soft_qh_t **qhs;
133 } intr;
134 /* Bulk pipe */
135 struct {
136 uhci_soft_qh_t *sqh;
137 u_int length;
138 int isread;
139 } bulk;
140 /* Iso pipe */
141 struct iso {
142 uhci_soft_td_t **stds;
143 int next, inuse;
144 } iso;
145 } u;
146 };
147
148 static void uhci_globalreset(uhci_softc_t *);
149 static usbd_status uhci_portreset(uhci_softc_t*, int);
150 static void uhci_reset(uhci_softc_t *);
151 static usbd_status uhci_run(uhci_softc_t *, int run);
152 static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
153 static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
154 static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
155 static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
156 #if 0
157 static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
158 uhci_intr_info_t *);
159 static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
160 #endif
161
162 static void uhci_free_std_chain(uhci_softc_t *,
163 uhci_soft_td_t *, uhci_soft_td_t *);
164 static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
165 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
166 uhci_soft_td_t **, uhci_soft_td_t **);
167 static void uhci_poll_hub(void *);
168 static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
169 static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
170 static void uhci_idone(uhci_intr_info_t *);
171
172 static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
173
174 static void uhci_timeout(void *);
175 static void uhci_timeout_task(void *);
176 static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
177 static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
178 static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
179 static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
180 static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
181 static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
182 static int uhci_str(usb_string_descriptor_t *, int, char *);
183 static void uhci_add_loop(uhci_softc_t *sc);
184 static void uhci_rem_loop(uhci_softc_t *sc);
185
186 static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
187 static void uhci_device_isoc_enter(usbd_xfer_handle);
188
189 static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
190 static void uhci_freem(struct usbd_bus *, usb_dma_t *);
191
192 static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
193 static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
194
195 static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
196 static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
197 static void uhci_device_ctrl_abort(usbd_xfer_handle);
198 static void uhci_device_ctrl_close(usbd_pipe_handle);
199 static void uhci_device_ctrl_done(usbd_xfer_handle);
200
201 static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
202 static usbd_status uhci_device_intr_start(usbd_xfer_handle);
203 static void uhci_device_intr_abort(usbd_xfer_handle);
204 static void uhci_device_intr_close(usbd_pipe_handle);
205 static void uhci_device_intr_done(usbd_xfer_handle);
206
207 static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
208 static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
209 static void uhci_device_bulk_abort(usbd_xfer_handle);
210 static void uhci_device_bulk_close(usbd_pipe_handle);
211 static void uhci_device_bulk_done(usbd_xfer_handle);
212
213 static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
214 static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
215 static void uhci_device_isoc_abort(usbd_xfer_handle);
216 static void uhci_device_isoc_close(usbd_pipe_handle);
217 static void uhci_device_isoc_done(usbd_xfer_handle);
218
219 static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
220 static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
221 static void uhci_root_ctrl_abort(usbd_xfer_handle);
222 static void uhci_root_ctrl_close(usbd_pipe_handle);
223 static void uhci_root_ctrl_done(usbd_xfer_handle);
224
225 static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
226 static usbd_status uhci_root_intr_start(usbd_xfer_handle);
227 static void uhci_root_intr_abort(usbd_xfer_handle);
228 static void uhci_root_intr_close(usbd_pipe_handle);
229 static void uhci_root_intr_done(usbd_xfer_handle);
230
231 static usbd_status uhci_open(usbd_pipe_handle);
232 static void uhci_poll(struct usbd_bus *);
233 static void uhci_softintr(void *);
234
235 static usbd_status uhci_device_request(usbd_xfer_handle xfer);
236
237 static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
238 static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
239 static usbd_status uhci_device_setintr(uhci_softc_t *sc,
240 struct uhci_pipe *pipe, int ival);
241
242 static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
243 static void uhci_noop(usbd_pipe_handle pipe);
244
245 static __inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
246 uhci_soft_qh_t *);
247
248 #ifdef USB_DEBUG
249 static void uhci_dump_all(uhci_softc_t *);
250 static void uhci_dumpregs(uhci_softc_t *);
251 static void uhci_dump_qhs(uhci_soft_qh_t *);
252 static void uhci_dump_qh(uhci_soft_qh_t *);
253 static void uhci_dump_tds(uhci_soft_td_t *);
254 static void uhci_dump_td(uhci_soft_td_t *);
255 static void uhci_dump_ii(uhci_intr_info_t *ii);
256 void uhci_dump(void);
257 #endif
258
259 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
260 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
261 #define UWRITE1(sc, r, x) \
262 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
263 } while (/*CONSTCOND*/0)
264 #define UWRITE2(sc, r, x) \
265 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
266 } while (/*CONSTCOND*/0)
267 #define UWRITE4(sc, r, x) \
268 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
269 } while (/*CONSTCOND*/0)
270 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
271 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
272 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
273
274 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
275 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
276
277 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
278
279 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
280
281 #define UHCI_INTR_ENDPT 1
282
283 struct usbd_bus_methods uhci_bus_methods = {
284 uhci_open,
285 uhci_softintr,
286 uhci_poll,
287 uhci_allocm,
288 uhci_freem,
289 uhci_allocx,
290 uhci_freex,
291 };
292
293 struct usbd_pipe_methods uhci_root_ctrl_methods = {
294 uhci_root_ctrl_transfer,
295 uhci_root_ctrl_start,
296 uhci_root_ctrl_abort,
297 uhci_root_ctrl_close,
298 uhci_noop,
299 uhci_root_ctrl_done,
300 };
301
302 struct usbd_pipe_methods uhci_root_intr_methods = {
303 uhci_root_intr_transfer,
304 uhci_root_intr_start,
305 uhci_root_intr_abort,
306 uhci_root_intr_close,
307 uhci_noop,
308 uhci_root_intr_done,
309 };
310
311 struct usbd_pipe_methods uhci_device_ctrl_methods = {
312 uhci_device_ctrl_transfer,
313 uhci_device_ctrl_start,
314 uhci_device_ctrl_abort,
315 uhci_device_ctrl_close,
316 uhci_noop,
317 uhci_device_ctrl_done,
318 };
319
320 struct usbd_pipe_methods uhci_device_intr_methods = {
321 uhci_device_intr_transfer,
322 uhci_device_intr_start,
323 uhci_device_intr_abort,
324 uhci_device_intr_close,
325 uhci_device_clear_toggle,
326 uhci_device_intr_done,
327 };
328
329 struct usbd_pipe_methods uhci_device_bulk_methods = {
330 uhci_device_bulk_transfer,
331 uhci_device_bulk_start,
332 uhci_device_bulk_abort,
333 uhci_device_bulk_close,
334 uhci_device_clear_toggle,
335 uhci_device_bulk_done,
336 };
337
338 struct usbd_pipe_methods uhci_device_isoc_methods = {
339 uhci_device_isoc_transfer,
340 uhci_device_isoc_start,
341 uhci_device_isoc_abort,
342 uhci_device_isoc_close,
343 uhci_noop,
344 uhci_device_isoc_done,
345 };
346
347 #define uhci_add_intr_info(sc, ii) \
348 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
349 #define uhci_del_intr_info(ii) \
350 do { \
351 LIST_REMOVE((ii), list); \
352 (ii)->list.le_prev = NULL; \
353 } while (0)
354 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
355
356 static __inline uhci_soft_qh_t *
357 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
358 {
359 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
360
361 for (; pqh->hlink != sqh; pqh = pqh->hlink) {
362 #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
363 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
364 kprintf("uhci_find_prev_qh: QH not found\n");
365 return (NULL);
366 }
367 #endif
368 }
369 return (pqh);
370 }
371
372 void
373 uhci_globalreset(uhci_softc_t *sc)
374 {
375 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
376 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
377 UHCICMD(sc, 0); /* do nothing */
378 }
379
380 usbd_status
381 uhci_init(uhci_softc_t *sc)
382 {
383 usbd_status err;
384 int i, j;
385 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
386 uhci_soft_td_t *std;
387
388 DPRINTFN(1,("uhci_init: start\n"));
389
390 #ifdef USB_DEBUG
391 thesc = sc;
392
393 if (uhcidebug > 2)
394 uhci_dumpregs(sc);
395 #endif
396
397 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
398 uhci_globalreset(sc); /* reset the controller */
399 uhci_reset(sc);
400
401 /* Allocate and initialize real frame array. */
402 err = usb_allocmem(&sc->sc_bus,
403 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
404 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
405 if (err)
406 return (err);
407 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
408 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
409 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
410
411 /*
412 * Allocate a TD, inactive, that hangs from the last QH.
413 * This is to avoid a bug in the PIIX that makes it run berserk
414 * otherwise.
415 */
416 std = uhci_alloc_std(sc);
417 if (std == NULL)
418 return (USBD_NOMEM);
419 std->link.std = NULL;
420 std->td.td_link = htole32(UHCI_PTR_T);
421 std->td.td_status = htole32(0); /* inactive */
422 std->td.td_token = htole32(0);
423 std->td.td_buffer = htole32(0);
424
425 /* Allocate the dummy QH marking the end and used for looping the QHs.*/
426 lsqh = uhci_alloc_sqh(sc);
427 if (lsqh == NULL)
428 return (USBD_NOMEM);
429 lsqh->hlink = NULL;
430 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
431 lsqh->elink = std;
432 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
433 sc->sc_last_qh = lsqh;
434
435 /* Allocate the dummy QH where bulk traffic will be queued. */
436 bsqh = uhci_alloc_sqh(sc);
437 if (bsqh == NULL)
438 return (USBD_NOMEM);
439 bsqh->hlink = lsqh;
440 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
441 bsqh->elink = NULL;
442 bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
443 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
444
445 /* Allocate dummy QH where high speed control traffic will be queued. */
446 chsqh = uhci_alloc_sqh(sc);
447 if (chsqh == NULL)
448 return (USBD_NOMEM);
449 chsqh->hlink = bsqh;
450 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
451 chsqh->elink = NULL;
452 chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
453 sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
454
455 /* Allocate dummy QH where control traffic will be queued. */
456 clsqh = uhci_alloc_sqh(sc);
457 if (clsqh == NULL)
458 return (USBD_NOMEM);
459 clsqh->hlink = bsqh;
460 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
461 clsqh->elink = NULL;
462 clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
463 sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
464
465 /*
466 * Make all (virtual) frame list pointers point to the interrupt
467 * queue heads and the interrupt queue heads at the control
468 * queue head and point the physical frame list to the virtual.
469 */
470 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
471 std = uhci_alloc_std(sc);
472 sqh = uhci_alloc_sqh(sc);
473 if (std == NULL || sqh == NULL)
474 return (USBD_NOMEM);
475 std->link.sqh = sqh;
476
477 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
478 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
479 std->td.td_token = htole32(0);
480 std->td.td_buffer = htole32(0);
481 sqh->hlink = clsqh;
482 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
483 sqh->elink = NULL;
484 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
485 sc->sc_vframes[i].htd = std;
486 sc->sc_vframes[i].etd = std;
487 sc->sc_vframes[i].hqh = sqh;
488 sc->sc_vframes[i].eqh = sqh;
489 for (j = i;
490 j < UHCI_FRAMELIST_COUNT;
491 j += UHCI_VFRAMELIST_COUNT) {
492 sc->sc_pframes[j] = htole32(std->physaddr);
493 }
494 }
495
496 LIST_INIT(&sc->sc_intrhead);
497
498 SIMPLEQ_INIT(&sc->sc_free_xfers);
499
500 usb_callout_init(sc->sc_poll_handle);
501
502 /* Set up the bus struct. */
503 sc->sc_bus.methods = &uhci_bus_methods;
504 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
505
506 DPRINTFN(1,("uhci_init: enabling\n"));
507 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
508 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
509
510 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
511
512 return (uhci_run(sc, 1)); /* and here we go... */
513 }
514
515 int
516 uhci_detach(struct uhci_softc *sc, int flags)
517 {
518 usbd_xfer_handle xfer;
519 int rv = 0;
520
521 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
522 uhci_run(sc, 0);
523
524 /* Free all xfers associated with this HC. */
525 for (;;) {
526 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
527 if (xfer == NULL)
528 break;
529 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
530 kfree(xfer, M_USB);
531 }
532
533 /* XXX free other data structures XXX */
534 usb_freemem(&sc->sc_bus, &sc->sc_dma);
535
536 return (rv);
537 }
538
539 usbd_status
540 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
541 {
542 return (usb_allocmem(bus, size, 0, dma));
543 }
544
545 void
546 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
547 {
548 usb_freemem(bus, dma);
549 }
550
551 usbd_xfer_handle
552 uhci_allocx(struct usbd_bus *bus)
553 {
554 struct uhci_softc *sc = (struct uhci_softc *)bus;
555 usbd_xfer_handle xfer;
556
557 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
558 if (xfer != NULL) {
559 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
560 #ifdef DIAGNOSTIC
561 if (xfer->busy_free != XFER_FREE) {
562 kprintf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
563 xfer->busy_free);
564 }
565 #endif
566 } else {
567 xfer = kmalloc(sizeof(struct uhci_xfer), M_USB, M_INTWAIT);
568 }
569 if (xfer != NULL) {
570 memset(xfer, 0, sizeof (struct uhci_xfer));
571 UXFER(xfer)->iinfo.sc = sc;
572 usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task,
573 xfer);
574 UXFER(xfer)->uhci_xfer_flags = 0;
575 #ifdef DIAGNOSTIC
576 UXFER(xfer)->iinfo.isdone = 1;
577 xfer->busy_free = XFER_BUSY;
578 #endif
579 }
580 return (xfer);
581 }
582
583 void
584 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
585 {
586 struct uhci_softc *sc = (struct uhci_softc *)bus;
587
588 #ifdef DIAGNOSTIC
589 if (xfer->busy_free != XFER_BUSY) {
590 kprintf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
591 xfer->busy_free);
592 return;
593 }
594 xfer->busy_free = XFER_FREE;
595 if (!UXFER(xfer)->iinfo.isdone) {
596 kprintf("uhci_freex: !isdone\n");
597 return;
598 }
599 #endif
600 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
601 }
602
603 /*
604 * Shut down the controller when the system is going down.
605 */
606 void
607 uhci_shutdown(void *v)
608 {
609 uhci_softc_t *sc = v;
610
611 DPRINTF(("uhci_shutdown: stopping the HC\n"));
612 uhci_run(sc, 0); /* stop the controller */
613 }
614
615 /*
616 * Handle suspend/resume.
617 *
618 * We need to switch to polling mode here, because this routine is
619 * called from an interrupt context. This is all right since we
620 * are almost suspended anyway.
621 */
622 void
623 uhci_power(int why, void *v)
624 {
625 uhci_softc_t *sc = v;
626 int cmd;
627
628 crit_enter();
629 cmd = UREAD2(sc, UHCI_CMD);
630
631 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
632 sc, why, sc->sc_suspend, cmd));
633
634 if (why != PWR_RESUME) {
635 #ifdef USB_DEBUG
636 if (uhcidebug > 2)
637 uhci_dumpregs(sc);
638 #endif
639 if (sc->sc_intr_xfer != NULL)
640 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
641 sc->sc_intr_xfer);
642 sc->sc_bus.use_polling++;
643 uhci_run(sc, 0); /* stop the controller */
644
645 /* save some state if BIOS doesn't */
646 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
647 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
648
649 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
650
651 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
652 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
653 sc->sc_suspend = why;
654 sc->sc_bus.use_polling--;
655 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
656 } else {
657 #ifdef DIAGNOSTIC
658 if (sc->sc_suspend == PWR_RESUME)
659 kprintf("uhci_power: weird, resume without suspend.\n");
660 #endif
661 sc->sc_bus.use_polling++;
662 sc->sc_suspend = why;
663 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
664 uhci_globalreset(sc); /* reset the controller */
665 uhci_reset(sc);
666 if (cmd & UHCI_CMD_RS)
667 uhci_run(sc, 0); /* in case BIOS has started it */
668
669 uhci_globalreset(sc);
670 uhci_reset(sc);
671
672 /* restore saved state */
673 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
674 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
675 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
676
677 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
678 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
679 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
680 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
681 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
682 UHCICMD(sc, UHCI_CMD_MAXP);
683 uhci_run(sc, 1); /* and start traffic again */
684 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
685 sc->sc_bus.use_polling--;
686 if (sc->sc_intr_xfer != NULL)
687 usb_callout(sc->sc_poll_handle, sc->sc_ival,
688 uhci_poll_hub, sc->sc_intr_xfer);
689 #ifdef USB_DEBUG
690 if (uhcidebug > 2)
691 uhci_dumpregs(sc);
692 #endif
693 }
694 crit_exit();
695 }
696
697 #ifdef USB_DEBUG
698 static void
699 uhci_dumpregs(uhci_softc_t *sc)
700 {
701 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
702 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
703 device_get_nameunit(sc->sc_bus.bdev),
704 UREAD2(sc, UHCI_CMD),
705 UREAD2(sc, UHCI_STS),
706 UREAD2(sc, UHCI_INTR),
707 UREAD2(sc, UHCI_FRNUM),
708 UREAD4(sc, UHCI_FLBASEADDR),
709 UREAD1(sc, UHCI_SOF),
710 UREAD2(sc, UHCI_PORTSC1),
711 UREAD2(sc, UHCI_PORTSC2)));
712 }
713
714 void
715 uhci_dump_td(uhci_soft_td_t *p)
716 {
717 char sbuf[128], sbuf2[128];
718
719 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
720 "token=0x%08lx buffer=0x%08lx\n",
721 p, (long)p->physaddr,
722 (long)le32toh(p->td.td_link),
723 (long)le32toh(p->td.td_status),
724 (long)le32toh(p->td.td_token),
725 (long)le32toh(p->td.td_buffer)));
726
727 bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
728 sbuf, sizeof(sbuf));
729 bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
730 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
731 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
732 sbuf2, sizeof(sbuf2));
733
734 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
735 "D=%d,maxlen=%d\n", sbuf, sbuf2,
736 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
737 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
738 UHCI_TD_GET_PID(le32toh(p->td.td_token)),
739 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
740 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
741 UHCI_TD_GET_DT(le32toh(p->td.td_token)),
742 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
743 }
744
745 void
746 uhci_dump_qh(uhci_soft_qh_t *sqh)
747 {
748 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
749 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
750 le32toh(sqh->qh.qh_elink)));
751 }
752
753 #if 1
754 void
755 uhci_dump(void)
756 {
757 uhci_dump_all(thesc);
758 }
759 #endif
760
761 void
762 uhci_dump_all(uhci_softc_t *sc)
763 {
764 uhci_dumpregs(sc);
765 kprintf("intrs=%d\n", sc->sc_bus.no_intrs);
766 /*kprintf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
767 uhci_dump_qh(sc->sc_lctl_start);
768 }
769
770 void
771 uhci_dump_qhs(uhci_soft_qh_t *sqh)
772 {
773 uhci_dump_qh(sqh);
774
775 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
776 * Traverses sideways first, then down.
777 *
778 * QH1
779 * QH2
780 * No QH
781 * TD2.1
782 * TD2.2
783 * TD1.1
784 * etc.
785 *
786 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
787 */
788
789
790 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
791 uhci_dump_qhs(sqh->hlink);
792 else
793 DPRINTF(("No QH\n"));
794
795 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
796 uhci_dump_tds(sqh->elink);
797 else
798 DPRINTF(("No TD\n"));
799 }
800
801 void
802 uhci_dump_tds(uhci_soft_td_t *std)
803 {
804 uhci_soft_td_t *td;
805
806 for(td = std; td != NULL; td = td->link.std) {
807 uhci_dump_td(td);
808
809 /* Check whether the link pointer in this TD marks
810 * the link pointer as end of queue. This avoids
811 * printing the free list in case the queue/TD has
812 * already been moved there (seatbelt).
813 */
814 if (le32toh(td->td.td_link) & UHCI_PTR_T ||
815 le32toh(td->td.td_link) == 0)
816 break;
817 }
818 }
819
820 static void
821 uhci_dump_ii(uhci_intr_info_t *ii)
822 {
823 usbd_pipe_handle pipe;
824 usb_endpoint_descriptor_t *ed;
825 usbd_device_handle dev;
826
827 #ifdef DIAGNOSTIC
828 #define DONE ii->isdone
829 #else
830 #define DONE 0
831 #endif
832 if (ii == NULL) {
833 kprintf("ii NULL\n");
834 return;
835 }
836 if (ii->xfer == NULL) {
837 kprintf("ii %p: done=%d xfer=NULL\n",
838 ii, DONE);
839 return;
840 }
841 pipe = ii->xfer->pipe;
842 if (pipe == NULL) {
843 kprintf("ii %p: done=%d xfer=%p pipe=NULL\n",
844 ii, DONE, ii->xfer);
845 return;
846 }
847 if (pipe->endpoint == NULL) {
848 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
849 ii, DONE, ii->xfer, pipe);
850 return;
851 }
852 if (pipe->device == NULL) {
853 kprintf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
854 ii, DONE, ii->xfer, pipe);
855 return;
856 }
857 ed = pipe->endpoint->edesc;
858 dev = pipe->device;
859 kprintf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
860 ii, DONE, ii->xfer, dev,
861 UGETW(dev->ddesc.idVendor),
862 UGETW(dev->ddesc.idProduct),
863 dev->address, pipe,
864 ed->bEndpointAddress, ed->bmAttributes);
865 #undef DONE
866 }
867
868 void uhci_dump_iis(struct uhci_softc *sc);
869 void
870 uhci_dump_iis(struct uhci_softc *sc)
871 {
872 uhci_intr_info_t *ii;
873
874 kprintf("intr_info list:\n");
875 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
876 uhci_dump_ii(ii);
877 }
878
879 void iidump(void);
880 void iidump(void) { uhci_dump_iis(thesc); }
881
882 #endif
883
884 /*
885 * This routine is executed periodically and simulates interrupts
886 * from the root controller interrupt pipe for port status change.
887 */
888 void
889 uhci_poll_hub(void *addr)
890 {
891 usbd_xfer_handle xfer = addr;
892 usbd_pipe_handle pipe = xfer->pipe;
893 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
894 u_char *p;
895
896 DPRINTFN(20, ("uhci_poll_hub\n"));
897
898 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
899
900 p = KERNADDR(&xfer->dmabuf, 0);
901 p[0] = 0;
902 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
903 p[0] |= 1<<1;
904 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
905 p[0] |= 1<<2;
906 if (p[0] == 0)
907 /* No change, try again in a while */
908 return;
909
910 xfer->actlen = 1;
911 xfer->status = USBD_NORMAL_COMPLETION;
912 crit_enter();
913 xfer->device->bus->intr_context++;
914 usb_transfer_complete(xfer);
915 xfer->device->bus->intr_context--;
916 crit_exit();
917 }
918
919 void
920 uhci_root_intr_done(usbd_xfer_handle xfer)
921 {
922 }
923
924 void
925 uhci_root_ctrl_done(usbd_xfer_handle xfer)
926 {
927 }
928
929 /*
930 * Let the last QH loop back to the high speed control transfer QH.
931 * This is what intel calls "bandwidth reclamation" and improves
932 * USB performance a lot for some devices.
933 * If we are already looping, just count it.
934 */
935 void
936 uhci_add_loop(uhci_softc_t *sc) {
937 #ifdef USB_DEBUG
938 if (uhcinoloop)
939 return;
940 #endif
941 if (++sc->sc_loops == 1) {
942 DPRINTFN(5,("uhci_start_loop: add\n"));
943 /* Note, we don't loop back the soft pointer. */
944 sc->sc_last_qh->qh.qh_hlink =
945 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
946 }
947 }
948
949 void
950 uhci_rem_loop(uhci_softc_t *sc) {
951 #ifdef USB_DEBUG
952 if (uhcinoloop)
953 return;
954 #endif
955 if (--sc->sc_loops == 0) {
956 DPRINTFN(5,("uhci_end_loop: remove\n"));
957 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
958 }
959 }
960
961 /* Add high speed control QH, called from a critical section. */
962 void
963 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
964 {
965 uhci_soft_qh_t *eqh;
966
967 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
968 eqh = sc->sc_hctl_end;
969 sqh->hlink = eqh->hlink;
970 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
971 eqh->hlink = sqh;
972 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
973 sc->sc_hctl_end = sqh;
974 #ifdef UHCI_CTL_LOOP
975 uhci_add_loop(sc);
976 #endif
977 }
978
979 /* Remove high speed control QH, called from a critical section. */
980 void
981 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
982 {
983 uhci_soft_qh_t *pqh;
984
985 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
986 #ifdef UHCI_CTL_LOOP
987 uhci_rem_loop(sc);
988 #endif
989 /*
990 * The T bit should be set in the elink of the QH so that the HC
991 * doesn't follow the pointer. This condition may fail if the
992 * the transferred packet was short so that the QH still points
993 * at the last used TD.
994 * In this case we set the T bit and wait a little for the HC
995 * to stop looking at the TD.
996 */
997 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
998 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
999 delay(UHCI_QH_REMOVE_DELAY);
1000 }
1001
1002 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1003 pqh->hlink = sqh->hlink;
1004 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1005 delay(UHCI_QH_REMOVE_DELAY);
1006 if (sc->sc_hctl_end == sqh)
1007 sc->sc_hctl_end = pqh;
1008 }
1009
1010 /* Add low speed control QH, called from a critical section. */
1011 void
1012 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1013 {
1014 uhci_soft_qh_t *eqh;
1015
1016 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1017 eqh = sc->sc_lctl_end;
1018 sqh->hlink = eqh->hlink;
1019 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1020 eqh->hlink = sqh;
1021 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1022 sc->sc_lctl_end = sqh;
1023 }
1024
1025 /* Remove low speed control QH, called from a critical section. */
1026 void
1027 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1028 {
1029 uhci_soft_qh_t *pqh;
1030
1031 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1032 /* See comment in uhci_remove_hs_ctrl() */
1033 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1034 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1035 delay(UHCI_QH_REMOVE_DELAY);
1036 }
1037 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1038 pqh->hlink = sqh->hlink;
1039 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1040 delay(UHCI_QH_REMOVE_DELAY);
1041 if (sc->sc_lctl_end == sqh)
1042 sc->sc_lctl_end = pqh;
1043 }
1044
1045 /* Add bulk QH, called from a critical section. */
1046 void
1047 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1048 {
1049 uhci_soft_qh_t *eqh;
1050
1051 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1052 eqh = sc->sc_bulk_end;
1053 sqh->hlink = eqh->hlink;
1054 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1055 eqh->hlink = sqh;
1056 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1057 sc->sc_bulk_end = sqh;
1058 uhci_add_loop(sc);
1059 }
1060
1061 /* Remove bulk QH, called from a critical section. */
1062 void
1063 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1064 {
1065 uhci_soft_qh_t *pqh;
1066
1067 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1068 uhci_rem_loop(sc);
1069 /* See comment in uhci_remove_hs_ctrl() */
1070 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1071 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1072 delay(UHCI_QH_REMOVE_DELAY);
1073 }
1074 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1075 pqh->hlink = sqh->hlink;
1076 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1077 delay(UHCI_QH_REMOVE_DELAY);
1078 if (sc->sc_bulk_end == sqh)
1079 sc->sc_bulk_end = pqh;
1080 }
1081
1082 static int uhci_intr1(uhci_softc_t *);
1083
1084 int
1085 uhci_intr(void *arg)
1086 {
1087 uhci_softc_t *sc = arg;
1088
1089 if (sc->sc_dying || (sc->sc_flags & UHCI_SCFLG_DONEINIT) == 0)
1090 return (0);
1091
1092 DPRINTFN(15,("uhci_intr: real interrupt\n"));
1093 if (sc->sc_bus.use_polling) {
1094 #ifdef DIAGNOSTIC
1095 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1096 #endif
1097 return (0);
1098 }
1099
1100 return (uhci_intr1(sc));
1101 }
1102
1103 int
1104 uhci_intr1(uhci_softc_t *sc)
1105 {
1106
1107 int status;
1108 int ack;
1109
1110 /*
1111 * It can happen that an interrupt will be delivered to
1112 * us before the device has been fully attached and the
1113 * softc struct has been configured. Usually this happens
1114 * when kldloading the USB support as a module after the
1115 * system has been booted. If we detect this condition,
1116 * we need to squelch the unwanted interrupts until we're
1117 * ready for them.
1118 */
1119 if (sc->sc_bus.bdev == NULL) {
1120 UWRITE2(sc, UHCI_STS, 0xFFFF); /* ack pending interrupts */
1121 uhci_run(sc, 0); /* stop the controller */
1122 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
1123 return(0);
1124 }
1125
1126 #ifdef USB_DEBUG
1127 if (uhcidebug > 15) {
1128 DPRINTF(("%s: uhci_intr1\n", device_get_nameunit(sc->sc_bus.bdev)));
1129 uhci_dumpregs(sc);
1130 }
1131 #endif
1132 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1133 if (status == 0) /* The interrupt was not for us. */
1134 return (0);
1135
1136 if (sc->sc_suspend != PWR_RESUME) {
1137 kprintf("%s: interrupt while not operating ignored\n",
1138 device_get_nameunit(sc->sc_bus.bdev));
1139 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1140 return (0);
1141 }
1142
1143 ack = 0;
1144 if (status & UHCI_STS_USBINT)
1145 ack |= UHCI_STS_USBINT;
1146 if (status & UHCI_STS_USBEI)
1147 ack |= UHCI_STS_USBEI;
1148 if (status & UHCI_STS_RD) {
1149 ack |= UHCI_STS_RD;
1150 #ifdef USB_DEBUG
1151 kprintf("%s: resume detect\n", device_get_nameunit(sc->sc_bus.bdev));
1152 #endif
1153 }
1154 if (status & UHCI_STS_HSE) {
1155 ack |= UHCI_STS_HSE;
1156 kprintf("%s: host system error\n", device_get_nameunit(sc->sc_bus.bdev));
1157 }
1158 if (status & UHCI_STS_HCPE) {
1159 ack |= UHCI_STS_HCPE;
1160 kprintf("%s: host controller process error\n",
1161 device_get_nameunit(sc->sc_bus.bdev));
1162 }
1163 if (status & UHCI_STS_HCH) {
1164 /* no acknowledge needed */
1165 if (!sc->sc_dying) {
1166 kprintf("%s: host controller halted\n",
1167 device_get_nameunit(sc->sc_bus.bdev));
1168 #ifdef USB_DEBUG
1169 uhci_dump_all(sc);
1170 #endif
1171 }
1172 sc->sc_dying = 1;
1173 }
1174
1175 if (!ack)
1176 return (0); /* nothing to acknowledge */
1177 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1178
1179 sc->sc_bus.no_intrs++;
1180 usb_schedsoftintr(&sc->sc_bus);
1181
1182 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_get_nameunit(sc->sc_bus.bdev)));
1183
1184 return (1);
1185 }
1186
1187 void
1188 uhci_softintr(void *v)
1189 {
1190 uhci_softc_t *sc = v;
1191 uhci_intr_info_t *ii, *nextii;
1192
1193 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
1194 sc->sc_bus.intr_context));
1195
1196 sc->sc_bus.intr_context++;
1197
1198 /*
1199 * Interrupts on UHCI really suck. When the host controller
1200 * interrupts because a transfer is completed there is no
1201 * way of knowing which transfer it was. You can scan down
1202 * the TDs and QHs of the previous frame to limit the search,
1203 * but that assumes that the interrupt was not delayed by more
1204 * than 1 ms, which may not always be true (e.g. after debug
1205 * output on a slow console).
1206 * We scan all interrupt descriptors to see if any have
1207 * completed.
1208 */
1209 LIST_FOREACH_MUTABLE(ii, &sc->sc_intrhead, list, nextii)
1210 uhci_check_intr(sc, ii);
1211
1212 #ifdef USB_USE_SOFTINTR
1213 if (sc->sc_softwake) {
1214 sc->sc_softwake = 0;
1215 wakeup(&sc->sc_softwake);
1216 }
1217 #endif /* USB_USE_SOFTINTR */
1218
1219 sc->sc_bus.intr_context--;
1220 }
1221
1222 /* Check for an interrupt. */
1223 void
1224 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1225 {
1226 uhci_soft_td_t *std, *lstd;
1227 u_int32_t status;
1228
1229 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1230 #ifdef DIAGNOSTIC
1231 if (ii == NULL) {
1232 kprintf("uhci_check_intr: no ii? %p\n", ii);
1233 return;
1234 }
1235 #endif
1236 if (ii->xfer->status == USBD_CANCELLED ||
1237 ii->xfer->status == USBD_TIMEOUT) {
1238 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1239 return;
1240 }
1241
1242 if (ii->stdstart == NULL)
1243 return;
1244 lstd = ii->stdend;
1245 #ifdef DIAGNOSTIC
1246 if (lstd == NULL) {
1247 kprintf("uhci_check_intr: std==0\n");
1248 return;
1249 }
1250 #endif
1251 /*
1252 * If the last TD is still active we need to check whether there
1253 * is an error somewhere in the middle, or whether there was a
1254 * short packet (SPD and not ACTIVE).
1255 */
1256 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1257 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1258 for (std = ii->stdstart; std != lstd; std = std->link.std) {
1259 status = le32toh(std->td.td_status);
1260 /* If there's an active TD the xfer isn't done. */
1261 if (status & UHCI_TD_ACTIVE)
1262 break;
1263 /* Any kind of error makes the xfer done. */
1264 if (status & UHCI_TD_STALLED)
1265 goto done;
1266 /* We want short packets, and it is short: it's done */
1267 if ((status & UHCI_TD_SPD) &&
1268 UHCI_TD_GET_ACTLEN(status) <
1269 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) {
1270 goto done;
1271 }
1272 }
1273 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1274 ii, ii->stdstart));
1275 return;
1276 }
1277 done:
1278 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1279 usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1280 usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task);
1281 uhci_idone(ii);
1282 }
1283
1284 /* Called from a critical section. */
1285 void
1286 uhci_idone(uhci_intr_info_t *ii)
1287 {
1288 usbd_xfer_handle xfer = ii->xfer;
1289 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1290 uhci_soft_td_t *std;
1291 u_int32_t status = 0, nstatus;
1292 int actlen;
1293
1294 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1295 #ifdef DIAGNOSTIC
1296 {
1297 crit_enter();
1298 if (ii->isdone) {
1299 crit_exit();
1300 #ifdef USB_DEBUG
1301 kprintf("uhci_idone: ii is done!\n ");
1302 uhci_dump_ii(ii);
1303 #else
1304 kprintf("uhci_idone: ii=%p is done!\n", ii);
1305 #endif
1306 return;
1307 }
1308 ii->isdone = 1;
1309 crit_exit();
1310 }
1311 #endif
1312
1313 if (xfer->nframes != 0) {
1314 /* Isoc transfer, do things differently. */
1315 uhci_soft_td_t **stds = upipe->u.iso.stds;
1316 int i, n, nframes, len;
1317
1318 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1319
1320 nframes = xfer->nframes;
1321 actlen = 0;
1322 n = UXFER(xfer)->curframe;
1323 for (i = 0; i < nframes; i++) {
1324 std = stds[n];
1325 #ifdef USB_DEBUG
1326 if (uhcidebug > 5) {
1327 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1328 uhci_dump_td(std);
1329 }
1330 #endif
1331 if (++n >= UHCI_VFRAMELIST_COUNT)
1332 n = 0;
1333 status = le32toh(std->td.td_status);
1334 len = UHCI_TD_GET_ACTLEN(status);
1335 xfer->frlengths[i] = len;
1336 actlen += len;
1337 }
1338 upipe->u.iso.inuse -= nframes;
1339 xfer->actlen = actlen;
1340 xfer->status = USBD_NORMAL_COMPLETION;
1341 goto end;
1342 }
1343
1344 #ifdef USB_DEBUG
1345 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1346 ii, xfer, upipe));
1347 if (uhcidebug > 10)
1348 uhci_dump_tds(ii->stdstart);
1349 #endif
1350
1351 /* The transfer is done, compute actual length and status. */
1352 actlen = 0;
1353 for (std = ii->stdstart; std != NULL; std = std->link.std) {
1354 nstatus = le32toh(std->td.td_status);
1355 if (nstatus & UHCI_TD_ACTIVE)
1356 break;
1357
1358 status = nstatus;
1359 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1360 UHCI_TD_PID_SETUP) {
1361 actlen += UHCI_TD_GET_ACTLEN(status);
1362 } else {
1363 /*
1364 * UHCI will report CRCTO in addition to a STALL or NAK
1365 * for a SETUP transaction. See section 3.2.2, "TD
1366 * CONTROL AND STATUS".
1367 */
1368 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1369 status &= ~UHCI_TD_CRCTO;
1370 }
1371
1372 }
1373 /* If there are left over TDs we need to update the toggle. */
1374 if (std != NULL)
1375 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1376
1377 status &= UHCI_TD_ERROR;
1378 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1379 actlen, status));
1380 xfer->actlen = actlen;
1381 if (status != 0) {
1382 #ifdef USB_DEBUG
1383 char sbuf[128];
1384
1385 bitmask_snprintf((u_int32_t)status,
1386 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1387 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1388 sbuf, sizeof(sbuf));
1389
1390 DPRINTFN((status == UHCI_TD_STALLED)*10,
1391 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1392 "status 0x%s\n",
1393 xfer->pipe->device->address,
1394 xfer->pipe->endpoint->edesc->bEndpointAddress,
1395 sbuf));
1396 #endif
1397 if (status == UHCI_TD_STALLED)
1398 xfer->status = USBD_STALLED;
1399 else
1400 xfer->status = USBD_IOERROR; /* more info XXX */
1401 } else {
1402 xfer->status = USBD_NORMAL_COMPLETION;
1403 }
1404
1405 end:
1406 usb_transfer_complete(xfer);
1407 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1408 }
1409
1410 /*
1411 * Called when a request does not complete.
1412 */
1413 void
1414 uhci_timeout(void *addr)
1415 {
1416 uhci_intr_info_t *ii = addr;
1417 struct uhci_xfer *uxfer = UXFER(ii->xfer);
1418 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1419 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1420
1421 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1422
1423 if (sc->sc_dying) {
1424 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1425 return;
1426 }
1427
1428 /* Execute the abort in a process context. */
1429 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1430 USB_TASKQ_HC);
1431 }
1432
1433 void
1434 uhci_timeout_task(void *addr)
1435 {
1436 usbd_xfer_handle xfer = addr;
1437
1438 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1439
1440 crit_enter();
1441 uhci_abort_xfer(xfer, USBD_TIMEOUT);
1442 crit_exit();
1443 }
1444
1445 /*
1446 * Wait here until controller claims to have an interrupt.
1447 * Then call uhci_intr and return. Use timeout to avoid waiting
1448 * too long.
1449 * Only used during boot when interrupts are not enabled yet.
1450 */
1451 void
1452 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1453 {
1454 int timo = xfer->timeout;
1455 uhci_intr_info_t *ii;
1456
1457 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1458
1459 xfer->status = USBD_IN_PROGRESS;
1460 for (; timo >= 0; timo--) {
1461 usb_delay_ms(&sc->sc_bus, 1);
1462 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1463 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1464 uhci_intr1(sc);
1465 if (xfer->status != USBD_IN_PROGRESS)
1466 return;
1467 }
1468
1469 /* Timeout */
1470 DPRINTF(("uhci_waitintr: timeout\n"));
1471 for (ii = LIST_FIRST(&sc->sc_intrhead);
1472 ii != NULL && ii->xfer != xfer;
1473 ii = LIST_NEXT(ii, list))
1474 ;
1475 #ifdef DIAGNOSTIC
1476 if (ii == NULL)
1477 panic("uhci_waitintr: lost intr_info");
1478 #endif
1479 uhci_idone(ii);
1480 }
1481
1482 void
1483 uhci_poll(struct usbd_bus *bus)
1484 {
1485 uhci_softc_t *sc = (uhci_softc_t *)bus;
1486
1487 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1488 uhci_intr1(sc);
1489 }
1490
1491 void
1492 uhci_reset(uhci_softc_t *sc)
1493 {
1494 int n;
1495
1496 UHCICMD(sc, UHCI_CMD_HCRESET);
1497 /* The reset bit goes low when the controller is done. */
1498 for (n = 0; n < UHCI_RESET_TIMEOUT &&
1499 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1500 usb_delay_ms(&sc->sc_bus, 1);
1501 if (n >= UHCI_RESET_TIMEOUT)
1502 kprintf("%s: controller did not reset\n",
1503 device_get_nameunit(sc->sc_bus.bdev));
1504 }
1505
1506 usbd_status
1507 uhci_run(uhci_softc_t *sc, int run)
1508 {
1509 int n, running;
1510 u_int16_t cmd;
1511
1512 run = run != 0;
1513 crit_enter();
1514 DPRINTF(("uhci_run: setting run=%d\n", run));
1515 cmd = UREAD2(sc, UHCI_CMD);
1516 if (run)
1517 cmd |= UHCI_CMD_RS;
1518 else
1519 cmd &= ~UHCI_CMD_RS;
1520 UHCICMD(sc, cmd);
1521 for(n = 0; n < 10; n++) {
1522 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1523 /* return when we've entered the state we want */
1524 if (run == running) {
1525 crit_exit();
1526 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1527 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1528 return (USBD_NORMAL_COMPLETION);
1529 }
1530 usb_delay_ms(&sc->sc_bus, 1);
1531 }
1532 crit_exit();
1533 kprintf("%s: cannot %s\n", device_get_nameunit(sc->sc_bus.bdev),
1534 run ? "start" : "stop");
1535 return (USBD_IOERROR);
1536 }
1537
1538 /*
1539 * Memory management routines.
1540 * uhci_alloc_std allocates TDs
1541 * uhci_alloc_sqh allocates QHs
1542 * These two routines do their own free list management,
1543 * partly for speed, partly because allocating DMAable memory
1544 * has page size granularaity so much memory would be wasted if
1545 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1546 */
1547
1548 uhci_soft_td_t *
1549 uhci_alloc_std(uhci_softc_t *sc)
1550 {
1551 uhci_soft_td_t *std;
1552 usbd_status err;
1553 int i, offs;
1554 usb_dma_t dma;
1555
1556 if (sc->sc_freetds == NULL) {
1557 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1558 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1559 UHCI_TD_ALIGN, &dma);
1560 if (err)
1561 return (0);
1562 for(i = 0; i < UHCI_STD_CHUNK; i++) {
1563 offs = i * UHCI_STD_SIZE;
1564 std = KERNADDR(&dma, offs);
1565 std->physaddr = DMAADDR(&dma, offs);
1566 std->link.std = sc->sc_freetds;
1567 sc->sc_freetds = std;
1568 }
1569 }
1570 std = sc->sc_freetds;
1571 sc->sc_freetds = std->link.std;
1572 memset(&std->td, 0, sizeof(uhci_td_t));
1573 return std;
1574 }
1575
1576 void
1577 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1578 {
1579 #ifdef DIAGNOSTIC
1580 #define TD_IS_FREE 0x12345678
1581 if (le32toh(std->td.td_token) == TD_IS_FREE) {
1582 kprintf("uhci_free_std: freeing free TD %p\n", std);
1583 return;
1584 }
1585 std->td.td_token = htole32(TD_IS_FREE);
1586 #endif
1587 std->link.std = sc->sc_freetds;
1588 sc->sc_freetds = std;
1589 }
1590
1591 uhci_soft_qh_t *
1592 uhci_alloc_sqh(uhci_softc_t *sc)
1593 {
1594 uhci_soft_qh_t *sqh;
1595 usbd_status err;
1596 int i, offs;
1597 usb_dma_t dma;
1598
1599 if (sc->sc_freeqhs == NULL) {
1600 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1601 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1602 UHCI_QH_ALIGN, &dma);
1603 if (err)
1604 return (0);
1605 for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1606 offs = i * UHCI_SQH_SIZE;
1607 sqh = KERNADDR(&dma, offs);
1608 sqh->physaddr = DMAADDR(&dma, offs);
1609 sqh->hlink = sc->sc_freeqhs;
1610 sc->sc_freeqhs = sqh;
1611 }
1612 }
1613 sqh = sc->sc_freeqhs;
1614 sc->sc_freeqhs = sqh->hlink;
1615 memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1616 return (sqh);
1617 }
1618
1619 void
1620 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1621 {
1622 sqh->hlink = sc->sc_freeqhs;
1623 sc->sc_freeqhs = sqh;
1624 }
1625
1626 void
1627 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1628 uhci_soft_td_t *stdend)
1629 {
1630 uhci_soft_td_t *p;
1631
1632 for (; std != stdend; std = p) {
1633 p = std->link.std;
1634 uhci_free_std(sc, std);
1635 }
1636 }
1637
1638 usbd_status
1639 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1640 int rd, u_int16_t flags, usb_dma_t *dma,
1641 uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1642 {
1643 uhci_soft_td_t *p, *lastp;
1644 uhci_physaddr_t lastlink;
1645 int i, ntd, l, tog, maxp;
1646 u_int32_t status;
1647 int addr = upipe->pipe.device->address;
1648 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1649
1650 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1651 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1652 upipe->pipe.device->speed, flags));
1653 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1654 if (maxp == 0) {
1655 kprintf("uhci_alloc_std_chain: maxp=0\n");
1656 return (USBD_INVAL);
1657 }
1658 ntd = (len + maxp - 1) / maxp;
1659 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1660 ntd++;
1661 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1662 if (ntd == 0) {
1663 *sp = *ep = 0;
1664 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1665 return (USBD_NORMAL_COMPLETION);
1666 }
1667 tog = upipe->nexttoggle;
1668 if (ntd % 2 == 0)
1669 tog ^= 1;
1670 upipe->nexttoggle = tog ^ 1;
1671 lastp = NULL;
1672 lastlink = UHCI_PTR_T;
1673 ntd--;
1674 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1675 if (upipe->pipe.device->speed == USB_SPEED_LOW)
1676 status |= UHCI_TD_LS;
1677 if (flags & USBD_SHORT_XFER_OK)
1678 status |= UHCI_TD_SPD;
1679 for (i = ntd; i >= 0; i--) {
1680 p = uhci_alloc_std(sc);
1681 if (p == NULL) {
1682 uhci_free_std_chain(sc, lastp, NULL);
1683 return (USBD_NOMEM);
1684 }
1685 p->link.std = lastp;
1686 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1687 lastp = p;
1688 lastlink = p->physaddr;
1689 p->td.td_status = htole32(status);
1690 if (i == ntd) {
1691 /* last TD */
1692 l = len % maxp;
1693 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1694 l = maxp;
1695 *ep = p;
1696 } else
1697 l = maxp;
1698 p->td.td_token =
1699 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1700 UHCI_TD_OUT(l, endpt, addr, tog));
1701 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1702 tog ^= 1;
1703 }
1704 *sp = lastp;
1705 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1706 upipe->nexttoggle));
1707 return (USBD_NORMAL_COMPLETION);
1708 }
1709
1710 void
1711 uhci_device_clear_toggle(usbd_pipe_handle pipe)
1712 {
1713 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1714 upipe->nexttoggle = 0;
1715 }
1716
1717 void
1718 uhci_noop(usbd_pipe_handle pipe)
1719 {
1720 }
1721
1722 usbd_status
1723 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1724 {
1725 usbd_status err;
1726
1727 /* Insert last in queue. */
1728 err = usb_insert_transfer(xfer);
1729 if (err)
1730 return (err);
1731
1732 /*
1733 * Pipe isn't running (otherwise err would be USBD_INPROG),
1734 * so start it first.
1735 */
1736 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1737 }
1738
1739 usbd_status
1740 uhci_device_bulk_start(usbd_xfer_handle xfer)
1741 {
1742 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1743 usbd_device_handle dev = upipe->pipe.device;
1744 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1745 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1746 uhci_soft_td_t *data, *dataend;
1747 uhci_soft_qh_t *sqh;
1748 usbd_status err;
1749 int len, isread, endpt;
1750
1751 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1752 xfer, xfer->length, xfer->flags, ii));
1753
1754 if (sc->sc_dying)
1755 return (USBD_IOERROR);
1756
1757 #ifdef DIAGNOSTIC
1758 if (xfer->rqflags & URQ_REQUEST)
1759 panic("uhci_device_bulk_transfer: a request");
1760 #endif
1761
1762 len = xfer->length;
1763 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1764 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1765 sqh = upipe->u.bulk.sqh;
1766
1767 upipe->u.bulk.isread = isread;
1768 upipe->u.bulk.length = len;
1769
1770 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1771 &xfer->dmabuf, &data, &dataend);
1772 if (err)
1773 return (err);
1774 dataend->td.td_status |= htole32(UHCI_TD_IOC);
1775
1776 #ifdef USB_DEBUG
1777 if (uhcidebug > 8) {
1778 DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1779 uhci_dump_tds(data);
1780 }
1781 #endif
1782
1783 /* Set up interrupt info. */
1784 ii->xfer = xfer;
1785 ii->stdstart = data;
1786 ii->stdend = dataend;
1787 #ifdef DIAGNOSTIC
1788 if (!ii->isdone) {
1789 kprintf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1790 }
1791 ii->isdone = 0;
1792 #endif
1793
1794 sqh->elink = data;
1795 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1796
1797 crit_enter();
1798 uhci_add_bulk(sc, sqh);
1799 uhci_add_intr_info(sc, ii);
1800
1801 if (xfer->timeout && !sc->sc_bus.use_polling) {
1802 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1803 uhci_timeout, ii);
1804 }
1805 xfer->status = USBD_IN_PROGRESS;
1806 crit_exit();
1807
1808 #ifdef USB_DEBUG
1809 if (uhcidebug > 10) {
1810 DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1811 uhci_dump_tds(data);
1812 }
1813 #endif
1814
1815 if (sc->sc_bus.use_polling)
1816 uhci_waitintr(sc, xfer);
1817
1818 return (USBD_IN_PROGRESS);
1819 }
1820
1821 /* Abort a device bulk request. */
1822 void
1823 uhci_device_bulk_abort(usbd_xfer_handle xfer)
1824 {
1825 DPRINTF(("uhci_device_bulk_abort:\n"));
1826 uhci_abort_xfer(xfer, USBD_CANCELLED);
1827 }
1828
1829 /*
1830 * Abort a device request.
1831 * If this routine is called from a critical section. It guarantees that
1832 * the request will be removed from the hardware scheduling and that
1833 * the callback for it will be called with USBD_CANCELLED status.
1834 * It's impossible to guarantee that the requested transfer will not
1835 * have happened since the hardware runs concurrently.
1836 * If the transaction has already happened we rely on the ordinary
1837 * interrupt processing to process it.
1838 */
1839 void
1840 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1841 {
1842 struct uhci_xfer *uxfer = UXFER(xfer);
1843 uhci_intr_info_t *ii = &uxfer->iinfo;
1844 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1845 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1846 uhci_soft_td_t *std;
1847
1848 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1849
1850 if (sc->sc_dying) {
1851 /* If we're dying, just do the software part. */
1852 crit_enter();
1853 xfer->status = status; /* make software ignore it */
1854 usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
1855 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1856 usb_transfer_complete(xfer);
1857 crit_exit();
1858 return;
1859 }
1860
1861 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
1862 panic("uhci_abort_xfer: not in process context");
1863
1864 /*
1865 * If an abort is already in progress then just wait for it to
1866 * complete and return.
1867 */
1868 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) {
1869 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
1870 /* No need to wait if we're aborting from a timeout. */
1871 if (status == USBD_TIMEOUT)
1872 return;
1873 /* Override the status which might be USBD_TIMEOUT. */
1874 xfer->status = status;
1875 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
1876 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT;
1877 while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING)
1878 tsleep(&uxfer->uhci_xfer_flags, 0, "uhciaw", 0);
1879 return;
1880 }
1881
1882 /*
1883 * Step 1: Make interrupt routine and hardware ignore xfer.
1884 */
1885 crit_enter();
1886 uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING;
1887 xfer->status = status; /* make software ignore it */
1888 usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
1889 usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
1890 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
1891 for (std = ii->stdstart; std != NULL; std = std->link.std)
1892 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1893 crit_exit();
1894
1895 /*
1896 * Step 2: Wait until we know hardware has finished any possible
1897 * use of the xfer. Also make sure the soft interrupt routine
1898 * has run.
1899 */
1900 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
1901 crit_enter();
1902 #ifdef USB_USE_SOFTINTR
1903 sc->sc_softwake = 1;
1904 #endif /* USB_USE_SOFTINTR */
1905 usb_schedsoftintr(&sc->sc_bus);
1906 #ifdef USB_USE_SOFTINTR
1907 DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
1908 tsleep(&sc->sc_softwake, 0, "uhciab", 0);
1909 #endif /* USB_USE_SOFTINTR */
1910
1911 /*
1912 * Step 3: Execute callback.
1913 */
1914 DPRINTFN(1,("uhci_abort_xfer: callback\n"));
1915 #ifdef DIAGNOSTIC
1916 ii->isdone = 1;
1917 #endif
1918 /* Do the wakeup first to avoid touching the xfer after the callback. */
1919 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTING;
1920 if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT) {
1921 uxfer->uhci_xfer_flags &= ~UHCI_XFER_ABORTWAIT;
1922 wakeup(&uxfer->uhci_xfer_flags);
1923 }
1924 usb_transfer_complete(xfer);
1925 crit_exit();
1926 }
1927
1928 /* Close a device bulk pipe. */
1929 void
1930 uhci_device_bulk_close(usbd_pipe_handle pipe)
1931 {
1932 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1933 usbd_device_handle dev = upipe->pipe.device;
1934 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1935
1936 uhci_free_sqh(sc, upipe->u.bulk.sqh);
1937 pipe->endpoint->savedtoggle = upipe->nexttoggle;
1938 }
1939
1940 usbd_status
1941 uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
1942 {
1943 usbd_status err;
1944
1945 /* Insert last in queue. */
1946 err = usb_insert_transfer(xfer);
1947 if (err)
1948 return (err);
1949
1950 /*
1951 * Pipe isn't running (otherwise err would be USBD_INPROG),
1952 * so start it first.
1953 */
1954 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1955 }
1956
1957 usbd_status
1958 uhci_device_ctrl_start(usbd_xfer_handle xfer)
1959 {
1960 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
1961 usbd_status err;
1962
1963 if (sc->sc_dying)
1964 return (USBD_IOERROR);
1965
1966 #ifdef DIAGNOSTIC
1967 if (!(xfer->rqflags & URQ_REQUEST))
1968 panic("uhci_device_ctrl_transfer: not a request");
1969 #endif
1970
1971 err = uhci_device_request(xfer);
1972 if (err)
1973 return (err);
1974
1975 if (sc->sc_bus.use_polling)
1976 uhci_waitintr(sc, xfer);
1977 return (USBD_IN_PROGRESS);
1978 }
1979
1980 usbd_status
1981 uhci_device_intr_transfer(usbd_xfer_handle xfer)
1982 {
1983 usbd_status err;
1984
1985 /* Insert last in queue. */
1986 err = usb_insert_transfer(xfer);
1987 if (err)
1988 return (err);
1989
1990 /*
1991 * Pipe isn't running (otherwise err would be USBD_INPROG),
1992 * so start it first.
1993 */
1994 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1995 }
1996
1997 usbd_status
1998 uhci_device_intr_start(usbd_xfer_handle xfer)
1999 {
2000 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2001 usbd_device_handle dev = upipe->pipe.device;
2002 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2003 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2004 uhci_soft_td_t *data, *dataend;
2005 uhci_soft_qh_t *sqh;
2006 usbd_status err;
2007 int isread, endpt;
2008 int i;
2009
2010 if (sc->sc_dying)
2011 return (USBD_IOERROR);
2012
2013 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2014 xfer, xfer->length, xfer->flags));
2015
2016 #ifdef DIAGNOSTIC
2017 if (xfer->rqflags & URQ_REQUEST)
2018 panic("uhci_device_intr_transfer: a request");
2019 #endif
2020
2021 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2022 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2023 sqh = upipe->u.bulk.sqh;
2024
2025 upipe->u.intr.isread = isread;
2026
2027 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2028 xfer->flags, &xfer->dmabuf, &data,
2029 &dataend);
2030 if (err)
2031 return (err);
2032 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2033
2034 #ifdef USB_DEBUG
2035 if (uhcidebug > 10) {
2036 DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2037 uhci_dump_tds(data);
2038 uhci_dump_qh(upipe->u.intr.qhs[0]);
2039 }
2040 #endif
2041
2042 crit_enter();
2043 /* Set up interrupt info. */
2044 ii->xfer = xfer;
2045 ii->stdstart = data;
2046 ii->stdend = dataend;
2047 #ifdef DIAGNOSTIC
2048 if (!ii->isdone) {
2049 kprintf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2050 }
2051 ii->isdone = 0;
2052 #endif
2053
2054 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2055 upipe->u.intr.qhs[0]));
2056 for (i = 0; i < upipe->u.intr.npoll; i++) {
2057 sqh = upipe->u.intr.qhs[i];
2058 sqh->elink = data;
2059 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2060 }
2061 uhci_add_intr_info(sc, ii);
2062 xfer->status = USBD_IN_PROGRESS;
2063 crit_exit();
2064
2065 #ifdef USB_DEBUG
2066 if (uhcidebug > 10) {
2067 DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2068 uhci_dump_tds(data);
2069 uhci_dump_qh(upipe->u.intr.qhs[0]);
2070 }
2071 #endif
2072
2073 return (USBD_IN_PROGRESS);
2074 }
2075
2076 /* Abort a device control request. */
2077 void
2078 uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2079 {
2080 DPRINTF(("uhci_device_ctrl_abort:\n"));
2081 uhci_abort_xfer(xfer, USBD_CANCELLED);
2082 }
2083
2084 /* Close a device control pipe. */
2085 void
2086 uhci_device_ctrl_close(usbd_pipe_handle pipe)
2087 {
2088 }
2089
2090 /* Abort a device interrupt request. */
2091 void
2092 uhci_device_intr_abort(usbd_xfer_handle xfer)
2093 {
2094 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2095 if (xfer->pipe->intrxfer == xfer) {
2096 DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2097 xfer->pipe->intrxfer = NULL;
2098 }
2099 uhci_abort_xfer(xfer, USBD_CANCELLED);
2100 }
2101
2102 /* Close a device interrupt pipe. */
2103 void
2104 uhci_device_intr_close(usbd_pipe_handle pipe)
2105 {
2106 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2107 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2108 int i, npoll;
2109
2110 /* Unlink descriptors from controller data structures. */
2111 npoll = upipe->u.intr.npoll;
2112 crit_enter();
2113 for (i = 0; i < npoll; i++)
2114 uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2115 crit_exit();
2116
2117 /*
2118 * We now have to wait for any activity on the physical
2119 * descriptors to stop.
2120 */
2121 usb_delay_ms(&sc->sc_bus, 2);
2122
2123 for(i = 0; i < npoll; i++)
2124 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2125 kfree(upipe->u.intr.qhs, M_USBHC);
2126
2127 /* XXX free other resources */
2128 }
2129
2130 usbd_status
2131 uhci_device_request(usbd_xfer_handle xfer)
2132 {
2133 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2134 usb_device_request_t *req = &xfer->request;
2135 usbd_device_handle dev = upipe->pipe.device;
2136 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2137 int addr = dev->address;
2138 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2139 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2140 uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2141 uhci_soft_qh_t *sqh;
2142 int len;
2143 u_int32_t ls;
2144 usbd_status err;
2145 int isread;
2146
2147 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2148 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2149 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2150 UGETW(req->wIndex), UGETW(req->wLength),
2151 addr, endpt));
2152
2153 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2154 isread = req->bmRequestType & UT_READ;
2155 len = UGETW(req->wLength);
2156
2157 setup = upipe->u.ctl.setup;
2158 stat = upipe->u.ctl.stat;
2159 sqh = upipe->u.ctl.sqh;
2160
2161 /* Set up data transaction */
2162 if (len != 0) {
2163 upipe->nexttoggle = 1;
2164 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2165 &xfer->dmabuf, &data, &dataend);
2166 if (err)
2167 return (err);
2168 next = data;
2169 dataend->link.std = stat;
2170 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2171 } else {
2172 next = stat;
2173 }
2174 upipe->u.ctl.length = len;
2175
2176 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2177
2178 setup->link.std = next;
2179 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2180 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2181 UHCI_TD_ACTIVE);
2182 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2183 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2184 stat->link.std = NULL;
2185 stat->td.td_link = htole32(UHCI_PTR_T);
2186 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2187 UHCI_TD_ACTIVE | UHCI_TD_IOC);
2188
2189 stat->td.td_token =
2190 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2191 UHCI_TD_IN (0, endpt, addr, 1));
2192 stat->td.td_buffer = htole32(0);
2193
2194 #ifdef USB_DEBUG
2195 if (uhcidebug > 10) {
2196 DPRINTF(("uhci_device_request: before transfer\n"));
2197 uhci_dump_tds(setup);
2198 }
2199 #endif
2200
2201 /* Set up interrupt info. */
2202 ii->xfer = xfer;
2203 ii->stdstart = setup;
2204 ii->stdend = stat;
2205 #ifdef DIAGNOSTIC
2206 if (!ii->isdone) {
2207 kprintf("uhci_device_request: not done, ii=%p\n", ii);
2208 }
2209 ii->isdone = 0;
2210 #endif
2211
2212 sqh->elink = setup;
2213 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2214
2215 crit_enter();
2216 if (dev->speed == USB_SPEED_LOW)
2217 uhci_add_ls_ctrl(sc, sqh);
2218 else
2219 uhci_add_hs_ctrl(sc, sqh);
2220 uhci_add_intr_info(sc, ii);
2221 #ifdef USB_DEBUG
2222 if (uhcidebug > 12) {
2223 uhci_soft_td_t *std;
2224 uhci_soft_qh_t *xqh;
2225 uhci_soft_qh_t *sxqh;
2226 int maxqh = 0;
2227 uhci_physaddr_t link;
2228 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2229 for (std = sc->sc_vframes[0].htd, link = 0;
2230 (link & UHCI_PTR_QH) == 0;
2231 std = std->link.std) {
2232 link = le32toh(std->td.td_link);
2233 uhci_dump_td(std);
2234 }
2235 sxqh = (uhci_soft_qh_t *)std;
2236 uhci_dump_qh(sxqh);
2237 for (xqh = sxqh;
2238 xqh != NULL;
2239 xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2240 xqh->hlink == xqh ? NULL : xqh->hlink)) {
2241 uhci_dump_qh(xqh);
2242 }
2243 DPRINTF(("Enqueued QH:\n"));
2244 uhci_dump_qh(sqh);
2245 uhci_dump_tds(sqh->elink);
2246 }
2247 #endif
2248 if (xfer->timeout && !sc->sc_bus.use_polling) {
2249 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2250 uhci_timeout, ii);
2251 }
2252 xfer->status = USBD_IN_PROGRESS;
2253 crit_exit();
2254
2255 return (USBD_NORMAL_COMPLETION);
2256 }
2257
2258 usbd_status
2259 uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2260 {
2261 usbd_status err;
2262
2263 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2264
2265 /* Put it on our queue, */
2266 err = usb_insert_transfer(xfer);
2267
2268 /* bail out on error, */
2269 if (err && err != USBD_IN_PROGRESS)
2270 return (err);
2271
2272 /* XXX should check inuse here */
2273
2274 /* insert into schedule, */
2275 uhci_device_isoc_enter(xfer);
2276
2277 /* and start if the pipe wasn't running */
2278 if (!err)
2279 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2280
2281 return (err);
2282 }
2283
2284 void
2285 uhci_device_isoc_enter(usbd_xfer_handle xfer)
2286 {
2287 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2288 usbd_device_handle dev = upipe->pipe.device;
2289 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2290 struct iso *iso = &upipe->u.iso;
2291 uhci_soft_td_t *std;
2292 u_int32_t buf, len, status;
2293 int i, next, nframes;
2294
2295 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2296 "nframes=%d\n",
2297 iso->inuse, iso->next, xfer, xfer->nframes));
2298
2299 if (sc->sc_dying)
2300 return;
2301
2302 if (xfer->status == USBD_IN_PROGRESS) {
2303 /* This request has already been entered into the frame list */
2304 kprintf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2305 /* XXX */
2306 }
2307
2308 #ifdef DIAGNOSTIC
2309 if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2310 kprintf("uhci_device_isoc_enter: overflow!\n");
2311 #endif
2312
2313 next = iso->next;
2314 if (next == -1) {
2315 /* Not in use yet, schedule it a few frames ahead. */
2316 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2317 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2318 }
2319
2320 xfer->status = USBD_IN_PROGRESS;
2321 UXFER(xfer)->curframe = next;
2322
2323 buf = DMAADDR(&xfer->dmabuf, 0);
2324 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2325 UHCI_TD_ACTIVE |
2326 UHCI_TD_IOS);
2327 nframes = xfer->nframes;
2328 crit_enter();
2329 for (i = 0; i < nframes; i++) {
2330 std = iso->stds[next];
2331 if (++next >= UHCI_VFRAMELIST_COUNT)
2332 next = 0;
2333 len = xfer->frlengths[i];
2334 std->td.td_buffer = htole32(buf);
2335 if (i == nframes - 1)
2336 status |= UHCI_TD_IOC;
2337 std->td.td_status = htole32(status);
2338 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2339 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2340 #ifdef USB_DEBUG
2341 if (uhcidebug > 5) {
2342 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2343 uhci_dump_td(std);
2344 }
2345 #endif
2346 buf += len;
2347 }
2348 iso->next = next;
2349 iso->inuse += xfer->nframes;
2350
2351 crit_exit();
2352 }
2353
2354 usbd_status
2355 uhci_device_isoc_start(usbd_xfer_handle xfer)
2356 {
2357 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2358 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2359 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2360 uhci_soft_td_t *end;
2361 int i;
2362
2363 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2364
2365 if (sc->sc_dying)
2366 return (USBD_IOERROR);
2367
2368 #ifdef DIAGNOSTIC
2369 if (xfer->status != USBD_IN_PROGRESS)
2370 kprintf("uhci_device_isoc_start: not in progress %p\n", xfer);
2371 #endif
2372
2373 /* Find the last TD */
2374 i = UXFER(xfer)->curframe + xfer->nframes;
2375 if (i >= UHCI_VFRAMELIST_COUNT)
2376 i -= UHCI_VFRAMELIST_COUNT;
2377 end = upipe->u.iso.stds[i];
2378
2379 #ifdef DIAGNOSTIC
2380 if (end == NULL) {
2381 kprintf("uhci_device_isoc_start: end == NULL\n");
2382 return (USBD_INVAL);
2383 }
2384 #endif
2385
2386 crit_enter();
2387
2388 /* Set up interrupt info. */
2389 ii->xfer = xfer;
2390 ii->stdstart = end;
2391 ii->stdend = end;
2392 #ifdef DIAGNOSTIC
2393 if (!ii->isdone)
2394 kprintf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2395 ii->isdone = 0;
2396 #endif
2397 uhci_add_intr_info(sc, ii);
2398
2399 crit_exit();
2400
2401 return (USBD_IN_PROGRESS);
2402 }
2403
2404 void
2405 uhci_device_isoc_abort(usbd_xfer_handle xfer)
2406 {
2407 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2408 uhci_soft_td_t **stds = upipe->u.iso.stds;
2409 uhci_soft_td_t *std;
2410 int i, n, nframes, maxlen, len;
2411
2412 crit_enter();
2413
2414 /* Transfer is already done. */
2415 if (xfer->status != USBD_NOT_STARTED &&
2416 xfer->status != USBD_IN_PROGRESS) {
2417 crit_exit();
2418 return;
2419 }
2420
2421 /* Give xfer the requested abort code. */
2422 xfer->status = USBD_CANCELLED;
2423
2424 /* make hardware ignore it, */
2425 nframes = xfer->nframes;
2426 n = UXFER(xfer)->curframe;
2427 maxlen = 0;
2428 for (i = 0; i < nframes; i++) {
2429 std = stds[n];
2430 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2431 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2432 if (len > maxlen)
2433 maxlen = len;
2434 if (++n >= UHCI_VFRAMELIST_COUNT)
2435 n = 0;
2436 }
2437
2438 /* and wait until we are sure the hardware has finished. */
2439 delay(maxlen);
2440
2441 #ifdef DIAGNOSTIC
2442 UXFER(xfer)->iinfo.isdone = 1;
2443 #endif
2444 /* Run callback and remove from interrupt list. */
2445 usb_transfer_complete(xfer);
2446
2447 crit_exit();
2448 }
2449
2450 void
2451 uhci_device_isoc_close(usbd_pipe_handle pipe)
2452 {
2453 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2454 usbd_device_handle dev = upipe->pipe.device;
2455 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2456 uhci_soft_td_t *std, *vstd;
2457 struct iso *iso;
2458 int i;
2459
2460 /*
2461 * Make sure all TDs are marked as inactive.
2462 * Wait for completion.
2463 * Unschedule.
2464 * Deallocate.
2465 */
2466 iso = &upipe->u.iso;
2467
2468 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2469 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2470 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2471
2472 crit_enter();
2473 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2474 std = iso->stds[i];
2475 for (vstd = sc->sc_vframes[i].htd;
2476 vstd != NULL && vstd->link.std != std;
2477 vstd = vstd->link.std)
2478 ;
2479 if (vstd == NULL) {
2480 /*panic*/
2481 kprintf("uhci_device_isoc_close: %p not found\n", std);
2482 crit_exit();
2483 return;
2484 }
2485 vstd->link = std->link;
2486 vstd->td.td_link = std->td.td_link;
2487 uhci_free_std(sc, std);
2488 }
2489 crit_exit();
2490
2491 kfree(iso->stds, M_USBHC);
2492 }
2493
2494 usbd_status
2495 uhci_setup_isoc(usbd_pipe_handle pipe)
2496 {
2497 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2498 usbd_device_handle dev = upipe->pipe.device;
2499 uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2500 int addr = upipe->pipe.device->address;
2501 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2502 int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2503 uhci_soft_td_t *std, *vstd;
2504 u_int32_t token;
2505 struct iso *iso;
2506 int i;
2507
2508 iso = &upipe->u.iso;
2509 iso->stds = kmalloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2510 M_USBHC, M_INTWAIT);
2511
2512 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2513 UHCI_TD_OUT(0, endpt, addr, 0);
2514
2515 /* Allocate the TDs and mark as inactive; */
2516 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2517 std = uhci_alloc_std(sc);
2518 if (std == 0)
2519 goto bad;
2520 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2521 std->td.td_token = htole32(token);
2522 iso->stds[i] = std;
2523 }
2524
2525 /* Insert TDs into schedule. */
2526 crit_enter();
2527 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2528 std = iso->stds[i];
2529 vstd = sc->sc_vframes[i].htd;
2530 std->link = vstd->link;
2531 std->td.td_link = vstd->td.td_link;
2532 vstd->link.std = std;
2533 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2534 }
2535 crit_exit();
2536
2537 iso->next = -1;
2538 iso->inuse = 0;
2539
2540 return (USBD_NORMAL_COMPLETION);
2541
2542 bad:
2543 while (--i >= 0)
2544 uhci_free_std(sc, iso->stds[i]);
2545 kfree(iso->stds, M_USBHC);
2546 return (USBD_NOMEM);
2547 }
2548
2549 void
2550 uhci_device_isoc_done(usbd_xfer_handle xfer)
2551 {
2552 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2553
2554 DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
2555
2556 if (ii->xfer != xfer)
2557 /* Not on interrupt list, ignore it. */
2558 return;
2559
2560 if (!uhci_active_intr_info(ii))
2561 return;
2562
2563 #ifdef DIAGNOSTIC
2564 if (xfer->busy_free != XFER_BUSY) {
2565 kprintf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
2566 xfer, xfer->busy_free);
2567 return;
2568 }
2569
2570 if (ii->stdend == NULL) {
2571 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2572 #ifdef USB_DEBUG
2573 uhci_dump_ii(ii);
2574 #endif
2575 return;
2576 }
2577 #endif
2578
2579 /* Turn off the interrupt since it is active even if the TD is not. */
2580 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2581
2582 uhci_del_intr_info(ii); /* remove from active list */
2583
2584 #ifdef DIAGNOSTIC
2585 if (ii->stdend == NULL) {
2586 kprintf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2587 #ifdef USB_DEBUG
2588 uhci_dump_ii(ii);
2589 #endif
2590 return;
2591 }
2592 #endif
2593 }
2594
2595 void
2596 uhci_device_intr_done(usbd_xfer_handle xfer)
2597 {
2598 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2599 uhci_softc_t *sc = ii->sc;
2600 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2601 uhci_soft_qh_t *sqh;
2602 int i, npoll;
2603
2604 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2605
2606 npoll = upipe->u.intr.npoll;
2607 for(i = 0; i < npoll; i++) {
2608 sqh = upipe->u.intr.qhs[i];
2609 sqh->elink = NULL;
2610 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2611 }
2612 uhci_free_std_chain(sc, ii->stdstart, NULL);
2613
2614 /* XXX Wasteful. */
2615 if (xfer->pipe->repeat) {
2616 uhci_soft_td_t *data, *dataend;
2617
2618 DPRINTFN(5,("uhci_device_intr_done: requeueing\n"));
2619
2620 /* This alloc cannot fail since we freed the chain above. */
2621 uhci_alloc_std_chain(upipe, sc, xfer->length,
2622 upipe->u.intr.isread, xfer->flags,
2623 &xfer->dmabuf, &data, &dataend);
2624 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2625
2626 #ifdef USB_DEBUG
2627 if (uhcidebug > 10) {
2628 DPRINTF(("uhci_device_intr_done: data(1)\n"));
2629 uhci_dump_tds(data);
2630 uhci_dump_qh(upipe->u.intr.qhs[0]);
2631 }
2632 #endif
2633
2634 ii->stdstart = data;
2635 ii->stdend = dataend;
2636 #ifdef DIAGNOSTIC
2637 if (!ii->isdone) {
2638 kprintf("uhci_device_intr_done: not done, ii=%p\n", ii);
2639 }
2640 ii->isdone = 0;
2641 #endif
2642 for (i = 0; i < npoll; i++) {
2643 sqh = upipe->u.intr.qhs[i];
2644 sqh->elink = data;
2645 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2646 }
2647 xfer->status = USBD_IN_PROGRESS;
2648 /* The ii is already on the examined list, just leave it. */
2649 } else {
2650 DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2651 if (uhci_active_intr_info(ii))
2652 uhci_del_intr_info(ii);
2653 }
2654 }
2655
2656 /* Deallocate request data structures */
2657 void
2658 uhci_device_ctrl_done(usbd_xfer_handle xfer)
2659 {
2660 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2661 uhci_softc_t *sc = ii->sc;
2662 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2663
2664 #ifdef DIAGNOSTIC
2665 if (!(xfer->rqflags & URQ_REQUEST))
2666 panic("uhci_device_ctrl_done: not a request");
2667 #endif
2668
2669 if (!uhci_active_intr_info(ii))
2670 return;
2671
2672 uhci_del_intr_info(ii); /* remove from active list */
2673
2674 if (upipe->pipe.device->speed == USB_SPEED_LOW)
2675 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2676 else
2677 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2678
2679 if (upipe->u.ctl.length != 0)
2680 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2681
2682 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2683 }
2684
2685 /* Deallocate request data structures */
2686 void
2687 uhci_device_bulk_done(usbd_xfer_handle xfer)
2688 {
2689 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2690 uhci_softc_t *sc = ii->sc;
2691 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2692
2693 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2694 xfer, ii, sc, upipe));
2695
2696 if (!uhci_active_intr_info(ii))
2697 return;
2698
2699 uhci_del_intr_info(ii); /* remove from active list */
2700
2701 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2702
2703 uhci_free_std_chain(sc, ii->stdstart, NULL);
2704
2705 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2706 }
2707
2708 /* Add interrupt QH, called with vflock. */
2709 void
2710 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2711 {
2712 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2713 uhci_soft_qh_t *eqh;
2714
2715 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2716
2717 eqh = vf->eqh;
2718 sqh->hlink = eqh->hlink;
2719 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2720 eqh->hlink = sqh;
2721 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2722 vf->eqh = sqh;
2723 vf->bandwidth++;
2724 }
2725
2726 /* Remove interrupt QH. */
2727 void
2728 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2729 {
2730 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2731 uhci_soft_qh_t *pqh;
2732
2733 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2734
2735 /* See comment in uhci_remove_ctrl() */
2736 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2737 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2738 delay(UHCI_QH_REMOVE_DELAY);
2739 }
2740
2741 pqh = uhci_find_prev_qh(vf->hqh, sqh);
2742 pqh->hlink = sqh->hlink;
2743 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2744 delay(UHCI_QH_REMOVE_DELAY);
2745 if (vf->eqh == sqh)
2746 vf->eqh = pqh;
2747 vf->bandwidth--;
2748 }
2749
2750 usbd_status
2751 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2752 {
2753 uhci_soft_qh_t *sqh;
2754 int i, npoll;
2755 u_int bestbw, bw, bestoffs, offs;
2756
2757 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2758 if (ival == 0) {
2759 kprintf("uhci_setintr: 0 interval\n");
2760 return (USBD_INVAL);
2761 }
2762
2763 if (ival > UHCI_VFRAMELIST_COUNT)
2764 ival = UHCI_VFRAMELIST_COUNT;
2765 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2766 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2767
2768 upipe->u.intr.npoll = npoll;
2769 upipe->u.intr.qhs =
2770 kmalloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_INTWAIT);
2771
2772 /*
2773 * Figure out which offset in the schedule that has most
2774 * bandwidth left over.
2775 */
2776 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2777 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2778 for (bw = i = 0; i < npoll; i++)
2779 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2780 if (bw < bestbw) {
2781 bestbw = bw;
2782 bestoffs = offs;
2783 }
2784 }
2785 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2786
2787 for(i = 0; i < npoll; i++) {
2788 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2789 sqh->elink = NULL;
2790 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2791 sqh->pos = MOD(i * ival + bestoffs);
2792 }
2793 #undef MOD
2794
2795 crit_enter();
2796 /* Enter QHs into the controller data structures. */
2797 for(i = 0; i < npoll; i++)
2798 uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2799 crit_exit();
2800
2801 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2802 return (USBD_NORMAL_COMPLETION);
2803 }
2804
2805 /* Open a new pipe. */
2806 usbd_status
2807 uhci_open(usbd_pipe_handle pipe)
2808 {
2809 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2810 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2811 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2812 usbd_status err;
2813 int ival;
2814
2815 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2816 pipe, pipe->device->address,
2817 ed->bEndpointAddress, sc->sc_addr));
2818
2819 upipe->aborting = 0;
2820 upipe->nexttoggle = pipe->endpoint->savedtoggle;
2821
2822 if (pipe->device->address == sc->sc_addr) {
2823 switch (ed->bEndpointAddress) {
2824 case USB_CONTROL_ENDPOINT:
2825 pipe->methods = &uhci_root_ctrl_methods;
2826 break;
2827 case UE_DIR_IN | UHCI_INTR_ENDPT:
2828 pipe->methods = &uhci_root_intr_methods;
2829 break;
2830 default:
2831 return (USBD_INVAL);
2832 }
2833 } else {
2834 switch (ed->bmAttributes & UE_XFERTYPE) {
2835 case UE_CONTROL:
2836 pipe->methods = &uhci_device_ctrl_methods;
2837 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2838 if (upipe->u.ctl.sqh == NULL)
2839 goto bad;
2840 upipe->u.ctl.setup = uhci_alloc_std(sc);
2841 if (upipe->u.ctl.setup == NULL) {
2842 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2843 goto bad;
2844 }
2845 upipe->u.ctl.stat = uhci_alloc_std(sc);
2846 if (upipe->u.ctl.stat == NULL) {
2847 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2848 uhci_free_std(sc, upipe->u.ctl.setup);
2849 goto bad;
2850 }
2851 err = usb_allocmem(&sc->sc_bus,
2852 sizeof(usb_device_request_t),
2853 0, &upipe->u.ctl.reqdma);
2854 if (err) {
2855 uhci_free_sqh(sc, upipe->u.ctl.sqh);
2856 uhci_free_std(sc, upipe->u.ctl.setup);
2857 uhci_free_std(sc, upipe->u.ctl.stat);
2858 goto bad;
2859 }
2860 break;
2861 case UE_INTERRUPT:
2862 pipe->methods = &uhci_device_intr_methods;
2863 ival = pipe->interval;
2864 if (ival == USBD_DEFAULT_INTERVAL)
2865 ival = ed->bInterval;
2866 return (uhci_device_setintr(sc, upipe, ival));
2867 case UE_ISOCHRONOUS:
2868 pipe->methods = &uhci_device_isoc_methods;
2869 return (uhci_setup_isoc(pipe));
2870 case UE_BULK:
2871 pipe->methods = &uhci_device_bulk_methods;
2872 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2873 if (upipe->u.bulk.sqh == NULL)
2874 goto bad;
2875 break;
2876 }
2877 }
2878 return (USBD_NORMAL_COMPLETION);
2879
2880 bad:
2881 return (USBD_NOMEM);
2882 }
2883
2884 /*
2885 * Data structures and routines to emulate the root hub.
2886 */
2887 usb_device_descriptor_t uhci_devd = {
2888 USB_DEVICE_DESCRIPTOR_SIZE,
2889 UDESC_DEVICE, /* type */
2890 {0x00, 0x01}, /* USB version */
2891 UDCLASS_HUB, /* class */
2892 UDSUBCLASS_HUB, /* subclass */
2893 UDPROTO_FSHUB, /* protocol */
2894 64, /* max packet */
2895 {0},{0},{0x00,0x01}, /* device id */
2896 1,2,0, /* string indicies */
2897 1 /* # of configurations */
2898 };
2899
2900 usb_config_descriptor_t uhci_confd = {
2901 USB_CONFIG_DESCRIPTOR_SIZE,
2902 UDESC_CONFIG,
2903 {USB_CONFIG_DESCRIPTOR_SIZE +
2904 USB_INTERFACE_DESCRIPTOR_SIZE +
2905 USB_ENDPOINT_DESCRIPTOR_SIZE},
2906 1,
2907 1,
2908 0,
2909 UC_SELF_POWERED,
2910 0 /* max power */
2911 };
2912
2913 usb_interface_descriptor_t uhci_ifcd = {
2914 USB_INTERFACE_DESCRIPTOR_SIZE,
2915 UDESC_INTERFACE,
2916 0,
2917 0,
2918 1,
2919 UICLASS_HUB,
2920 UISUBCLASS_HUB,
2921 UIPROTO_FSHUB,
2922 0
2923 };
2924
2925 usb_endpoint_descriptor_t uhci_endpd = {
2926 USB_ENDPOINT_DESCRIPTOR_SIZE,
2927 UDESC_ENDPOINT,
2928 UE_DIR_IN | UHCI_INTR_ENDPT,
2929 UE_INTERRUPT,
2930 {8},
2931 255
2932 };
2933
2934 usb_hub_descriptor_t uhci_hubd_piix = {
2935 USB_HUB_DESCRIPTOR_SIZE,
2936 UDESC_HUB,
2937 2,
2938 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2939 50, /* power on to power good */
2940 0,
2941 { 0x00 }, /* both ports are removable */
2942 };
2943
2944 int
2945 uhci_str(usb_string_descriptor_t *p, int l, char *s)
2946 {
2947 int i;
2948
2949 if (l == 0)
2950 return (0);
2951 p->bLength = 2 * strlen(s) + 2;
2952 if (l == 1)
2953 return (1);
2954 p->bDescriptorType = UDESC_STRING;
2955 l -= 2;
2956 for (i = 0; s[i] && l > 1; i++, l -= 2)
2957 USETW2(p->bString[i], 0, s[i]);
2958 return (2*i+2);
2959 }
2960
2961 /*
2962 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
2963 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
2964 * should not be used by the USB subsystem. As we cannot issue a
2965 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
2966 * will be enabled as part of the reset.
2967 *
2968 * On the VT83C572, the port cannot be successfully enabled until the
2969 * outstanding "port enable change" and "connection status change"
2970 * events have been reset.
2971 */
2972 static usbd_status
2973 uhci_portreset(uhci_softc_t *sc, int index)
2974 {
2975 int lim, port, x;
2976
2977 if (index == 1)
2978 port = UHCI_PORTSC1;
2979 else if (index == 2)
2980 port = UHCI_PORTSC2;
2981 else
2982 return (USBD_IOERROR);
2983
2984 x = URWMASK(UREAD2(sc, port));
2985 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
2986
2987 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
2988
2989 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
2990 index, UREAD2(sc, port)));
2991
2992 x = URWMASK(UREAD2(sc, port));
2993 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
2994
2995 delay(100);
2996
2997 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
2998 index, UREAD2(sc, port)));
2999
3000 x = URWMASK(UREAD2(sc, port));
3001 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3002
3003 for (lim = 10; --lim > 0;) {
3004 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3005
3006 x = UREAD2(sc, port);
3007
3008 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3009 index, lim, x));
3010
3011 if (!(x & UHCI_PORTSC_CCS)) {
3012 /*
3013 * No device is connected (or was disconnected
3014 * during reset). Consider the port reset.
3015 * The delay must be long enough to ensure on
3016 * the initial iteration that the device
3017 * connection will have been registered. 50ms
3018 * appears to be sufficient, but 20ms is not.
3019 */
3020 DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3021 index, lim));
3022 break;
3023 }
3024
3025 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3026 /*
3027 * Port enabled changed and/or connection
3028 * status changed were set. Reset either or
3029 * both raised flags (by writing a 1 to that
3030 * bit), and wait again for state to settle.
3031 */
3032 UWRITE2(sc, port, URWMASK(x) |
3033 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3034 continue;
3035 }
3036
3037 if (x & UHCI_PORTSC_PE)
3038 /* Port is enabled */
3039 break;
3040
3041 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3042 }
3043
3044 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3045 index, UREAD2(sc, port)));
3046
3047 if (lim <= 0) {
3048 DPRINTFN(1,("uhci port %d reset timed out\n", index));
3049 return (USBD_TIMEOUT);
3050 }
3051
3052 sc->sc_isreset = 1;
3053 return (USBD_NORMAL_COMPLETION);
3054 }
3055
3056 /*
3057 * Simulate a hardware hub by handling all the necessary requests.
3058 */
3059 usbd_status
3060 uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3061 {
3062 usbd_status err;
3063
3064 /* Insert last in queue. */
3065 err = usb_insert_transfer(xfer);
3066 if (err)
3067 return (err);
3068
3069 /*
3070 * Pipe isn't running (otherwise err would be USBD_INPROG),
3071 * so start it first.
3072 */
3073 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3074 }
3075
3076 usbd_status
3077 uhci_root_ctrl_start(usbd_xfer_handle xfer)
3078 {
3079 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3080 usb_device_request_t *req;
3081 void *buf = NULL;
3082 int port, x;
3083 int len, value, index, status, change, l, totlen = 0;
3084 usb_port_status_t ps;
3085 usbd_status err;
3086
3087 if (sc->sc_dying)
3088 return (USBD_IOERROR);
3089
3090 #ifdef DIAGNOSTIC
3091 if (!(xfer->rqflags & URQ_REQUEST))
3092 panic("uhci_root_ctrl_transfer: not a request");
3093 #endif
3094 req = &xfer->request;
3095
3096 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3097 req->bmRequestType, req->bRequest));
3098
3099 len = UGETW(req->wLength);
3100 value = UGETW(req->wValue);
3101 index = UGETW(req->wIndex);
3102
3103 if (len != 0)
3104 buf = KERNADDR(&xfer->dmabuf, 0);
3105
3106 #define C(x,y) ((x) | ((y) << 8))
3107 switch(C(req->bRequest, req->bmRequestType)) {
3108 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3109 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3110 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3111 /*
3112 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3113 * for the integrated root hub.
3114 */
3115 break;
3116 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3117 if (len > 0) {
3118 *(u_int8_t *)buf = sc->sc_conf;
3119 totlen = 1;
3120 }
3121 break;
3122 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3123 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3124 switch(value >> 8) {
3125 case UDESC_DEVICE:
3126 if ((value & 0xff) != 0) {
3127 err = USBD_IOERROR;
3128 goto ret;
3129 }
3130 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3131 USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3132 memcpy(buf, &uhci_devd, l);
3133 break;
3134 case UDESC_CONFIG:
3135 if ((value & 0xff) != 0) {
3136 err = USBD_IOERROR;
3137 goto ret;
3138 }
3139 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3140 memcpy(buf, &uhci_confd, l);
3141 buf = (char *)buf + l;
3142 len -= l;
3143 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3144 totlen += l;
3145 memcpy(buf, &uhci_ifcd, l);
3146 buf = (char *)buf + l;
3147 len -= l;
3148 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3149 totlen += l;
3150 memcpy(buf, &uhci_endpd, l);
3151 break;
3152 case UDESC_STRING:
3153 if (len == 0)
3154 break;
3155 *(u_int8_t *)buf = 0;
3156 totlen = 1;
3157 switch (value & 0xff) {
3158 case 1: /* Vendor */
3159 totlen = uhci_str(buf, len, sc->sc_vendor);
3160 break;
3161 case 2: /* Product */
3162 totlen = uhci_str(buf, len, "UHCI root hub");
3163 break;
3164 }
3165 break;
3166 default:
3167 err = USBD_IOERROR;
3168 goto ret;
3169 }
3170 break;
3171 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3172 if (len > 0) {
3173 *(u_int8_t *)buf = 0;
3174 totlen = 1;
3175 }
3176 break;
3177 case C(UR_GET_STATUS, UT_READ_DEVICE):
3178 if (len > 1) {
3179 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3180 totlen = 2;
3181 }
3182 break;
3183 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3184 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3185 if (len > 1) {
3186 USETW(((usb_status_t *)buf)->wStatus, 0);
3187 totlen = 2;
3188 }
3189 break;
3190 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3191 if (value >= USB_MAX_DEVICES) {
3192 err = USBD_IOERROR;
3193 goto ret;
3194 }
3195 sc->sc_addr = value;
3196 break;
3197 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3198 if (value != 0 && value != 1) {
3199 err = USBD_IOERROR;
3200 goto ret;
3201 }
3202 sc->sc_conf = value;
3203 break;
3204 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3205 break;
3206 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3207 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3208 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3209 err = USBD_IOERROR;
3210 goto ret;
3211 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3212 break;
3213 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3214 break;
3215 /* Hub requests */
3216 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3217 break;
3218 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3219 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3220 "port=%d feature=%d\n",
3221 index, value));
3222 if (index == 1)
3223 port = UHCI_PORTSC1;
3224 else if (index == 2)
3225 port = UHCI_PORTSC2;
3226 else {
3227 err = USBD_IOERROR;
3228 goto ret;
3229 }
3230 switch(value) {
3231 case UHF_PORT_ENABLE:
3232 x = URWMASK(UREAD2(sc, port));
3233 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3234 break;
3235 case UHF_PORT_SUSPEND:
3236 x = URWMASK(UREAD2(sc, port));
3237 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3238 break;
3239 case UHF_PORT_RESET:
3240 x = URWMASK(UREAD2(sc, port));
3241 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3242 break;
3243 case UHF_C_PORT_CONNECTION:
3244 x = URWMASK(UREAD2(sc, port));
3245 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3246 break;
3247 case UHF_C_PORT_ENABLE:
3248 x = URWMASK(UREAD2(sc, port));
3249 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3250 break;
3251 case UHF_C_PORT_OVER_CURRENT:
3252 x = URWMASK(UREAD2(sc, port));
3253 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3254 break;
3255 case UHF_C_PORT_RESET:
3256 sc->sc_isreset = 0;
3257 err = USBD_NORMAL_COMPLETION;
3258 goto ret;
3259 case UHF_PORT_CONNECTION:
3260 case UHF_PORT_OVER_CURRENT:
3261 case UHF_PORT_POWER:
3262 case UHF_PORT_LOW_SPEED:
3263 case UHF_C_PORT_SUSPEND:
3264 default:
3265 err = USBD_IOERROR;
3266 goto ret;
3267 }
3268 break;
3269 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3270 if (index == 1)
3271 port = UHCI_PORTSC1;
3272 else if (index == 2)
3273 port = UHCI_PORTSC2;
3274 else {
3275 err = USBD_IOERROR;
3276 goto ret;
3277 }
3278 if (len > 0) {
3279 *(u_int8_t *)buf =
3280 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3281 UHCI_PORTSC_LS_SHIFT;
3282 totlen = 1;
3283 }
3284 break;
3285 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3286 if ((value & 0xff) != 0) {
3287 err = USBD_IOERROR;
3288 goto ret;
3289 }
3290 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3291 totlen = l;
3292 memcpy(buf, &uhci_hubd_piix, l);
3293 break;
3294 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3295 if (len != 4) {
3296 err = USBD_IOERROR;
3297 goto ret;
3298 }
3299 memset(buf, 0, len);
3300 totlen = len;
3301 break;
3302 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3303 if (index == 1)
3304 port = UHCI_PORTSC1;
3305 else if (index == 2)
3306 port = UHCI_PORTSC2;
3307 else {
3308 err = USBD_IOERROR;
3309 goto ret;
3310 }
3311 if (len != 4) {
3312 err = USBD_IOERROR;
3313 goto ret;
3314 }
3315 x = UREAD2(sc, port);
3316 status = change = 0;
3317 if (x & UHCI_PORTSC_CCS)
3318 status |= UPS_CURRENT_CONNECT_STATUS;
3319 if (x & UHCI_PORTSC_CSC)
3320 change |= UPS_C_CONNECT_STATUS;
3321 if (x & UHCI_PORTSC_PE)
3322 status |= UPS_PORT_ENABLED;
3323 if (x & UHCI_PORTSC_POEDC)
3324 change |= UPS_C_PORT_ENABLED;
3325 if (x & UHCI_PORTSC_OCI)
3326 status |= UPS_OVERCURRENT_INDICATOR;
3327 if (x & UHCI_PORTSC_OCIC)
3328 change |= UPS_C_OVERCURRENT_INDICATOR;
3329 if (x & UHCI_PORTSC_SUSP)
3330 status |= UPS_SUSPEND;
3331 if (x & UHCI_PORTSC_LSDA)
3332 status |= UPS_LOW_SPEED;
3333 status |= UPS_PORT_POWER;
3334 if (sc->sc_isreset)
3335 change |= UPS_C_PORT_RESET;
3336 USETW(ps.wPortStatus, status);
3337 USETW(ps.wPortChange, change);
3338 l = min(len, sizeof ps);
3339 memcpy(buf, &ps, l);
3340 totlen = l;
3341 break;
3342 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3343 err = USBD_IOERROR;
3344 goto ret;
3345 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3346 break;
3347 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3348 if (index == 1)
3349 port = UHCI_PORTSC1;
3350 else if (index == 2)
3351 port = UHCI_PORTSC2;
3352 else {
3353 err = USBD_IOERROR;
3354 goto ret;
3355 }
3356 switch(value) {
3357 case UHF_PORT_ENABLE:
3358 x = URWMASK(UREAD2(sc, port));
3359 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3360 break;
3361 case UHF_PORT_SUSPEND:
3362 x = URWMASK(UREAD2(sc, port));
3363 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3364 break;
3365 case UHF_PORT_RESET:
3366 err = uhci_portreset(sc, index);
3367 goto ret;
3368 case UHF_PORT_POWER:
3369 /* Pretend we turned on power */
3370 err = USBD_NORMAL_COMPLETION;
3371 goto ret;
3372 case UHF_C_PORT_CONNECTION:
3373 case UHF_C_PORT_ENABLE:
3374 case UHF_C_PORT_OVER_CURRENT:
3375 case UHF_PORT_CONNECTION:
3376 case UHF_PORT_OVER_CURRENT:
3377 case UHF_PORT_LOW_SPEED:
3378 case UHF_C_PORT_SUSPEND:
3379 case UHF_C_PORT_RESET:
3380 default:
3381 err = USBD_IOERROR;
3382 goto ret;
3383 }
3384 break;
3385 default:
3386 err = USBD_IOERROR;
3387 goto ret;
3388 }
3389 xfer->actlen = totlen;
3390 err = USBD_NORMAL_COMPLETION;
3391 ret:
3392 xfer->status = err;
3393 crit_enter();
3394 usb_transfer_complete(xfer);
3395 crit_exit();
3396 return (USBD_IN_PROGRESS);
3397 }
3398
3399 /* Abort a root control request. */
3400 void
3401 uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3402 {
3403 /* Nothing to do, all transfers are synchronous. */
3404 }
3405
3406 /* Close the root pipe. */
3407 void
3408 uhci_root_ctrl_close(usbd_pipe_handle pipe)
3409 {
3410 DPRINTF(("uhci_root_ctrl_close\n"));
3411 }
3412
3413 /* Abort a root interrupt request. */
3414 void
3415 uhci_root_intr_abort(usbd_xfer_handle xfer)
3416 {
3417 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3418
3419 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3420 sc->sc_intr_xfer = NULL;
3421
3422 if (xfer->pipe->intrxfer == xfer) {
3423 DPRINTF(("uhci_root_intr_abort: remove\n"));
3424 xfer->pipe->intrxfer = 0;
3425 }
3426 xfer->status = USBD_CANCELLED;
3427 #ifdef DIAGNOSTIC
3428 UXFER(xfer)->iinfo.isdone = 1;
3429 #endif
3430 usb_transfer_complete(xfer);
3431 }
3432
3433 usbd_status
3434 uhci_root_intr_transfer(usbd_xfer_handle xfer)
3435 {
3436 usbd_status err;
3437
3438 /* Insert last in queue. */
3439 err = usb_insert_transfer(xfer);
3440 if (err)
3441 return (err);
3442
3443 /*
3444 * Pipe isn't running (otherwise err would be USBD_INPROG),
3445 * so start it first.
3446 */
3447 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3448 }
3449
3450 /* Start a transfer on the root interrupt pipe */
3451 usbd_status
3452 uhci_root_intr_start(usbd_xfer_handle xfer)
3453 {
3454 usbd_pipe_handle pipe = xfer->pipe;
3455 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3456
3457 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3458 xfer, xfer->length, xfer->flags));
3459
3460 if (sc->sc_dying)
3461 return (USBD_IOERROR);
3462
3463 sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
3464 usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3465 sc->sc_intr_xfer = xfer;
3466 return (USBD_IN_PROGRESS);
3467 }
3468
3469 /* Close the root interrupt pipe. */
3470 void
3471 uhci_root_intr_close(usbd_pipe_handle pipe)
3472 {
3473 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3474
3475 usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3476 sc->sc_intr_xfer = NULL;
3477 DPRINTF(("uhci_root_intr_close\n"));
3478 }
DragonFly vkernel multiprocessor port